USD471165S1 - Surface mount package - Google Patents

Surface mount package Download PDF

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Publication number
USD471165S1
USD471165S1 US29/141,963 US14196301F USD471165S US D471165 S1 USD471165 S1 US D471165S1 US 14196301 F US14196301 F US 14196301F US D471165 S USD471165 S US D471165S
Authority
US
United States
Prior art keywords
surface mount
mount package
package
view
elevational view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US29/141,963
Inventor
Richard K. Williams
James Harnden
Anthony Chia
Chu Weibing
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GEM Services Inc USA
Original Assignee
GEM Services Inc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEM Services Inc USA filed Critical GEM Services Inc USA
Priority to US29/141,963 priority Critical patent/USD471165S1/en
Assigned to GEM SERVICES, INC. reassignment GEM SERVICES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHIA, ANTHONY, WEIBING, CHU, WILLIAMS, RICHARD K., HARNDEN, JAMES
Application granted granted Critical
Publication of USD471165S1 publication Critical patent/USD471165S1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

FIG. 1 is a perspective view of a surface mount package showing our new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a bottom plan view thereof;
FIG. 4 is a front elevational view thereof:
FIG. 5 is a rear elevational view thereof;
FIG. 6 is a left side elevational view thereof; and,
FIG. 7 the right side elevational view thereof.
The broken line showing of the environment is for illustrative purpose only and forms no part of the claimed design.

Claims (1)

  1. The ornamental design for a surface mount package, as shown and described.
US29/141,963 2001-05-15 2001-05-15 Surface mount package Expired - Lifetime USD471165S1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US29/141,963 USD471165S1 (en) 2001-05-15 2001-05-15 Surface mount package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29/141,963 USD471165S1 (en) 2001-05-15 2001-05-15 Surface mount package

Publications (1)

Publication Number Publication Date
USD471165S1 true USD471165S1 (en) 2003-03-04

Family

ID=22497992

Family Applications (1)

Application Number Title Priority Date Filing Date
US29/141,963 Expired - Lifetime USD471165S1 (en) 2001-05-15 2001-05-15 Surface mount package

Country Status (1)

Country Link
US (1) USD471165S1 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7166496B1 (en) 2005-08-17 2007-01-23 Ciclon Semiconductor Device Corp. Method of making a packaged semiconductor device
US20070085204A1 (en) * 2005-10-19 2007-04-19 Cicion Semiconductor Device Corp. Chip scale power LDMOS device
US20070215939A1 (en) * 2006-03-14 2007-09-20 Shuming Xu Quasi-vertical LDMOS device having closed cell layout
US20080036078A1 (en) * 2006-08-14 2008-02-14 Ciclon Semiconductor Device Corp. Wirebond-less semiconductor package
US20100176508A1 (en) * 2009-01-12 2010-07-15 Ciclon Semiconductor Device Corp. Semiconductor device package and method of assembly thereof
USD803796S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
USD803797S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
USD803798S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
USD803795S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
US10256385B2 (en) 2007-10-31 2019-04-09 Cree, Inc. Light emitting die (LED) packages and related methods

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
JEDEC Solid State Product Outline, Low Profile Small Outline J-Lead Package (LSOJ), PRSO-J/LSOJ, Issue B, Jun., 1999, MO-199, pp. 1-5.
JEDEC Solid State Product Outlines, "Plastic Small Outline (SOJ) Package Family with .330 Inch Body Width", Issue B, May, 1992, MO-121, pp. 1-2.
JEDEC Solid State Product Outlines, "Small Outline J-Lead" (SOJ) .300 Body Family (MS-013 Body), Issue A, Jun., 1988, MO-088, AA-AF.

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070040254A1 (en) * 2005-08-17 2007-02-22 Lopez Osvaldo J Semiconductor die package
US7504733B2 (en) 2005-08-17 2009-03-17 Ciclon Semiconductor Device Corp. Semiconductor die package
US7166496B1 (en) 2005-08-17 2007-01-23 Ciclon Semiconductor Device Corp. Method of making a packaged semiconductor device
US20070085204A1 (en) * 2005-10-19 2007-04-19 Cicion Semiconductor Device Corp. Chip scale power LDMOS device
US7560808B2 (en) 2005-10-19 2009-07-14 Texas Instruments Incorporated Chip scale power LDMOS device
US20070215939A1 (en) * 2006-03-14 2007-09-20 Shuming Xu Quasi-vertical LDMOS device having closed cell layout
US7446375B2 (en) 2006-03-14 2008-11-04 Ciclon Semiconductor Device Corp. Quasi-vertical LDMOS device having closed cell layout
US8304903B2 (en) 2006-08-14 2012-11-06 Texas Instruments Incorporated Wirebond-less semiconductor package
US20080036078A1 (en) * 2006-08-14 2008-02-14 Ciclon Semiconductor Device Corp. Wirebond-less semiconductor package
US20110095411A1 (en) * 2006-08-14 2011-04-28 Texas Instruments Incorporated Wirebond-less Semiconductor Package
US10256385B2 (en) 2007-10-31 2019-04-09 Cree, Inc. Light emitting die (LED) packages and related methods
US20100176508A1 (en) * 2009-01-12 2010-07-15 Ciclon Semiconductor Device Corp. Semiconductor device package and method of assembly thereof
US8049312B2 (en) 2009-01-12 2011-11-01 Texas Instruments Incorporated Semiconductor device package and method of assembly thereof
USD803796S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
USD803797S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
USD803798S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device
USD803795S1 (en) * 2016-08-09 2017-11-28 Rsm Electron Power, Inc. Surface mount device

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