USB554164I5 - - Google Patents

Info

Publication number
USB554164I5
USB554164I5 US55416475A USB554164I5 US B554164 I5 USB554164 I5 US B554164I5 US 55416475 A US55416475 A US 55416475A US B554164 I5 USB554164 I5 US B554164I5
Authority
US
United States
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of USB554164I5 publication Critical patent/USB554164I5/en
Application granted granted Critical
Publication of US4001465A publication Critical patent/US4001465A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H10D10/441—Vertical BJTs having an emitter-base junction ending at a main surface of the body and a base-collector junction ending at a lateral surface of the body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/61—Formation of materials, e.g. in the shape of layers or pillars of insulating materials using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking
US05/554,164 1974-03-01 1975-02-28 Process for producing semiconductor devices Expired - Lifetime US4001465A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2409910A DE2409910C3 (en) 1974-03-01 1974-03-01 Method for manufacturing a semiconductor device
DT2409910 1974-03-01

Publications (2)

Publication Number Publication Date
USB554164I5 true USB554164I5 (en) 1976-03-09
US4001465A US4001465A (en) 1977-01-04

Family

ID=5908864

Family Applications (1)

Application Number Title Priority Date Filing Date
US05/554,164 Expired - Lifetime US4001465A (en) 1974-03-01 1975-02-28 Process for producing semiconductor devices

Country Status (7)

Country Link
US (1) US4001465A (en)
JP (1) JPS5423799B2 (en)
CA (1) CA1036050A (en)
DE (1) DE2409910C3 (en)
FR (1) FR2262864B1 (en)
GB (1) GB1449559A (en)
IT (1) IT1033295B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4113515A (en) 1975-06-04 1978-09-12 U.S. Philips Corporation Semiconductor manufacturing method using buried nitride formed by a nitridation treatment in the presence of active nitrogen
US4142004A (en) 1976-01-22 1979-02-27 Bell Telephone Laboratories, Incorporated Method of coating semiconductor substrates
US4239811A (en) 1979-08-16 1980-12-16 International Business Machines Corporation Low pressure chemical vapor deposition of silicon dioxide with oxygen enhancement of the chlorosilane-nitrous oxide reaction

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1437112A (en) * 1973-09-07 1976-05-26 Mullard Ltd Semiconductor device manufacture
JPS5246784A (en) * 1975-10-11 1977-04-13 Hitachi Ltd Process for production of semiconductor device
JPS6035818B2 (en) * 1976-09-22 1985-08-16 日本電気株式会社 Manufacturing method of semiconductor device
US4109050A (en) * 1976-12-09 1978-08-22 General Electric Company Coated silicon-based ceramic composites and method for making same
US4462846A (en) * 1979-10-10 1984-07-31 Varshney Ramesh C Semiconductor structure for recessed isolation oxide
US4272308A (en) * 1979-10-10 1981-06-09 Varshney Ramesh C Method of forming recessed isolation oxide layers
US4278705A (en) * 1979-11-08 1981-07-14 Bell Telephone Laboratories, Incorporated Sequentially annealed oxidation of silicon to fill trenches with silicon dioxide
US4331708A (en) * 1980-11-04 1982-05-25 Texas Instruments Incorporated Method of fabricating narrow deep grooves in silicon
JPS5873163A (en) * 1981-10-27 1983-05-02 Toshiba Corp Mos semiconductor device
CA1252372A (en) * 1985-01-21 1989-04-11 Joseph P. Ellul Nitsinitride and oxidized nitsinitride dielectrics on silicon
US4789560A (en) * 1986-01-08 1988-12-06 Advanced Micro Devices, Inc. Diffusion stop method for forming silicon oxide during the fabrication of IC devices
US6015737A (en) * 1991-07-26 2000-01-18 Denso Corporation Production method of a vertical type MOSFET
US6482716B1 (en) 2000-01-11 2002-11-19 Infineon Technologies North America Corp. Uniform recess depth of recessed resist layers in trench structure
GB0223361D0 (en) * 2002-10-08 2002-11-13 Council Cent Lab Res Councils Optical micro sensor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL169121C (en) * 1970-07-10 1982-06-01 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY INCLUDED ON A SURFACE WITH AT LEAST PART IN SEMINATED IN THE SEMICONDUCTOR BODY FORMED BY THERMAL OXIDIZED OXYGEN
US3719535A (en) * 1970-12-21 1973-03-06 Motorola Inc Hyperfine geometry devices and method for their fabrication
NL7204741A (en) * 1972-04-08 1973-10-10
US3899372A (en) * 1973-10-31 1975-08-12 Ibm Process for controlling insulating film thickness across a semiconductor wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4113515A (en) 1975-06-04 1978-09-12 U.S. Philips Corporation Semiconductor manufacturing method using buried nitride formed by a nitridation treatment in the presence of active nitrogen
US4142004A (en) 1976-01-22 1979-02-27 Bell Telephone Laboratories, Incorporated Method of coating semiconductor substrates
US4239811A (en) 1979-08-16 1980-12-16 International Business Machines Corporation Low pressure chemical vapor deposition of silicon dioxide with oxygen enhancement of the chlorosilane-nitrous oxide reaction

Also Published As

Publication number Publication date
CA1036050A (en) 1978-08-08
IT1033295B (en) 1979-07-10
GB1449559A (en) 1976-09-15
JPS5423799B2 (en) 1979-08-16
FR2262864B1 (en) 1979-03-16
DE2409910A1 (en) 1975-09-18
DE2409910B2 (en) 1978-07-20
FR2262864A1 (en) 1975-09-26
DE2409910C3 (en) 1979-03-15
JPS50122184A (en) 1975-09-25
US4001465A (en) 1977-01-04

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