US7552427B2 - Method and apparatus for implementing a bi-endian capable compiler - Google Patents
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- US7552427B2 US7552427B2 US11/010,490 US1049004A US7552427B2 US 7552427 B2 US7552427 B2 US 7552427B2 US 1049004 A US1049004 A US 1049004A US 7552427 B2 US7552427 B2 US 7552427B2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/43—Checking; Contextual analysis
- G06F8/436—Semantic checking
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/447—Target code generation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/52—Binary to binary
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- An embodiment of the present invention relates to compilers. More specifically, an embodiment of the present invention relates to a method and apparatus for implementing a bi-endian capable compiler.
- Byte endianess is an attribute of data storage and retrieval where the data storage and data retrieval support multiple access sizes. Finer granularity accesses allow a programmer to see the order in which the larger accesses store bytes in memory. Big endian data are stored in memory in opposite byte order from little endian data. Little endian data are stored with its least significant byte in the lowest memory byte address (storing left to right). Big endian data are stored with its most significant byte in the lowest memory byte address (storing right to left). Big and little endian variables having the same value are identical in CPU registers, but have differing order in memory.
- Source code that is written using one byte endianess convention cannot be executed on a platform or target system that is of another byte endianess convention without recognizing the differing order of how some of the data is stored in memory. For example, in order to preserve correct software behavior, an endian byte ordering within data must be preserved when a union or pointer access might make such order visible to the programmer. Byte order for data written or read from beyond the scope of the program must also be preserved.
- FIG. 1 is a block diagram of an exemplary computer system in which an embodiment of the present invention may be implemented.
- FIG. 2 is a block diagram that illustrates a bi-endian capable compiler according to an example embodiment of the present invention.
- FIG. 3 is a flow chart of a method for facilitating bi-endian support when compiling code according to an example embodiment of the invention.
- FIG. 4 is a flow chart of a method for assigning endian type to data using implicit declarations according to an example embodiment of the present invention.
- FIG. 5 is a flow chart of a method for assigning endian type to data using explicit declarations according to an example embodiment of the present invention.
- FIG. 6 is a flow chart of a method for assigning endian type to data using implicit and explicit declarations according to an example embodiment of the present invention.
- FIG. 7 illustrates an example of associating endian type to data using implicit declarations according to an embodiment of the present invention.
- FIG. 1 is a block diagram of an exemplary computer system 100 according to an embodiment of the present invention.
- the computer system 100 includes a processor 101 that processes data signals and a memory 113 .
- the computer system 100 may be of a big endian or little endian type where the processor 101 either stores the low-order byte of a number at the lowest address and the high-order byte of a number at the highest address (little endian convention) or stores the high-order byte of the number at the lowest address and the low-order byte at the highest address (big endian convention).
- the processor 101 may be a complex instruction set computer microprocessor, a reduce instruction set computing microprocessor, a very long instruction word microprocessor, a processor implementing a combination of instruction sets, or other processor device.
- FIG. 1 shows the computer system 100 with a single processor. However, it is understood that the computer system 100 may operate with multiple processors. Additionally, each of the one or more processors may support one or more hardware threads.
- the processor 101 is coupled to a CPU bus 110 that transmits data signals between processor 101 and other components in the computer system 100 .
- the memory 113 may be a dynamic random access memory device, a static random access memory device, read-only memory, and/or other memory device.
- the memory 113 may store instructions and code represented by data signals that may be executed by the processor 101 .
- a bi-endian capable compiler may be stored in the memory 113 and implemented by the processor 101 in the computer system 100 to provide bi-endian support when compiling software. Data that would normally be stored in little endian order in the memory 113 may be stored in big endian order, and vice versa, by performing an endian flip (byte swap) operation prior to the store. This value may be retrieved by performing an endian flip operation after the retrieval from the memory 113 .
- Endian flip operations may be performed prior to writing the data (pre-write) and after reading the data (post-read) for aligned and unaligned references. Endian flip operations may be implemented using a separate instruction, a separate machine operation, or a side effect of a particular load or store operation.
- a cache memory 102 resides inside processor 101 that stores data signals stored in memory 113 .
- the cache 102 speeds access to memory by the processor 101 by taking advantage of its locality of access.
- the cache 102 resides external to the processor 101 .
- a bridge memory controller 111 is coupled to the CPU bus 110 and the memory 113 .
- the bridge memory controller 111 directs data signals between the processor 101 , the memory 113 , and other components in the computer system 100 and bridges the data signals between the CPU bus 110 , the memory 113 , and a first IO bus 120 .
- the first IO bus 120 may be a single bus or a combination of multiple buses.
- the first IO bus 120 provides communication links between components in the computer system 100 .
- a network controller 121 is coupled to the first IO bus 120 .
- the network controller 121 may link the computer system 100 to a network of computers (not shown) and supports communication among the machines.
- a display device controller 122 is coupled to the first IO bus 120 .
- the display device controller 122 allows coupling of a display device (not shown) to the computer system 100 and acts as an interface between the display device and the computer system 100 .
- a second IO bus 130 may be a single bus or a combination of multiple buses.
- the second IO bus 130 provides communication links between components in the computer system 100 .
- a data storage device 131 is coupled to the second IO bus 130 .
- the data storage device 131 may be a hard disk drive, a floppy disk drive, a CD-ROM device, a flash memory device or other mass storage device.
- An input interface 132 is coupled to the second IO bus 130 .
- the input interface 132 may be, for example, a keyboard and/or mouse controller or other input interface.
- the input interface 132 may be a dedicated device or can reside in another device such as a bus controller or other controller.
- the input interface 132 allows coupling of an input device to the computer system 100 and transmits data signals from an input device to the computer system 100 .
- An audio controller 133 is coupled to the second IO bus 130 .
- the audio controller 133 operates to coordinate the recording and playing of sounds and is also coupled to the IO bus 130 .
- a bus bridge 123 couples the first IO bus 120 to the second IO bus 130 .
- the bus bridge 123 operates to buffer and bridge data signals between the first IO bus 120 and the second 10 bus 130 .
- FIG. 2 is a block diagram that illustrates a bi-endian capable compiler 200 according to an example embodiment of the present invention.
- the bi-endian capable compiler 200 includes a compiler manager 210 .
- the compiler manager 210 receives source code to compile.
- the compiler manager 210 interfaces with and transmits information between other components in the bi-endian capable compiler 200 .
- the bi-endian capable compiler 200 includes a front end unit 220 .
- the front end unit 220 operates to parse source code and convert it to an abstract syntax tree.
- the front end unit 220 may also assign an endian type to data in the source code.
- a characteristic of a file which the source code originates from is compared with implicit declaration criteria that may have an associated endian type.
- the implicit declaration criteria may include, for example, a location of the file where the source code originates from, such as a path name or directory.
- the implicit declaration criteria may also include a characteristic of a file in the directory, or other information.
- the front end unit 220 assigns data in the source code an endian type based on an endianess associated with the implicit declaration criteria.
- data in the source code may be associated with an endian type in the declaration.
- the front end unit 120 assigns an endian type to the data based on its associated endian type in the declaration. It should be appreciated that the front end unit 220 may implement both embodiments where an explicit declaration of an endian type to data may take precedence over an endianess associated with an implicit declaration criteria.
- the data in the source code may include base data types as well as aggregates such as data structures and unions.
- the bi-endian capable compiler 200 includes an intermediate language unit 230 .
- the intermediate language unit 230 transforms the abstract syntax tree into a common intermediate form such as an intermediate representation.
- the bi-endian capable compiler 230 determines where in the intermediate representation to perform endian flip operations and places endian flip operators at those locations. According to an embodiment of the bi-endian capable compiler 200 when data of one endian type is different than the endian type of a target or platform system, endian flips are performed prior to writing the data in memory and after reading the data from the memory of the target or platform system. It should be appreciated that the intermediate language unit 230 may transform the abstract syntax tree into one or more common intermediate forms.
- the bi-endian capable compiler 200 includes an optimizer unit 240 .
- the optimizer unit 240 includes a common sub-expression elimination (CSE) unit 241 .
- the CSE unit 241 eliminates redundant endian flip operations and simplifies the intermediate representation when it is determined that a value for data has not changed.
- the optimizer unit 240 includes a code motion unit 242 .
- the code motion unit 242 moves the endian flip operation to an earlier portion of an instruction stream when it may be more efficient to perform the endian flip operation from a performance standpoint.
- the optimizer unit 240 includes a constant propagation unit 243 .
- the constant propagation unit 243 eliminates an endian flip operation on a constant when it is determined from constant propagation analysis that a value for data has not changed and thus a read from memory is not necessary.
- the bi-endian compiler 200 includes a code generator 250 .
- the code generator 250 converts the intermediate representation into machine code.
- the code generator 250 inserts machine instructions to implement the endian flip operations.
- one or more BSWAP and/or shift instructions are used to implement the endian flip operations.
- operations on big endian data may be decomposed as shown in the example below.
- the bi-endian compiler 200 includes a register allocator 260 .
- the register allocator 260 identifies data in the intermediate representation that may be stored in registers in the processor rather than in memory.
- the register allocator 260 allocates registers to data that is of the endian type of the computer system.
- FIG. 3 is a flow chart of a method for facilitating bi-endian support when compiling code according to an example embodiment of the invention.
- an endian type is assigned to data.
- An endian type may be assigned to data through implicit declarations, explicit declarations, or a combination of implicit and explicit declarations.
- an endian flip is performed prior to writing the data in memory and after reading the data from the memory of the target or platform system.
- Endian flip operators may be placed in locations of an intermediate language where endian flip operations are determined to be performed.
- endian flips are inserted only for data for which there is a possible semantic difference between big- and little-endian representations. This may be determined, for example, by a compiler.
- data variables that are not external, volatile, or part of a union, and do not have their addresses explicitly referenced by code are stored in either representation without any semantic effect on the program. Further analysis may be performed to further reduce the class of variables which need endian flips.
- Endian flips may also be eliminated when the source and destination are the same endian type and the operation is one in which endian representation does not matter, e.g., bitwise boolean operations (and, or, xor, not).
- optimization of the endian flips is performed. Optimization may involve moving or eliminating an endian flip operation in order to reduce processor cycles when executing the code. According to an embodiment of the present invention, optimization may involve eliminating a redundant endian flip operation when it is determined that a value for data has not changed, moving the endian flip operation to an earlier or later portion of an instruction stream when it may be more efficient from a performance standpoint, or performing other procedures.
- machine instructions are inserted into the machine code to implement the endian flip operations.
- the endian flip operations flip bytes to support conversion between big endian data and little endian data
- one or more BSWAP and/or shift instructions may be used.
- register allocation is performed.
- data in the intermediate representation is identified to be stored in registers in a processor rather than in memory.
- FIG. 4 is a flow chart of a method for assigning endian type to data using implicit declarations according to an example embodiment of the present invention.
- the method shown in FIG. 4 may be implemented at 301 as shown in FIG. 3 .
- a characteristic of the file of the code to be compiled is compared with an implicit declaration criteria.
- the implicit declaration criteria may include, for example, a location of the file such as its path or directory name, a characteristic of another file in the directory, or other criteria.
- the implicit declaration criteria may have an endian type associated with it.
- a global flag for all the data in the code is set based on the comparison at 401 .
- the global flag may be an indicator to indicate an endian type associated for all data in the code.
- data in the code is parsed and the global flag is assigned to the data in the code.
- Implicit declarations as shown in FIG. 4 allow for software written on a first target or platform system utilizing a first endian type to be compiled, linked, or debugged on a second target or platform system utilizing a second endian type without modification to the source code.
- the embodiment shown in FIG. 4 allows a bi-endian capable compiler to support both big and little endian byte orderings for base data bytes.
- the implicit declaration criteria is a path name that is associated with an endian type
- all source files within a directory having the path name would be compiled with the associated endian type.
- Other implicit declaration criteria may be implemented. For example, a name of a file sharing a same directory as a file to be compiled may be used to associate an endian type.
- association of an implicit declaration criteria to an endian type may be made using a command to the compiler upon invocation.
- a file that set an endian mode before and reset the endian mode after inclusion of a source file or header file may be automatically included in the association. It should be appreciated that other procedures for association may also be used.
- FIG. 5 is a flow chart of a method for assigning endian type to data using explicit declarations according to an example embodiment of the present invention.
- the method shown in FIG. 5 may be implemented at 301 shown in FIG. 3 .
- data in the code to be compiled is parsed.
- an endian type is associated with the data.
- the declaration of the data is checked for type specifiers, attribute qualifiers, or other labels that may indicate an endianess that may be associated with the data. If it is determined that an endian type is not associated with the data, control proceeds to 503 . If it is determined that an endian type is associated with the data, control proceeds to 504 .
- a flag is assigned to the data to indicate a default endian type.
- a flag is assigned to the data to indicate an endian type corresponding to the platform system from which the code originated from, an endian type corresponding to the platform system which the code is to be executed on, or other endian type.
- a flag is assigned to the data to indicate an endian type associated with the data in the declaration.
- Explicit declarations as shown in FIG. 5 allow a compiler to simultaneously support and handle big and little endian types with explicit modifications to the source code.
- Bi-endian support allows the integration of big endian software with little endian software.
- Instances of base data types such as integers, pointers, floats, and bit fields, may be explicitly qualified as to their endianess by type specifiers, attribute qualifiers, or other labeling techniques.
- the endianess of a base data type may be the default of the compiler or other component. Examples of explicit declarations are shown below.
- _big endian int i /*a big endian integer*/ int*_bigendian p; /*a big endian pointer to a default integer*/ struct ⁇ _littleendian inta; _bigendian int b ⁇ c; /*a bi-endian structure*/ union ⁇ _little endian int 1; _bigendian int b ⁇ d; /*a bi-endian union*/ int i1_atribute_((bigendian))/*alternate method of explicitly declaring endi attribute*/
- FIG. 6 is a flow chart of a method for assigning endian type to data using implicit and explicit declarations according to an example embodiment of the present invention.
- the method shown in FIG. 6 may be implemented at 301 shown in FIG. 3 .
- a characteristic of the file of the code to be compiled is compared with an implicit declaration criteria.
- the implicit declaration criteria may include, for example, a location of the file such as its path or directory name, or characteristic of another file in the directory.
- the implicit declaration criteria may have an endian type associated with it.
- a global flag is set based on the comparison as described at 401 .
- the global flag may be an indicator to indicate an endian type associated for all data in the code.
- an endian type is associated with the data.
- the declaration of the data is checked for type specifiers, attribute qualifiers, and other labels that may indicate an endianess that may be associated with the data. If it is determined that an endian type is not associated with the data, control proceeds to 605 . If it is determined that an endian type is associated with the data, control proceeds to 606 .
- the global flag is assigned to the data in the code.
- a flag is assigned to the data to indicate an endian type associated with the data in the declaration.
- a second flag may also be assigned to the data to indicate that the endian type is determined explicitly.
- FIGS. 3 through 6 are flow charts illustrating methods according to embodiments of the present invention. Some of the techniques and procedures illustrated in these figures may be performed sequentially, in parallel, or in an order other than which is described. It should be appreciated that not all of the techniques and procedures described are required to be performed, that additional techniques and procedures may be added, and that some of the illustrated techniques and procedures may be substituted with other techniques and procedures.
- FIG. 7 illustrates an example of associating endian type to data using implicit declarations according to an embodiment of the present invention.
- the implicit declaration criteria is the location of the code to be compiled.
- Location 710 is associated with files that are big endian.
- Location 720 is associated with files that are little endian.
- Location 710 includes a .h file 711 that defines data structures t 1 be and t 2 be . Since both of these data structures are defined in a .h file that is in a location that has a big endian type association, both data structures t 1 be and t 2 be are assigned an endian type of big endian.
- Location 720 includes a .h file 721 that defines data structures t 1 le and t 2 le . Since both of these data structures are defined in a .h file that is in a location that has a little endian type association, both data structures t 1 le and t 2 le are assigned an endian type of big endian.
- Location 710 includes a .c file 712 that declares variables and their corresponding data structures, if any. Variables v1 and v3 are big endian. Variables v2 and v4 are little endian. Location 720 includes a .c file 722 that declares variables and their corresponding data structures, if any. Variables v5 and v8 are little endian. Variables v6 and v8 are big endian.
- variable v1 which is big endian is set to v2 which is little endian
- variable v2 is converted from little endian to big endian
- variable v3 which is big endian is set to v4 which is little endian
- variable v4 is also converted from little endian to big endian.
- variable v5 which is little endian is set to v6 which is big endian
- variable v6 is converted from big endian to little endian
- variable v8 is also converted from big endian to little endian.
- Embodiments of the present invention may be provided as a computer program product, or software, that may include a machine-readable medium having stored thereon instructions.
- the machine-readable medium may be used to program a computer system or other electronic device.
- the machine-readable medium may include, but is not limited to, floppy diskettes, optical disks, CD-ROMs, and magneto-optical disks or other type of media/machine-readable medium suitable for storing electronic instructions.
- the techniques described herein are not limited to any particular software configuration. They may find applicability in any computing or processing environment.
- the term “machine readable medium” used herein shall include any medium that is capable of storing or encoding a sequence of instructions for execution by the machine and that cause the machine to perform any one of the methods described herein.
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US11/010,490 US7552427B2 (en) | 2004-12-13 | 2004-12-13 | Method and apparatus for implementing a bi-endian capable compiler |
PCT/US2005/044772 WO2006065689A1 (en) | 2004-12-13 | 2005-12-09 | Method and apparatus for implementing a bi-endian capable compiler |
KR1020097025678A KR100962746B1 (ko) | 2004-12-13 | 2005-12-09 | 양 엔디안 가능 컴파일러를 구현하기 위한 방법 및 장치 |
CN200580042563.6A CN101160564B (zh) | 2004-12-13 | 2005-12-09 | 用于实现有双端序能力的编译器的方法和装置 |
JP2007545690A JP2008523514A (ja) | 2004-12-13 | 2005-12-09 | バイエンディアン対応コンパイラを実現する方法及び装置 |
EP05853640A EP1846819A1 (en) | 2004-12-13 | 2005-12-09 | Method and apparatus for implementing a bi-endian capable compiler |
KR1020077013380A KR100947137B1 (ko) | 2004-12-13 | 2005-12-09 | 양 엔디안 가능 컴파일러를 구현하기 위한 방법 및 장치 |
US12/454,005 US8863103B2 (en) | 2004-12-13 | 2009-05-11 | Method and apparatus for implementing a bi-endian capable compiler |
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US10642586B2 (en) | 2015-08-17 | 2020-05-05 | International Business Machines Corporation | Compiler optimizations for vector operations that are reformatting-resistant |
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WO2006065689A1 (en) | 2006-06-22 |
US20060125663A1 (en) | 2006-06-15 |
EP1846819A1 (en) | 2007-10-24 |
US20090222800A1 (en) | 2009-09-03 |
CN101160564A (zh) | 2008-04-09 |
CN101160564B (zh) | 2013-01-02 |
KR20070086161A (ko) | 2007-08-27 |
KR20100007978A (ko) | 2010-01-22 |
JP2008523514A (ja) | 2008-07-03 |
US8863103B2 (en) | 2014-10-14 |
KR100947137B1 (ko) | 2010-03-12 |
KR100962746B1 (ko) | 2010-06-09 |
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