US6891362B2  Method and apparatus for estimating the phase of a signal  Google Patents
Method and apparatus for estimating the phase of a signal Download PDFInfo
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 US6891362B2 US6891362B2 US10432319 US43231903A US6891362B2 US 6891362 B2 US6891362 B2 US 6891362B2 US 10432319 US10432319 US 10432319 US 43231903 A US43231903 A US 43231903A US 6891362 B2 US6891362 B2 US 6891362B2
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 H—ELECTRICITY
 H04—ELECTRIC COMMUNICATION TECHNIQUE
 H04B—TRANSMISSION
 H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00  H04B13/00; Details of transmission systems not characterised by the medium used for transmission
 H04B1/69—Spread spectrum techniques
 H04B1/707—Spread spectrum techniques using direct sequence modulation
 H04B1/7073—Synchronisation aspects
 H04B1/7075—Synchronisation aspects with code phase acquisition
 H04B1/70751—Synchronisation aspects with code phase acquisition using partial detection
 H04B1/70753—Partial phase search

 H—ELECTRICITY
 H04—ELECTRIC COMMUNICATION TECHNIQUE
 H04B—TRANSMISSION
 H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00  H04B13/00; Details of transmission systems not characterised by the medium used for transmission
 H04B1/69—Spread spectrum techniques
 H04B1/707—Spread spectrum techniques using direct sequence modulation
 H04B1/7097—Interferencerelated aspects
 H04B1/711—Interferencerelated aspects the interference being multipath interference
 H04B1/7115—Constructive combining of multipath signals, i.e. RAKE receivers
 H04B1/7117—Selection, reselection, allocation or reallocation of paths to fingers, e.g. timing offset control of allocated fingers
Abstract
Description
This invention relates to a method for estimating the phase of a signal of interest, and to apparatus for estimating the phase of a signal of interest.
In accordance with a first aspect of this invention, there is provided a method of estimating the phase rotation of a signal of interest from first and second signals, the method comprising:

 a) determining whether a predetermined relationship exists between the magnitudes of the first and second signals;
 b) if the predetermined relationship is determined to exist, moving to step g);
 c) if the predetermined relationship does not exist, multiplying the first signal by a predetermined scaling factor to produce a multiplied signal;
 d) determining whether the predetermined relationship exists between the multiplied signal and the second signal;
 e) if the predetermined relationship does not exist between the multiplied signal and the second signal, multiplying the multiplied signal by the predetermined scaling factor;
 f) repeating steps d) and e) until the predetermined relationship exists;
 g) determining on how many occasions a signal was multiplied before the predetermined relationship came to exist; and
 h) estimating the phase rotation using the number of occasions of multiplication so determined.
In accordance with a second aspect of this invention, there is provided apparatus for estimating the phase rotation of a signal of interest from first and second signals, the apparatus comprising:

 means for determining whether a predetermined relationship exists between the magnitudes of the first and second signals;
 means for, if the predetermined relationship does not exist, multiplying the first signal by a predetermined scaling factor to produce a multiplied signal;
 means for determining whether the predetermined relationship exists between the multiplied signal and the second signal;
 means for, if the predetermined relationship does not exist between the multiplied signal and the second signal, repeatedly multiplying the multiplied signal by the predetermined scaling factor until the predetermined relationship exists;
 means for determining on how many occasions a signal was multiplied before the predetermined relationship came to exist, and
 means responsive to the number of occasions of multiplication so determined for estimating the phase rotation.
This invention allows frequency error mitigation to be accomplished without the extensive use of fixed point calculations and without using floating point calculations.
Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:
A finger 10 of a rake receiver to which the invention is applied is shown in FIG. 1. Referring to
The code generators 15, 16 and 20 are symbol locked with each other and run at code rate.
The complex value at a location P(n) in the second delay line 22 is provided to a first input of a multiplier 25. The conjugate of a complex value at another location P(n+k) in the second delay line 22 is calculated by a conjugate calculation device 26, and the result provided a second input of the multiplier 25. The multiplier 25 multiplies the two complex numbers it receives, and provides the resulting complex number at an output 27. Initially, the value of k is set to 2, the location P(n) then corresponding to an accumulation result two symbols subsequent to the location P(n+2). The second delay line 22 operates in a rolling manner such that, when another accumulation result is provided by the second accumulator 21, this is fed through the second delay line and the multiplier 25 is then fed with signals from subsequent locations in the second delay line. A new complex number output is, therefore, provided every symbol.
The complex number output is a complex vector whose phase is a coherent measurement of the phase rotation occurring between the symbols corresponding to the locations P(n) and P(n+k). The magnitude of the complex vector is proportional to the average power of the accumulation results from those two symbols.
Referring now to
The comparator block 33 determines if the magnitude of the first signal is greater than or equal to the magnitude of the second signal. If a negative determination is made, the magnitude of the first signal is doubled in a multiplication block 35 to form a multiplied signal, and a counter incremented from zero to one. Doubling is effected by a single leftwards bit shift of the first signal and by filling the last significant bit with a ‘zero’. The comparator block 33 then determines if the multiplied signal is greater than or equal to the magnitude of the second signal. If a negative determination is again made, the multiplied signal is doubled in the multiplication block to provide a revised multiplied signal, and the counter is again incremented. This process continues until the multiplied signal is equal to or exceeds the magnitude of the second signal, when progression is made to an upscaling block 36. The information carried to the upscaling block 36 is the multiplied signal (or the first signal if there is no multiplied signal), the magnitude of the second signal and the count of the counter. The count of the counter can be considered to be a multiplication factor. If the magnitude of the first signal was equal to or greater than the magnitude of the second signal i.e. no multiplied signals were calculated, the multiplication factor is zero.
The upscaling block 36 examines the multiplied signal or the first signal, as the case may be, and determines how much the signal can be upscaled before it would exceed the limit imposed by the 32 bits assigned to accommodate the signals. The degree of upscaling so determined is hereafter termed the upscaling factor. The multiplied signal or the first signal, as the case may be, is multiplied by the scaling factor, as is the second signal, and the upscaled signals are provided to the angle determination block 34.
The phase error θ_{e }in degrees, is then estimated by the following formula:
θ_{e}=45°/2^{M}
where M is the count of the counter.
Referring again to
Where θ_{e }is the calculated phase error, T_{m }is the measurement period in chips (initially 512 chips), and C is the chip rate. The frequency error f_{e }is rounded down to the nearest integer.
This frequency error f_{e }is then downscaled by dividing it by the upscaling factor in a downscaling block 38, and the resulting frequency error provided at an output. The frequency error is fed back to control the frequency of an oscillator (not shown) forming part of the rake receiver. The upscaling and subsequent downscaling results in improved accuracy of frequency error estimation since it reduces quantisation noise.
The downscaling block 38 is arranged such that it does not provide a frequency error signal which corresponds to a phase error in the region of −1° to +1°. If such a frequency error would be provided, the frequency error signal is increased incrementally until this criteria is met. Accordingly, once approximate convergence of the frequency of the received signals with the downconversion frequency effected in the rake receiver is reached, the error swings from one side of the true frequency to the other side, and so on.
Once convergence is reached, the value of k is increased, so that the multiplier 25 receives signals which correspond to accumulation results spaced further apart in time. This allows more accurate phase, and therefore frequency, error signals to be calculated.
This invention allows a phase error, and therefore a frequency error, signal to be provided with relatively few fixedpoint operations and with no floatingpoint operations. The apparatus required is, therefore, of simpler construction than conventional digital phase and frequency error estimation apparatus. The resultant frequency error signals are not, however, as accurate as those obtained conventionally, but the inventors see this as a disadvantage which is acceptable in view of the advantages obtained. The invention can be used both with acquisition and with tracking of the carrier of received signals, and is not limited to use with code division multiple access receivers.
Although the invention has been described with the multiplication block providing a doubling function, other scaling factors are possible, such as four and eight, although larger scaling factors result in decreased accuracy.
Claims (12)
Priority Applications (3)
Application Number  Priority Date  Filing Date  Title 

GB0028373A GB2369190B (en)  20001121  20001121  Method and apparatus for estimating the phase of a signal 
GB0028373.9  20001121  
PCT/GB2001/005095 WO2002042782A1 (en)  20001121  20011119  Method and apparatus for estimating the phase of a signal 
Publications (2)
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US20040032245A1 true US20040032245A1 (en)  20040219 
US6891362B2 true US6891362B2 (en)  20050510 
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US10432319 Active US6891362B2 (en)  20001121  20011119  Method and apparatus for estimating the phase of a signal 
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US (1)  US6891362B2 (en) 
EP (1)  EP1336111B1 (en) 
JP (1)  JP3899027B2 (en) 
KR (1)  KR100817902B1 (en) 
CN (1)  CN1265203C (en) 
DE (2)  DE60108416T2 (en) 
GB (1)  GB2369190B (en) 
WO (1)  WO2002042782A1 (en) 
Families Citing this family (9)
Publication number  Priority date  Publication date  Assignee  Title 

CN101509943B (en)  20081225  20110615  北京握奇数据系统有限公司  Phase detecting method and apparatus 
KR101040262B1 (en)  20100901  20110610  엘아이지넥스원 주식회사  Broadband digital frequency tracking method 
CN103760416B (en) *  20131223  20160518  中国科学院等离子体物理研究所  A directional coupler is a measurement error analysis phase HPM 
CN103760419B (en) *  20140218  20160323  国家电网公司  Phase angle of the current transmission line voltage measurement 
CN105004925B (en) *  20150709  20180130  广东电网有限责任公司电力科学研究院  Phase difference detection method and a systemwide power signal 
CN105092967B (en) *  20150709  20180320  广东电网有限责任公司电力科学研究院  Frequency detection method and a system power signal 
CN105301355B (en) *  20150918  20180403  广东电网有限责任公司电力科学研究院  The power signal frequency detection method and system of modulation sine function 
CN105319442A (en) *  20150918  20160210  广东电网有限责任公司电力科学研究院  Electric power signal frequency detection method and system based on cosine function modulation 
CN105158558B (en) *  20150918  20180403  广东电网有限责任公司电力科学研究院  Frequency detection method and a system power signal 
Citations (7)
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US3691474A (en) *  19701204  19720912  Burroughs Corp  Phase detector initializer for oscillator synchronization 
US4607218A (en)  19830303  19860819  Wild Heerbrugg Ag  Digital phase measurement method 
US5787124A (en)  19951121  19980728  Advantest Corporation  Quadrature detector and amplitude error correction method for quadrature detector 
US5856920A (en)  19970530  19990105  Square D Company  Method and apparatus for estimating a phase error between two independent timebases 
WO1999018691A1 (en)  19971008  19990415  Tropian, Inc.  Digital phase discrimination based on frequency sampling 
US6128584A (en) *  19981130  20001003  Abb Power T&D Company Inc.  System and method for frequency compensation in an energy meter 
US6636570B1 (en) *  19990621  20031021  Hyundai Electronics Industries Co., Ltd.  Phase detection apparatus for compensating phase rotation error 
Family Cites Families (4)
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US5001724A (en) *  19890113  19910319  HewlettPackard Company  Method and apparatus for measuring phase accuracy and amplitude profile of a continuousphasemodulated signal 
GB9311373D0 (en) *  19930602  19930721  Roke Manor Research  Apparatus for use in equipment providing a digital radio link between a fixed and a mobile radio unit 
US6097768A (en) *  19961121  20000801  Dps Group, Inc.  Phase detector for carrier recovery in a DQPSK receiver 
US6787124B2 (en)  20020315  20040907  Exxonmobil Research And Engineering Company  Synthetic porous crystalline material, EMM1, its synthesis and use 
Patent Citations (7)
Publication number  Priority date  Publication date  Assignee  Title 

US3691474A (en) *  19701204  19720912  Burroughs Corp  Phase detector initializer for oscillator synchronization 
US4607218A (en)  19830303  19860819  Wild Heerbrugg Ag  Digital phase measurement method 
US5787124A (en)  19951121  19980728  Advantest Corporation  Quadrature detector and amplitude error correction method for quadrature detector 
US5856920A (en)  19970530  19990105  Square D Company  Method and apparatus for estimating a phase error between two independent timebases 
WO1999018691A1 (en)  19971008  19990415  Tropian, Inc.  Digital phase discrimination based on frequency sampling 
US6128584A (en) *  19981130  20001003  Abb Power T&D Company Inc.  System and method for frequency compensation in an energy meter 
US6636570B1 (en) *  19990621  20031021  Hyundai Electronics Industries Co., Ltd.  Phase detection apparatus for compensating phase rotation error 
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JP3899027B2 (en)  20070328  grant 
CN1476538A (en)  20040218  application 
DE60108416D1 (en)  20050217  grant 
JP2004515141A (en)  20040520  application 
GB0028373D0 (en)  20010103  grant 
WO2002042782A1 (en)  20020530  application 
DE60108416T2 (en)  20051229  grant 
EP1336111A1 (en)  20030820  application 
US20040032245A1 (en)  20040219  application 
GB2369190A (en)  20020522  application 
GB2369190B (en)  20040714  grant 
KR100817902B1 (en)  20080331  grant 
CN1265203C (en)  20060719  grant 
EP1336111B1 (en)  20050112  grant 
KR20030051855A (en)  20030625  application 
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