US6792392B1 - Method and apparatus for configuring and collecting performance counter data - Google Patents
Method and apparatus for configuring and collecting performance counter data Download PDFInfo
- Publication number
 - US6792392B1 US6792392B1 US09/607,254 US60725400A US6792392B1 US 6792392 B1 US6792392 B1 US 6792392B1 US 60725400 A US60725400 A US 60725400A US 6792392 B1 US6792392 B1 US 6792392B1
 - Authority
 - US
 - United States
 - Prior art keywords
 - performance
 - events
 - user
 - event
 - counter
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Expired - Lifetime, expires
 
Links
Images
Classifications
- 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F11/00—Error detection; Error correction; Monitoring
 - G06F11/30—Monitoring
 - G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
 - G06F11/3466—Performance evaluation by tracing or monitoring
 
 - 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F11/00—Error detection; Error correction; Monitoring
 - G06F11/30—Monitoring
 - G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
 - G06F11/3466—Performance evaluation by tracing or monitoring
 - G06F11/348—Circuit details, i.e. tracer hardware
 
 - 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
 - G06F2201/86—Event-based monitoring
 
 - 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
 - G06F2201/88—Monitoring involving counting
 
 
Definitions
- the present invention generally relates to computer systems, and in particular, to a method and apparatus for collecting hardware performance counter data.
 - Hardware and software developers use information collected by a performance-monitoring tool to better understand how hardware components within a computer system operate with the operating system kernel and application programs. For example, hardware component designers may use the performance-monitoring tool to monitor a hardware component's performance so that the data collected thereby may be used to drive optimization of the component's design. Similarly, software developers may use the information provided by the performance-monitoring tool to develop software code that utilizes various components within a computer system more efficiently.
 - performance counters are used to monitor the performance of a computer system.
 - the performance counters are implemented as registers in hardware components and variables in software codes and are used to count the number of occurrences of a particular event, such as for example, to count the number of cache misses.
 - the preexisting performance-monitoring tools do not allow a user to selectively choose which hardware performance counters are to be monitored.
 - all performance counters within a performance object are collected during the performance-monitoring tool's periodic call to collect data. Consequently, if a performance object contains a number of performance counters (e.g., ten performance counters), all performance counters within the performance object must be monitored even if information with regard to only one performance counter is needed.
 - the preexisting performance-monitoring tools do not allow a user to selectively customize the collection of performance counter data.
 - FIG. 1 is a block diagram of a performance monitoring system in a computer system in accordance with one embodiment of the present invention.
 - FIG. 2 is a block diagram of a hardware component having performance counters incorporated therein.
 - FIG. 3 is a flowchart of a performance counter configuration operation of a counter collection application according to one embodiment of the present invention.
 - FIG. 4 is a flowchart of a performance counter programming operation of the counter collection application according to one embodiment of the present invention.
 - FIG. 5 is a flowchart of a performance data collection operation of the counter collection application according to one embodiment of the present invention.
 - FIG. 1 is a block diagram of a performance-monitoring system 10 operating within a computer system 12 in accordance with one embodiment of the present invention.
 - the performance-monitoring system 10 generally includes a counter collection application (CCA) 14 and a user interface 18 for allowing user interaction with the CCA.
 - the CCA 14 is operable within a computer system (e.g., personal computer, workstation, mainframe and the like) having a number of device drivers 26 coupled to various hardware components 28 .
 - Loaded within the CCA 14 are one or more performance dynamic link libraries (performance DLLs) 16 .
 - the performance DLLs 16 are developed (by hardware and software developers) based on a set of application programming interfaces (performance DLL APIs) defined by this invention.
 - the CCA 14 reads a system registry 22 to retrieve the names and descriptions of each counter event supported by the performance DLLs.
 - a performance DLL 16 may be developed for the purposes of monitoring performance counters residing in the subsystem (e.g., hardware component or software program).
 - the performance counters in hardware components are programmable to allow monitoring of any one independent “event” selected from a predetermined list of counter events.
 - the programmable performance counters will be described more in detail below with reference to FIG. 2 .
 - an “event” or a “counter event” in the context of the present invention are used to describe some particular activity occurring in a hardware component or a software code.
 - an “event” or a “counter event” can take the form of a logic signal or other electrical signal that indicates an occurrence or duration of some particular activity.
 - the events to be counted by a performance counter in a hardware component may include any activity such as cache misses, cache hits, clock pulses, etc.
 - an “event” or a “counter event” can take the form of any action, activity or occurrence to which the program has access.
 - the event to be counted by a performance counter (e.g., variable) in a software code may include any activity such as throughput of bytes to and from a server application.
 - Performance DLLs 16 are libraries that are loaded when the CCA 14 is started and serve as a bridge between the CCA 14 and performance counters 30 that reside somewhere else in the computer system.
 - Provided within the performance DLL 16 is a set of structures that define each performance counter that the performance DLL has the ability to monitor.
 - the performance DLL In order to have the ability to read and program performance counters 30 that reside in external subsystems, the performance DLL also has knowledge about how to communicate with the external subsystems (e.g., hardware component or software code) via a device driver 26 or other interprocess communication (IPC) mechanism.
 - IPC interprocess communication
 - the developer may add an entry in the system registry 22 that describes their performance DLL 16 .
 - the developer may also add name and description entries into the system registry that describes each of the performance counter events supported by the performance DLL.
 - the CCA 14 When the CCA 14 is started, it examines the system registry 22 to find performance DLLs registered on the computer system and loads them. The CCA 14 also reads the names of the performance objects and performance counter events from the system register 22 and later matches them with the data collected from the performance DLL.
 - Each performance DLL 16 is capable of supporting one or more performance objects. Performance objects are used to organize performance counter events wherein each object supports a set of performance counter events.
 - the performance DLLs developed in accordance with the present invention provides the ability to select a subset of performance counter events from a performance object to be monitored and the ability to customize how or when the performance counter events are counted.
 - the performance DLL is configured to monitor application-specific performance counters that describe the behavior of hardware systems developed by other engineers.
 - application-specific performance counter is used to mean a metric that applies uniquely to a specific subsystem.
 - a specific graphics card may include a special feature that may provide especially good graphics performance.
 - An appropriate application-specific performance counter for this graphics card would track the percentage of time the special feature was being used.
 - FIG. 2 shows one example of a hardware component (e.g., processor) 28 having programmable performance counters 30 incorporated therein.
 - a hardware component e.g., processor
 - the performance DLL 16 of the present invention is configured to communicate with performance counters 30 via a device driver 26 .
 - two programmable performance counters 30 are shown; however any number of performance counters may be used (e.g., 3, 4, etc.).
 - Each programmable performance counter 30 generally includes a multiplexor 32 , a counter register 34 and an event select register (ESR) 36 .
 - the multiplexor 32 has a number of inputs coupled to receive various component-specific event signals 38 and an output coupled to the counter register 34 for counting any one independent event selected from a predetermined list of component-specific events 38 .
 - the performance counter 30 is programmable to couple any one of the component-specific event signals 38 to the count register 34 . This coupling of one of the inputs of the multiplexor 32 to the counter register 34 is controlled by the ESR 36 .
 - the performance counter is programmed by instructions sent by the device driver.
 - the performance DLL 16 sends instructions to the device driver 26 , which in turn instructs the ESR to select the component-specific event to be counted by the respective counter register.
 - the performance DLL can be used to read the content of the counter registers 34 via the device driver 26 to determine how many times the selected events have occurred.
 - the performance DLL 16 is also configured to send instructions to the device driver, which in turn, programs the ESR 36 to customize the way in which the component-specific events 38 are counted.
 - the ESR 36 may have bits that can be set and depending on how those bits are set, the performance counter is programmed to count a particular component-specific event only when the hardware component (e.g., processor) is operating at a certain mode or privilege level. In other words, the ESR 36 is capable of controlling the count operations of the counter register in addition to controlling the selection of the event to be counted.
 - an Intel Pentium III processor may be programmed to count the number of L2 Cache misses. This collection can be customized to count the event (i.e., L2 Cache misses) when it occurs during operating system privilege level, during user privilege level, or during both operating system and user privilege levels.
 - the present invention defines a set of performance APIs.
 - the performance APIs are functions in a performance DLL that are called by the CCA.
 - five performance APIs are employed, including an Open API, a Collect API, a Close API, a ProgramCounter API and a GetExtendedCounterName API.
 - the Open API is called by the CCA when the performance DLL is first loaded.
 - the Open API is intended to allow the performance DLL to initialize itself by going out to the computer system and finding the devices and/or software that it will be collecting performance data from.
 - the Collect API gets called periodically during a collection session by the CCA to request performance data from the performance DLL which receives its performance data from performance registers in hardware components and/or variables in software.
 - the Close API gets called by the CCA when the user exits the CCA and enables the performance DLL to free up memory that was allocated and close its connection to the external subsystem components.
 - the ProgramCounter and GetExtendedCounterName APIs provide the ability to selectively choose one or more performance counter events to be monitored simultaneously and customize the manner in which the data is collected.
 - the ProgramCounter API gets called at different points during the execution of the CCA and serves various functions including: (1) adding a counter event to the current list of selected counter events; (2) removing a counter event from the current list of selected counter events; (3) programming a performance counter immediately before a collection session; (4) unprogramming the performance counter to stop collecting performance data at the end of the collection session; and (5) optionally generating a 64-bit custom collection modifier value used to custom-program a performance counter, which is also used by the GetExtendedCounterName API to generate a new name.
 - the ProgramCounter API enables the CCA to program a performance counter in a hardware component to track a particular event.
 - the GetExtendedCounterName API is used to generate a new name for a performance counter event when the collection thereof has been customized.
 - the new name generated by the GetExtendedCounterName is added to a captured data file. This ensures that when the data is examined later, the user understands how the counter event was counted (i.e., how the counter data should be interpreted) in addition to what counter event was collected.
 - a user may choose to customize the collection of a performance counter event. For example, the user may want to specify that a particular event is to be counted only when the component (e.g., processor) is operating at certain privilege levels (e.g., operating system level or user level).
 - the CCA calls the ProgramCounter API with a special flag that indicates customization of the counter has been requested.
 - the performance DLL responds by displaying a dialog box, which illustrates the different ways the counter can be customized. The design of the dialog box is controlled by the performance DLL developer making its user interface extremely flexible.
 - the customization dialog box may include descriptions of hardware or software components and subcomponents (e.g., gates and bits that can be set on an ESR).
 - the performance DLL returns a custom collection modifier (e.g., cookie) to the CCA, which saves it as part of its session configuration.
 - the ProgramCounter API is also called immediately before a session is run to program the performance counter in the hardware to be monitored. If a custom collection modifier (e.g., cookie) had been generated as part of the session configuration earlier, the custom collection modifier is passed back to the performance DLL by the CCA and used by the ProgramCounter API to program the hardware component's performance counters.
 - the CCA 14 calls the associated performance DLL's GetExtendedCounterName API which returns a new name for the counter event based on the custom collection modifier. For example, suppose the user selected the L2 Cache Misses performance counter event in the Pentium III processor to be monitored. Also, suppose the user customized it to be monitored only when it occurred in the operating system privilege level (i.e., Ring 0). The CCA will call the GetExtendedCounterName API and request a new name for the counter event. The new name provided for the counter event may read something like L2 Cache Misses—Ring0. This new name will be saved in the file containing the data collected and also displayed in the performance monitoring system's 10 user interface 18 . In this regard, even if the performance counter data is viewed much later (e.g., a month later), the new name serves to remind the user how the data had been collected.
 - the new name serves to remind the user how the data had been collected.
 - a flowchart of configuration operations of the counter collection application is shown.
 - a user is allowed to selectively choose a subset of counter events contained in one or more performance objects.
 - the user may also configure when the counter event is incremented, allowing the collection of the performance data to be customized.
 - the CCA When the CCA is started, it reads all of the counter event names and counter descriptions from the system registry. The CCA also loads all of the performance DLLs registered on the system. The CCA then calls each performance DLL's Open API.
 - the CCA calls each performance DLLs Collect API, setting a special flag that instructs the performance DLL to return all counters it can support along with the maximum number of counters it can collect at one time.
 - the CCA parses this data and provides a list of performance objects and performance counters to the performance monitoring system's user interface.
 - FIG. 3 the configuration of a collection session starts in block 300 .
 - the performance monitoring system's user interface displays a list of performance objects supported by each performance DLL loaded into the CCA.
 - the user may view a list of counter events associated with each object by clicking on the object. From the list of events displayed, the user may select an event to be monitored in functional block 315 .
 - the user has the option to customize the collection of the selected event in decision block 320 . If the user decides to customize the collection (decision block 320 , YES), the CCA calls ProgramCounter API and a customization dialog box is displayed with customization options associated with the selected counter event. Once the user selects one or more of customization options (functional block 325 ), ProgramCounter API returns a cookie to the CCA. In functional block 330 , the CCA calls GetExtendedCounterName API and passes the cookie to the GetExtendedCounterName API, which returns a new name for the counter event based on the customization options selected. Then in functional block 335 , the list of selected counter events is updated with the new name generated by the GetExtendedCounterName API.
 - decision block 340 if the user decides to continue the configuration (decision block 340 , YES), the CCA returns to functional block 305 . Otherwise (decision block 340 , NO), the CCA terminates its configuration operations in block 345 .
 - each entry in the list of selected events the CCA proceeds in a main-loop (blocks 405 - 430 ) to program a respective performance counter associated with the current entry.
 - each entry includes information about a particular event selected by the user such as an object index (to indicate a corresponding performance object), a counter index (to indicate a corresponding counter event) and a custom collection modifier (to indicate how or when the corresponding counter event is to be counted).
 - a sub-loop (blocks 410 - 413 ) that finds which performance DLL, loaded into the CCA, supports the performance object associated with the current entry.
 - the sub-loop For each entry in the list of selected events, the sub-loop (blocks 410 - 413 ) examines each of the performance DLLs loaded (that exports the ProgramCounter API) sequentially. In this sub-loop, the CCA calls each performance DLL's ProgramCounter API with a flag which invokes a function in the ProgramCounter API to program the associated performance counter. If the current performance DLL supports the performance object specified in the call to the ProgramCounter API (decision block 411 , YES), it programs the associated performance counter by proceeding to block 417 .
 - a performance DLL supporting the current entry it is determined whether the associated performance counter resides in a hardware or a software program in decision block 417 .
 - the performance DLL if the performance counter resides in a hardware component (decision block 417 , HARDWARE), the performance DLL sends instructions to a device driver, which then sends commands down to the performance counter residing in the hardware component to count the occurrence of a particular counter event in functional block 420 .
 - the CCA passes back the custom collection modifier (e.g., cookie) it received earlier and the custom collection modifier is used by the ProgramCounter API to program a respective performance counter.
 - the performance DLL if the performance counter resides in a software code (functional block 417 , SOFTWARE), the performance DLL sends instructions to a software subsystem via an interprocess communication (IPC) to count the occurrence of a particular event.
 - IPC interprocess communication
 - the loop (blocks 405 - 430 ) is continued until end of the list has been reached (decision block 430 , NO) and terminates in block 435 .
 - the CCA is now ready to collect performance data in block 500 .
 - the CCA collects performance data while the computer system (e.g., PC) is actively executing user's test.
 - the CCA periodically calls the Collect API of each performance DLL, passing in a list of performance objects to be collected along with a buffer. If the performance DLL supports one of the requested objects, it returns the structures for the performance counters selected in the buffer.
 - the performance DLL periodically reads data stored in performance registers and variables when its Collect API is called by the CCA and returns the data in the buffer.
 - the functional block 510 is repeated until the user requests the CCA to stop collecting performance data.
 - the CCA stops calling Collect API and the performance data collection is terminated in block 530 .
 - the CCA calls the ProgramCounter API for each counter event in the list, which deselects and unprograms the performance counters in the hardware components to stop monitoring those events.
 - the performance APIs provide a standard interface to programming a hardware component's performance counters.
 - an engineer develops a performance DLL for their hardware component, it allows the performance-monitoring system to track the hardware component's performance.
 - the CCA of the present invention is capable of executing multiple performance DLLs simultaneously. Since the performance of multiple hardware components (e.g., processor, chipset, graphics card, network card, etc.), can be tracked at the same time by using multiple performance DLLs, the performance-monitoring system of the present invention is capable of monitoring the performance of the entire computer platform. When multiple hardware components are tracked at the same time, cause and effect relationships can be discovered between the different hardware components within the system. For example, suppose the graphics card waits while the processor is busy or vice versa. Using multiple performance DLLs in conjunction with the CCA can uncover such situations. In this regard, software developers can use the information provided by the CCA to modify their code to allow the processor and graphics card to work in parallel, which allows the system to be used more efficiently.
 - the performance-monitoring system enables a user to select the entire set or a subset of counter events from a predetermined set of events contained in a performance object to be monitored. This provides the ability to cleanly collect counter event data from hardware components that have programmable performance counters. Moreover, the ability to customize the collection allows developers much greater flexibility in how a hardware component is programmed to monitor its performance counters. In this regard, because the present invention combines the ability to select a subset of counter events from a performance object and the ability to customize collection of those events into a performance-monitoring system that can concurrently collect data from multiple hardware components, the performance-monitoring system of the present invention is capable of effectively monitoring the performance of an entire computer system. This concurrent monitoring of various components is useful in illustrating previously unseen hardware bottlenecks in the system and allow hardware performance to be improved and/or allow software developers to develop code that utilizes the computer platform more efficiently.
 - the performance DLL of the present invention may be configured to monitor performance counters that exist in software codes (e.g., user applications and operating system functions) as well as monitoring hardware performance counters.
 - the performance-monitoring system of the present invention may be used by software developers to test and optimize their applications to run effectively on a computer system.
 - performance counters (or counter events) may be implemented using variables.
 - a performance counter may be configured to count the throughput of bytes to and from a server application.
 - a performance DLL may be developed to access content of the variable (i.e., information stored in a designated area of a computer system memory) via an interprocess communication (IPC).
 - IPC interprocess communication
 - multiple performance DLLs may be developed to monitor a hardware component, an operating system function and software code simultaneously.
 - the performance-monitoring system of the present invention is capable of illustrating the cause and effect relationships between various hardware components, operating system functions and user application operating within the computer system. Examination of the cause and effect relationship between various subsystem components including hardware, operating system and software is useful for identifying problems and bottlenecks in the system that are causing the system to slow down.
 - the component-specific events can be chosen in such a way as to provide access to the interaction and dynamics between any subsystem components.
 - the counter collection application of the present invention may be incorporated into VTuneTM Performance Analyzer which is a performance-monitoring tool developed by Intel configured for optimizing applications to run efficiently on Intel Architecture based computers.
 
Landscapes
- Engineering & Computer Science (AREA)
 - General Engineering & Computer Science (AREA)
 - Theoretical Computer Science (AREA)
 - Computer Hardware Design (AREA)
 - Quality & Reliability (AREA)
 - Physics & Mathematics (AREA)
 - General Physics & Mathematics (AREA)
 - Debugging And Monitoring (AREA)
 
Abstract
A system and method are described for configuring and collecting performance counter information of a computer system. The method includes providing one or more performance objects, each object containing a predetermined set of events. A user is allowed to select the entire set or a subset of events to be monitored during a collection session from the predetermined set of events contained in the performance objects. The performance counters associated with the subset of events selected are programmed to increment in response to an occurrence of a respective event. The data stored in each of the performance counters associated with the subset of events selected is periodically read during the collection session.
  Description
1. Field of the Invention
    The present invention generally relates to computer systems, and in particular, to a method and apparatus for collecting hardware performance counter data.
    2. Description of the Related Art
    Hardware and software developers use information collected by a performance-monitoring tool to better understand how hardware components within a computer system operate with the operating system kernel and application programs. For example, hardware component designers may use the performance-monitoring tool to monitor a hardware component's performance so that the data collected thereby may be used to drive optimization of the component's design. Similarly, software developers may use the information provided by the performance-monitoring tool to develop software code that utilizes various components within a computer system more efficiently.
    Typically, performance counters are used to monitor the performance of a computer system. The performance counters are implemented as registers in hardware components and variables in software codes and are used to count the number of occurrences of a particular event, such as for example, to count the number of cache misses. By monitoring the performance counters, hardware and software developers can better understand the dynamics of the computer system to allow development of hardware components and software codes that utilizes the computer system platform more efficiently.
    Currently, there is no effective way in which the performance counters residing in hardware components are monitored. For example, the preexisting performance-monitoring tools do not allow a user to selectively choose which hardware performance counters are to be monitored. In the preexisting performance-monitoring tools, all performance counters within a performance object are collected during the performance-monitoring tool's periodic call to collect data. Consequently, if a performance object contains a number of performance counters (e.g., ten performance counters), all performance counters within the performance object must be monitored even if information with regard to only one performance counter is needed. Moreover, the preexisting performance-monitoring tools do not allow a user to selectively customize the collection of performance counter data.
    Therefore, there is a need to provide a performance-monitoring tool, which allows a user to select performance counters to be monitored and to customize their collection.
    
    
    FIG. 1 is a block diagram of a performance monitoring system in a computer system in accordance with one embodiment of the present invention.
    FIG. 2 is a block diagram of a hardware component having performance counters incorporated therein.
    FIG. 3 is a flowchart of a performance counter configuration operation of a counter collection application according to one embodiment of the present invention.
    FIG. 4 is a flowchart of a performance counter programming operation of the counter collection application according to one embodiment of the present invention.
    FIG. 5 is a flowchart of a performance data collection operation of the counter collection application according to one embodiment of the present invention.
    
    
    FIG. 1 is a block diagram of a performance-monitoring system  10 operating within a computer system  12 in accordance with one embodiment of the present invention. The performance-monitoring system  10 generally includes a counter collection application (CCA) 14 and a user interface  18 for allowing user interaction with the CCA. The CCA 14 is operable within a computer system (e.g., personal computer, workstation, mainframe and the like) having a number of device drivers  26 coupled to various hardware components  28. Loaded within the CCA 14 are one or more performance dynamic link libraries (performance DLLs) 16. The performance DLLs  16 are developed (by hardware and software developers) based on a set of application programming interfaces (performance DLL APIs) defined by this invention. As shown in FIG. 1, the CCA  14 reads a system registry  22 to retrieve the names and descriptions of each counter event supported by the performance DLLs.
    When a developer decides to track performance counters in a subsystem of the computer system, a performance DLL  16 may be developed for the purposes of monitoring performance counters residing in the subsystem (e.g., hardware component or software program). In general, the performance counters in hardware components are programmable to allow monitoring of any one independent “event” selected from a predetermined list of counter events. The programmable performance counters will be described more in detail below with reference to FIG. 2.
    It should be noted that the term “event” and “counter event” in the context of the present invention are used to describe some particular activity occurring in a hardware component or a software code. In a hardware component, an “event” or a “counter event” can take the form of a logic signal or other electrical signal that indicates an occurrence or duration of some particular activity. For example, the events to be counted by a performance counter in a hardware component may include any activity such as cache misses, cache hits, clock pulses, etc. In a software program, an “event” or a “counter event” can take the form of any action, activity or occurrence to which the program has access. For example, the event to be counted by a performance counter (e.g., variable) in a software code may include any activity such as throughput of bytes to and from a server application.
    The developer may add an entry in the system registry  22 that describes their performance DLL  16. The developer may also add name and description entries into the system registry that describes each of the performance counter events supported by the performance DLL. When the CCA 14 is started, it examines the system registry  22 to find performance DLLs registered on the computer system and loads them. The CCA 14 also reads the names of the performance objects and performance counter events from the system register  22 and later matches them with the data collected from the performance DLL. Each performance DLL  16 is capable of supporting one or more performance objects. Performance objects are used to organize performance counter events wherein each object supports a set of performance counter events. The performance DLLs developed in accordance with the present invention provides the ability to select a subset of performance counter events from a performance object to be monitored and the ability to customize how or when the performance counter events are counted.
    In one embodiment, the performance DLL is configured to monitor application-specific performance counters that describe the behavior of hardware systems developed by other engineers. The term “application-specific performance counter” is used to mean a metric that applies uniquely to a specific subsystem. For example, a specific graphics card may include a special feature that may provide especially good graphics performance. An appropriate application-specific performance counter for this graphics card would track the percentage of time the special feature was being used.
    FIG. 2 shows one example of a hardware component (e.g., processor) 28 having programmable performance counters  30 incorporated therein. It should be understood by those skilled in the art that the programmable performance counters in FIG. 2, illustrated for the purpose of illustration, are only one of many different ways a performance counter could be implemented in hardware. The performance DLL  16 of the present invention is configured to communicate with performance counters  30 via a device driver  26. In the illustrated embodiment, two programmable performance counters  30 are shown; however any number of performance counters may be used (e.g., 3, 4, etc.).
    Each programmable performance counter  30 generally includes a multiplexor  32, a counter register  34 and an event select register (ESR) 36. The multiplexor  32 has a number of inputs coupled to receive various component-specific event signals  38 and an output coupled to the counter register  34 for counting any one independent event selected from a predetermined list of component-specific events  38. The performance counter  30 is programmable to couple any one of the component-specific event signals 38 to the count register  34. This coupling of one of the inputs of the multiplexor  32 to the counter register  34 is controlled by the ESR  36. In one embodiment, the performance counter is programmed by instructions sent by the device driver. In this regard, the performance DLL  16 sends instructions to the device driver  26, which in turn instructs the ESR to select the component-specific event to be counted by the respective counter register. During data collection, the performance DLL can be used to read the content of the counter registers  34 via the device driver  26 to determine how many times the selected events have occurred.
    In one embodiment, the performance DLL  16 is also configured to send instructions to the device driver, which in turn, programs the ESR  36 to customize the way in which the component-specific events  38 are counted. The ESR  36 may have bits that can be set and depending on how those bits are set, the performance counter is programmed to count a particular component-specific event only when the hardware component (e.g., processor) is operating at a certain mode or privilege level. In other words, the ESR  36 is capable of controlling the count operations of the counter register in addition to controlling the selection of the event to be counted. To illustrate one example of how the performance data collection may be customized, an Intel Pentium III processor may be programmed to count the number of L2 Cache misses. This collection can be customized to count the event (i.e., L2 Cache misses) when it occurs during operating system privilege level, during user privilege level, or during both operating system and user privilege levels.
    As previously mentioned, the present invention defines a set of performance APIs. The performance APIs are functions in a performance DLL that are called by the CCA. In one embodiment, five performance APIs are employed, including an Open API, a Collect API, a Close API, a ProgramCounter API and a GetExtendedCounterName API. The Open API is called by the CCA when the performance DLL is first loaded. The Open API is intended to allow the performance DLL to initialize itself by going out to the computer system and finding the devices and/or software that it will be collecting performance data from. The Collect API gets called periodically during a collection session by the CCA to request performance data from the performance DLL which receives its performance data from performance registers in hardware components and/or variables in software. The Close API gets called by the CCA when the user exits the CCA and enables the performance DLL to free up memory that was allocated and close its connection to the external subsystem components.
    The ProgramCounter and GetExtendedCounterName APIs provide the ability to selectively choose one or more performance counter events to be monitored simultaneously and customize the manner in which the data is collected. The ProgramCounter API gets called at different points during the execution of the CCA and serves various functions including: (1) adding a counter event to the current list of selected counter events; (2) removing a counter event from the current list of selected counter events; (3) programming a performance counter immediately before a collection session; (4) unprogramming the performance counter to stop collecting performance data at the end of the collection session; and (5) optionally generating a 64-bit custom collection modifier value used to custom-program a performance counter, which is also used by the GetExtendedCounterName API to generate a new name. In this regard, the ProgramCounter API enables the CCA to program a performance counter in a hardware component to track a particular event. The GetExtendedCounterName API is used to generate a new name for a performance counter event when the collection thereof has been customized. The new name generated by the GetExtendedCounterName is added to a captured data file. This ensures that when the data is examined later, the user understands how the counter event was counted (i.e., how the counter data should be interpreted) in addition to what counter event was collected.
    During the configuration of a collection session, a user may choose to customize the collection of a performance counter event. For example, the user may want to specify that a particular event is to be counted only when the component (e.g., processor) is operating at certain privilege levels (e.g., operating system level or user level). When the user requests that the collection of a specific counter event be customized via some user interface action, the CCA calls the ProgramCounter API with a special flag that indicates customization of the counter has been requested. The performance DLL responds by displaying a dialog box, which illustrates the different ways the counter can be customized. The design of the dialog box is controlled by the performance DLL developer making its user interface extremely flexible. The customization dialog box may include descriptions of hardware or software components and subcomponents (e.g., gates and bits that can be set on an ESR). When the user makes his selection, the performance DLL returns a custom collection modifier (e.g., cookie) to the CCA, which saves it as part of its session configuration. The ProgramCounter API is also called immediately before a session is run to program the performance counter in the hardware to be monitored. If a custom collection modifier (e.g., cookie) had been generated as part of the session configuration earlier, the custom collection modifier is passed back to the performance DLL by the CCA and used by the ProgramCounter API to program the hardware component's performance counters.
    When customization of a counter's collection is requested during a configuration session, the CCA  14 calls the associated performance DLL's GetExtendedCounterName API which returns a new name for the counter event based on the custom collection modifier. For example, suppose the user selected the L2 Cache Misses performance counter event in the Pentium III processor to be monitored. Also, suppose the user customized it to be monitored only when it occurred in the operating system privilege level (i.e., Ring 0). The CCA will call the GetExtendedCounterName API and request a new name for the counter event. The new name provided for the counter event may read something like L2 Cache Misses—Ring0. This new name will be saved in the file containing the data collected and also displayed in the performance monitoring system's 10 user interface  18. In this regard, even if the performance counter data is viewed much later (e.g., a month later), the new name serves to remind the user how the data had been collected.
    Referring to FIG. 3, a flowchart of configuration operations of the counter collection application according to one embodiment of the present invention is shown. According to one aspect of the present invention, during the configuration of a collection session, a user is allowed to selectively choose a subset of counter events contained in one or more performance objects. In addition, the user may also configure when the counter event is incremented, allowing the collection of the performance data to be customized. When the CCA is started, it reads all of the counter event names and counter descriptions from the system registry. The CCA also loads all of the performance DLLs registered on the system. The CCA then calls each performance DLL's Open API. Then, the CCA calls each performance DLLs Collect API, setting a special flag that instructs the performance DLL to return all counters it can support along with the maximum number of counters it can collect at one time. The CCA parses this data and provides a list of performance objects and performance counters to the performance monitoring system's user interface. Turning now to FIG. 3, the configuration of a collection session starts in block  300. In functional block  305, the performance monitoring system's user interface displays a list of performance objects supported by each performance DLL loaded into the CCA. In functional block  310, the user may view a list of counter events associated with each object by clicking on the object. From the list of events displayed, the user may select an event to be monitored in functional block  315.
    Once an event has been selected, the user has the option to customize the collection of the selected event in decision block  320. If the user decides to customize the collection (decision block  320, YES), the CCA calls ProgramCounter API and a customization dialog box is displayed with customization options associated with the selected counter event. Once the user selects one or more of customization options (functional block 325), ProgramCounter API returns a cookie to the CCA. In functional block  330, the CCA calls GetExtendedCounterName API and passes the cookie to the GetExtendedCounterName API, which returns a new name for the counter event based on the customization options selected. Then in functional block  335, the list of selected counter events is updated with the new name generated by the GetExtendedCounterName API. In decision block  340, if the user decides to continue the configuration (decision block  340, YES), the CCA returns to functional block  305. Otherwise (decision block  340, NO), the CCA terminates its configuration operations in block  345.
    Referring to FIG. 4, a flowchart of programming operations of the counter collection application according to one embodiment of the present invention is shown. Once the user has configured a collection session, the user may start collecting performance counter data. However, before the data collection actually begins, performance counters associated with the selected events must be programmed in block  400. For each entry in the list of selected events, the CCA proceeds in a main-loop (blocks 405-430) to program a respective performance counter associated with the current entry. In one embodiment, each entry includes information about a particular event selected by the user such as an object index (to indicate a corresponding performance object), a counter index (to indicate a corresponding counter event) and a custom collection modifier (to indicate how or when the corresponding counter event is to be counted). Within the main-loop is a sub-loop (blocks 410-413) that finds which performance DLL, loaded into the CCA, supports the performance object associated with the current entry.
    For each entry in the list of selected events, the sub-loop (blocks 410-413) examines each of the performance DLLs loaded (that exports the ProgramCounter API) sequentially. In this sub-loop, the CCA calls each performance DLL's ProgramCounter API with a flag which invokes a function in the ProgramCounter API to program the associated performance counter. If the current performance DLL supports the performance object specified in the call to the ProgramCounter API (decision block  411, YES), it programs the associated performance counter by proceeding to block 417. Otherwise, if the current performance DLL doesn't support the performance object specified in the call to the ProgramCounter API (decision block  411, NO), it simply returns (block 412) to the beginning of this sub-loop (block 410) where the next 4: performance DLL's ProgramCounter API is called. This sub-loop is continued until all of the loaded performance DLLs, exporting the ProgramCounter API, have been examined (decision block  413, YES).
    Once a performance DLL supporting the current entry is identified, it is determined whether the associated performance counter resides in a hardware or a software program in decision block  417. In this regard, if the performance counter resides in a hardware component (decision block  417, HARDWARE), the performance DLL sends instructions to a device driver, which then sends commands down to the performance counter residing in the hardware component to count the occurrence of a particular counter event in functional block  420. Additionally, if the user has customized the collection of this particular counter event, the CCA passes back the custom collection modifier (e.g., cookie) it received earlier and the custom collection modifier is used by the ProgramCounter API to program a respective performance counter. Alternatively, if the performance counter resides in a software code (functional block  417, SOFTWARE), the performance DLL sends instructions to a software subsystem via an interprocess communication (IPC) to count the occurrence of a particular event. The loop (blocks 405-430) is continued until end of the list has been reached (decision block  430, NO) and terminates in block  435.
    Referring to FIG. 5, a flowchart of collection operations of the counter collection application according to one embodiment of the present invention is shown. Once the programming of the selected performance counters has been completed, the CCA is now ready to collect performance data in block  500. The CCA collects performance data while the computer system (e.g., PC) is actively executing user's test. During the performance data collection, the CCA periodically calls the Collect API of each performance DLL, passing in a list of performance objects to be collected along with a buffer. If the performance DLL supports one of the requested objects, it returns the structures for the performance counters selected in the buffer. In functional block 510, the performance DLL periodically reads data stored in performance registers and variables when its Collect API is called by the CCA and returns the data in the buffer. The functional block 510 is repeated until the user requests the CCA to stop collecting performance data. When the stop collection is requested (decision block  520, YES), the CCA stops calling Collect API and the performance data collection is terminated in block  530. Then in block  540, the CCA calls the ProgramCounter API for each counter event in the list, which deselects and unprograms the performance counters in the hardware components to stop monitoring those events.
    The performance APIs provide a standard interface to programming a hardware component's performance counters. When an engineer develops a performance DLL for their hardware component, it allows the performance-monitoring system to track the hardware component's performance. It should be noted that the CCA of the present invention is capable of executing multiple performance DLLs simultaneously. Since the performance of multiple hardware components (e.g., processor, chipset, graphics card, network card, etc.), can be tracked at the same time by using multiple performance DLLs, the performance-monitoring system of the present invention is capable of monitoring the performance of the entire computer platform. When multiple hardware components are tracked at the same time, cause and effect relationships can be discovered between the different hardware components within the system. For example, suppose the graphics card waits while the processor is busy or vice versa. Using multiple performance DLLs in conjunction with the CCA can uncover such situations. In this regard, software developers can use the information provided by the CCA to modify their code to allow the processor and graphics card to work in parallel, which allows the system to be used more efficiently.
    In accordance with one aspect of the present invention, the performance-monitoring system enables a user to select the entire set or a subset of counter events from a predetermined set of events contained in a performance object to be monitored. This provides the ability to cleanly collect counter event data from hardware components that have programmable performance counters. Moreover, the ability to customize the collection allows developers much greater flexibility in how a hardware component is programmed to monitor its performance counters. In this regard, because the present invention combines the ability to select a subset of counter events from a performance object and the ability to customize collection of those events into a performance-monitoring system that can concurrently collect data from multiple hardware components, the performance-monitoring system of the present invention is capable of effectively monitoring the performance of an entire computer system. This concurrent monitoring of various components is useful in illustrating previously unseen hardware bottlenecks in the system and allow hardware performance to be improved and/or allow software developers to develop code that utilizes the computer platform more efficiently.
    In accordance with another aspect of the present invention, the performance DLL of the present invention may be configured to monitor performance counters that exist in software codes (e.g., user applications and operating system functions) as well as monitoring hardware performance counters. In this regard, the performance-monitoring system of the present invention may be used by software developers to test and optimize their applications to run effectively on a computer system. In software programs, performance counters (or counter events) may be implemented using variables. For example, a performance counter may be configured to count the throughput of bytes to and from a server application. In this case, a performance DLL may be developed to access content of the variable (i.e., information stored in a designated area of a computer system memory) via an interprocess communication (IPC).
    In accordance with yet another aspect of the present invention, multiple performance DLLs may be developed to monitor a hardware component, an operating system function and software code simultaneously. By virtue of having this capability, the performance-monitoring system of the present invention is capable of illustrating the cause and effect relationships between various hardware components, operating system functions and user application operating within the computer system. Examination of the cause and effect relationship between various subsystem components including hardware, operating system and software is useful for identifying problems and bottlenecks in the system that are causing the system to slow down. By allowing users to selectively choose any combination of component-specific events to be monitored, the component-specific events can be chosen in such a way as to provide access to the interaction and dynamics between any subsystem components.
    In one embodiment, the counter collection application of the present invention may be incorporated into VTune™ Performance Analyzer which is a performance-monitoring tool developed by Intel configured for optimizing applications to run efficiently on Intel Architecture based computers.
    While the foregoing embodiments of the invention have been described and shown, it is understood that variations and modifications, such as those suggested and others within the spirit and scope of the invention, may occur to those skilled in the art to which the invention pertains. The scope of the present invention accordingly is to be defined as set forth in the appended claims.
    
  Claims (23)
1. A method comprising:
      providing at least one performance object containing a plurality of events; 
      allowing a user to select a subset of events to be monitored during a collection session from said at least one performance object; 
      programming performance counters associated with said subset of events selected to increment in response to an occurrence of a respective event; and 
      periodically reading data stored in each of said performance counters associated with said selected subset of events during the collection session, wherein at least one of the performance counters associated with the selectable events is implemented using a hardware register and at least another one of the performance counters associated with the selectable events is implemented using a software variable, 
      wherein a plurality of performance objects are supported by a performance dynamic link library (performance DLL). 
    2. The method of claim 1 , wherein said subset of events selected by the user includes at least one of said plurality of events contained in said at least one performance object.
    3. The method of claim 1 , wherein said subset of events selected by the user includes all of said plurality of events contained in said at least one performance object.
    4. The method of claim 1 , wherein at least one of the events in the performance object has at least one customization option associated therewith; and said method further comprising allowing the user to customize performance data collection of said at least one of the events by selecting said at least one customization option associated therewith.
    5. The method of claim 4 , further comprising generating a new name for a selected event if collection thereof has been customized.
    6. The method of claim 1 , wherein said subset of events selected by the user includes at least one event associated with a hardware component and at least one event associated with a user application.
    7. The method of claim 6 , wherein said subset of events selected by the user further includes at least one event associated with an operating system function.
    8. A machine readable medium that provides instructions, which when executed by a machine, cause said machine to perform operations comprising:
      configuring a collection session by allowing a user to selectively choose a subset of events to be monitored during a collection session from a performance object containing a list of events; 
      programming performance counters associated with the subset of events selected by the user to count the occurrence of a respective event prior to the collection session; and 
      reading data stored in the performance counters during the collection session, wherein at least one of the performance counters associated with the selectable events is implemented using a hardware register and at least another one of the performance counters associated with the selectable events is implemented using a software variable, 
      wherein a plurality of performance objects are supported by a performance dynamic link library (performance DLL). 
    9. The medium of claim 8 , wherein the operations further comprise displaying names and descriptions of each event associated with the performance object.
    10. The medium of claim 8 , wherein the configuring of the collection session further comprises allowing the user to configure when the respective performance counter is incremented.
    11. The medium of claim 8 , wherein the programming of the performance counters is accomplished by the performance dynamic link library (performance DLL) which sends commands to a respective performance counter residing in a hardware component via a respective device driver to count the occurrence of a respective event.
    12. The medium of claim 8 , wherein said subset of events selected by the user includes at least one event associated with a hardware component and at least one event associated with a user application.
    13. The medium of claim 12 , wherein said subset of events selected by the user further includes at least one event associated with an operating system.
    14. A system comprising:
      a plurality of performance counters, each of said performance counters associated with a respective subsystem component of a computer system, each of said performance counter coupled to receive a plurality of event signals generated within the respective subsystem component, wherein at least one of said performance counters includes a hardware register and a controller to selectively couple one of the event signals to the hardware register to increment the hardware register, wherein at least another one of said performance counters is implemented using a software variable; 
      an application in communication with at least one of said performance counters, said application to program the controller of said at least one of said performance counters to enable one of the event signals coupled thereto to increment the register thereof in response to an occurrence of a selected event, said application to periodically read data stored in the register of said at least one of said performance counters while the computer system is executing instructions, 
      wherein the application to enable a user to selectively choose a subset of events to be monitored during a collection session from a performance object containing a list of events; and 
      at least one performance dynamic link library (performance DLL) which is loaded when the application is executed, said performance DLL serving as a bridge between the application and performance counters that reside in the computer system. 
    15. The system of claim 14 , wherein the application is capable of executing a number of performance DLLs to allow monitoring of a plurality of subsystem components simultaneously within the computer system.
    16. The system of claim 15 , wherein said plurality of subsystem components simultaneously monitored include at least one hardware component, at least one user application and at least one operating system function.
    17. The system of claim 15 , wherein the performance DLL is derived from a set of performance application programming interfaces (Performance APIs).
    18. The system of claim 17 , wherein the set of performance APIs includes an interface which serves to program the performance counter prior to the collection session to enable one of the event signals coupled to the performance counter to increment the register in response to an occurrence of the selected event.
    19. The system of claim 17 , wherein the set of performance APIs includes an interface which serves to generate a new name for a particular event if collection thereof has been customized.
    20. The method of claim 4 , wherein the allowing the user to customize performance data collection of said at least one of the events comprises programming at least one of the performance counters associated with said at least one of the customized events to increment only when said at least one of the customized events occurs during a operating system privilege level.
    21. The method of claim 4 , wherein the allowing the user to customize performance data collection of said at least one of the events comprises programming at least one of the performance counters associated with said at least one of the customized events to increment only when said at least one of the customized events occurs during a user privilege level.
    22. The system of claim 14 , wherein the application to enable the user to customize performance data collection of a particular event by programming a performance counter associated with the particular event to increment only when the particular event occurs during a operating system privilege level.
    23. The system of claim 14 , wherein the application to enable the user to customize performance data collection of a particular event by programming a performance counter associated with the particular event to increment only when the particular event occurs during a user privilege level.
    Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| US09/607,254 US6792392B1 (en) | 2000-06-30 | 2000-06-30 | Method and apparatus for configuring and collecting performance counter data | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| US09/607,254 US6792392B1 (en) | 2000-06-30 | 2000-06-30 | Method and apparatus for configuring and collecting performance counter data | 
Publications (1)
| Publication Number | Publication Date | 
|---|---|
| US6792392B1 true US6792392B1 (en) | 2004-09-14 | 
Family
ID=32927856
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| US09/607,254 Expired - Lifetime US6792392B1 (en) | 2000-06-30 | 2000-06-30 | Method and apparatus for configuring and collecting performance counter data | 
Country Status (1)
| Country | Link | 
|---|---|
| US (1) | US6792392B1 (en) | 
Cited By (146)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US20030046616A1 (en) * | 2001-08-29 | 2003-03-06 | International Business Machines Corporation | Automated configuration of on-circuit facilities | 
| US20030225865A1 (en) * | 2002-05-29 | 2003-12-04 | Luke Koestler | Auditing computer systems components in a network | 
| US20040025172A1 (en) * | 2002-08-02 | 2004-02-05 | Bian Qiyong B. | Counter functions in an application program interface for network devices | 
| US20040054515A1 (en) * | 2002-09-18 | 2004-03-18 | Todi Rajat Kumar | Methods and systems for modeling the performance of a processor | 
| US20040148133A1 (en) * | 2002-11-08 | 2004-07-29 | Sampsa Fabritius | Collecting operational information on closed system | 
| US20040205167A1 (en) * | 2001-05-29 | 2004-10-14 | Doug Grumann | Automatic configuration of performance management tools | 
| US20050038695A1 (en) * | 2000-07-31 | 2005-02-17 | Ncr Corporation | Method and apparatus for storing retail performance metrics | 
| US20050209819A1 (en) * | 2003-06-26 | 2005-09-22 | Microsoft Corporation | Determining and using capabilities of a computer system | 
| US20060005083A1 (en) * | 2004-06-30 | 2006-01-05 | International Business Machines Corporation | Performance count tracing | 
| US20060064486A1 (en) * | 2004-09-17 | 2006-03-23 | Microsoft Corporation | Methods for service monitoring and control | 
| US20060167658A1 (en) * | 2005-01-27 | 2006-07-27 | International Business Machines Corporation | Method, apparatus, and computer program product in a performance monitor for sampling all performance events generated by a processor | 
| US20060282839A1 (en) * | 2005-06-13 | 2006-12-14 | Hankins Richard A | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | 
| US7161951B1 (en) * | 2001-06-12 | 2007-01-09 | At&T Corp. | Mechanism for implementing virtual carrier sense | 
| US20070083643A1 (en) * | 2005-10-11 | 2007-04-12 | International Business Machines Corporation | Performance counters for virtualized network interfaces of communications networks | 
| US7340378B1 (en) | 2006-11-30 | 2008-03-04 | International Business Machines Corporation | Weighted event counting system and method for processor performance measurements | 
| US20080307238A1 (en) * | 2007-06-06 | 2008-12-11 | Andreas Bieswanger | System for Unified Management of Power, Performance, and Thermals in Computer Systems | 
| US20090192763A1 (en) * | 2002-03-29 | 2009-07-30 | Ecolab Inc. | Method and apparatus for automatic pest trap report generation and additional trap parameter data | 
| US20100125436A1 (en) * | 2008-11-20 | 2010-05-20 | International Business Machines Corporation | Identifying Deterministic Performance Boost Capability of a Computer System | 
| CN101197712B (en) * | 2007-10-19 | 2010-06-09 | 中兴通讯股份有限公司 | Method for capturing performance object data in telecommunication network management system | 
| US20100262402A1 (en) * | 2009-04-08 | 2010-10-14 | Nec Electronics Corporation | Performance evaluation device and performance evaluation method | 
| US20110138146A1 (en) * | 2009-12-04 | 2011-06-09 | Ingo Molnar | Kernel subsystem for handling performance counters and events | 
| US20110138389A1 (en) * | 2009-12-04 | 2011-06-09 | Ingo Molnar | Obtaining application performance data for different performance events via a unified channel | 
| US20110145838A1 (en) * | 2009-12-11 | 2011-06-16 | De Melo Arnaldo Carvalho | Profiling the system providing performance statistics in real time | 
| US20110145651A1 (en) * | 2009-12-11 | 2011-06-16 | Ingo Molnar | Software performance counters | 
| US20110145829A1 (en) * | 2009-12-11 | 2011-06-16 | Ingo Molnar | Performance counter inheritance | 
| US20110182378A1 (en) * | 2000-07-05 | 2011-07-28 | Sony Deutschland Gmbh | Pilot pattern design for a sttd scheme in an ofdm system | 
| US20120240128A1 (en) * | 2009-09-30 | 2012-09-20 | St-Ericsson Sa | Memory Access Performance Diagnosis | 
| US20120246506A1 (en) * | 2011-03-24 | 2012-09-27 | Robert Knight | Obtaining Power Profile Information With Low Overhead | 
| US20140013071A1 (en) * | 2008-03-13 | 2014-01-09 | Hitachi, Ltd. | Storage system | 
| US20140019945A1 (en) * | 2010-08-24 | 2014-01-16 | Trading Systems Associates Plc | Software instrumentation apparatus and method | 
| US8683240B2 (en) | 2011-06-27 | 2014-03-25 | Intel Corporation | Increasing power efficiency of turbo mode operation in a processor | 
| US8688883B2 (en) | 2011-09-08 | 2014-04-01 | Intel Corporation | Increasing turbo mode residency of a processor | 
| US8769316B2 (en) | 2011-09-06 | 2014-07-01 | Intel Corporation | Dynamically allocating a power budget over multiple domains of a processor | 
| US8799687B2 (en) | 2005-12-30 | 2014-08-05 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates | 
| US8832478B2 (en) | 2011-10-27 | 2014-09-09 | Intel Corporation | Enabling a non-core domain to control memory bandwidth in a processor | 
| US8914650B2 (en) | 2011-09-28 | 2014-12-16 | Intel Corporation | Dynamically adjusting power of non-core processor circuitry including buffer circuitry | 
| US8943334B2 (en) | 2010-09-23 | 2015-01-27 | Intel Corporation | Providing per core voltage and frequency control | 
| US8943340B2 (en) | 2011-10-31 | 2015-01-27 | Intel Corporation | Controlling a turbo mode frequency of a processor | 
| US8954770B2 (en) | 2011-09-28 | 2015-02-10 | Intel Corporation | Controlling temperature of multiple domains of a multi-domain processor using a cross domain margin | 
| US8972763B2 (en) | 2011-12-05 | 2015-03-03 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including determining an optimal power state of the apparatus based on residency time of non-core domains in a power saving state | 
| US8984313B2 (en) | 2012-08-31 | 2015-03-17 | Intel Corporation | Configuring power management functionality in a processor including a plurality of cores by utilizing a register to store a power domain indicator | 
| US9026815B2 (en) | 2011-10-27 | 2015-05-05 | Intel Corporation | Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor | 
| US9052901B2 (en) | 2011-12-14 | 2015-06-09 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including configurable maximum processor current | 
| US9063727B2 (en) | 2012-08-31 | 2015-06-23 | Intel Corporation | Performing cross-domain thermal control in a processor | 
| US9069555B2 (en) | 2011-03-21 | 2015-06-30 | Intel Corporation | Managing power consumption in a multi-core processor | 
| US9075556B2 (en) | 2012-12-21 | 2015-07-07 | Intel Corporation | Controlling configurable peak performance limits of a processor | 
| US9074947B2 (en) | 2011-09-28 | 2015-07-07 | Intel Corporation | Estimating temperature of a processor core in a low power state without thermal sensor information | 
| US9081577B2 (en) | 2012-12-28 | 2015-07-14 | Intel Corporation | Independent control of processor core retention states | 
| US9098261B2 (en) | 2011-12-15 | 2015-08-04 | Intel Corporation | User level control of power management policies | 
| US9158693B2 (en) | 2011-10-31 | 2015-10-13 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US9164565B2 (en) | 2012-12-28 | 2015-10-20 | Intel Corporation | Apparatus and method to manage energy usage of a processor | 
| US9176875B2 (en) | 2012-12-14 | 2015-11-03 | Intel Corporation | Power gating a portion of a cache memory | 
| US9235252B2 (en) | 2012-12-21 | 2016-01-12 | Intel Corporation | Dynamic balancing of power across a plurality of processor domains according to power policy control bias | 
| US9239611B2 (en) | 2011-12-05 | 2016-01-19 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including balancing power among multi-frequency domains of a processor based on efficiency rating scheme | 
| US9292468B2 (en) | 2012-12-17 | 2016-03-22 | Intel Corporation | Performing frequency coordination in a multiprocessor system based on response timing optimization | 
| US20160091614A1 (en) * | 2014-09-29 | 2016-03-31 | Battelle Energy Alliance, Llc | Radioactive waste screening systems, and related methods | 
| US9323316B2 (en) | 2012-03-13 | 2016-04-26 | Intel Corporation | Dynamically controlling interconnect frequency in a processor | 
| US9323525B2 (en) | 2014-02-26 | 2016-04-26 | Intel Corporation | Monitoring vector lane duty cycle for dynamic optimization | 
| US9335803B2 (en) | 2013-02-15 | 2016-05-10 | Intel Corporation | Calculating a dynamically changeable maximum operating voltage value for a processor based on a different polynomial equation using a set of coefficient values and a number of current active cores | 
| US9335804B2 (en) | 2012-09-17 | 2016-05-10 | Intel Corporation | Distributing power to heterogeneous compute elements of a processor | 
| US9348407B2 (en) | 2013-06-27 | 2016-05-24 | Intel Corporation | Method and apparatus for atomic frequency and voltage changes | 
| US9348401B2 (en) | 2013-06-25 | 2016-05-24 | Intel Corporation | Mapping a performance request to an operating frequency in a processor | 
| US9354689B2 (en) | 2012-03-13 | 2016-05-31 | Intel Corporation | Providing energy efficient turbo operation of a processor | 
| US9367114B2 (en) | 2013-03-11 | 2016-06-14 | Intel Corporation | Controlling operating voltage of a processor | 
| US9372524B2 (en) | 2011-12-15 | 2016-06-21 | Intel Corporation | Dynamically modifying a power/performance tradeoff based on processor utilization | 
| US9377841B2 (en) | 2013-05-08 | 2016-06-28 | Intel Corporation | Adaptively limiting a maximum operating frequency in a multicore processor | 
| US9377836B2 (en) | 2013-07-26 | 2016-06-28 | Intel Corporation | Restricting clock signal delivery based on activity in a processor | 
| US9395788B2 (en) | 2014-03-28 | 2016-07-19 | Intel Corporation | Power state transition analysis | 
| US9395784B2 (en) | 2013-04-25 | 2016-07-19 | Intel Corporation | Independently controlling frequency of plurality of power domains in a processor system | 
| US9405351B2 (en) | 2012-12-17 | 2016-08-02 | Intel Corporation | Performing frequency coordination in a multiprocessor system | 
| US9405345B2 (en) | 2013-09-27 | 2016-08-02 | Intel Corporation | Constraining processor operation based on power envelope information | 
| US9423858B2 (en) | 2012-09-27 | 2016-08-23 | Intel Corporation | Sharing power between domains in a processor package using encoded power consumption information from a second domain to calculate an available power budget for a first domain | 
| US9436245B2 (en) | 2012-03-13 | 2016-09-06 | Intel Corporation | Dynamically computing an electrical design point (EDP) for a multicore processor | 
| US9459689B2 (en) | 2013-12-23 | 2016-10-04 | Intel Corporation | Dyanamically adapting a voltage of a clock generation circuit | 
| US9471088B2 (en) | 2013-06-25 | 2016-10-18 | Intel Corporation | Restricting clock signal delivery in a processor | 
| US9483376B2 (en) | 2010-10-13 | 2016-11-01 | The Trustees Of Columbia University In The City Of New York | System and methods for precise microprocessor event counting | 
| US9494998B2 (en) | 2013-12-17 | 2016-11-15 | Intel Corporation | Rescheduling workloads to enforce and maintain a duty cycle | 
| US9495001B2 (en) | 2013-08-21 | 2016-11-15 | Intel Corporation | Forcing core low power states in a processor | 
| US9513689B2 (en) | 2014-06-30 | 2016-12-06 | Intel Corporation | Controlling processor performance scaling based on context | 
| KR20160147903A (en) * | 2014-04-28 | 2016-12-23 | 에이알엠 아이피 리미티드 | Access control and code scheduling | 
| US9547027B2 (en) | 2012-03-30 | 2017-01-17 | Intel Corporation | Dynamically measuring power consumption in a processor | 
| US9575543B2 (en) | 2012-11-27 | 2017-02-21 | Intel Corporation | Providing an inter-arrival access timer in a processor | 
| US9575537B2 (en) | 2014-07-25 | 2017-02-21 | Intel Corporation | Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states | 
| US9594560B2 (en) | 2013-09-27 | 2017-03-14 | Intel Corporation | Estimating scalability value for a specific domain of a multicore processor based on active state residency of the domain, stall duration of the domain, memory bandwidth of the domain, and a plurality of coefficients based on a workload to execute on the domain | 
| US9606602B2 (en) | 2014-06-30 | 2017-03-28 | Intel Corporation | Method and apparatus to prevent voltage droop in a computer | 
| US9639134B2 (en) | 2015-02-05 | 2017-05-02 | Intel Corporation | Method and apparatus to provide telemetry data to a power controller of a processor | 
| US9665153B2 (en) | 2014-03-21 | 2017-05-30 | Intel Corporation | Selecting a low power state based on cache flush latency determination | 
| US9671853B2 (en) | 2014-09-12 | 2017-06-06 | Intel Corporation | Processor operating by selecting smaller of requested frequency and an energy performance gain (EPG) frequency | 
| US9684360B2 (en) | 2014-10-30 | 2017-06-20 | Intel Corporation | Dynamically controlling power management of an on-die memory of a processor | 
| US9703358B2 (en) | 2014-11-24 | 2017-07-11 | Intel Corporation | Controlling turbo mode frequency operation in a processor | 
| US9710043B2 (en) | 2014-11-26 | 2017-07-18 | Intel Corporation | Controlling a guaranteed frequency of a processor | 
| US9710041B2 (en) | 2015-07-29 | 2017-07-18 | Intel Corporation | Masking a power state of a core of a processor | 
| US9710054B2 (en) | 2015-02-28 | 2017-07-18 | Intel Corporation | Programmable power management agent | 
| EP1883051A4 (en) * | 2005-05-20 | 2017-08-09 | Sony Interactive Entertainment Inc. | Graphic processor and information processing device | 
| US9760158B2 (en) | 2014-06-06 | 2017-09-12 | Intel Corporation | Forcing a processor into a low power state | 
| US9760136B2 (en) | 2014-08-15 | 2017-09-12 | Intel Corporation | Controlling temperature of a system memory | 
| US9760160B2 (en) | 2015-05-27 | 2017-09-12 | Intel Corporation | Controlling performance states of processing engines of a processor | 
| US9823719B2 (en) | 2013-05-31 | 2017-11-21 | Intel Corporation | Controlling power delivery to a processor via a bypass | 
| US9842082B2 (en) | 2015-02-27 | 2017-12-12 | Intel Corporation | Dynamically updating logical identifiers of cores of a processor | 
| US9874922B2 (en) | 2015-02-17 | 2018-01-23 | Intel Corporation | Performing dynamic power control of platform devices | 
| US9910470B2 (en) | 2015-12-16 | 2018-03-06 | Intel Corporation | Controlling telemetry data communication in a processor | 
| US9910481B2 (en) | 2015-02-13 | 2018-03-06 | Intel Corporation | Performing power management in a multicore processor | 
| US9977477B2 (en) | 2014-09-26 | 2018-05-22 | Intel Corporation | Adapting operating parameters of an input/output (IO) interface circuit of a processor | 
| US9983644B2 (en) | 2015-11-10 | 2018-05-29 | Intel Corporation | Dynamically updating at least one power management operational parameter pertaining to a turbo mode of a processor for increased performance | 
| US10001822B2 (en) | 2015-09-22 | 2018-06-19 | Intel Corporation | Integrating a power arbiter in a processor | 
| US10048744B2 (en) | 2014-11-26 | 2018-08-14 | Intel Corporation | Apparatus and method for thermal management in a multi-chip package | 
| US10108454B2 (en) | 2014-03-21 | 2018-10-23 | Intel Corporation | Managing dynamic capacitance using code scheduling | 
| US10146286B2 (en) | 2016-01-14 | 2018-12-04 | Intel Corporation | Dynamically updating a power management policy of a processor | 
| US10168758B2 (en) | 2016-09-29 | 2019-01-01 | Intel Corporation | Techniques to enable communication between a processor and voltage regulator | 
| US10169187B2 (en) | 2010-08-18 | 2019-01-01 | International Business Machines Corporation | Processor core having a saturating event counter for making performance measurements | 
| US10185566B2 (en) | 2012-04-27 | 2019-01-22 | Intel Corporation | Migrating tasks between asymmetric computing elements of a multi-core processor | 
| US10234920B2 (en) | 2016-08-31 | 2019-03-19 | Intel Corporation | Controlling current consumption of a processor based at least in part on platform capacitance | 
| US10234930B2 (en) | 2015-02-13 | 2019-03-19 | Intel Corporation | Performing power management in a multicore processor | 
| US10281975B2 (en) | 2016-06-23 | 2019-05-07 | Intel Corporation | Processor having accelerated user responsiveness in constrained environment | 
| US10289188B2 (en) | 2016-06-21 | 2019-05-14 | Intel Corporation | Processor having concurrent core and fabric exit from a low power state | 
| US10324519B2 (en) | 2016-06-23 | 2019-06-18 | Intel Corporation | Controlling forced idle state operation in a processor | 
| US10339023B2 (en) | 2014-09-25 | 2019-07-02 | Intel Corporation | Cache-aware adaptive thread scheduling and migration | 
| US10379596B2 (en) | 2016-08-03 | 2019-08-13 | Intel Corporation | Providing an interface for demotion control information in a processor | 
| US10379904B2 (en) | 2016-08-31 | 2019-08-13 | Intel Corporation | Controlling a performance state of a processor using a combination of package and thread hint information | 
| US10386900B2 (en) | 2013-09-24 | 2019-08-20 | Intel Corporation | Thread aware power management | 
| US10417149B2 (en) | 2014-06-06 | 2019-09-17 | Intel Corporation | Self-aligning a processor duty cycle with interrupts | 
| US10423206B2 (en) | 2016-08-31 | 2019-09-24 | Intel Corporation | Processor to pre-empt voltage ramps for exit latency reductions | 
| US10429919B2 (en) | 2017-06-28 | 2019-10-01 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US10445151B1 (en) * | 2016-09-14 | 2019-10-15 | Google Llc | Distributed API accounting | 
| US10620266B2 (en) | 2017-11-29 | 2020-04-14 | Intel Corporation | System, apparatus and method for in-field self testing in a diagnostic sleep state | 
| US10620969B2 (en) | 2018-03-27 | 2020-04-14 | Intel Corporation | System, apparatus and method for providing hardware feedback information in a processor | 
| US10620682B2 (en) | 2017-12-21 | 2020-04-14 | Intel Corporation | System, apparatus and method for processor-external override of hardware performance state control of a processor | 
| US10719326B2 (en) | 2015-01-30 | 2020-07-21 | Intel Corporation | Communicating via a mailbox interface of a processor | 
| US10739844B2 (en) | 2018-05-02 | 2020-08-11 | Intel Corporation | System, apparatus and method for optimized throttling of a processor | 
| US10860083B2 (en) | 2018-09-26 | 2020-12-08 | Intel Corporation | System, apparatus and method for collective power control of multiple intellectual property agents and a shared power rail | 
| US10877530B2 (en) | 2014-12-23 | 2020-12-29 | Intel Corporation | Apparatus and method to provide a thermal parameter report for a multi-chip package | 
| US10955899B2 (en) | 2018-06-20 | 2021-03-23 | Intel Corporation | System, apparatus and method for responsive autonomous hardware performance state control of a processor | 
| US10976801B2 (en) | 2018-09-20 | 2021-04-13 | Intel Corporation | System, apparatus and method for power budget distribution for a plurality of virtual machines to execute on a processor | 
| US11010169B2 (en) | 2018-01-09 | 2021-05-18 | Samsung Electronics Co., Ltd. | Processor device collecting performance information through command-set-based replay | 
| US11079819B2 (en) | 2014-11-26 | 2021-08-03 | Intel Corporation | Controlling average power limits of a processor | 
| US11132201B2 (en) | 2019-12-23 | 2021-09-28 | Intel Corporation | System, apparatus and method for dynamic pipeline stage control of data path dominant circuitry of an integrated circuit | 
| US20210306440A1 (en) * | 2020-03-31 | 2021-09-30 | Microsoft Technology Licensing, Llc | Unified counting platform | 
| US11256657B2 (en) | 2019-03-26 | 2022-02-22 | Intel Corporation | System, apparatus and method for adaptive interconnect routing | 
| US11366506B2 (en) | 2019-11-22 | 2022-06-21 | Intel Corporation | System, apparatus and method for globally aware reactive local power control in a processor | 
| US11442529B2 (en) | 2019-05-15 | 2022-09-13 | Intel Corporation | System, apparatus and method for dynamically controlling current consumption of processing circuits of a processor | 
| US11593544B2 (en) | 2017-08-23 | 2023-02-28 | Intel Corporation | System, apparatus and method for adaptive operating voltage in a field programmable gate array (FPGA) | 
| US11656676B2 (en) | 2018-12-12 | 2023-05-23 | Intel Corporation | System, apparatus and method for dynamic thermal distribution of a system on chip | 
| US11698812B2 (en) | 2019-08-29 | 2023-07-11 | Intel Corporation | System, apparatus and method for providing hardware state feedback to an operating system in a heterogeneous processor | 
| US11921564B2 (en) | 2022-02-28 | 2024-03-05 | Intel Corporation | Saving and restoring configuration and status information with reduced latency | 
| CN118069485A (en) * | 2024-04-25 | 2024-05-24 | 沐曦集成电路(上海)有限公司 | Automatic generation system of register transmission level code of performance counter | 
| US12189652B2 (en) * | 2018-10-19 | 2025-01-07 | Oracle International Corporation | Language interoperable runtime adaptable data collections | 
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US4872121A (en) * | 1987-08-07 | 1989-10-03 | Harris Corporation | Method and apparatus for monitoring electronic apparatus activity | 
| US5485574A (en) * | 1993-11-04 | 1996-01-16 | Microsoft Corporation | Operating system based performance monitoring of programs | 
| US5557548A (en) * | 1994-12-09 | 1996-09-17 | International Business Machines Corporation | Method and system for performance monitoring within a data processing system | 
| US5581482A (en) * | 1994-04-26 | 1996-12-03 | Unisys Corporation | Performance monitor for digital computer system | 
| US5657253A (en) * | 1992-05-15 | 1997-08-12 | Intel Corporation | Apparatus for monitoring the performance of a microprocessor | 
| US5796637A (en) * | 1996-09-06 | 1998-08-18 | Intel Corporation | Apparatus and method for filtering event signals | 
| US5881223A (en) * | 1996-09-06 | 1999-03-09 | Intel Corporation | Centralized performance monitoring architecture | 
| US6098169A (en) * | 1997-12-23 | 2000-08-01 | Intel Corporation | Thread performance analysis by monitoring processor performance event registers at thread switch | 
| US6112318A (en) * | 1997-08-11 | 2000-08-29 | Digital Equipment Corporation | Performance counters controlled by programmable logic | 
| US6233531B1 (en) * | 1997-12-19 | 2001-05-15 | Advanced Micro Devices, Inc. | Apparatus and method for monitoring the performance of a microprocessor | 
| US6279124B1 (en) * | 1996-06-17 | 2001-08-21 | Qwest Communications International Inc. | Method and system for testing hardware and/or software applications | 
| US20020073255A1 (en) * | 2000-12-11 | 2002-06-13 | International Business Machines Corporation | Hierarchical selection of direct and indirect counting events in a performance monitor unit | 
| US6493837B1 (en) * | 1999-07-16 | 2002-12-10 | Microsoft Corporation | Using log buffers to trace an event in a computer system | 
| US20020194389A1 (en) * | 2001-06-08 | 2002-12-19 | Worley William S. | Secure machine platform that interfaces to operating systems and customized control programs | 
- 
        2000
        
- 2000-06-30 US US09/607,254 patent/US6792392B1/en not_active Expired - Lifetime
 
 
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US4872121A (en) * | 1987-08-07 | 1989-10-03 | Harris Corporation | Method and apparatus for monitoring electronic apparatus activity | 
| US5657253A (en) * | 1992-05-15 | 1997-08-12 | Intel Corporation | Apparatus for monitoring the performance of a microprocessor | 
| US5485574A (en) * | 1993-11-04 | 1996-01-16 | Microsoft Corporation | Operating system based performance monitoring of programs | 
| US5581482A (en) * | 1994-04-26 | 1996-12-03 | Unisys Corporation | Performance monitor for digital computer system | 
| US5557548A (en) * | 1994-12-09 | 1996-09-17 | International Business Machines Corporation | Method and system for performance monitoring within a data processing system | 
| US6279124B1 (en) * | 1996-06-17 | 2001-08-21 | Qwest Communications International Inc. | Method and system for testing hardware and/or software applications | 
| US5881223A (en) * | 1996-09-06 | 1999-03-09 | Intel Corporation | Centralized performance monitoring architecture | 
| US5796637A (en) * | 1996-09-06 | 1998-08-18 | Intel Corporation | Apparatus and method for filtering event signals | 
| US6112318A (en) * | 1997-08-11 | 2000-08-29 | Digital Equipment Corporation | Performance counters controlled by programmable logic | 
| US6233531B1 (en) * | 1997-12-19 | 2001-05-15 | Advanced Micro Devices, Inc. | Apparatus and method for monitoring the performance of a microprocessor | 
| US6098169A (en) * | 1997-12-23 | 2000-08-01 | Intel Corporation | Thread performance analysis by monitoring processor performance event registers at thread switch | 
| US6493837B1 (en) * | 1999-07-16 | 2002-12-10 | Microsoft Corporation | Using log buffers to trace an event in a computer system | 
| US20020073255A1 (en) * | 2000-12-11 | 2002-06-13 | International Business Machines Corporation | Hierarchical selection of direct and indirect counting events in a performance monitor unit | 
| US20020194389A1 (en) * | 2001-06-08 | 2002-12-19 | Worley William S. | Secure machine platform that interfaces to operating systems and customized control programs | 
Non-Patent Citations (7)
| Title | 
|---|
| "Supplementing Windows 95 and Windows 98 Performance Data for Remote Measurement and Capacity Planning", BonAmi Software Corporation, 1998.* * | 
| "Windows 2000 Standard EXE files and Associated DII's", www.labmice.net/articles/standardexe.htm.* * | 
| Anderson, "Your Right to Know; Finding Leaks and Bottlenecks with a Windows NT Perfmon COM Object", Jan. 1999, Microsoft Corporation.* * | 
| C. Aubley, "Windows 2000 Performance Tools", Apr. 1, 2000, Windows & .NET Magazine, www.winnetmag.com/Articles/Print.cfm?ArticleID=8198.* * | 
| K. Safford, "A Framework for Using the Pentium's Performance Monitoring Hardware", 1997, University of Illinois.* * | 
| Pratschner, "Instrumenting Windows NT Applications with Performance Monitor", Sep. 30, 1997, Microsoft Consulting Services.* * | 
| S. Patterson, "API Calls to Help You Optimize", Jan. 1996, Visual Basic Programmer's Journal. * | 
Cited By (273)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US20110182378A1 (en) * | 2000-07-05 | 2011-07-28 | Sony Deutschland Gmbh | Pilot pattern design for a sttd scheme in an ofdm system | 
| US6929177B2 (en) * | 2000-07-31 | 2005-08-16 | Ncr Corporation | Method and apparatus for storing retail performance metrics | 
| US20050038695A1 (en) * | 2000-07-31 | 2005-02-17 | Ncr Corporation | Method and apparatus for storing retail performance metrics | 
| US20040205167A1 (en) * | 2001-05-29 | 2004-10-14 | Doug Grumann | Automatic configuration of performance management tools | 
| US7161951B1 (en) * | 2001-06-12 | 2007-01-09 | At&T Corp. | Mechanism for implementing virtual carrier sense | 
| US6970809B2 (en) * | 2001-08-29 | 2005-11-29 | International Business Machines Corporation | Automated configuration of on-circuit facilities | 
| US20030046616A1 (en) * | 2001-08-29 | 2003-03-06 | International Business Machines Corporation | Automated configuration of on-circuit facilities | 
| US20090192763A1 (en) * | 2002-03-29 | 2009-07-30 | Ecolab Inc. | Method and apparatus for automatic pest trap report generation and additional trap parameter data | 
| US20030225865A1 (en) * | 2002-05-29 | 2003-12-04 | Luke Koestler | Auditing computer systems components in a network | 
| US7149800B2 (en) * | 2002-05-29 | 2006-12-12 | Seventh Knight | Auditing computer systems components in a network | 
| US20040025172A1 (en) * | 2002-08-02 | 2004-02-05 | Bian Qiyong B. | Counter functions in an application program interface for network devices | 
| US7509656B2 (en) * | 2002-08-02 | 2009-03-24 | Bian Qiyong B | Counter functions in an application program interface for network devices | 
| US20040054515A1 (en) * | 2002-09-18 | 2004-03-18 | Todi Rajat Kumar | Methods and systems for modeling the performance of a processor | 
| US20040148133A1 (en) * | 2002-11-08 | 2004-07-29 | Sampsa Fabritius | Collecting operational information on closed system | 
| US20050209819A1 (en) * | 2003-06-26 | 2005-09-22 | Microsoft Corporation | Determining and using capabilities of a computer system | 
| US7743365B2 (en) * | 2003-06-26 | 2010-06-22 | Microsoft Corporation | Determining and using capabilities of a computer system | 
| US20060005083A1 (en) * | 2004-06-30 | 2006-01-05 | International Business Machines Corporation | Performance count tracing | 
| US20060064486A1 (en) * | 2004-09-17 | 2006-03-23 | Microsoft Corporation | Methods for service monitoring and control | 
| US7200522B2 (en) * | 2005-01-27 | 2007-04-03 | International Business Machines Corporation | Method, apparatus, and computer program product in a performance monitor for sampling all performance events generated by a processor | 
| US20090276185A1 (en) * | 2005-01-27 | 2009-11-05 | International Business Machines Corporation | Performance Monitor Unit for Sampling all Performance Events Generated by a Processor | 
| US20070245172A1 (en) * | 2005-01-27 | 2007-10-18 | Mericas Alex E | Method, Apparatus, and Computer Program Product in a Performance Monitor for Sampling All Performance Events Generated by a Processor | 
| US20060167658A1 (en) * | 2005-01-27 | 2006-07-27 | International Business Machines Corporation | Method, apparatus, and computer program product in a performance monitor for sampling all performance events generated by a processor | 
| US7548832B2 (en) | 2005-01-27 | 2009-06-16 | International Business Machines Corporation | Method in a performance monitor for sampling all performance events generated by a processor | 
| US8055473B2 (en) | 2005-01-27 | 2011-11-08 | International Business Machines Corporation | Performance monitor unit for sampling all performance events generated by a processor | 
| EP1883051A4 (en) * | 2005-05-20 | 2017-08-09 | Sony Interactive Entertainment Inc. | Graphic processor and information processing device | 
| US8010969B2 (en) * | 2005-06-13 | 2011-08-30 | Intel Corporation | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | 
| US20060282839A1 (en) * | 2005-06-13 | 2006-12-14 | Hankins Richard A | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | 
| US8887174B2 (en) | 2005-06-13 | 2014-11-11 | Intel Corporation | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | 
| US7548964B2 (en) | 2005-10-11 | 2009-06-16 | International Business Machines Corporation | Performance counters for virtualized network interfaces of communications networks | 
| US20070083643A1 (en) * | 2005-10-11 | 2007-04-12 | International Business Machines Corporation | Performance counters for virtualized network interfaces of communications networks | 
| US7970952B2 (en) | 2005-10-11 | 2011-06-28 | International Business Machines Corporation | Performance counters for virtualized network interfaces of communications networks | 
| US20090234974A1 (en) * | 2005-10-11 | 2009-09-17 | International Business Machines Corporation | Performance counters for virtualized network interfaces of communications networks | 
| US8799687B2 (en) | 2005-12-30 | 2014-08-05 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates | 
| US7533003B2 (en) | 2006-11-30 | 2009-05-12 | International Business Machines Corporation | Weighted event counting system and method for processor performance measurements | 
| US20080133180A1 (en) * | 2006-11-30 | 2008-06-05 | Floyd Michael S | Weighted event counting system and method for processor performance measurements | 
| US7340378B1 (en) | 2006-11-30 | 2008-03-04 | International Business Machines Corporation | Weighted event counting system and method for processor performance measurements | 
| US20080307238A1 (en) * | 2007-06-06 | 2008-12-11 | Andreas Bieswanger | System for Unified Management of Power, Performance, and Thermals in Computer Systems | 
| US7908493B2 (en) | 2007-06-06 | 2011-03-15 | International Business Machines Corporation | Unified management of power, performance, and thermals in computer systems | 
| CN101197712B (en) * | 2007-10-19 | 2010-06-09 | 中兴通讯股份有限公司 | Method for capturing performance object data in telecommunication network management system | 
| US20140013071A1 (en) * | 2008-03-13 | 2014-01-09 | Hitachi, Ltd. | Storage system | 
| US8910174B2 (en) * | 2008-03-13 | 2014-12-09 | Hitachi, Ltd. | Storage system | 
| US9626129B2 (en) | 2008-03-13 | 2017-04-18 | Hitachi, Ltd. | Storage system | 
| US20100125436A1 (en) * | 2008-11-20 | 2010-05-20 | International Business Machines Corporation | Identifying Deterministic Performance Boost Capability of a Computer System | 
| US8055477B2 (en) | 2008-11-20 | 2011-11-08 | International Business Machines Corporation | Identifying deterministic performance boost capability of a computer system | 
| US20100262402A1 (en) * | 2009-04-08 | 2010-10-14 | Nec Electronics Corporation | Performance evaluation device and performance evaluation method | 
| US20120240128A1 (en) * | 2009-09-30 | 2012-09-20 | St-Ericsson Sa | Memory Access Performance Diagnosis | 
| US10691571B2 (en) | 2009-12-04 | 2020-06-23 | Red Hat, Inc. | Obtaining application performance data for different performance events via a unified channel | 
| US8286192B2 (en) | 2009-12-04 | 2012-10-09 | Red Hat, Inc. | Kernel subsystem for handling performance counters and events | 
| US20110138389A1 (en) * | 2009-12-04 | 2011-06-09 | Ingo Molnar | Obtaining application performance data for different performance events via a unified channel | 
| US20110138146A1 (en) * | 2009-12-04 | 2011-06-09 | Ingo Molnar | Kernel subsystem for handling performance counters and events | 
| US9665461B2 (en) * | 2009-12-04 | 2017-05-30 | Red Hat, Inc. | Obtaining application performance data for different performance events via a unified channel | 
| US8171340B2 (en) * | 2009-12-11 | 2012-05-01 | Red Hat, Inc. | Software performance counters | 
| US20110145829A1 (en) * | 2009-12-11 | 2011-06-16 | Ingo Molnar | Performance counter inheritance | 
| US8954996B2 (en) * | 2009-12-11 | 2015-02-10 | Red Hat, Inc. | Profiling the system providing performance statistics in real time | 
| US8935703B2 (en) * | 2009-12-11 | 2015-01-13 | Red Hat, Inc. | Performance counter inheritance | 
| US20110145838A1 (en) * | 2009-12-11 | 2011-06-16 | De Melo Arnaldo Carvalho | Profiling the system providing performance statistics in real time | 
| US20110145651A1 (en) * | 2009-12-11 | 2011-06-16 | Ingo Molnar | Software performance counters | 
| US10169187B2 (en) | 2010-08-18 | 2019-01-01 | International Business Machines Corporation | Processor core having a saturating event counter for making performance measurements | 
| US20140019945A1 (en) * | 2010-08-24 | 2014-01-16 | Trading Systems Associates Plc | Software instrumentation apparatus and method | 
| US9032226B2 (en) | 2010-09-23 | 2015-05-12 | Intel Corporation | Providing per core voltage and frequency control | 
| US8943334B2 (en) | 2010-09-23 | 2015-01-27 | Intel Corporation | Providing per core voltage and frequency control | 
| US9348387B2 (en) | 2010-09-23 | 2016-05-24 | Intel Corporation | Providing per core voltage and frequency control | 
| US9983661B2 (en) | 2010-09-23 | 2018-05-29 | Intel Corporation | Providing per core voltage and frequency control | 
| US9939884B2 (en) | 2010-09-23 | 2018-04-10 | Intel Corporation | Providing per core voltage and frequency control | 
| US9983659B2 (en) | 2010-09-23 | 2018-05-29 | Intel Corporation | Providing per core voltage and frequency control | 
| US9983660B2 (en) | 2010-09-23 | 2018-05-29 | Intel Corporation | Providing per core voltage and frequency control | 
| US10613620B2 (en) | 2010-09-23 | 2020-04-07 | Intel Corporation | Providing per core voltage and frequency control | 
| US9483376B2 (en) | 2010-10-13 | 2016-11-01 | The Trustees Of Columbia University In The City Of New York | System and methods for precise microprocessor event counting | 
| US9075614B2 (en) | 2011-03-21 | 2015-07-07 | Intel Corporation | Managing power consumption in a multi-core processor | 
| US9069555B2 (en) | 2011-03-21 | 2015-06-30 | Intel Corporation | Managing power consumption in a multi-core processor | 
| US8949637B2 (en) * | 2011-03-24 | 2015-02-03 | Intel Corporation | Obtaining power profile information with low overhead | 
| US20120246506A1 (en) * | 2011-03-24 | 2012-09-27 | Robert Knight | Obtaining Power Profile Information With Low Overhead | 
| US8904205B2 (en) | 2011-06-27 | 2014-12-02 | Intel Corporation | Increasing power efficiency of turbo mode operation in a processor | 
| US8683240B2 (en) | 2011-06-27 | 2014-03-25 | Intel Corporation | Increasing power efficiency of turbo mode operation in a processor | 
| US8793515B2 (en) | 2011-06-27 | 2014-07-29 | Intel Corporation | Increasing power efficiency of turbo mode operation in a processor | 
| US8769316B2 (en) | 2011-09-06 | 2014-07-01 | Intel Corporation | Dynamically allocating a power budget over multiple domains of a processor | 
| US9081557B2 (en) | 2011-09-06 | 2015-07-14 | Intel Corporation | Dynamically allocating a power budget over multiple domains of a processor | 
| US8775833B2 (en) | 2011-09-06 | 2014-07-08 | Intel Corporation | Dynamically allocating a power budget over multiple domains of a processor | 
| US9032125B2 (en) | 2011-09-08 | 2015-05-12 | Intel Corporation | Increasing turbo mode residency of a processor | 
| US9032126B2 (en) | 2011-09-08 | 2015-05-12 | Intel Corporation | Increasing turbo mode residency of a processor | 
| US8688883B2 (en) | 2011-09-08 | 2014-04-01 | Intel Corporation | Increasing turbo mode residency of a processor | 
| US9501129B2 (en) | 2011-09-28 | 2016-11-22 | Intel Corporation | Dynamically adjusting power of non-core processor circuitry including buffer circuitry | 
| US8914650B2 (en) | 2011-09-28 | 2014-12-16 | Intel Corporation | Dynamically adjusting power of non-core processor circuitry including buffer circuitry | 
| US8954770B2 (en) | 2011-09-28 | 2015-02-10 | Intel Corporation | Controlling temperature of multiple domains of a multi-domain processor using a cross domain margin | 
| US9074947B2 (en) | 2011-09-28 | 2015-07-07 | Intel Corporation | Estimating temperature of a processor core in a low power state without thermal sensor information | 
| US9235254B2 (en) | 2011-09-28 | 2016-01-12 | Intel Corporation | Controlling temperature of multiple domains of a multi-domain processor using a cross-domain margin | 
| US9026815B2 (en) | 2011-10-27 | 2015-05-05 | Intel Corporation | Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor | 
| US8832478B2 (en) | 2011-10-27 | 2014-09-09 | Intel Corporation | Enabling a non-core domain to control memory bandwidth in a processor | 
| US9354692B2 (en) | 2011-10-27 | 2016-05-31 | Intel Corporation | Enabling a non-core domain to control memory bandwidth in a processor | 
| US10248181B2 (en) | 2011-10-27 | 2019-04-02 | Intel Corporation | Enabling a non-core domain to control memory bandwidth in a processor | 
| US9176565B2 (en) | 2011-10-27 | 2015-11-03 | Intel Corporation | Controlling operating frequency of a core domain based on operating condition of a non-core domain of a multi-domain processor | 
| US9939879B2 (en) | 2011-10-27 | 2018-04-10 | Intel Corporation | Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor | 
| US10705588B2 (en) | 2011-10-27 | 2020-07-07 | Intel Corporation | Enabling a non-core domain to control memory bandwidth in a processor | 
| US10037067B2 (en) | 2011-10-27 | 2018-07-31 | Intel Corporation | Enabling a non-core domain to control memory bandwidth in a processor | 
| US8943340B2 (en) | 2011-10-31 | 2015-01-27 | Intel Corporation | Controlling a turbo mode frequency of a processor | 
| US9158693B2 (en) | 2011-10-31 | 2015-10-13 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US9292068B2 (en) | 2011-10-31 | 2016-03-22 | Intel Corporation | Controlling a turbo mode frequency of a processor | 
| US10474218B2 (en) | 2011-10-31 | 2019-11-12 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US10613614B2 (en) | 2011-10-31 | 2020-04-07 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US9618997B2 (en) | 2011-10-31 | 2017-04-11 | Intel Corporation | Controlling a turbo mode frequency of a processor | 
| US10067553B2 (en) | 2011-10-31 | 2018-09-04 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US9471490B2 (en) | 2011-10-31 | 2016-10-18 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US10564699B2 (en) | 2011-10-31 | 2020-02-18 | Intel Corporation | Dynamically controlling cache size to maximize energy efficiency | 
| US9753531B2 (en) | 2011-12-05 | 2017-09-05 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including determining an optimal power state of the apparatus based on residency time of non-core domains in a power saving state | 
| US9239611B2 (en) | 2011-12-05 | 2016-01-19 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including balancing power among multi-frequency domains of a processor based on efficiency rating scheme | 
| US8972763B2 (en) | 2011-12-05 | 2015-03-03 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including determining an optimal power state of the apparatus based on residency time of non-core domains in a power saving state | 
| US9052901B2 (en) | 2011-12-14 | 2015-06-09 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including configurable maximum processor current | 
| US9170624B2 (en) | 2011-12-15 | 2015-10-27 | Intel Corporation | User level control of power management policies | 
| US10372197B2 (en) | 2011-12-15 | 2019-08-06 | Intel Corporation | User level control of power management policies | 
| US9760409B2 (en) | 2011-12-15 | 2017-09-12 | Intel Corporation | Dynamically modifying a power/performance tradeoff based on a processor utilization | 
| US9098261B2 (en) | 2011-12-15 | 2015-08-04 | Intel Corporation | User level control of power management policies | 
| US9372524B2 (en) | 2011-12-15 | 2016-06-21 | Intel Corporation | Dynamically modifying a power/performance tradeoff based on processor utilization | 
| US9535487B2 (en) | 2011-12-15 | 2017-01-03 | Intel Corporation | User level control of power management policies | 
| US8996895B2 (en) | 2011-12-28 | 2015-03-31 | Intel Corporation | Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates | 
| US9323316B2 (en) | 2012-03-13 | 2016-04-26 | Intel Corporation | Dynamically controlling interconnect frequency in a processor | 
| US9354689B2 (en) | 2012-03-13 | 2016-05-31 | Intel Corporation | Providing energy efficient turbo operation of a processor | 
| US9436245B2 (en) | 2012-03-13 | 2016-09-06 | Intel Corporation | Dynamically computing an electrical design point (EDP) for a multicore processor | 
| US9547027B2 (en) | 2012-03-30 | 2017-01-17 | Intel Corporation | Dynamically measuring power consumption in a processor | 
| US10185566B2 (en) | 2012-04-27 | 2019-01-22 | Intel Corporation | Migrating tasks between asymmetric computing elements of a multi-core processor | 
| US10191532B2 (en) | 2012-08-31 | 2019-01-29 | Intel Corporation | Configuring power management functionality in a processor | 
| US9189046B2 (en) | 2012-08-31 | 2015-11-17 | Intel Corporation | Performing cross-domain thermal control in a processor | 
| US11237614B2 (en) | 2012-08-31 | 2022-02-01 | Intel Corporation | Multicore processor with a control register storing an indicator that two or more cores are to operate at independent performance states | 
| US10203741B2 (en) | 2012-08-31 | 2019-02-12 | Intel Corporation | Configuring power management functionality in a processor | 
| US9760155B2 (en) | 2012-08-31 | 2017-09-12 | Intel Corporation | Configuring power management functionality in a processor | 
| US9063727B2 (en) | 2012-08-31 | 2015-06-23 | Intel Corporation | Performing cross-domain thermal control in a processor | 
| US9235244B2 (en) | 2012-08-31 | 2016-01-12 | Intel Corporation | Configuring power management functionality in a processor | 
| US10877549B2 (en) | 2012-08-31 | 2020-12-29 | Intel Corporation | Configuring power management functionality in a processor | 
| US8984313B2 (en) | 2012-08-31 | 2015-03-17 | Intel Corporation | Configuring power management functionality in a processor including a plurality of cores by utilizing a register to store a power domain indicator | 
| US9335804B2 (en) | 2012-09-17 | 2016-05-10 | Intel Corporation | Distributing power to heterogeneous compute elements of a processor | 
| US9342122B2 (en) | 2012-09-17 | 2016-05-17 | Intel Corporation | Distributing power to heterogeneous compute elements of a processor | 
| US9423858B2 (en) | 2012-09-27 | 2016-08-23 | Intel Corporation | Sharing power between domains in a processor package using encoded power consumption information from a second domain to calculate an available power budget for a first domain | 
| US9575543B2 (en) | 2012-11-27 | 2017-02-21 | Intel Corporation | Providing an inter-arrival access timer in a processor | 
| US9176875B2 (en) | 2012-12-14 | 2015-11-03 | Intel Corporation | Power gating a portion of a cache memory | 
| US9183144B2 (en) | 2012-12-14 | 2015-11-10 | Intel Corporation | Power gating a portion of a cache memory | 
| US9292468B2 (en) | 2012-12-17 | 2016-03-22 | Intel Corporation | Performing frequency coordination in a multiprocessor system based on response timing optimization | 
| US9405351B2 (en) | 2012-12-17 | 2016-08-02 | Intel Corporation | Performing frequency coordination in a multiprocessor system | 
| US9671854B2 (en) | 2012-12-21 | 2017-06-06 | Intel Corporation | Controlling configurable peak performance limits of a processor | 
| US9086834B2 (en) | 2012-12-21 | 2015-07-21 | Intel Corporation | Controlling configurable peak performance limits of a processor | 
| US9075556B2 (en) | 2012-12-21 | 2015-07-07 | Intel Corporation | Controlling configurable peak performance limits of a processor | 
| US9235252B2 (en) | 2012-12-21 | 2016-01-12 | Intel Corporation | Dynamic balancing of power across a plurality of processor domains according to power policy control bias | 
| US9164565B2 (en) | 2012-12-28 | 2015-10-20 | Intel Corporation | Apparatus and method to manage energy usage of a processor | 
| US9081577B2 (en) | 2012-12-28 | 2015-07-14 | Intel Corporation | Independent control of processor core retention states | 
| US9335803B2 (en) | 2013-02-15 | 2016-05-10 | Intel Corporation | Calculating a dynamically changeable maximum operating voltage value for a processor based on a different polynomial equation using a set of coefficient values and a number of current active cores | 
| US11175712B2 (en) | 2013-03-11 | 2021-11-16 | Intel Corporation | Controlling operating voltage of a processor | 
| US11822409B2 (en) | 2013-03-11 | 2023-11-21 | Daedauls Prime LLC | Controlling operating frequency of a processor | 
| US10394300B2 (en) | 2013-03-11 | 2019-08-27 | Intel Corporation | Controlling operating voltage of a processor | 
| US9996135B2 (en) | 2013-03-11 | 2018-06-12 | Intel Corporation | Controlling operating voltage of a processor | 
| US12339723B2 (en) | 2013-03-11 | 2025-06-24 | Daedalus Prime Llc | Controlling operating voltage of a processor | 
| US9367114B2 (en) | 2013-03-11 | 2016-06-14 | Intel Corporation | Controlling operating voltage of a processor | 
| US11507167B2 (en) | 2013-03-11 | 2022-11-22 | Daedalus Prime Llc | Controlling operating voltage of a processor | 
| US9395784B2 (en) | 2013-04-25 | 2016-07-19 | Intel Corporation | Independently controlling frequency of plurality of power domains in a processor system | 
| US9377841B2 (en) | 2013-05-08 | 2016-06-28 | Intel Corporation | Adaptively limiting a maximum operating frequency in a multicore processor | 
| US10146283B2 (en) | 2013-05-31 | 2018-12-04 | Intel Corporation | Controlling power delivery to a processor via a bypass | 
| US9823719B2 (en) | 2013-05-31 | 2017-11-21 | Intel Corporation | Controlling power delivery to a processor via a bypass | 
| US11687135B2 (en) | 2013-05-31 | 2023-06-27 | Tahoe Research, Ltd. | Controlling power delivery to a processor via a bypass | 
| US10429913B2 (en) | 2013-05-31 | 2019-10-01 | Intel Corporation | Controlling power delivery to a processor via a bypass | 
| US11157052B2 (en) | 2013-05-31 | 2021-10-26 | Intel Corporation | Controlling power delivery to a processor via a bypass | 
| US10409346B2 (en) | 2013-05-31 | 2019-09-10 | Intel Corporation | Controlling power delivery to a processor via a bypass | 
| US9471088B2 (en) | 2013-06-25 | 2016-10-18 | Intel Corporation | Restricting clock signal delivery in a processor | 
| US9348401B2 (en) | 2013-06-25 | 2016-05-24 | Intel Corporation | Mapping a performance request to an operating frequency in a processor | 
| US10175740B2 (en) | 2013-06-25 | 2019-01-08 | Intel Corporation | Mapping a performance request to an operating frequency in a processor | 
| US9348407B2 (en) | 2013-06-27 | 2016-05-24 | Intel Corporation | Method and apparatus for atomic frequency and voltage changes | 
| US9377836B2 (en) | 2013-07-26 | 2016-06-28 | Intel Corporation | Restricting clock signal delivery based on activity in a processor | 
| US9495001B2 (en) | 2013-08-21 | 2016-11-15 | Intel Corporation | Forcing core low power states in a processor | 
| US10310588B2 (en) | 2013-08-21 | 2019-06-04 | Intel Corporation | Forcing core low power states in a processor | 
| US10386900B2 (en) | 2013-09-24 | 2019-08-20 | Intel Corporation | Thread aware power management | 
| US9594560B2 (en) | 2013-09-27 | 2017-03-14 | Intel Corporation | Estimating scalability value for a specific domain of a multicore processor based on active state residency of the domain, stall duration of the domain, memory bandwidth of the domain, and a plurality of coefficients based on a workload to execute on the domain | 
| US9405345B2 (en) | 2013-09-27 | 2016-08-02 | Intel Corporation | Constraining processor operation based on power envelope information | 
| US9494998B2 (en) | 2013-12-17 | 2016-11-15 | Intel Corporation | Rescheduling workloads to enforce and maintain a duty cycle | 
| US9965019B2 (en) | 2013-12-23 | 2018-05-08 | Intel Corporation | Dyanamically adapting a voltage of a clock generation circuit | 
| US9459689B2 (en) | 2013-12-23 | 2016-10-04 | Intel Corporation | Dyanamically adapting a voltage of a clock generation circuit | 
| US9323525B2 (en) | 2014-02-26 | 2016-04-26 | Intel Corporation | Monitoring vector lane duty cycle for dynamic optimization | 
| US10963038B2 (en) | 2014-03-21 | 2021-03-30 | Intel Corporation | Selecting a low power state based on cache flush latency determination | 
| US9665153B2 (en) | 2014-03-21 | 2017-05-30 | Intel Corporation | Selecting a low power state based on cache flush latency determination | 
| US10198065B2 (en) | 2014-03-21 | 2019-02-05 | Intel Corporation | Selecting a low power state based on cache flush latency determination | 
| US10108454B2 (en) | 2014-03-21 | 2018-10-23 | Intel Corporation | Managing dynamic capacitance using code scheduling | 
| US9395788B2 (en) | 2014-03-28 | 2016-07-19 | Intel Corporation | Power state transition analysis | 
| KR20160147903A (en) * | 2014-04-28 | 2016-12-23 | 에이알엠 아이피 리미티드 | Access control and code scheduling | 
| US20170039085A1 (en) * | 2014-04-28 | 2017-02-09 | Arm Ip Limited | Access control and code scheduling | 
| US10891146B2 (en) * | 2014-04-28 | 2021-01-12 | Arm Ip Limited | Access control and code scheduling | 
| US9760158B2 (en) | 2014-06-06 | 2017-09-12 | Intel Corporation | Forcing a processor into a low power state | 
| US10417149B2 (en) | 2014-06-06 | 2019-09-17 | Intel Corporation | Self-aligning a processor duty cycle with interrupts | 
| US10345889B2 (en) | 2014-06-06 | 2019-07-09 | Intel Corporation | Forcing a processor into a low power state | 
| US10216251B2 (en) | 2014-06-30 | 2019-02-26 | Intel Corporation | Controlling processor performance scaling based on context | 
| US9606602B2 (en) | 2014-06-30 | 2017-03-28 | Intel Corporation | Method and apparatus to prevent voltage droop in a computer | 
| US9513689B2 (en) | 2014-06-30 | 2016-12-06 | Intel Corporation | Controlling processor performance scaling based on context | 
| US10948968B2 (en) | 2014-06-30 | 2021-03-16 | Intel Corporation | Controlling processor performance scaling based on context | 
| US10331186B2 (en) | 2014-07-25 | 2019-06-25 | Intel Corporation | Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states | 
| US9575537B2 (en) | 2014-07-25 | 2017-02-21 | Intel Corporation | Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states | 
| US9760136B2 (en) | 2014-08-15 | 2017-09-12 | Intel Corporation | Controlling temperature of a system memory | 
| US9990016B2 (en) | 2014-08-15 | 2018-06-05 | Intel Corporation | Controlling temperature of a system memory | 
| US9671853B2 (en) | 2014-09-12 | 2017-06-06 | Intel Corporation | Processor operating by selecting smaller of requested frequency and an energy performance gain (EPG) frequency | 
| US10339023B2 (en) | 2014-09-25 | 2019-07-02 | Intel Corporation | Cache-aware adaptive thread scheduling and migration | 
| US9977477B2 (en) | 2014-09-26 | 2018-05-22 | Intel Corporation | Adapting operating parameters of an input/output (IO) interface circuit of a processor | 
| US20160091614A1 (en) * | 2014-09-29 | 2016-03-31 | Battelle Energy Alliance, Llc | Radioactive waste screening systems, and related methods | 
| US9684360B2 (en) | 2014-10-30 | 2017-06-20 | Intel Corporation | Dynamically controlling power management of an on-die memory of a processor | 
| US10429918B2 (en) | 2014-11-24 | 2019-10-01 | Intel Corporation | Controlling turbo mode frequency operation in a processor | 
| US9703358B2 (en) | 2014-11-24 | 2017-07-11 | Intel Corporation | Controlling turbo mode frequency operation in a processor | 
| US9710043B2 (en) | 2014-11-26 | 2017-07-18 | Intel Corporation | Controlling a guaranteed frequency of a processor | 
| US10048744B2 (en) | 2014-11-26 | 2018-08-14 | Intel Corporation | Apparatus and method for thermal management in a multi-chip package | 
| US11841752B2 (en) | 2014-11-26 | 2023-12-12 | Intel Corporation | Controlling average power limits of a processor | 
| US11079819B2 (en) | 2014-11-26 | 2021-08-03 | Intel Corporation | Controlling average power limits of a processor | 
| US10877530B2 (en) | 2014-12-23 | 2020-12-29 | Intel Corporation | Apparatus and method to provide a thermal parameter report for a multi-chip package | 
| US11543868B2 (en) | 2014-12-23 | 2023-01-03 | Intel Corporation | Apparatus and method to provide a thermal parameter report for a multi-chip package | 
| US10719326B2 (en) | 2015-01-30 | 2020-07-21 | Intel Corporation | Communicating via a mailbox interface of a processor | 
| US9639134B2 (en) | 2015-02-05 | 2017-05-02 | Intel Corporation | Method and apparatus to provide telemetry data to a power controller of a processor | 
| US10775873B2 (en) | 2015-02-13 | 2020-09-15 | Intel Corporation | Performing power management in a multicore processor | 
| US10234930B2 (en) | 2015-02-13 | 2019-03-19 | Intel Corporation | Performing power management in a multicore processor | 
| US9910481B2 (en) | 2015-02-13 | 2018-03-06 | Intel Corporation | Performing power management in a multicore processor | 
| US9874922B2 (en) | 2015-02-17 | 2018-01-23 | Intel Corporation | Performing dynamic power control of platform devices | 
| US9842082B2 (en) | 2015-02-27 | 2017-12-12 | Intel Corporation | Dynamically updating logical identifiers of cores of a processor | 
| US10706004B2 (en) | 2015-02-27 | 2020-07-07 | Intel Corporation | Dynamically updating logical identifiers of cores of a processor | 
| US11567896B2 (en) | 2015-02-27 | 2023-01-31 | Intel Corporation | Dynamically updating logical identifiers of cores of a processor | 
| US9710054B2 (en) | 2015-02-28 | 2017-07-18 | Intel Corporation | Programmable power management agent | 
| US10761594B2 (en) | 2015-02-28 | 2020-09-01 | Intel Corporation | Programmable power management agent | 
| US9760160B2 (en) | 2015-05-27 | 2017-09-12 | Intel Corporation | Controlling performance states of processing engines of a processor | 
| US10372198B2 (en) | 2015-05-27 | 2019-08-06 | Intel Corporation | Controlling performance states of processing engines of a processor | 
| US9710041B2 (en) | 2015-07-29 | 2017-07-18 | Intel Corporation | Masking a power state of a core of a processor | 
| US10001822B2 (en) | 2015-09-22 | 2018-06-19 | Intel Corporation | Integrating a power arbiter in a processor | 
| US9983644B2 (en) | 2015-11-10 | 2018-05-29 | Intel Corporation | Dynamically updating at least one power management operational parameter pertaining to a turbo mode of a processor for increased performance | 
| US9910470B2 (en) | 2015-12-16 | 2018-03-06 | Intel Corporation | Controlling telemetry data communication in a processor | 
| US10146286B2 (en) | 2016-01-14 | 2018-12-04 | Intel Corporation | Dynamically updating a power management policy of a processor | 
| US10289188B2 (en) | 2016-06-21 | 2019-05-14 | Intel Corporation | Processor having concurrent core and fabric exit from a low power state | 
| US10990161B2 (en) | 2016-06-23 | 2021-04-27 | Intel Corporation | Processor having accelerated user responsiveness in constrained environment | 
| US11435816B2 (en) | 2016-06-23 | 2022-09-06 | Intel Corporation | Processor having accelerated user responsiveness in constrained environment | 
| US10324519B2 (en) | 2016-06-23 | 2019-06-18 | Intel Corporation | Controlling forced idle state operation in a processor | 
| US10281975B2 (en) | 2016-06-23 | 2019-05-07 | Intel Corporation | Processor having accelerated user responsiveness in constrained environment | 
| US10379596B2 (en) | 2016-08-03 | 2019-08-13 | Intel Corporation | Providing an interface for demotion control information in a processor | 
| US10234920B2 (en) | 2016-08-31 | 2019-03-19 | Intel Corporation | Controlling current consumption of a processor based at least in part on platform capacitance | 
| US10423206B2 (en) | 2016-08-31 | 2019-09-24 | Intel Corporation | Processor to pre-empt voltage ramps for exit latency reductions | 
| US10379904B2 (en) | 2016-08-31 | 2019-08-13 | Intel Corporation | Controlling a performance state of a processor using a combination of package and thread hint information | 
| US11119555B2 (en) | 2016-08-31 | 2021-09-14 | Intel Corporation | Processor to pre-empt voltage ramps for exit latency reductions | 
| US11023294B1 (en) | 2016-09-14 | 2021-06-01 | Google Llc | Distributed API accounting | 
| US10445151B1 (en) * | 2016-09-14 | 2019-10-15 | Google Llc | Distributed API accounting | 
| US11687383B1 (en) | 2016-09-14 | 2023-06-27 | Google Llc | Distributed API accounting | 
| US10761580B2 (en) | 2016-09-29 | 2020-09-01 | Intel Corporation | Techniques to enable communication between a processor and voltage regulator | 
| US12210395B2 (en) | 2016-09-29 | 2025-01-28 | Intel Corporation | Techniques to enable communication between a processor and voltage regulator | 
| US11782492B2 (en) | 2016-09-29 | 2023-10-10 | Intel Corporation | Techniques to enable communication between a processor and voltage regulator | 
| US10168758B2 (en) | 2016-09-29 | 2019-01-01 | Intel Corporation | Techniques to enable communication between a processor and voltage regulator | 
| US11402887B2 (en) | 2016-09-29 | 2022-08-02 | Intel Corporation | Techniques to enable communication between a processor and voltage regulator | 
| US10963034B2 (en) | 2017-06-28 | 2021-03-30 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management in a processor | 
| US11740682B2 (en) | 2017-06-28 | 2023-08-29 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US10990154B2 (en) | 2017-06-28 | 2021-04-27 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US10990155B2 (en) | 2017-06-28 | 2021-04-27 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US10429919B2 (en) | 2017-06-28 | 2019-10-01 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US12265440B2 (en) | 2017-06-28 | 2025-04-01 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US11402891B2 (en) | 2017-06-28 | 2022-08-02 | Intel Corporation | System, apparatus and method for loose lock-step redundancy power management | 
| US11593544B2 (en) | 2017-08-23 | 2023-02-28 | Intel Corporation | System, apparatus and method for adaptive operating voltage in a field programmable gate array (FPGA) | 
| US10962596B2 (en) | 2017-11-29 | 2021-03-30 | Intel Corporation | System, apparatus and method for in-field self testing in a diagnostic sleep state | 
| US10620266B2 (en) | 2017-11-29 | 2020-04-14 | Intel Corporation | System, apparatus and method for in-field self testing in a diagnostic sleep state | 
| US10620682B2 (en) | 2017-12-21 | 2020-04-14 | Intel Corporation | System, apparatus and method for processor-external override of hardware performance state control of a processor | 
| US11010169B2 (en) | 2018-01-09 | 2021-05-18 | Samsung Electronics Co., Ltd. | Processor device collecting performance information through command-set-based replay | 
| US10620969B2 (en) | 2018-03-27 | 2020-04-14 | Intel Corporation | System, apparatus and method for providing hardware feedback information in a processor | 
| US10739844B2 (en) | 2018-05-02 | 2020-08-11 | Intel Corporation | System, apparatus and method for optimized throttling of a processor | 
| US10955899B2 (en) | 2018-06-20 | 2021-03-23 | Intel Corporation | System, apparatus and method for responsive autonomous hardware performance state control of a processor | 
| US11340687B2 (en) | 2018-06-20 | 2022-05-24 | Intel Corporation | System, apparatus and method for responsive autonomous hardware performance state control of a processor | 
| US11669146B2 (en) | 2018-06-20 | 2023-06-06 | Intel Corporation | System, apparatus and method for responsive autonomous hardware performance state control of a processor | 
| US10976801B2 (en) | 2018-09-20 | 2021-04-13 | Intel Corporation | System, apparatus and method for power budget distribution for a plurality of virtual machines to execute on a processor | 
| US10860083B2 (en) | 2018-09-26 | 2020-12-08 | Intel Corporation | System, apparatus and method for collective power control of multiple intellectual property agents and a shared power rail | 
| US12189652B2 (en) * | 2018-10-19 | 2025-01-07 | Oracle International Corporation | Language interoperable runtime adaptable data collections | 
| US12379769B2 (en) | 2018-12-12 | 2025-08-05 | Intel Corporation | System, apparatus and method for dynamic thermal distribution of a system on chip | 
| US11656676B2 (en) | 2018-12-12 | 2023-05-23 | Intel Corporation | System, apparatus and method for dynamic thermal distribution of a system on chip | 
| US11256657B2 (en) | 2019-03-26 | 2022-02-22 | Intel Corporation | System, apparatus and method for adaptive interconnect routing | 
| US11442529B2 (en) | 2019-05-15 | 2022-09-13 | Intel Corporation | System, apparatus and method for dynamically controlling current consumption of processing circuits of a processor | 
| US11698812B2 (en) | 2019-08-29 | 2023-07-11 | Intel Corporation | System, apparatus and method for providing hardware state feedback to an operating system in a heterogeneous processor | 
| US12182618B2 (en) | 2019-08-29 | 2024-12-31 | Intel Corporation | System, apparatus and method for providing hardware state feedback to an operating system in a heterogeneous processor | 
| US11366506B2 (en) | 2019-11-22 | 2022-06-21 | Intel Corporation | System, apparatus and method for globally aware reactive local power control in a processor | 
| US11853144B2 (en) | 2019-11-22 | 2023-12-26 | Intel Corporation | System, apparatus and method for globally aware reactive local power control in a processor | 
| US11132201B2 (en) | 2019-12-23 | 2021-09-28 | Intel Corporation | System, apparatus and method for dynamic pipeline stage control of data path dominant circuitry of an integrated circuit | 
| US11616859B2 (en) * | 2020-03-31 | 2023-03-28 | Microsoft Technology Licensing, Llc | Unified counting platform | 
| US20210306440A1 (en) * | 2020-03-31 | 2021-09-30 | Microsoft Technology Licensing, Llc | Unified counting platform | 
| US11921564B2 (en) | 2022-02-28 | 2024-03-05 | Intel Corporation | Saving and restoring configuration and status information with reduced latency | 
| CN118069485A (en) * | 2024-04-25 | 2024-05-24 | 沐曦集成电路(上海)有限公司 | Automatic generation system of register transmission level code of performance counter | 
Similar Documents
| Publication | Publication Date | Title | 
|---|---|---|
| US6792392B1 (en) | Method and apparatus for configuring and collecting performance counter data | |
| US7966622B1 (en) | Interfacing a device driver with an application using a virtual driver interface and a strategy | |
| US6374369B1 (en) | Stochastic performance analysis method and apparatus therefor | |
| US8201187B2 (en) | Object monitoring system in shared object space | |
| US7200776B2 (en) | System and method for generating trace data in a computing system | |
| US5748878A (en) | Method and apparatus for analyzing software executed in embedded systems | |
| US5872909A (en) | Logic analyzer for software | |
| US5086386A (en) | Method and apparatus for benchmarking the working set of window-based computer systems | |
| US7797580B2 (en) | Determining that a routine has stalled | |
| US7047521B2 (en) | Dynamic instrumentation event trace system and methods | |
| US20080103728A1 (en) | Providing Policy-Based Operating System Services in an Operating System on a Computing System | |
| WO1993002416A1 (en) | System bus monitor for compiling data regarding use of a system bus | |
| US6347370B1 (en) | Method and system for pre-loading system resume operation data on suspend operation | |
| JPH05134830A (en) | Method and apparatus for monitoring real-time system source in data processing system | |
| US20080148355A1 (en) | Providing Policy-Based Operating System Services in an Operating System on a Computing System | |
| CN110399214B (en) | Method and device for optimizing display card load and computer equipment | |
| US6536035B1 (en) | Loading software files in client-server and object oriented environment | |
| CN111124791B (en) | System testing method and device | |
| WO2002054244A2 (en) | Operating system-independent method and system of determining cpu utilization | |
| JP2002541549A (en) | Remote device monitoring | |
| Endo et al. | Improving interactive performance using TIPME | |
| CN112860517A (en) | Performance diagnosis method, device and equipment based on distributed application | |
| US8024301B2 (en) | Automatic database diagnostic usage models | |
| CN118885401B (en) | Test method, terminal device and computer readable storage medium | |
| Hunt et al. | Coign: Efficient instrumentation for inter-component communication analysis | 
Legal Events
| Date | Code | Title | Description | 
|---|---|---|---|
| AS | Assignment | 
             Owner name: INTEL CORPORATION, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KNIGHT, ROBERT P.;REEL/FRAME:010935/0981 Effective date: 20000629  | 
        |
| STCF | Information on status: patent grant | 
             Free format text: PATENTED CASE  | 
        |
| FEPP | Fee payment procedure | 
             Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY  | 
        |
| CC | Certificate of correction | ||
| FPAY | Fee payment | 
             Year of fee payment: 4  | 
        |
| FPAY | Fee payment | 
             Year of fee payment: 8  | 
        |
| FPAY | Fee payment | 
             Year of fee payment: 12  |