US6430572B1 - Recipe management database system - Google Patents
Recipe management database system Download PDFInfo
- Publication number
- US6430572B1 US6430572B1 US09/264,362 US26436299A US6430572B1 US 6430572 B1 US6430572 B1 US 6430572B1 US 26436299 A US26436299 A US 26436299A US 6430572 B1 US6430572 B1 US 6430572B1
- Authority
- US
- United States
- Prior art keywords
- recipe
- scan tool
- scan
- information
- recipes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
- G06F16/23—Updating
- G06F16/2365—Ensuring data consistency and integrity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
- G06F16/21—Design, administration or maintenance of databases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99944—Object-oriented database structure
- Y10S707/99945—Object-oriented database structure processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S707/00—Data processing: database and file management or data structures
- Y10S707/99941—Database schema or data structure
- Y10S707/99948—Application of database or data structure, e.g. distributed, multimedia, or image
Definitions
- This invention relates generally to the management of a database utilized in the manufacture of high performance semiconductor devices. More specifically, this invention relates to the management of a recipe database that stores the recipes utilized in scan tools utilized in the inspection of semiconductor wafers during the manufacture of the high performance semiconductor devices.
- a semiconductor manufacturer In order to remain competitive, a semiconductor manufacturer must continually increase the performance of the semiconductor integrated circuits being manufactured and at the same time, reduce the cost of the semiconductor integrated circuits. Part of the increase in performance and the reduction in cost of the semiconductor integrated circuits is accomplished by shrinking the device dimensions and by increasing the number of circuits per unit area on an integrated circuit chip. Another part of reducing the cost of a semiconductor chip is to increase the yield. As is known in the semiconductor manufacturing art, the yield of chips (also known as die) from each wafer is not 100% because of defects occurring during the manufacturing process. The number of good chips obtained from a wafer determines the yield. As can be appreciated, chips that must be discarded because of a defect increases the cost of the remaining usable chips.
- Each semiconductor chip requires numerous process steps such as oxidation, etching, metallization and wet chemical cleaning.
- etch metal lines for example, a layer of photoresist is formed on the surface of the semiconductor chips and patterned by developing the photoresist and washing away the unwanted portion of the photoresist.
- critical dimensions that is, dimensions that can affect the performance of the semiconductor chip
- the process of forming the photoresist pattern for each layer is examined during the manufacturing process. Some of these process steps involve placing the wafer in which the semiconductor chips are being manufactured into different tools during the manufacturing process.
- the optimization of each of these process steps requires an understanding of a variety of chemical reactions and physical processes in order to produce high performance, high yield circuits.
- the ability to view and characterize the surface and interface layers of a semiconductor chip in terms of their morphology, chemical composition and distribution is an invaluable aid to those involved in research and development, process, problem solving, and failure analysis of integrated circuits.
- semiconductor wafers are routinely inspected using “scanning” tools to find and capture defects.
- a scanning tool determines the location and other information concerning defects that are caught and this information is stored in a data file for later recapture and inspection of any of the defects.
- These data files are stored in a relational database that has the ability to generate wafer maps with defects shown in their relative positions.
- the data database typically has the ability to send these wafer map files to various review tools within the manufacturing plant. This is very useful as it allows for re-inspection on various after-scan inspection tools within the manufacturing plant.
- These inspection tools include Optical Microscopes and Scanning Electron Microscopes (SEMs) that allow for classification of the defects. Images taken on the various after-scan inspection tools can be linked by linkage data to the defect on a wafer map and reviewed at a workstation at the convenience of an engineer or technician.
- each scan tool In order to scan each semiconductor product and each layer of each semiconductor product, the scan tool must have a recipe for each of the layers.
- the number of layers can range from approximately 30-50 layers and there may be 10-30 products that are current at any one time. Therefore, each scan tool may have as many as 1500 recipes that are needed to properly scan any of the layers that the scan tool may be required to scan. Tool operators are required to input the recipes into the scan tool and to keep the recipes current.
- there are different manufactures of scan tools different models of scan tools and differences between same models of scan tools. This requires that the recipes be individualized for each layer, for each model tool and for each tool. The large number of recipes makes it difficult to monitor which model has which recipe and what version of recipe is installed on the machine.
- the recipes control parameters such as the sensitivity, inspection areas, thresholds, light levels, and other setup parameters for every device and layer for which inspection data is required. These recipes basically control how the tool looks at the wafer, what level of difference constitutes a defect, and how much of the wafer will be scanned.
- the data output from the scan tool as a result of these scans is used to statistically control the manufacturing line and a small variation in defectivity level can trigger a line shutdown.
- the integrity and validity of the recipes used to control the scan tools is critical because of the control of the manufacturing line exerted by these recipes.
- a scan tool recipe management database system for recipes that includes workstations at each scan tool that simultaneously inputs recipes to the scan tool and to a scan tool recipe database.
- changes to the recipes are also simultaneously input to the scan tool and to the scan tool recipe database.
- defect information generated by the scan tool based on the recipe input to the scan tool is input to a defect management system.
- a recipe manager determines the status and validity of the recipe at a workstation with access to the scan tool recipe database.
- the defect information and the recipe information are correlated to provide yield analysis and trending analysis.
- the defect information and the recipe information are input to a SAPPHIRE system where the defect information and recipe information is correlated to provide statistical analysis data.
- the present invention thus effectively provides a scan tool recipe management database system for recipes that allows rapid verification of recipe integrity, enables comparison of scan tool to scan tool recipe matching, allows fabrication plant to fabrication plant recipe comparison, provides easy recipe management, enables trending analysis from a recipe change, allows the recreation of old recipes and allows a comparison of recipe setups by different operators.
- FIG. 1 illustrates a typical methodology of programming scan tools used for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process
- FIG. 2 illustrates a methodology of programming and monitoring recipes input into scan tools used for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process.
- FIG. 1 illustrates a prior art methodology of programming scan tools used for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process.
- a manufacturing lot of wafers is subjected to a series of processes to manufacture layers of the semiconductor devices being manufactured. After selected layers have been finished, selected wafers, called inspection wafers, are placed in one or more scan tools and inspected for defects.
- a manufacturing facility may have as many as 50 scan tools that can be used to scan wafers.
- the scan tools are shown in FIG. 1 as Scan Tool # 1 100 , Scan Tool # 2 102 , Scan Tool # 3 104 and Scan Tool # x 106 .
- An operator inputs recipes to Scan Tool # 1 100 at a workstation 108 , an operator inputs recipes to Scan Tool # 2 102 at a workstation 110 , an operator inputs recipes to Scan Tool # 3 104 at a workstation 112 , and an operator inputs recipes to Scan Tool # x 106 at workstation 114 .
- the recipes input to the Scan Tools 100 , 102 , 104 and 106 are specific to the semiconductor device being manufactured and to the layer of the semiconductor device being manufactured as well as being specific to the scan tool being used.
- the manufacturer of the scan tool provides a generic scanning recipe that is then particularized by an operator for each product and for each layer.
- Each of the Scan Tools 100 , 102 , 104 , and 106 captures defects on the wafers being inspected based upon parameters in the recipes that have been input to the respective scan tools.
- the Scan Tools 100 , 102 , 104 , and 106 send information concerning the captured defects to a Defect Management System 116 .
- the Defect Management System 116 uses the defect information and further monitors the processing of the wafers based upon the defect information. The further processing of the wafers is well known in the semiconductor manufacturing art and will not be discussed.
- FIG. 2 illustrates a methodology of programming and monitoring recipes input into scan tools in accordance with the present invention.
- the scan tools are utilized for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process. As is known in the semiconductor manufacturing art, a manufacturing lot of wafers is subjected to a series of processes to manufacture layers of the semiconductor devices being manufactured. After selected layers have been finished, selected wafers, called inspection wafers, are placed in a scan tool and inspected for defects. A manufacturing facility may have as many as 50 scan tools that can be used to scan wafers.
- the scan tools are shown in FIG. 2 as Scan Tool # 1 200 , Scan Tool # 2 202 , Scan Tool # 3 204 and Scan Tool # x 206 .
- An operator inputs recipes to Scan Tool # 1 200 at a workstation 208 , an operator inputs recipes to Scan Tool # 2 202 at a workstation 210 , an operator inputs recipes to Scan Tool # 3 204 at a workstation 212 , and an operator inputs recipes to Scan Tool # 4 206 at a workstation 214 .
- the recipes input to the Scan Tools 200 , 202 , 204 , and 206 are specific to the semiconductor device being manufactured and to the layer of the semiconductor device being manufactured as well as being specific to the scan tool being used.
- the manufacturer of the scan tool provides a generic scanning recipe that is then particularized by an operator for each semiconductor product and for each layer of the product.
- the recipes may be entered into different scan tools by different operators, there will be different recipes entered for the same product, layer and scan tool because of the different operators.
- the recipes control parameters such as the sensitivity, inspection areas, thresholds, light levels, and other setup parameters for every device and layer for which inspection data is required. These recipes basically control how the tool looks at the wafer, what level of difference constitutes a defect, and how much of the wafer will be scanned.
- the data output from the scan tool as a result of these scans is used to statistically control the manufacturing line and a small variation in defectivity level can trigger a line shutdown.
- the integrity and validity of the recipes used to control the scan tools are critical because of the control of the manufacturing line exerted by these recipes.
- the recipes input to the Scan Tools 200 , 202 , 204 , and 206 are simultaneously input into the Scan Tool Recipe Database 216 , which keeps a record of the time/date of the original recipe and a record of which operator input the original recipe.
- any changes or updates to the recipes are also simultaneously input into the Scan Tool Recipe Database 216 , which keeps a record of the time/date of any changes and which operator made each change to the recipe.
- the database in the Scan Tool Recipe Database is available for review by the Recipe Manager at the Recipe Manager's Workstation 218 . This allows the Recipe Manager to determine the status of each recipe in each of the scan tools and to determine the differences, if any, between each of the recipes.
- Each of the Scan Tools, 200 , 202 , 204 , and 206 captures defects on the wafers being inspected based upon parameters in the recipes that have been input to the respective scan tools. Because the Recipe Manager has had the opportunity to determine the validity of each of the recipes in the respective scan tools, there is assurance that the defect information generated by the Scan Tools 200 , 202 , 204 , and 206 is the most current defect information.
- the Scan Tools 200 , 202 , 204 , and 206 send information concerning the captured defects to a Defect Management System 222 .
- the Defect Management System 222 uses the defect information and further monitors the processing of the wafers based upon the most current defect information.
- the information in the Scan Tool Recipe Database 216 is available to the Defect Management System 222 and the correlated information concerning defects and the recipes used to capture the defects is used by a Yield Analysis & Trending System 224 to predict the yield of the wafers being processed.
- the information in the Scan Tool Recipe Database is input into the SAPPHiRE System 220 where it is correlated with defect information from the Defect Management System 222 .
- the SAPPHiRE System correlates the recipe information received from the Scan Tool Recipe Database 216 with the defect information received from the Defect Management System 222 to obtain Statistical Analysis Data, at 226 .
- the Statistical Analysis Data includes, but is not limited to, data such as the effects of a particular recipe change on yield.
- the present invention thus effectively provides a scan tool recipe management database system for recipes that allows rapid verification of recipe integrity, enables comparison of scan tool to scan tool recipe matching, allows fabrication plant to fabrication plant recipe comparison, provides easy recipe management, enables trending analysis from a recipe change, allows the recreation of old recipes and allows a comparison of recipe setups by different operators.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Databases & Information Systems (AREA)
- Data Mining & Analysis (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
A scan tool recipe management database system for recipes utilized in the scanning of semiconductor wafers during the manufacture of the semiconductor wafers. The scan tool recipe management database system includes workstations at each scan tool for simultaneously inputting recipes and changes to the recipes to the scan tool and to a scan tool recipe database.
Description
1. Field of the Invention
This invention relates generally to the management of a database utilized in the manufacture of high performance semiconductor devices. More specifically, this invention relates to the management of a recipe database that stores the recipes utilized in scan tools utilized in the inspection of semiconductor wafers during the manufacture of the high performance semiconductor devices.
2. Discussion of the Related Art
In order to remain competitive, a semiconductor manufacturer must continually increase the performance of the semiconductor integrated circuits being manufactured and at the same time, reduce the cost of the semiconductor integrated circuits. Part of the increase in performance and the reduction in cost of the semiconductor integrated circuits is accomplished by shrinking the device dimensions and by increasing the number of circuits per unit area on an integrated circuit chip. Another part of reducing the cost of a semiconductor chip is to increase the yield. As is known in the semiconductor manufacturing art, the yield of chips (also known as die) from each wafer is not 100% because of defects occurring during the manufacturing process. The number of good chips obtained from a wafer determines the yield. As can be appreciated, chips that must be discarded because of a defect increases the cost of the remaining usable chips.
Each semiconductor chip requires numerous process steps such as oxidation, etching, metallization and wet chemical cleaning. In order to etch metal lines, for example, a layer of photoresist is formed on the surface of the semiconductor chips and patterned by developing the photoresist and washing away the unwanted portion of the photoresist. Because the metal lines and other metal structures have “critical” dimensions, that is, dimensions that can affect the performance of the semiconductor chip, the process of forming the photoresist pattern for each layer is examined during the manufacturing process. Some of these process steps involve placing the wafer in which the semiconductor chips are being manufactured into different tools during the manufacturing process. The optimization of each of these process steps requires an understanding of a variety of chemical reactions and physical processes in order to produce high performance, high yield circuits. The ability to view and characterize the surface and interface layers of a semiconductor chip in terms of their morphology, chemical composition and distribution is an invaluable aid to those involved in research and development, process, problem solving, and failure analysis of integrated circuits.
In the course of modern semiconductor manufacturing, semiconductor wafers are routinely inspected using “scanning” tools to find and capture defects. A scanning tool determines the location and other information concerning defects that are caught and this information is stored in a data file for later recapture and inspection of any of the defects. These data files are stored in a relational database that has the ability to generate wafer maps with defects shown in their relative positions. The data database typically has the ability to send these wafer map files to various review tools within the manufacturing plant. This is very useful as it allows for re-inspection on various after-scan inspection tools within the manufacturing plant. These inspection tools include Optical Microscopes and Scanning Electron Microscopes (SEMs) that allow for classification of the defects. Images taken on the various after-scan inspection tools can be linked by linkage data to the defect on a wafer map and reviewed at a workstation at the convenience of an engineer or technician.
In order to be able to quickly resolve process or equipment issues in the manufacture of semiconductor products a great deal of time, effort and money is expended on the capture and classification of silicon based defects. Once a defect is caught and properly described, work can begin in earnest to resolve the cause of the defect, to attempt elimination of the cause of the defect, and to determine adverse effects of the defect on device parametrics and performance. In the course of typical semiconductor manufacturing and processing of semiconductor wafers a great deal of effort is increasingly being placed on determining the quality of the wafers from a defect viewpoint.
In order to scan each semiconductor product and each layer of each semiconductor product, the scan tool must have a recipe for each of the layers. The number of layers can range from approximately 30-50 layers and there may be 10-30 products that are current at any one time. Therefore, each scan tool may have as many as 1500 recipes that are needed to properly scan any of the layers that the scan tool may be required to scan. Tool operators are required to input the recipes into the scan tool and to keep the recipes current. In addition, there are different manufactures of scan tools, different models of scan tools and differences between same models of scan tools. This requires that the recipes be individualized for each layer, for each model tool and for each tool. The large number of recipes makes it difficult to monitor which model has which recipe and what version of recipe is installed on the machine. The recipes control parameters such as the sensitivity, inspection areas, thresholds, light levels, and other setup parameters for every device and layer for which inspection data is required. These recipes basically control how the tool looks at the wafer, what level of difference constitutes a defect, and how much of the wafer will be scanned. The data output from the scan tool as a result of these scans is used to statistically control the manufacturing line and a small variation in defectivity level can trigger a line shutdown. As can be appreciated, the integrity and validity of the recipes used to control the scan tools is critical because of the control of the manufacturing line exerted by these recipes.
There does not exist a method of adequately monitoring, controlling, or even a method of viewing the setup parameters of these critical recipes on a global basis. Even more critical, there is no way to tell if a change has been made to the recipe which could either make it more or less sensitive. Because of this, there is no way to verify that the recipe/tool is not at fault when there is a shift in a performance chart. In addition, there is no record of when recipe was updated and who updated the recipe. Therefore, it is virtually impossible for an operator to know the status of the recipe on any one scan tool and, in addition, it is virtually impossible for an operator to know if the recipes on different machines are the same for scanning the same layer on the same product. Because of the difficulty of determining the status or validity of the recipes on the scan tools, it is difficult to determine the quality of the layer being scanned. This in turn makes it difficult to improve the manufacturing process.
Therefore, what is needed is a system to monitor the recipes that are being input into each scan tool and to monitor the status of the recipes that have been input into each scan tool to ensure that all recipes are up-to-date and are measuring the same parameters.
According to the present invention, the foregoing and other objects and advantages are attained by a scan tool recipe management database system for recipes that includes workstations at each scan tool that simultaneously inputs recipes to the scan tool and to a scan tool recipe database.
In accordance with an-aspect of the invention, changes to the recipes are also simultaneously input to the scan tool and to the scan tool recipe database.
In accordance with another aspect of the invention, defect information generated by the scan tool based on the recipe input to the scan tool is input to a defect management system.
In accordance with another aspect of the invention, a recipe manager determines the status and validity of the recipe at a workstation with access to the scan tool recipe database.
In accordance with still another aspect of the invention, the defect information and the recipe information are correlated to provide yield analysis and trending analysis.
In accordance with still another aspect of the invention, the defect information and the recipe information are input to a SAPPHIRE system where the defect information and recipe information is correlated to provide statistical analysis data.
The present invention thus effectively provides a scan tool recipe management database system for recipes that allows rapid verification of recipe integrity, enables comparison of scan tool to scan tool recipe matching, allows fabrication plant to fabrication plant recipe comparison, provides easy recipe management, enables trending analysis from a recipe change, allows the recreation of old recipes and allows a comparison of recipe setups by different operators.
The present invention is better understood upon consideration of the detailed description below, in conjunction with the accompanying drawings. As will become readily apparent to those skilled in the art from the following description, there is shown and described an embodiment of this invention simply by way of illustration of the best mode to carry out the invention. As will be realized, the invention is capable of other embodiments and its several details are capable of modifications in various obvious aspects, all without departing from the scope of the invention. Accordingly, the drawings and detailed description will be regarded as illustrative in nature and not as restrictive.
The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as a preferred mode of use, and further objects and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein:
FIG. 1 illustrates a typical methodology of programming scan tools used for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process; and
FIG. 2 illustrates a methodology of programming and monitoring recipes input into scan tools used for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process.
Reference is now made in detail to specific embodiments of the present invention which illustrate the best mode presently contemplated by the inventors for practicing the invention.
FIG. 1 illustrates a prior art methodology of programming scan tools used for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process. As is known in the semiconductor manufacturing art, a manufacturing lot of wafers is subjected to a series of processes to manufacture layers of the semiconductor devices being manufactured. After selected layers have been finished, selected wafers, called inspection wafers, are placed in one or more scan tools and inspected for defects. A manufacturing facility may have as many as 50 scan tools that can be used to scan wafers. The scan tools are shown in FIG. 1 as Scan Tool # 1 100, Scan Tool # 2 102, Scan Tool # 3 104 and Scan Tool # x 106. An operator inputs recipes to Scan Tool # 1 100 at a workstation 108, an operator inputs recipes to Scan Tool # 2 102 at a workstation 110, an operator inputs recipes to Scan Tool # 3 104 at a workstation 112, and an operator inputs recipes to Scan Tool # x 106 at workstation 114. The recipes input to the Scan Tools 100, 102, 104 and 106 are specific to the semiconductor device being manufactured and to the layer of the semiconductor device being manufactured as well as being specific to the scan tool being used. Typically, the manufacturer of the scan tool provides a generic scanning recipe that is then particularized by an operator for each product and for each layer. Each of the Scan Tools 100, 102, 104, and 106 captures defects on the wafers being inspected based upon parameters in the recipes that have been input to the respective scan tools. The Scan Tools 100, 102, 104, and 106, send information concerning the captured defects to a Defect Management System 116. The Defect Management System 116 uses the defect information and further monitors the processing of the wafers based upon the defect information. The further processing of the wafers is well known in the semiconductor manufacturing art and will not be discussed.
FIG. 2 illustrates a methodology of programming and monitoring recipes input into scan tools in accordance with the present invention. The scan tools are utilized for inspecting layers of semiconductor wafers being manufactured in a semiconductor manufacturing process. As is known in the semiconductor manufacturing art, a manufacturing lot of wafers is subjected to a series of processes to manufacture layers of the semiconductor devices being manufactured. After selected layers have been finished, selected wafers, called inspection wafers, are placed in a scan tool and inspected for defects. A manufacturing facility may have as many as 50 scan tools that can be used to scan wafers. The scan tools are shown in FIG. 2 as Scan Tool # 1 200, Scan Tool # 2 202, Scan Tool # 3 204 and Scan Tool # x 206. An operator inputs recipes to Scan Tool # 1 200 at a workstation 208, an operator inputs recipes to Scan Tool # 2 202 at a workstation 210, an operator inputs recipes to Scan Tool # 3 204 at a workstation 212, and an operator inputs recipes to Scan Tool #4 206 at a workstation 214. The recipes input to the Scan Tools 200, 202, 204, and 206 are specific to the semiconductor device being manufactured and to the layer of the semiconductor device being manufactured as well as being specific to the scan tool being used. Typically, the manufacturer of the scan tool provides a generic scanning recipe that is then particularized by an operator for each semiconductor product and for each layer of the product. In addition, because the recipes may be entered into different scan tools by different operators, there will be different recipes entered for the same product, layer and scan tool because of the different operators. The recipes control parameters such as the sensitivity, inspection areas, thresholds, light levels, and other setup parameters for every device and layer for which inspection data is required. These recipes basically control how the tool looks at the wafer, what level of difference constitutes a defect, and how much of the wafer will be scanned. The data output from the scan tool as a result of these scans is used to statistically control the manufacturing line and a small variation in defectivity level can trigger a line shutdown. As can be appreciated, the integrity and validity of the recipes used to control the scan tools are critical because of the control of the manufacturing line exerted by these recipes.
The recipes input to the Scan Tools 200, 202, 204, and 206 are simultaneously input into the Scan Tool Recipe Database 216, which keeps a record of the time/date of the original recipe and a record of which operator input the original recipe. In addition, any changes or updates to the recipes are also simultaneously input into the Scan Tool Recipe Database 216, which keeps a record of the time/date of any changes and which operator made each change to the recipe. The database in the Scan Tool Recipe Database is available for review by the Recipe Manager at the Recipe Manager's Workstation 218. This allows the Recipe Manager to determine the status of each recipe in each of the scan tools and to determine the differences, if any, between each of the recipes. In addition, this allows the Recipe Manager to determine which operator may be responsible if faulty recipes are being entered into any of the scan tools. The database in the Scan Tool Recipe Database is also available for review and analysis by the SAPPHiRE System (Systematic Approach to Product Performance History and Reliability Engineering) 220.
Each of the Scan Tools, 200, 202, 204, and 206 captures defects on the wafers being inspected based upon parameters in the recipes that have been input to the respective scan tools. Because the Recipe Manager has had the opportunity to determine the validity of each of the recipes in the respective scan tools, there is assurance that the defect information generated by the Scan Tools 200, 202, 204, and 206 is the most current defect information. The Scan Tools 200, 202, 204, and 206, send information concerning the captured defects to a Defect Management System 222. The Defect Management System 222 uses the defect information and further monitors the processing of the wafers based upon the most current defect information. This assures that further processing of the wafers will be consistent with the most up-to-date information available and insures that the highest possible yield will be obtained. The further processing of the wafers is well known in the semiconductor manufacturing art and will not be further discussed. The information in the Scan Tool Recipe Database 216 is available to the Defect Management System 222 and the correlated information concerning defects and the recipes used to capture the defects is used by a Yield Analysis & Trending System 224 to predict the yield of the wafers being processed.
As discussed above, the information in the Scan Tool Recipe Database is input into the SAPPHiRE System 220 where it is correlated with defect information from the Defect Management System 222. The SAPPHiRE System correlates the recipe information received from the Scan Tool Recipe Database 216 with the defect information received from the Defect Management System 222 to obtain Statistical Analysis Data, at 226. The Statistical Analysis Data includes, but is not limited to, data such as the effects of a particular recipe change on yield.
The benefits of the present invention are as follows:
1. Allows rapid verification of recipe integrity.
2. Enables comparison of tool to tool recipe matching.
3. Allows Fabrication Plant to Fabrication Plant recipe comparison.
4. Enables ease of recipe management.
5. Enables trending analysis by recipe change.
6. Allows recreation and input of any prior recipe.
7. Allows comparison of recipes by different operators.
In summary, the results and advantages of the present invention can now be more fully realized. The present invention thus effectively provides a scan tool recipe management database system for recipes that allows rapid verification of recipe integrity, enables comparison of scan tool to scan tool recipe matching, allows fabrication plant to fabrication plant recipe comparison, provides easy recipe management, enables trending analysis from a recipe change, allows the recreation of old recipes and allows a comparison of recipe setups by different operators.
The foregoing description of the embodiment of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Obvious modifications or variations are possible in light of the above teachings. The embodiment was chosen and described to provide the best illustration of the principles of the invention and its practical application to thereby enable one of ordinary skill in the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. All such modifications and variations are within the scope of the invention as determined by the appended claims when interpreted in accordance with the breadth to which they are fairly, legally, and equitably entitled.
Claims (7)
1. A scan tool recipe management database ,.system for recipes, comprising:
at least one scan tool;
a scan tool recipe database;
a workstation that simultaneously inputs a recipe into the at least one scan tool and into the scan tool recipe database and that simultaneously inputs a changes to a recipe into the scan tool recipe database, wherein the recipes control parameters are sensitivity, inspection areas, thresholds, light levels and other setup parameters for every device and layer of a device to be inspected,
a defect management system, wherein information concerning defects captured by the at least one scan tool based on the recipe input into the at least one scan tool is input; and
a SAPPHiRE system, wherein information from the defect management system and information from the scan tool recipe database is correlated to provide statistical analysis data.
2. The scan tool recipe management database system of claim 1 further comprising a workstation for a recipe manager, wherein the status and validity of the recipe input to the at least one scan tool can be determined by the recipe manager.
3. The scan tool recipe management database system of claim 2 further comprising a yield analysis and trending system, wherein information from the defect management system and information from the scan tool recipe database is correlated to provide yield analysis and trending analysis.
4. A method of managing scan tool recipes in a semiconductor manufacturing system, the method comprising simultaneously inputting a recipe and changes to recipe into at least one scan tool and into a scan tool recipe database, wherein the recipes control parameters are sensitivity, inspection areas, thresholds, light levels and other setup parameters for every device and layer of a device to be inspected, inputting information to a defect management system concerning defects captured by the at least one scan tool based on the recipe to input and inputting information from the defect management system into SAPPHiRE system, wherein the information from the scan tool recipe database is correlated to provide statistical analysis data.
5. The method of claim 4 further comprising reviewing the status and validity of the recipe input to the at least one scan tool.
6. The method of claim 5 further comprising correlating recipe information from the scan tool recipe database and defect information from the defect management system to provide yield analysis and trending analysis.
7. The method of claim 6 further comprising correlating recipe information from the scan tool recipe database and defect information from the defect management system to provide statistical analysis data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/264,362 US6430572B1 (en) | 1999-03-08 | 1999-03-08 | Recipe management database system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/264,362 US6430572B1 (en) | 1999-03-08 | 1999-03-08 | Recipe management database system |
Publications (1)
Publication Number | Publication Date |
---|---|
US6430572B1 true US6430572B1 (en) | 2002-08-06 |
Family
ID=23005715
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/264,362 Expired - Lifetime US6430572B1 (en) | 1999-03-08 | 1999-03-08 | Recipe management database system |
Country Status (1)
Country | Link |
---|---|
US (1) | US6430572B1 (en) |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6499001B1 (en) * | 2000-06-20 | 2002-12-24 | Lsi Logic Corporation | Engineering database feedback system |
US20030004969A1 (en) * | 2001-06-30 | 2003-01-02 | Young-Hwan Park | Material and process data application system used in manufacturing a semiconductor device |
US6563300B1 (en) * | 2001-04-11 | 2003-05-13 | Advanced Micro Devices, Inc. | Method and apparatus for fault detection using multiple tool error signals |
US20030204528A1 (en) * | 2002-04-30 | 2003-10-30 | Yeaun-Jyh Su | Semiconductor wafer manufacturing execution system with special engineer requirement database |
US6745142B2 (en) * | 2001-04-10 | 2004-06-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Recipe comparison system |
US20040110311A1 (en) * | 2002-12-04 | 2004-06-10 | Flanner Janet M. | Electronically diagnosing a component in a process line using a substrate signature |
US20040110312A1 (en) * | 2002-12-04 | 2004-06-10 | Flanner Janet M. | System and method for creating a substrate signature |
US20040193623A1 (en) * | 2003-03-31 | 2004-09-30 | Hwa-Yu Yang | IC foundry manufacturing technology master data management structure |
US6846684B1 (en) * | 2002-12-11 | 2005-01-25 | Advanced Micro Devices, Inc. | Integrated enterprise resource planning and manufacturing system |
US20060020362A1 (en) * | 2004-07-22 | 2006-01-26 | Hiroyuki Morinaga | System and program for making recipe and method for manufacturing products by using recipe |
US7127320B1 (en) * | 2004-12-01 | 2006-10-24 | Advanced Micro Devices, Inc. | Render-resolve method of obtaining configurations and formatting it for use by semiconductor equipment interfaces |
US7248936B1 (en) * | 2006-01-31 | 2007-07-24 | International Business Machines Corporation | Automated tool recipe verification and correction |
US20070192056A1 (en) * | 2006-02-15 | 2007-08-16 | International Business Machines Corporation | Metrology tool recipe validator using best known methods |
US7280885B1 (en) | 2004-12-01 | 2007-10-09 | Advanced Micro Devices, Inc. | Method and apparatus to reconcile recipe manager and manufacturing execution system context configurations |
US20080120554A1 (en) * | 2006-11-17 | 2008-05-22 | Hejian Technology (Suzhou) Co., Ltd. | SYSTEM & METHOD FOR FRAME DATA MANAGEMENT SYSTEM (eFDMS) |
US20090281755A1 (en) * | 2008-05-08 | 2009-11-12 | Hitachi High-Technologies Corporation | Recipe parameter management system and recipe parameter management method |
US20090326697A1 (en) * | 2006-11-17 | 2009-12-31 | Hejian Technology (Suzhou) Co., Ltd. | Semiconductor manufacturing automation system and method for using the same |
CN101158859B (en) * | 2007-10-29 | 2011-05-11 | 中兴通讯股份有限公司 | Defect data real time collecting device and method thereof, and production line real-time data capturing system |
US20130345846A1 (en) * | 2012-06-21 | 2013-12-26 | Siemens Aktiengesellschaft | Method for controlling a manufacturing execution system (mes) |
US20140058551A1 (en) * | 2012-08-23 | 2014-02-27 | Kabushiki Kaisha Toshiba | Recipe management apparatus and recipe management method |
US20150262038A1 (en) * | 2014-03-17 | 2015-09-17 | Kla-Tencor Corporation | Creating Defect Classifiers and Nuisance Filters |
US9280151B2 (en) | 2012-05-15 | 2016-03-08 | Wafertech, Llc | Recipe management system and method |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5349674A (en) * | 1990-08-17 | 1994-09-20 | International Business Machines Corp. | Automated enrollment of a computer system into a service network of computer systems |
US5649169A (en) * | 1995-06-20 | 1997-07-15 | Advanced Micro Devices, Inc. | Method and system for declustering semiconductor defect data |
US5761064A (en) * | 1995-10-06 | 1998-06-02 | Advanced Micro Devices, Inc. | Defect management system for productivity and yield improvement |
US5913105A (en) * | 1995-11-29 | 1999-06-15 | Advanced Micro Devices Inc | Method and system for recognizing scratch patterns on semiconductor wafers |
US5960440A (en) * | 1996-01-16 | 1999-09-28 | Brother International Corporation | Kitchen information and database management method and apparatus |
US6165805A (en) * | 1998-10-29 | 2000-12-26 | Advanced Micro Devices, Inc. | Scan tool recipe server |
US6200823B1 (en) * | 1999-02-09 | 2001-03-13 | Advanced Micro Devices, Inc. | Method for isolation of optical defect images |
-
1999
- 1999-03-08 US US09/264,362 patent/US6430572B1/en not_active Expired - Lifetime
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5349674A (en) * | 1990-08-17 | 1994-09-20 | International Business Machines Corp. | Automated enrollment of a computer system into a service network of computer systems |
US5649169A (en) * | 1995-06-20 | 1997-07-15 | Advanced Micro Devices, Inc. | Method and system for declustering semiconductor defect data |
US5761064A (en) * | 1995-10-06 | 1998-06-02 | Advanced Micro Devices, Inc. | Defect management system for productivity and yield improvement |
US5913105A (en) * | 1995-11-29 | 1999-06-15 | Advanced Micro Devices Inc | Method and system for recognizing scratch patterns on semiconductor wafers |
US5960440A (en) * | 1996-01-16 | 1999-09-28 | Brother International Corporation | Kitchen information and database management method and apparatus |
US6165805A (en) * | 1998-10-29 | 2000-12-26 | Advanced Micro Devices, Inc. | Scan tool recipe server |
US6200823B1 (en) * | 1999-02-09 | 2001-03-13 | Advanced Micro Devices, Inc. | Method for isolation of optical defect images |
Cited By (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6499001B1 (en) * | 2000-06-20 | 2002-12-24 | Lsi Logic Corporation | Engineering database feedback system |
US6745142B2 (en) * | 2001-04-10 | 2004-06-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Recipe comparison system |
US6563300B1 (en) * | 2001-04-11 | 2003-05-13 | Advanced Micro Devices, Inc. | Method and apparatus for fault detection using multiple tool error signals |
US20030004969A1 (en) * | 2001-06-30 | 2003-01-02 | Young-Hwan Park | Material and process data application system used in manufacturing a semiconductor device |
US20030204528A1 (en) * | 2002-04-30 | 2003-10-30 | Yeaun-Jyh Su | Semiconductor wafer manufacturing execution system with special engineer requirement database |
US6890774B2 (en) * | 2002-12-04 | 2005-05-10 | Lam Research Corporation | System and method for creating a substrate signature |
US20040110311A1 (en) * | 2002-12-04 | 2004-06-10 | Flanner Janet M. | Electronically diagnosing a component in a process line using a substrate signature |
US20040110312A1 (en) * | 2002-12-04 | 2004-06-10 | Flanner Janet M. | System and method for creating a substrate signature |
US6946303B2 (en) | 2002-12-04 | 2005-09-20 | Lam Research Corporation | Electronically diagnosing a component in a process line using a substrate signature |
US6846684B1 (en) * | 2002-12-11 | 2005-01-25 | Advanced Micro Devices, Inc. | Integrated enterprise resource planning and manufacturing system |
US7185009B2 (en) * | 2003-03-31 | 2007-02-27 | Taiwan Semiconductor Manufacturing Company | IC foundry manufacturing technology master data management structure |
CN1308880C (en) * | 2003-03-31 | 2007-04-04 | 台湾积体电路制造股份有限公司 | Technology main file document hold-down bar structure management system and method and semiconductor product and its mangment method |
US20040193623A1 (en) * | 2003-03-31 | 2004-09-30 | Hwa-Yu Yang | IC foundry manufacturing technology master data management structure |
US7260443B2 (en) * | 2004-07-22 | 2007-08-21 | Kabushiki Kaisha Toshiba | System and program for making recipe and method for manufacturing products by using recipe |
US20060020362A1 (en) * | 2004-07-22 | 2006-01-26 | Hiroyuki Morinaga | System and program for making recipe and method for manufacturing products by using recipe |
US7127320B1 (en) * | 2004-12-01 | 2006-10-24 | Advanced Micro Devices, Inc. | Render-resolve method of obtaining configurations and formatting it for use by semiconductor equipment interfaces |
US7280885B1 (en) | 2004-12-01 | 2007-10-09 | Advanced Micro Devices, Inc. | Method and apparatus to reconcile recipe manager and manufacturing execution system context configurations |
US20070179651A1 (en) * | 2006-01-31 | 2007-08-02 | International Business Machines Corporation | Automated tool recipe verification and correction |
US7248936B1 (en) * | 2006-01-31 | 2007-07-24 | International Business Machines Corporation | Automated tool recipe verification and correction |
US7716009B2 (en) | 2006-02-15 | 2010-05-11 | International Business Machines Corporation | Metrology tool recipe validator using best known methods |
US7305320B2 (en) * | 2006-02-15 | 2007-12-04 | International Business Machines Corporation | Metrology tool recipe validator using best known methods |
US20070192056A1 (en) * | 2006-02-15 | 2007-08-16 | International Business Machines Corporation | Metrology tool recipe validator using best known methods |
US20080120554A1 (en) * | 2006-11-17 | 2008-05-22 | Hejian Technology (Suzhou) Co., Ltd. | SYSTEM & METHOD FOR FRAME DATA MANAGEMENT SYSTEM (eFDMS) |
US20090326697A1 (en) * | 2006-11-17 | 2009-12-31 | Hejian Technology (Suzhou) Co., Ltd. | Semiconductor manufacturing automation system and method for using the same |
CN101158859B (en) * | 2007-10-29 | 2011-05-11 | 中兴通讯股份有限公司 | Defect data real time collecting device and method thereof, and production line real-time data capturing system |
US20090281755A1 (en) * | 2008-05-08 | 2009-11-12 | Hitachi High-Technologies Corporation | Recipe parameter management system and recipe parameter management method |
US7885789B2 (en) * | 2008-05-08 | 2011-02-08 | Hitachi High-Technologies Corporation | Recipe parameter management system and recipe parameter management method |
US9280151B2 (en) | 2012-05-15 | 2016-03-08 | Wafertech, Llc | Recipe management system and method |
US20130345846A1 (en) * | 2012-06-21 | 2013-12-26 | Siemens Aktiengesellschaft | Method for controlling a manufacturing execution system (mes) |
US20140058551A1 (en) * | 2012-08-23 | 2014-02-27 | Kabushiki Kaisha Toshiba | Recipe management apparatus and recipe management method |
US9165091B2 (en) * | 2012-08-23 | 2015-10-20 | Kabushiki Kaisha Toshiba | Recipe management apparatus and recipe management method |
US20150262038A1 (en) * | 2014-03-17 | 2015-09-17 | Kla-Tencor Corporation | Creating Defect Classifiers and Nuisance Filters |
US9613411B2 (en) * | 2014-03-17 | 2017-04-04 | Kla-Tencor Corp. | Creating defect classifiers and nuisance filters |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6430572B1 (en) | Recipe management database system | |
US6542830B1 (en) | Process control system | |
US6175417B1 (en) | Method and apparatus for detecting defects in the manufacture of an electronic device | |
US6338001B1 (en) | In line yield prediction using ADC determined kill ratios die health statistics and die stacking | |
US7346470B2 (en) | System for identification of defects on circuits or other arrayed products | |
TW518645B (en) | Method and system of automatic wafer manufacture quality control | |
US7234128B2 (en) | Method for improving the critical dimension uniformity of patterned features on wafers | |
KR20010029984A (en) | Real time defect source identification | |
US6563300B1 (en) | Method and apparatus for fault detection using multiple tool error signals | |
JP3641604B2 (en) | Method for adjusting lithography tool | |
US6200823B1 (en) | Method for isolation of optical defect images | |
JP2007538383A (en) | Defect detection and control method for ion implantation process and execution system thereof | |
KR20180010307A (en) | Reviewing Prefabricated Defect Sites Using Designs | |
CN111653500A (en) | Method for judging wafer yield loss | |
JP2024526005A (en) | System and method for detecting statistical anomalies induced by Z-PAT defects in semiconductor reliability failures - Patents.com | |
US8095895B2 (en) | Method for defect diagnosis and management | |
US6754593B1 (en) | Method and apparatus for measuring defects | |
US8000519B1 (en) | Method of metal pattern inspection verification | |
US6238940B1 (en) | Intra-tool defect offset system | |
US6284553B1 (en) | Location dependent automatic defect classification | |
WO2008096211A2 (en) | Measurement of critical dimensions of semiconductor wafers | |
US20180315670A1 (en) | Guided Metrology Based on Wafer Topography | |
Berglund | Trends in systematic nonparticle yield loss mechanisms and the implication for IC design | |
Coyette et al. | Latent defect screening with visually-enhanced dynamic part average testing | |
US6171874B1 (en) | Non-defect image and data transfer and storage methodology |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: ADVANCED MICRO DEVICES, INC., CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:STEFFAN, PAUL J.;YU, ALLEN S.;REEL/FRAME:009816/0625 Effective date: 19990305 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
FPAY | Fee payment |
Year of fee payment: 12 |