US6002244A - Temperature monitoring circuit with thermal hysteresis - Google Patents
Temperature monitoring circuit with thermal hysteresis Download PDFInfo
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- US6002244A US6002244A US09/193,659 US19365998A US6002244A US 6002244 A US6002244 A US 6002244A US 19365998 A US19365998 A US 19365998A US 6002244 A US6002244 A US 6002244A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/267—Current mirrors using both bipolar and field-effect technology
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S323/00—Electricity: power supply or regulation systems
- Y10S323/907—Temperature compensation of semiconductor
Definitions
- the invention relates generally to temperature monitoring circuits and more particularly to temperature monitoring circuits with thermal hysteresis in CMOS circuitry.
- a temperature monitoring circuit has many applications.
- One crucial application for temperature monitoring circuitry is to protect electronic components from being subjected to high temperatures.
- Cellular phones, laptop computers, and other battery-operated powered electronic devices have numerous electronic components which can be easily damaged by high temperatures.
- transistors in integrated circuits in battery-operated powered electronic devices are known to breakdown at high temperatures.
- a temperature monitoring circuit utilizes the properties of a bipolar transistor.
- a temperature independent reference voltage is generated by use of a band-gap circuit, a known technology in the field. The reference voltage is compared with a temperature-dependent voltage. When a certain criterion is met, a voltage signal is produced to indicate excessive temperature.
- U.S. Pat. No. 4,887,181 to Lenz describes a temperature protection circuit that applies the fundamental concepts of a band-gap circuit and a bipolar transistor.
- the temperature protection circuit amplifies the reference voltage from the band-gap circuit by an amplifier circuit and delivers the amplified voltage to a sensor circuit which compares the amplified voltage with a temperature-dependent voltage generated by the sensor circuit.
- the temperature protection circuit also includes a positive feedback loop from an output of the amplifier circuit back to an input of the amplifier circuit.
- the sensor circuit is connected to a bipolar transistor which is turned on when the comparison of the amplified voltage with the temperature-dependent voltage indicates that a set temperature has been reached. A current flow caused by the activation of the bipolar transistor causes a power amplifier, the electronic component that is being protected, to shut off.
- the temperature protection circuit also exhibits a hysteresis characteristic due to the sensor circuit being thermally coupled to the power amplifier.
- U.S. Pat. No. 4,789,819 to Nelson utilizes a specific band-gap circuit, i.e. a Brokaw Cell band-gap circuit, to provide biasing for a thermal shutdown circuit.
- the Nelson circuit modified the basic Brokaw Cell band-gap circuit by including a breakpoint compensation.
- the basic Brokaw Cell band-gap circuit generates an output voltage that is nearly constant with temperature variations. However, the fluctuation of the output voltage increases with greater temperature variations.
- the breakpoint compensation of Nelson shifts a temperature coefficient of the circuit to decrease the voltage fluctuation over a certain temperature range.
- the circuit similar to the circuitry described in the Lenz patent, includes a bipolar transistor that turns on when a predetermined temperature is reached and the base of the bipolar transistor is thereby properly biased.
- CMOS complementary metal-oxide semiconductor
- a circuit for generating a signal that is responsive to variations in temperature includes using at least two and as many as four current paths to provide a thermal limit.
- the first and second current paths combine to form a band gap like circuit that is temperature sensitive.
- the band gap like circuit generates a proportional to absolute temperature (PTAT) current.
- the preferred embodiment also utilizes parasitic bipolar transistors from the CMOS technology as a high current density bipolar transistor of the first current path and a low current bipolar transistor of the second path.
- a first resistor is connected within the second current path such that the voltage across the first resistor is a PTAT voltage.
- the current through the first resistor has a general PTAT character.
- the components of the first and second current paths combine to form three transistor pairs.
- a MOS transistor of the first current path has a geometry greater than that of the comparable MOS transistor of the second current path, so that current through the first current path is a multiple of that through the second current path.
- the transistor of the first current path is smaller than the transistor of the second current path.
- a third current path utilizes electronic components that are the equivalent types and sizes of the first current path.
- a gate of a MOS transistor is controlled by connection to the second current path, while the drain of the same transistor is connected to the gates of the second transistor pair of the first and second current paths.
- a feedback loop is formed to maintain a voltage of approximately one PMOS threshold below a high voltage rail at the connection of the second current path with the gate of the MOS transistor of the third current path.
- the PTAT current is also mirrored through a MOS transistor of a fourth current path.
- This current through the fourth current path may be conducted to ground through a series connection of a thermal set transistor and a thermal set resistor.
- the thermal set transistor is an NMOS transistor having a gate connected to the third current path.
- the preferred embodiment also includes a hysteresis circuit.
- a hysteresis resistor is connected in series with the thermal set resistor, but is selectively shorted out by a hysteresis transistor.
- the hysteresis transistor is turned off by the initiation of output current from the fourth current path, thereby introducing the hysteresis resistor into the fourth path. This increases the differential output current.
- the temperature that must be reached in order to turn the hysteresis transistor back on is less than the temperature that was required to turn the hysteresis transistor off.
- the circuit preferably includes a start circuit that consists of a resistor and a number of MOS transistors.
- the start circuit activates current flow through the four current paths and then quickly shuts itself off.
- the invention provides a circuit that can be produced by standard CMOS processing to provide a robust thermal limit.
- the use of the parasitic bipolar transistors alleviates fabrication processing concerns and decreases the cost of manufacture.
- FIG. 1 is a schematic view of an embodiment of a temperature monitoring circuit in accordance with the invention.
- FIG. 2 is a schematic view of an embodiment of FIG. 1 with additional features which include a start circuit, a thermal hysteresis circuit, and inverters.
- a temperature monitoring circuit 100 is shown as being connected to a high voltage rail (Vin) 10 and a low voltage rail (Gnd) 12.
- the voltage on Vin may be either positive or negative.
- Vin may be a supply rail for 3.5 volts and Gnd may be electrical ground.
- a first current path 72 consists of two metal-oxide semiconductor (MOS) transistors 22 and 24, and a bipolar transistor 42.
- MOS metal-oxide semiconductor
- a second current path 74 consist of two MOS transistors 26 and 28 and a bipolar transistor 44 with an additional component, a resistor 52.
- the MOS transistors 24 and 28 shown are n-channel MOS transistors and define a first transistor pair, while the MOS transistors 22 and 26 shown are p-channel MOS transistors and define a third transistor pair.
- the second transistor pair is formed by the bipolar transistors 42 and 44, which are shown as pnp parasitic bipolar transistors. Standard CMOS processing creates such pnp parasitic bipolar transistors.
- the two MOS transistors 22 and 24 and the bipolar transistor 42 are connected in series from Vin 10 to Gnd 12 to form the first current path.
- the bipolar transistor 42 is connected to Gnd 12 and the MOS transistor 24 such that a base and a collector of bipolar transistor 42 are coupled to Gnd 12 and an emitter of bipolar transistor 42 is connected to a source of MOS transistor 24.
- the MOS transistor 24 is connected to MOS transistor 22 by drains of the MOS transistors 22 and 24.
- a source of the MOS transistor 22 is connected to the Vin 10, which completes the first current path 72.
- the base of bipolar transistor 42 is connected to Gnd 12.
- the second current path 74 contains all the electronic components of the first current path 72 with the addition of the resistor 52.
- a base and a collector of bipolar transistor 44 are also connected to Gnd 12.
- an emitter of bipolar transistor 44 is connected to the resistor 52 which is connected to a source of MOS transistor 28.
- the MOS transistors 26 and 28 are connected to each other and the Vin 10 in the same manner as in the first current path 72. Drains of both MOS transistors 26 and 28 are coupled together. At the connection of the drains of MOS transistors 26 and 28 is a node identified as a gain node 66. The gain node 66 is important to the operation of the circuit which will be addressed below.
- a source of MOS transistor 26 makes the final connection to Vin 10.
- the first current path 72 and the second current path 74 are connected by the coupling of gates of the third transistor pair formed by the MOS transistors 22 and 26, as well as the coupling of gates of the first transistor pair formed by MOS transistors 24 and 28.
- the gates of MOS transistors 22 and 26 are connected to the drain of MOS transistor 22.
- the gates of MOS transistors 24 and 28 are not connected to either the first current path 72 or the second current path 74. Instead, the gates of MOS transistors 24 and 28 are connected to a third current path 76 at a control node 68.
- the first current path 72 and the second current path 74 utilize the concept of band-gap technology, a known technique in the field, to generate a proportional to absolute temperature (PTAT) current through the MOS transistor 22. This is accomplished by generating a PTAT voltage across the resistor 52. To generate the PTAT voltage, the voltage at a node 62 located between the emitter of bipolar transistor 42 and the source of MOS transistor 24 must be made to equal the voltage at a node 64 located between the resistor 52 and the source of MOS transistor 28. If the current density of bipolar transistor 42 is greater than the current density of bipolar transistor 44, the voltage drop across the bipolar transistor 42 will be greater than the voltage drop across the bipolar transistor 44.
- PTAT proportional to absolute temperature
- a circuit can be designed in which conditions will yield a result such that the voltage at node 62 will equal the voltage at node 64. Since the voltage at node 62 equals the voltage at node 64 and the voltage drop across bipolar transistor 44 is less than the voltage drop across the bipolar transistor 42, the voltage difference between the voltage at node 62 and the voltage drop across bipolar transistor 44 will appear across the resistor 52.
- the voltage across the resistor 52 is proportional to (kT/q)* log(n) where k is the Boltzmann's constant, T is the absolute temperature, q is the electronic charge, and n is the ratio of the current densities of the bipolar transistors 42 and 44.
- the current density of bipolar transistor 42 is four times greater than the current density of bipolar transistor 44.
- One way to accomplish such a ratio is to fabricate the first transistor pair such that MOS transistor 24 passes twice the current through the MOS transistor 28. This may be accomplished by fabricating MOS transistor 24 to have a gate width or other impedance-affecting dimension that is twice as large as that of MOS transistor 28.
- the bipolar transistor 44 is parasitically fabricated to be twice as large as the parasitic bipolar transistor 42. The result will be that the current density of bipolar transistor 42 is four times greater than the current density of bipolar transistor 44. Then, n in the formula (kT/q)*log(n) will equal four.
- capacitor 82 which is connected to the gates of MOS transistors 24 and 28 and Gnd 12.
- the capacitor 82 functions to provide alternating current stability of the present invention.
- the third current path 76 is created by two MOS transistors 32 and 34 and a parasitic bipolar transistor 46 that are connected in series from Vin 10 to Gnd 12. Except for the two gates and the base of the three transistors 32, 34, and 46, these transistors 32, 34, and 46 are connected in the same manner as the transistors 22, 24, and 42 in the first current path 72.
- the two major differences between the third current path 76 and the first current path 72 are that a gate of MOS transistor 32 is connected to the gain node 66 on the second current path 74 and the gate and drain of MOS transistor 34 are connected to each other and to the gates of MOS transistors 24 and 28 at the control node 68.
- One function of the third current path 76 is to force the current through the MOS transistor 32 to be equal to the PTAT current through the MOS transistor 22. This is accomplished by the selection of the geometries of the components that make up the third current path 76.
- the dimensions of the bipolar transistor 46 equal the dimensions of the bipolar transistor 42.
- the dimensions of the MOS transistor 34 equal the dimensions of the MOS transistor 24, and the dimensions of the MOS transistor 32 equal the dimensions of the MOS transistor 22. Therefore, the current through the MOS transistor 32 equals the PTAT current through the MOS transistor 22.
- Another function of the third current path 76 is to ensure that the current supplied to the MOS transistor 24 is twice the current supplied to the MOS transistor 28.
- the voltage at node 62 is equal to the voltage at node 64. If the two-to-one ratio of currents through the MOS transistors 24 and 28 is disturbed, the third current path 76 cooperates to adjust the current flow through the MOS transistors 24 and 28.
- the voltage at the gain node 66 is maintained at approximately one PMOS threshold below the supply voltage at Vin 10 by operation of a feedback loop via PMOS transistor 32. For example, if the voltage at node 64 falls below the voltage at node 62, the voltage on the gain node 66 will also fall.
- the voltage drop on the gain node 66 will be reflected at the gate of MOS transistor 32.
- the drop in voltage at the gate of MOS transistor 32 will increase the current through the MOS transistor 32.
- the increase in current through the MOS transistor 32 will cause the voltage at the gates of MOS transistors 24 and 28 to rise.
- the voltage rise at the gates of MOS transistors 24 and 28 will induce more current to flow through the MOS transistors 24 and 28 to increase the voltage at node 64 by re-establishing the two-to-one ratio of the currents through MOS transistors 24 and 28.
- the current flowing in the respective transistors 22, 26 and 32 will be proportional to each other and generally PTAT.
- the MOS transistor 34 and the parasitic bipolar transistor 46 may be replaced by a resistor.
- the gate of transistor 32 is connected to the gates of transistors 22 and 26, instead of being connected to the gain node 66.
- the alternative configuration does not affect the overall operation of the circuit 100.
- the currents in critical legs are identical for both configurations.
- the fourth current path 78 is formed by two MOS transistors 36 and 38 and two resistors 54 and 56 which are connected in series.
- a source of MOS transistor 36 is connected to Vin 10.
- a gate of MOS transistor 36 is coupled to the gate of MOS transistor 32, forming a current mirror. Thus, the current through the MOS transistor 32 is mirrored by the MOS transistor 36. Since the current through the MOS transistor 32 is generally PTAT, the current through the MOS transistor 36 is also generally PTAT.
- a drain of MOS transistor 36 is connected to an initial output terminal 14, which is also connected to a drain of MOS transistor 38.
- a gate of MOS transistor 38 is connected to the control node 68.
- a source of MOS transistor 38 is connected to the resistor 54, which is connected to the resistor 56.
- the resistor 56 is connected to Gnd 12, completing the fourth current path 78.
- the degree of change in the PTAT current through the MOS transistor 36 as compared to the degree of change in the current through the MOS transistor 38 caused by temperature changes produces a signal at thermal limit to the initial output terminal 14.
- the thermal limit point can be set at a predetermined temperature by the electrical resistances in resistors 54 and 56. At temperatures below the thermal limit, the MOS transistor 38 is able to dispose of all the current through the MOS transistor 36. However, the current through the MOS transistor 38 is decreasing much faster with temperature increase than the current change through the MOS transistor 36 as a function in temperature change. With the increase in temperature, the thermal limit will be reached where the MOS transistor 38 cannot sink all the current that the MOS transistor 36 has generated. At such condition, the voltage on the terminal 14 will rise steeply with increased temperature. The voltage increase in the initial output terminal 14 is indicative of the thermal limit.
- FIG. 2 shows the circuit shown in FIG. 1 with the addition of a start circuit 160, a thermal hysteresis loop formed by a first stage inverter 170 and a MOS transistor 132, two on/off MOS transistors 182 and 184, and a second stage inverter 180.
- the MOS transistor 182 is shown to operate as an on-and-off switch for the present invention.
- a gate of MOS transistor 182 is connected to a control voltage source 112.
- a source of MOS transistor 182 is connected to an input voltage source 114 to provide the voltage to Vin 10, which is connected to a drain of MOS transistor 182.
- the MOS transistor 182 is shown as the switch, the MOS transistor 182 may be replaced by other electronic devices to accomplish the switching function of the MOS transistor 182.
- the start circuit 160 consists of a resistor 152, and three MOS transistors 122, 124, and 126.
- the resistor 152 is connected between Vin 10 and the MOS transistors 122 and 126.
- a drain and a gate of MOS transistor 122 are connected to the resistor 152.
- the gate of MOS transistor 122 is coupled with a gate of MOS transistor 124.
- Sources of MOS transistors 122 and 124 are connected to Gnd 12.
- a drain of MOS transistor 124 is connected to the gain node 66.
- Completion of the temporary path initiates current flow through the current paths 72, 74, 76, and 78.
- the MOS transistor 126 is connected to the source and drain of MOS transistor 122 to act as a short circuit when activated.
- a drain of MOS transistor 126 is connected to the drain of MOS transistor 122.
- a source of MOS transistor 126 is connected to the source of MOS transistor 122.
- a gate of MOS transistor 126 is connected to the control node 68.
- the thermal hysteresis loop is made up of the first stage inverter 170 and the MOS transistor 132.
- the inverter 170 is made up of two MOS transistors 134 and 136. Gates of MOS transistors 134 and 136 are coupled and connected to the initial output terminal 14 to receive the high voltage signal.
- a source of MOS transistor 134 is connected to the Vin 10, while a source of MOS transistor 136 is connected to Gnd 12. Drains of MOS transistors 134 and 136 are coupled and connected to an inverted output node 116.
- the inverted output node 116 is connected to a gate of MOS transistor 132.
- a source of MOS transistor 132 is connected to Gnd 12.
- a drain of MOS transistor 132 is connected to the fourth current path 78 between the resistors 54 and 56.
- the temperature that must be obtained to switch the hysteresis transistor from off to on, shorting the hysteresis resistor 56 out of the fourth current path 78, is therefore different than the temperature that caused the hysteresis transistor to switch from on to off.
- the difference between these two switching temperatures is determined by the resistance of the hysteresis resistor 56. In one embodiment, the temperature difference is 10° Celsius.
- the first stage inverter 170 is connected to the MOS transistor 184 such that a drain of MOS transistor 184 is connected to the gate of MOS transistor 136.
- a source of MOS transistor 184 is connected to Gnd 12.
- the MOS transistor 184 is a switch that operates in unison with the MOS transistor 182.
- a gate of MOS transistor 184 is also connected to the control voltage source 112.
- the second stage inverter 180 is formed by MOS transistors 142 and 144, which are connected in the same manner as the MOS transistors 134 and 136 of the first stage inverter. Gates of MOS transistors 142 and 144 are coupled and connected to the inverted output node 116. The second stage inverter 180 allows the final output signal to be positive when the thermal limit point has been reached.
- a low voltage is supplied by the control voltage source 112 which turns on the MOS transistors 182 and 184.
- the activation of the MOS transistor 182 allows the current to travel through the MOS transistor 182, connecting the input voltage source 114 with Vin 10.
- Current flows through the resistor 152, the MOS transistor 122, and the MOS transistor 124 to complete a flow path for current flow to the gain node 66.
- the presence of voltage at the gain node 66 initiates the operations of the current paths 72, 74, 76, and 78.
- the current through the third current path 76 activates the MOS transistor 126, since control node 68 is connected to the gate of MOS transistor 126.
- the activation of the MOS transistor 126 shorts out the path for maintaining transistors 122 and 124 in an on state by providing an alternate route for the current from the resistor 152 to Gnd 12. Thus, shorting after the start circuit 160 is turned on, it is turned off by the short circuit which is formed by the activation of the MOS transistor 126.
- the temperature monitoring circuit produces a PTAT current through MOS transistor 22 as a result of a PTAT voltage across the resistor 52.
- a band-gap circuit is utilized.
- the bipolar transistor 42 is half as large as the bipolar transistor 44. If the current through MOS transistor 24 is twice the current through MOS transistor 28, the current density of bipolar transistor 42 will be four times the current density of bipolar transistor 44. Utilizing the concept of band-gap technology, it can be determined that the voltage at node 62 equals the voltage at node 64 when all the above requirements are satisfied.
- the voltage across the resistor 52 is proportional to absolute temperature or PTAT. Since the voltage at node 62 equals the voltage at node 64, the current through the first current path 72 is PTAT. Therefore, the current through the MOS transistor 22 is PTAT.
- the gain node 66 monitors voltage variations and controls the current through the MOS transistor 32, which controls the currents through the MOS transistors 24 and 28. For example, if the voltage at node 64 falls below the voltage at node 62, this indicates that the current flow ratio for the MOS transistors 24 and 28 is not two-to-one.
- the voltage at the gain node 66 is very sensitive to such variation in the current flow ratio. In the example, the voltage at the gain node 66 will drop, causing the voltage at the gate of MOS transistor 32 to drop as well. The low voltage at the gate of MOS transistor 32 causes more current through the MOS transistor 32.
- the increase in current through the MOS transistor 32 will increase the voltage at the gates of MOS transistors 24 and 28 through the control node 68, causing more current through the MOS transistors 24 and 28.
- the increase in current through the MOS transistors 24 and 28 re-establishes the two-to-one ratio of currents through the MOS transistors 24 and 28.
- the re-establishment of the two-to-one ratio raises the voltage at node 64 until the voltage at node 64 equals the voltage at node 62.
- the electronic components of the third current path 76 are identical in sizes and types to the electrical components of the first current path 72.
- the current through the MOS transistor 32 is identical to the current through the MOS transistor 22.
- the current through the MOS transistor 32 is mirrored by the MOS transistor 36.
- the current through the MOS transistor 36 is PTAT since the current through the MOS transistor 22 is PTAT.
- the current through the MOS transistor 38 is not PTAT.
- the current changes in MOS transistors 36 and 38 as a function of temperature increases will be used to signal when the temperature monitoring circuit 100 has reached the thermal limit that is established by resistors 52 and 54 and the physics of the parasitic bipolar transistors.
- the MOS transistor 38 At room temperature or below the thermal limit temperatures, the MOS transistor 38 is able to dispose of all the current through the MOS transistor 36. However, as temperature rises, the current through the MOS transistor 38 decreases, while the current through the MOS transistor 36 tends to increase (depending upon the temperature coefficient of the resistor 52). Above the thermal limit, the MOS transistor 38 is unable to sink all the current that the MOS transistor 36 has supplied. At this point, the voltage on the terminal 14 will increase rapidly with temperature.
- the inverter 170 causes the voltage at the inverted output node 116 to go low. This low voltage is used to provide a thermal hysteresis.
- the low voltage at the inverted output node 116 is conducted to the gate of MOS transistor 132, turning the MOS transistor 132 off. Prior to being turned off, the MOS transistor shorted out the hysteresis resistor 56. However, turning the MOS transistor off reintroduces resistor 56 into the fourth current path 78, further decreasing the current through the MOS transistor 38 and driving up the voltage at the initial output terminal 14.
- the positive feedback behavior of the thermal hysteresis ensures an abrupt voltage rise at the final output terminal 118 of the second stage inverter 180. This abrupt change is amplified by the gains in the two stages of inversion.
- the temperature drop required to turn the transistor 132 back on after shutdown can be high as 10° Celsius below the thermal limit.
- capacitor 82 which is connected to the gates of MOS transistors 24 and 28 and the Gnd 12.
- the capacitor 82 provides alternating current stability of the present invention.
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Claims (19)
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US09/193,659 US6002244A (en) | 1998-11-17 | 1998-11-17 | Temperature monitoring circuit with thermal hysteresis |
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US09/193,659 US6002244A (en) | 1998-11-17 | 1998-11-17 | Temperature monitoring circuit with thermal hysteresis |
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Cited By (22)
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EP1124170A1 (en) * | 2000-02-08 | 2001-08-16 | Matsushita Electric Industrial Co., Ltd. | Reference voltage generation circuit including a start-up circuit |
US6528979B2 (en) * | 2001-02-13 | 2003-03-04 | Nec Corporation | Reference current circuit and reference voltage circuit |
US6552518B2 (en) * | 2000-06-08 | 2003-04-22 | Stmicroelectronics S.R.L. | Current generator with thermal protection |
US20030201816A1 (en) * | 2002-04-29 | 2003-10-30 | Semiconductor Components Industries, Llc | Thermal shutdown circuit with hysteresis and method of using |
US20050001605A1 (en) * | 2003-07-03 | 2005-01-06 | Analog Devices, Inc. | CMOS bandgap current and voltage generator |
GB2425419A (en) * | 2002-10-01 | 2006-10-25 | Wolfson Microelectronics Plc | An overtemperature detector for integrated circuits, using hysteresis |
US20080285623A1 (en) * | 2007-05-16 | 2008-11-20 | Infineon Technologies Austria Ag | Method and apparatus for thermal protection in an integrated circuit |
US20090027032A1 (en) * | 2007-07-27 | 2009-01-29 | Klaus Zametzky | Circuit arrangment for the temperature-dependent regulation of a load current |
WO2009070003A2 (en) * | 2007-11-30 | 2009-06-04 | Mimos Berhad | An analog read out interface circuit for ion sensor |
US20090184752A1 (en) * | 2006-09-29 | 2009-07-23 | Fujitsu Limited | Bias circuit |
US7728575B1 (en) * | 2008-12-18 | 2010-06-01 | Texas Instruments Incorporated | Methods and apparatus for higher-order correction of a bandgap voltage reference |
US20100156387A1 (en) * | 2008-12-24 | 2010-06-24 | Seung-Hun Hong | Temperature independent type reference current generating device |
CN102081423A (en) * | 2010-12-07 | 2011-06-01 | 上海艾为电子技术有限公司 | Temperature reentrant current limiting apparatus |
US20120293143A1 (en) * | 2011-05-17 | 2012-11-22 | Stmicroelectronics (Rousset) Sas | Method and Device for Generating an Adjustable Bandgap Reference Voltage |
US20120293149A1 (en) * | 2011-05-17 | 2012-11-22 | Stmicroelectronics (Rousset) Sas | Device for Generating an Adjustable Bandgap Reference Voltage with Large Power Supply Rejection Rate |
US20130051427A1 (en) * | 2011-08-31 | 2013-02-28 | Shen Wang | Device identification and temperature sensor circuit |
CN103199846A (en) * | 2013-03-26 | 2013-07-10 | 浙江工业大学 | Complementary metal-oxide-semiconductor transistor (CMOS) delaying over-temperature protective circuit |
US20130328542A1 (en) * | 2012-06-06 | 2013-12-12 | Hui Wang | Voltage Generator and Bandgap Reference Circuit |
US8821012B2 (en) | 2011-08-31 | 2014-09-02 | Semiconductor Components Industries, Llc | Combined device identification and temperature measurement |
US20150168226A1 (en) * | 2013-12-12 | 2015-06-18 | Infineon Technologies Ag | Temperature sensing circuit and method for sensing temperature |
WO2018076683A1 (en) * | 2016-10-31 | 2018-05-03 | 深圳市中兴微电子技术有限公司 | Temperature detection circuit and method |
CN110274703A (en) * | 2019-07-12 | 2019-09-24 | 广州芯世物科技有限公司 | A kind of the CMOS temperature-sensitive circuit and temperature sensor of high sensitivity |
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