US5126830A - Cryogenic semiconductor power devices - Google Patents
Cryogenic semiconductor power devices Download PDFInfo
- Publication number
- US5126830A US5126830A US07/429,532 US42953289A US5126830A US 5126830 A US5126830 A US 5126830A US 42953289 A US42953289 A US 42953289A US 5126830 A US5126830 A US 5126830A
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- H10W40/305—
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- the present invention relates to semiconductor power devices and, more particularly, to novel solid-state semiconductor power devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), static induction transistors (SITs) and the like, for operation at cryogenic temperatures, such as in a bath of liquid nitrogen and the like coolants.
- MOSFETs metal-oxide-semiconductor field-effect transistors
- SITs static induction transistors
- solid-state devices have replaced vacuum tubes. Due to the extremely high power density which occurs in the very small volume of most solid-state power devices (such as in the channel of a MOSFET), the reliability and life of the device can be shortened. While it is well known to minimize device power dissipation by using switch-mode and other high-efficiency methodologies, it is often difficult to provide for fast removal of the heat energy generated inside the device, as by dissipation of switching current in the on-resistance of a power MOSFET. While good thermal design is required, maximization of the thermal conductivity of the semiconductor material, and the substrate upon which the device chip is mounted, must be provided. A power device mounted and packaged for operation at cryogenic temperatures, to provide extremely high efficiency and very small size, is therefore highly desirable.
- a solid-state semiconductor power device optimized for cryogenic applications has the actual device chip mounted on a substrate of a material of very high thermal conductivity, which is positioned in a bath of cryogenic fluid.
- the substrate may be formed of beryllia, beryllium, alumina, aluminum nitride, diamond and the like materials.
- the device can be a MOSFET, SIT and the like.
- a presently preferred embodiment has a substrate disposed in a vertical plane, so that, if either or both of the chip-mounting surface and the rear substrate surface are bathed in the cryogenic cooling liquid, buildup of a low thermal-conductivity vapor barrier between the cryogenic liquid and the chip-supporting heat sink is prevented.
- FIG. 1 is a side view of a basic cryogenically-cooled semiconductor power device, in accordance with the principles of the present invention
- FIG. 2 is a graph illustrating the thermal conductivity of a number of materials, with respect to a range of cryogenic and room temperatures;
- FIG. 3 is a sectional side view of one presently preferred cryogenic semiconductor power device mounting apparatus.
- FIG. 4 is a schematic diagram of an equivalent circuit of a MOSFET, and useful in appreciating aspects of the present invention.
- a cryogenically-coolable semiconductor power device 10 includes a heat sink member 11 having a first surface 11a upon which is mounted a solid-state semiconductor power device chip 12, and having a second surface 11b which may be mounted upon a thermally-conductive structural member 14, of copper and like material, to hold the semiconductor chip 12 and supporting thermally-conductive member 11 within a bath 15 of a cryogenic liquid, such as liquid nitrogen (LN 2 ) at a temperature of about 77° K.
- a cryogenic liquid such as liquid nitrogen (LN 2 ) at a temperature of about 77° K.
- LN 2 liquid nitrogen
- a device for use at room temperature member 11 will consist of an electrically insulative material such as beryllia (BeO).
- the heat sink thickness T is made as small as possible relative to the thickness of member 14 as the thermal conductivity ⁇ of the beryllia is less than the thermal conductivity of the member 14 material (say, Cu).
- T is chosen to be much larger, as ⁇ BeO is greater than ⁇ Cu .
- device 10 is disposed in a vertical plane, i.e. with both surfaces 11 a and 11b vertically disposed, such that any vapor thermally agitated from the surrounding cryogenic liquid mass 15 does not collect about the device 10 and form a low-thermal-conductivity vapor barrier between device 10 and the surrounding coolant 15.
- thermal conductivity of some substrate materials tend to increase at cryogenic temperatures, and in fact may peak near the temperature (i.e. 77° K.) of liquid nitrogen.
- the thermal conductivity of conductors such as copper and aluminum and the like as well as of certain solid-state-device-forming semiconductor materials (such as silicon, germanium and the like) increase as temperatures are decreased well into the cryogenic region.
- Tests of MOSFET and SIT (static-induction-transistor) devices have shown that many important electronic properties improve dramatically in the cryogenic temperature regions.
- the on-resistance of high voltage (200-1000 V) MOSFETs decreases by a factor of between about 10 and about 30, at liquid nitrogen temperatures, with respect to room temperature (e.g. 290° K.).
- the switching time, and therefore switching power loss decrease, as the effect of parasitic capacities decrease with temperature. Therefore, speed increases, as well as transconductance, gain and maximum current, due to increased electron mobility. All such changes result in a lower-cost device for handling the same power levels.
- FIG. 3 Another presently preferred apparatus 10' is shown in FIG. 3, wherein a generally L-shaped substrate member 11' of a high-thermal-conductivity, but electrically insulative, material, such as aluminum nitride, beryllium oxide and the like, has a first surface 11'a, which may be within a recessed portion 11'b and the like, upon which the power device chip 12 is mounted.
- Recess 11'b is formed upon a leg portion 11'c of the substrate, which also has a base portion 11'd extending at right angles to leg portion 11'c, so that a surface 11'e can be mounted against an insulative member 16.
- Securing means 18, such as an insulated screw and the like, can be utilized to fasten substrate 11' to member 16; advantageously, member 16 may be vertically disposed, and portion 11'd is a means for positioning the chip 12/substrate 11'c such that a vapor barrier does not build up between the coolant and the substrate.
- member 11' can be made of an electrically and thermally conductive material, such as beryllium, with member 16 being of a electrically-insulative material; part of the member (i.e. leg 11'c) can be of an electrically conductive material (Be) and another part (portion 11'd) of an insulative material (BeO).
- a cover member 22 can be placed over the semiconductor chip 12, to provide additional protection thereto.
- a cryogenic agent such as liquid nitrogen (LN 2 ) and the like contacts at least substrate 11', for withdrawal of dissipative thermal energy from device 12, through the high thermal-conductivity material of the supporting substrate.
- chip 12 may be a MOSFET, a SIT, or the like.
- FIG. 4 is a schematic diagram of an equivalent electrical circuit of a MOSFET.
- a parasitic bipolar transistor Q p having its own base-emitter parasitic resistance R p and series-connected drain capacitances C d1 and C d2 .
- Cryogenic Cooling reduces the undesirable effect of all of the parasitic elements, as well as increasing the speed and maximum current handling capability of device 12'.
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
A cryogenic solid-state semiconductor power device, has the actual device chip mounted on a substrate of a material of very high thermal conductivity, which is positioned in a a bath of cryogenic fluid. The substrate may be formed of beryllia, beryllium, alumina, aluminum nitride, diamond and the like materials.
Description
The present invention relates to semiconductor power devices and, more particularly, to novel solid-state semiconductor power devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), static induction transistors (SITs) and the like, for operation at cryogenic temperatures, such as in a bath of liquid nitrogen and the like coolants.
In many power generation applications, solid-state devices have replaced vacuum tubes. Due to the extremely high power density which occurs in the very small volume of most solid-state power devices (such as in the channel of a MOSFET), the reliability and life of the device can be shortened. While it is well known to minimize device power dissipation by using switch-mode and other high-efficiency methodologies, it is often difficult to provide for fast removal of the heat energy generated inside the device, as by dissipation of switching current in the on-resistance of a power MOSFET. While good thermal design is required, maximization of the thermal conductivity of the semiconductor material, and the substrate upon which the device chip is mounted, must be provided. A power device mounted and packaged for operation at cryogenic temperatures, to provide extremely high efficiency and very small size, is therefore highly desirable.
In accordance with the invention, a solid-state semiconductor power device optimized for cryogenic applications has the actual device chip mounted on a substrate of a material of very high thermal conductivity, which is positioned in a bath of cryogenic fluid. The substrate may be formed of beryllia, beryllium, alumina, aluminum nitride, diamond and the like materials. The device can be a MOSFET, SIT and the like.
A presently preferred embodiment has a substrate disposed in a vertical plane, so that, if either or both of the chip-mounting surface and the rear substrate surface are bathed in the cryogenic cooling liquid, buildup of a low thermal-conductivity vapor barrier between the cryogenic liquid and the chip-supporting heat sink is prevented.
Accordingly, it is an object of the present invention to provide novel cryogenic solid-state semiconductor power devices for use in cryogenically-cooled electronic assemblies.
This and other objects of the present invention will become apparent upon reading of the following detailed description, when considered in conjunction with the associated drawings.
FIG. 1 is a side view of a basic cryogenically-cooled semiconductor power device, in accordance with the principles of the present invention;
FIG. 2 is a graph illustrating the thermal conductivity of a number of materials, with respect to a range of cryogenic and room temperatures;
FIG. 3 is a sectional side view of one presently preferred cryogenic semiconductor power device mounting apparatus; and
FIG. 4 is a schematic diagram of an equivalent circuit of a MOSFET, and useful in appreciating aspects of the present invention.
Referring initially to FIG. 1, a cryogenically-coolable semiconductor power device 10 includes a heat sink member 11 having a first surface 11a upon which is mounted a solid-state semiconductor power device chip 12, and having a second surface 11b which may be mounted upon a thermally-conductive structural member 14, of copper and like material, to hold the semiconductor chip 12 and supporting thermally-conductive member 11 within a bath 15 of a cryogenic liquid, such as liquid nitrogen (LN2) at a temperature of about 77° K. In a device for use at room temperature member 11 will consist of an electrically insulative material such as beryllia (BeO). Hence, the heat sink thickness T is made as small as possible relative to the thickness of member 14 as the thermal conductivity θ of the beryllia is less than the thermal conductivity of the member 14 material (say, Cu). At cryogenic temperatures (say, 77° K.), however, T is chosen to be much larger, as θBeO is greater than θCu. Advantageously, device 10 is disposed in a vertical plane, i.e. with both surfaces 11 a and 11b vertically disposed, such that any vapor thermally agitated from the surrounding cryogenic liquid mass 15 does not collect about the device 10 and form a low-thermal-conductivity vapor barrier between device 10 and the surrounding coolant 15.
It is well known that the thermal conductivity of some substrate materials, such as alumina, diamond, beryllia and the like, tend to increase at cryogenic temperatures, and in fact may peak near the temperature (i.e. 77° K.) of liquid nitrogen. The thermal conductivity of conductors such as copper and aluminum and the like as well as of certain solid-state-device-forming semiconductor materials (such as silicon, germanium and the like) increase as temperatures are decreased well into the cryogenic region. Tests of MOSFET and SIT (static-induction-transistor) devices have shown that many important electronic properties improve dramatically in the cryogenic temperature regions. For example, the on-resistance of high voltage (200-1000 V) MOSFETs decreases by a factor of between about 10 and about 30, at liquid nitrogen temperatures, with respect to room temperature (e.g. 290° K.). The switching time, and therefore switching power loss, decrease, as the effect of parasitic capacities decrease with temperature. Therefore, speed increases, as well as transconductance, gain and maximum current, due to increased electron mobility. All such changes result in a lower-cost device for handling the same power levels.
Another presently preferred apparatus 10' is shown in FIG. 3, wherein a generally L-shaped substrate member 11' of a high-thermal-conductivity, but electrically insulative, material, such as aluminum nitride, beryllium oxide and the like, has a first surface 11'a, which may be within a recessed portion 11'b and the like, upon which the power device chip 12 is mounted. Recess 11'b is formed upon a leg portion 11'c of the substrate, which also has a base portion 11'd extending at right angles to leg portion 11'c, so that a surface 11'e can be mounted against an insulative member 16. Securing means 18, such as an insulated screw and the like, can be utilized to fasten substrate 11' to member 16; advantageously, member 16 may be vertically disposed, and portion 11'd is a means for positioning the chip 12/substrate 11'c such that a vapor barrier does not build up between the coolant and the substrate. Alternatively, member 11' can be made of an electrically and thermally conductive material, such as beryllium, with member 16 being of a electrically-insulative material; part of the member (i.e. leg 11'c) can be of an electrically conductive material (Be) and another part (portion 11'd) of an insulative material (BeO). Electrical connections from device chip 12 to each of at least one conductive leads 20 can be made by known means, such as bonding wires 20a and the like. If desired, a cover member 22 can be placed over the semiconductor chip 12, to provide additional protection thereto. In use, a cryogenic agent, such as liquid nitrogen (LN2) and the like contacts at least substrate 11', for withdrawal of dissipative thermal energy from device 12, through the high thermal-conductivity material of the supporting substrate.
As previously stated, chip 12 may be a MOSFET, a SIT, or the like. FIG. 4 is a schematic diagram of an equivalent electrical circuit of a MOSFET. In addition to an ideal device 12' having an input capacitance Cin, an input resistance Rin and a gate-drain capacitance Cgd, there is also a parasitic bipolar transistor Qp, having its own base-emitter parasitic resistance Rp and series-connected drain capacitances Cd1 and Cd2. Cryogenic Cooling reduces the undesirable effect of all of the parasitic elements, as well as increasing the speed and maximum current handling capability of device 12'.
While several presently preferred embodiments of our novel invention have been described in detail herein, many modifications and variations will now become apparent to those skilled in the art. It is our intent, therefore, to be limited only by the scope of the appended claims and not by the specific details and instrumentalities presented by way of explanation herein.
Claims (12)
1. A device for use in a cryogenic environment, comprising:
a semiconductor power device chip;
a substrate having a surface on which said chip is mounted, said substrate being substantially surrounded by a mass of cryogenic fluid;
said substrate consisting of an electrically but thermally conductive material having greater thermal conductivity at cryogenic temperatures than at room temperature;
said substrate having a thickness selected for optimum dissipation, at cryogenic temperatures, of chip-generated heat, said last-recited thickness being greater than the substrate thickness selected for optimum heat dissipation for device operation at room temperature;
said substrate further comprising a recess in said surface for holding said semiconductor power device chip and means for providing a protective covering for said chip;
a structural member disposed within said mass of cryogenic fluid substantially parallel to said substrate; and
means for increasing the heat dissipation of said substrate including a base portion connected between said substrate and said structural member for spacing said substrate from said structural member, said base portion being effective to increase the surface area of said substrate exposed to said cryogenic fluid.
2. The device of claim 1, wherein said substrate is oriented in said cryogenic mass by said base portion to minimize the collection of barrier vapor adjacent to said surface.
3. The device of claim 1, wherein said semiconductor power device chip is a static induction transistor (SIT).
4. The device of claim 3, wherein the SIT is fabricated in a germanium chip.
5. The device of claim 1, wherein said semiconductor power device chip is a field-effect transistor (FET).
6. The device of claim 5, wherein said FET is a Metal-Oxide-Semiconductor FET (MOSFET).
7. The device of claim 1, wherein said substrate material is selected from the group consisting of beryllia, alumina, diamond and aluminum nitride.
8. The device of claim 1, wherein said semiconductor power device chip is fabricated from a material selected from the group consisting of silicon and gallium arsenide.
9. The device of claim 1, wherein the cryogenic fluid is liquid nitrogen (LN2).
10. A device for use in a cryogenic environment, comprising:
a semiconductor power device chip;
a substrate having a surface on which said chip is mounted, said substrate being substantially surrounded by a mass of cryogenic fluid;
said substrate consisting of an electrically and thermally conductive material having greater thermal conductivity at cryogenic temperatures than at room temperature;
said substrate having a thickness selected for optimum dissipation, at cryogenic temperatures, of chip-generated heat, said last-recited thickness being greater than the substrate thickness selected for optimum heat dissipation for device operation at room temperature;
an electrically insulative structural member disposed in said mass of cryogenic fluid substantially parallel to said substrate;
means for increasing the heat dissipation of said substrate including a base portion connected between said substrate and said structural member for spacing said substrate from said structural member, said base portion being effective to increase the surface area of said substrate exposed to said cryogenic fluid.
11. The device of claim 10 wherein said base portion is electrically insulative.
12. The device of claim 10, wherein said substrate consists essentially of beryllium.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/429,532 US5126830A (en) | 1989-10-31 | 1989-10-31 | Cryogenic semiconductor power devices |
| CA002021606A CA2021606A1 (en) | 1989-10-31 | 1990-07-19 | Cryogenic semiconductor power devices |
| IL96051A IL96051A (en) | 1989-10-31 | 1990-10-17 | Cryogenic semiconductor power devices |
| JP2284538A JPH0671056B2 (en) | 1989-10-31 | 1990-10-24 | Cryogenic semiconductor device for electric power |
| EP90311693A EP0426371B1 (en) | 1989-10-31 | 1990-10-25 | Cryogenic semiconductor power devices |
| DE69030710T DE69030710T2 (en) | 1989-10-31 | 1990-10-25 | Cryogenic power semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/429,532 US5126830A (en) | 1989-10-31 | 1989-10-31 | Cryogenic semiconductor power devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US5126830A true US5126830A (en) | 1992-06-30 |
Family
ID=23703655
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US07/429,532 Expired - Fee Related US5126830A (en) | 1989-10-31 | 1989-10-31 | Cryogenic semiconductor power devices |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5126830A (en) |
| EP (1) | EP0426371B1 (en) |
| JP (1) | JPH0671056B2 (en) |
| CA (1) | CA2021606A1 (en) |
| DE (1) | DE69030710T2 (en) |
| IL (1) | IL96051A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5323293A (en) * | 1992-12-18 | 1994-06-21 | International Business Machines Corporation | Arrangement for placing central processors and memory in a cryo cooled chamber |
| US5625548A (en) * | 1994-08-10 | 1997-04-29 | American Superconductor Corporation | Control circuit for cryogenically-cooled power electronics employed in power conversion systems |
| WO1998007237A1 (en) * | 1996-08-16 | 1998-02-19 | American Superconductor Corporation | Cryogenically-cooled switching circuit |
| US20030151128A1 (en) * | 2002-02-14 | 2003-08-14 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| US20030190506A1 (en) * | 2000-03-15 | 2003-10-09 | Mueller Otward M. | Cryogenic power conversion for fuel cell systems especially for vehicles |
| US11917794B2 (en) * | 2020-10-30 | 2024-02-27 | Advanced Micro Devices, Inc. | Separating temperature domains in cooled systems |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4320803C2 (en) * | 1993-06-23 | 2001-06-28 | Inst Luft & Kaeltetechnik Ggmbh | Location-independent sensor cooling system |
| DE4332156A1 (en) * | 1993-09-22 | 1995-03-30 | Inst Luft Kaeltetech Gem Gmbh | Device for self-sufficient cooling of high-temperature superconducting components, preferably sensors |
| US6163064A (en) * | 1996-08-16 | 2000-12-19 | American Superconductor Corporation | Apparatus for improved operation of MOSFET devices in cryogenic environments |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4472727A (en) * | 1983-08-12 | 1984-09-18 | At&T Bell Laboratories | Carrier freezeout field-effect device |
| US4608582A (en) * | 1977-02-02 | 1986-08-26 | Zaidan Hojin Handotai Kenkyu Shinkokai | Semiconductor device having non-saturating I-V characteristics and integrated circuit structure including same |
| JPS6350046A (en) * | 1986-08-20 | 1988-03-02 | Toshiba Corp | Vessel for cryogenic cooling |
| US4734820A (en) * | 1987-04-16 | 1988-03-29 | Ncr Corporation | Cryogenic packaging scheme |
| JPS63289974A (en) * | 1987-05-22 | 1988-11-28 | Hitachi Ltd | Cryostat |
| US4965659A (en) * | 1987-06-30 | 1990-10-23 | Sumitomo Electric Industries, Ltd. | Member for a semiconductor structure |
| US4980754A (en) * | 1988-11-02 | 1990-12-25 | Seigo Kotani | Package for superconducting devices |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53127272A (en) * | 1977-04-13 | 1978-11-07 | Semiconductor Res Found | Electrostatic induction transistor |
| JPS62216255A (en) * | 1986-03-17 | 1987-09-22 | Fujitsu Ltd | Dipping boiling cooling module |
| JPS6439047A (en) * | 1987-08-05 | 1989-02-09 | Agency Ind Science Techn | Semiconductor device |
-
1989
- 1989-10-31 US US07/429,532 patent/US5126830A/en not_active Expired - Fee Related
-
1990
- 1990-07-19 CA CA002021606A patent/CA2021606A1/en not_active Abandoned
- 1990-10-17 IL IL96051A patent/IL96051A/en not_active IP Right Cessation
- 1990-10-24 JP JP2284538A patent/JPH0671056B2/en not_active Expired - Lifetime
- 1990-10-25 EP EP90311693A patent/EP0426371B1/en not_active Expired - Lifetime
- 1990-10-25 DE DE69030710T patent/DE69030710T2/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4608582A (en) * | 1977-02-02 | 1986-08-26 | Zaidan Hojin Handotai Kenkyu Shinkokai | Semiconductor device having non-saturating I-V characteristics and integrated circuit structure including same |
| US4472727A (en) * | 1983-08-12 | 1984-09-18 | At&T Bell Laboratories | Carrier freezeout field-effect device |
| JPS6350046A (en) * | 1986-08-20 | 1988-03-02 | Toshiba Corp | Vessel for cryogenic cooling |
| US4734820A (en) * | 1987-04-16 | 1988-03-29 | Ncr Corporation | Cryogenic packaging scheme |
| JPS63289974A (en) * | 1987-05-22 | 1988-11-28 | Hitachi Ltd | Cryostat |
| US4965659A (en) * | 1987-06-30 | 1990-10-23 | Sumitomo Electric Industries, Ltd. | Member for a semiconductor structure |
| US4980754A (en) * | 1988-11-02 | 1990-12-25 | Seigo Kotani | Package for superconducting devices |
Non-Patent Citations (2)
| Title |
|---|
| Rideout, "Close-Cycle Liquid Nitrogen Refrigeration System for Low-Temperature Computer Operation," Sep. 1975, IBM Technical Disclosure Bulletin, vol. 18, No. 4, pp. 1226-1229. |
| Rideout, Close Cycle Liquid Nitrogen Refrigeration System for Low Temperature Computer Operation, Sep. 1975, IBM Technical Disclosure Bulletin , vol. 18, No. 4, pp. 1226 1229. * |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5323293A (en) * | 1992-12-18 | 1994-06-21 | International Business Machines Corporation | Arrangement for placing central processors and memory in a cryo cooled chamber |
| US5625548A (en) * | 1994-08-10 | 1997-04-29 | American Superconductor Corporation | Control circuit for cryogenically-cooled power electronics employed in power conversion systems |
| US5726873A (en) * | 1994-08-10 | 1998-03-10 | American Superconductor Corporation | Control circuit for cryogenically-cooled power electronics employed in power conversion systems |
| US5953224A (en) * | 1994-08-10 | 1999-09-14 | American Superconductor Corporation | Control circuit for cryogenically-cooled power electronics employed in power conversion systems |
| WO1998007237A1 (en) * | 1996-08-16 | 1998-02-19 | American Superconductor Corporation | Cryogenically-cooled switching circuit |
| US6172550B1 (en) * | 1996-08-16 | 2001-01-09 | American Superconducting Corporation | Cryogenically-cooled switching circuit |
| US20030190506A1 (en) * | 2000-03-15 | 2003-10-09 | Mueller Otward M. | Cryogenic power conversion for fuel cell systems especially for vehicles |
| US6798083B2 (en) * | 2000-03-15 | 2004-09-28 | Otward M. Mueller | Cryogenic power conversion for fuel cell systems especially for vehicles |
| US20030151128A1 (en) * | 2002-02-14 | 2003-08-14 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| US11917794B2 (en) * | 2020-10-30 | 2024-02-27 | Advanced Micro Devices, Inc. | Separating temperature domains in cooled systems |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0671056B2 (en) | 1994-09-07 |
| CA2021606A1 (en) | 1991-05-01 |
| EP0426371A1 (en) | 1991-05-08 |
| IL96051A (en) | 1993-08-18 |
| JPH03184364A (en) | 1991-08-12 |
| EP0426371B1 (en) | 1997-05-14 |
| IL96051A0 (en) | 1991-07-18 |
| DE69030710D1 (en) | 1997-06-19 |
| DE69030710T2 (en) | 1997-12-11 |
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