US4234858A - Voltage controlled oscillator with phase control circuits - Google Patents

Voltage controlled oscillator with phase control circuits Download PDF

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US4234858A
US4234858A US05/923,643 US92364378A US4234858A US 4234858 A US4234858 A US 4234858A US 92364378 A US92364378 A US 92364378A US 4234858 A US4234858 A US 4234858A
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vector
signal
phase
circuit
signals
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Hiroshi Gomi
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Toshiba Corp
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Tokyo Shibaura Electric Co Ltd
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Priority claimed from JP2227076A external-priority patent/JPS52106230A/en
Priority claimed from JP2464676A external-priority patent/JPS52108754A/en
Priority claimed from JP2464776A external-priority patent/JPS52108728A/en
Priority claimed from JP2499876A external-priority patent/JPS5850442B2/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/30Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
    • H03B5/32Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
    • H03B5/36Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device
    • H03B5/366Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device and comprising means for varying the frequency by a variable voltage or current
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/44Colour synchronisation
    • H04N9/455Generation of colour burst signals; Insertion of colour burst signals in colour picture signals or separation of colour burst signals from colour picture signals

Definitions

  • FIG. 3 is a connection diagram showing a modification of this invention.
  • FIG. 6 is a vector diagram useful to explain the phase shifting operation of the phase shifting circuit
  • FIG. 14 is a connection diagram showing another embodiment of the VCO with a phase control circuit
  • FIG. 16 is a connection diagram showing a modification of the VCO with a phase control circuit shown in FIG. 14.
  • These signals -e 2 and e 2 are supplied to the second and third differential amplifiers 23 and 24 respectively each constructed as a doubly balanced type.
  • the differential amplifiers 23 and 24 respectively comprise pairs of transistors 25 and 26, and 27 and 28 with their emitter electrodes commonly connected. Signals -e 2 and e 2 are applied to the respective junctions of the commonly connected emitter electrodes.
  • the base electrodes of the transistors 25 through 28 comprising the differential amplifiers 23 and 24 are applied with control signals supplied to input terminals 29 and 30 from a phase detection circuit, not shown, whereby the relative amplitude ratio of signals -e 2 and e 2 is controlled by the control signals and then the signals -e 2 and e 2 are added to each other.
  • the results of additions are derived out from the collector electrodes respectively of transistors 25 and 27.
  • p is a variable coefficient expressed by 0 ⁇ p ⁇ 1 and e x and e y represent signals to be added to each other, e x corresponds to e 2 and e y to -e 2 , or e x corresponds to -e 2 and e y to +e 2 , and
  • Signal e 2 from the junction b is applied to the base electrode of transistor 33 with its emitter electrode connected to a constant current source 31 together with the emitter electrode of transistor 34 thus constituting a fourth differential amplifier 32.
  • the base electrode of transistor 34 is connected to receive signal e 1 at the junction a.
  • the differential amplifier 32 produces the difference between signals e 1 and e 2 to obtain signals e 3 and -e 3 shown in FIG. 2 on the respective collector electrodes of transistors 33 and 34.
  • Signal e 3 is added to the outputs from the differential amplifiers 23 and 24 to form a signal e 4 as shown in FIG. 2.
  • a signal -e 2 corresponding to the inversion of signal e 2 appears on the collector electrode of transistor 45.
  • signal e 2 having the same phase as above described signal e 2 appears on the collector electrode of the other transistor 46.
  • These signals are applied to the commonly connected emitter electrodes respectively of transistors 48 and 49, and 50 and 51 that constitute seventh and eigth differential amplifiers 52 and 53, respectively.
  • the seventh differential amplifier 52 and the fifth differential amplifier 43 are connected as a doubly balanced type as are the fifth and eighth differential amplifiers 43 and 53.
  • the base electrodes of transistors 41, 42, 48 through 51 of the differential amplifiers 43, 52, and 53 are supplied with control voltage from DC control terminals 54 and 55 for adjusting the relative amplitude ratio of the signals.
  • Signals e 1 and e 2 are applied respectively to the base electrodes of transistors 107 and 108 with commonly connected emitter electrodes connected to a constant current source 105 thus forming a ninth differential amplifier 106, in which signals e 1 and e 2 are subtracted from each other thus forming a signal e 14 and -e 14 .
  • signal -e 14 is obtained from the collector resistor 109 of the transistor 107 through an output terminal 110 and then applied to a product phase detection circuit, not shown.
  • Signal e 2 is also supplied to the base electrode of transistor 113 constituting a tenth differential amplifier 112 and the base electrode of the other transistor 114 is supplied with a predetermined bias signal from the bias terminal 10.
  • vector E 3 can be obtained by adding these two vectors as follows.
  • a vector whose phase angle is delayed from vector E 3 by the phase shifter 38 and the tank circuit 15 is formed and this vector is used to vary the oscillation frequency of the quartz oscillator 14 to a frequency determined by the phase which is necessary to compensate for the phase difference between this vector and vector E 1 .
  • the lagging phase ⁇ acts as a filter for higher harmonics thus suppressing the same.
  • the input signal e 1 is amplified by the phase shifter 67 to produce a vector e 5 having the same phase as the input signal e 1 .
  • the input to the tank circuit 64 is the vector sum e 0 of the vectors e 34 and e 5 which is positively fed back to phase shifter 65 through the tank circuit 64.
  • Signal e 0 is expressed by the following equation
  • the signal representing the reference signal is determined by vector e 5 which is an inversion of the output e 3 from the phase shifter 65 which is free from any variation in the phase delay caused by the variation in the values of the elements that constitute the phase shifter.
  • the reference frequency does not vary.
  • transistor Q 23 is conductive whereas transistors Q 21 and Q 22 are not conductive so that a bias voltage suitable for adjusting the hue is applied to the base electrode of transistor Q 15 which constitute the balanced type differential amplifier through resistor 254 and transistor Q 20 which is now conductive.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

A tank circuit including a quartz vibrator and a phase shifter connected to the tank circuit for forming a vector signal e1 from the tank circuit and a vector signal e2 delayed a predetermined angle from the signal e1. A differential circuit is used to subtract e1 from e2 thus forming a difference signal e3. The delayed signal e2 is inverted by a phase inverting circuit to obtain two signals e2 and -e2 which are applied to an addition circuit where their relative amplitude ratio is controlled. The addition circuit adds signal e3 to the signals e2 and e3 whose relative amplitude ratio has been controlled for producing a sum signal which is fed back to the tank circuit.

Description

This is a division of application Ser. No. 773,689 filed Mar. 2, 1977 issued as U.S. Pat. No. 4,128,817.
BACKGROUND OF THE INVENTION
In recent years, the circuit of a color television receiving set has been divided into a plurality of sections according to the functions thereof and to form respective sections as independent integrated circuit units. More particularly, nearly all of the circuit sections starting from an image intermediate frequency amplifier circuit to a color demodulation circuit are formed as integrated circuit units and only such circuits as portions of the output stage which require a high power are constructed by transistor circuits. In such a transistorized circuit, however, since the existing circuit is sectionalized and each section is transistorized, the number of the integrated circuit units increases as the number of the circuit units increase. Accordingly, efforts have been made to form integrated circuit units capable of providing the functions of a plurality of circuit sections for the purpose of decreasing the number of the integrated circuit units. For example, it has been tried to combine three integrated circuit units for the band amplifier, color demodulation circuit and color synchronizing circuit respectively of a color television receiving set into a single integrated circuit unit having multiple functions, thereby increasing the efficiency of integration. In such multi-function integrated circuit unit, however, it is necessary to provide pins for connecting it with external circuits of the number equal to the number of the pins of three independent integrated circuit units thus increasing the size of the multifunction integrated circuit unit. Of course it is desirable to decrease as far as possible the number of such pins. It is also necessary to incorporate into such multi-function integrated circuit unit a voltage controlled type oscillation circuit, a phase control circuit and a phase shifting circuit for use in a demodulation circuit. However, at paresent, as it is difficult to incorporate the phase shifting circuit into the integrated circuit unit, it is necessary to construct the phase shifting circuit as an element outside of the integrated circuit unit. Accordingly, it is necessary to provide a large number of pins for the integrated circuit unit for connecting it with external or peripheral circuit elements thus increasing the size of the integrated circuit unit.
Although a multi-function integrated circuit unit is advantageous in that it can decrease the number of independent integrated circuits it is also desirable to provide multi-function unit circuits for the integrated circuit unit for the purpose of providing a more efficient multi-function integrated circuit unit.
SUMMARY OF THE INVENTION
It is an object of this invention to provide an improved voltage controlled oscillator (VCO) with a phase control circuit suitable for use in a color signal system of a color television receiving set and having a decreased number of pins and suitable for fabricating a multi-function integrated circuit.
Another object of this invention is to provide a phase control circuit capable of efficiently controlling the phase difference between two signals generated by a control signal.
Still another object of this invention is to provide a voltage controlled type phase shifting circuit.
According to one aspect of this invention there is provided a VCO with a phase control circuit comprising means for generating a reference oscillation signal, first and second phase shifter means supplied with the reference oscillation signal for forming first and second signals having different phases, a third phase shifter means supplied with the first signal from the first phase shifter means for forming third and fourth signals having different phases, an addition circuit for vectorially adding the third and fourth signals formed by the third phase shifter means thus forming a sum signal and for vectorially adding the sum signal to the second signal, and a feedback circuit for feeding back the output signal from the addition circuit to the means for generating the reference oscillation signal.
According to another aspect of this invention, there is provided a voltage controlled type oscillator comprising a reference oscillation signal generator, a first phase shifter for shifting the phase of a signal derived out from one terminal of the reference oscillation signal generator by a predetermined angle, a second phase shifter for inverting the output vector of the first phase shifter, an addition circuit for controlling the ratio of the absolute values of the output vectors of the first and second phase shifters to a predetermined ratio and then vectorially adding the output vectors, said addition circuit having an output terminal connected to the other terminal of the reference oscillation signal generator, a third phase shifter connected across the reference oscillation signal generator for shifting the output thereof a predetermined angle, and means for feeding back a resultant vector of the output of the third phase shifter and the output of the addition circuit to the other end of the reference oscillation signal generator for controlling the signal generated thereby.
BRIEF DESCRIPTION OF THE DRAWING
In the accompanying drawings:
FIG. 1 is a connection diagram showing one embodiment of the VCO with a phase control circuit embodying the invention;
FIG. 2 is a vector diagram for explaining the operation of the phase shifting circuit shown in FIG. 1;
FIG. 3 is a connection diagram showing a modification of this invention;
FIG. 4 is a vector diagram useful to explain the operation of the VCO with a phase control circuit shown in FIG. 3;
FIG. 5 is a connection diagram showing a voltage controlled type phase shifting circuit comprising the phase control circuit;
FIG. 6 is a vector diagram useful to explain the phase shifting operation of the phase shifting circuit;
FIG. 7 is a block diagram showing one example of a voltage controlled type oscillator utilized in the VCO with a phase control circuit of this invention;
FIG. 8 is a block diagram useful to explain the operaton of the circuit shown in FIG. 7;
FIG. 9 is a connection diagram showing the detail of the block diagram shown in FIG. 7;
FIG. 10 is a vector diagram useful to explain the operation of the circuit shown in FIG. 9;
FIG. 11 is a block diagram showing another example of the voltage controlled type oscillator;
FIG. 12 is a connection diagram showing the detail of the block diagram shown in FIG. 11;
FIG. 13 is a vector diagram helpful to explain the operation of the circuit shown in FIG. 12;
FIG. 14 is a connection diagram showing another embodiment of the VCO with a phase control circuit;
FIG. 15 is a vector diagram useful to explain the operation of the circuit shown in FIG. 14; and
FIG. 16 is a connection diagram showing a modification of the VCO with a phase control circuit shown in FIG. 14.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 1 shows a VCO with a phase control circuit comprising a voltage controlled type oscillator 11 for producing a reference subcarrier wave, and a DC color phase control circuit for supplying to a demodulation circuit a reference subcarrier wave that determines a color demodulation axis. The voltage controlled type oscillator 11 comprises a tank circuit 15 made up of a capacitor 13 and a quartz vibrator 14, and the tank circuit 15 is connected to a phase shifting circuit 18 including a resistor 16 and a capacitor 17. Accordingly, at the junction a between the tank circuit 15 and the phase shifting circuit 18 appears a reference signal e1 (e1 is a vector signal. For the purpose of description, the amplitude relationship of the vector signals is expressed by ignoring the gain of the amplifier circuit). Signal e2 is derived out from the junction b between the resistor 16 and the capacitor 17, and lags signal e1 by 45°, for example, as shown in FIG. 2. Signal e2 is applied to the base electrode of a transistor 21 having an emitter electrode connected to a constant current source 19 together with the emitter electrode of a transistor 22 thus forming a first differential amplifier 20. The base electrode of transistor 22 is supplied with a predetermined bias potential from a bias terminal 10. Accordingly, a signal -e2 corresponding to the inverted signal of e2 appears on the collector electrode of transistor 21 whereas a signal having the same phase as signal e2 appears on the collector electrode of the other transistor 22. These signals -e2 and e2 are supplied to the second and third differential amplifiers 23 and 24 respectively each constructed as a doubly balanced type. The differential amplifiers 23 and 24 respectively comprise pairs of transistors 25 and 26, and 27 and 28 with their emitter electrodes commonly connected. Signals -e2 and e2 are applied to the respective junctions of the commonly connected emitter electrodes. The base electrodes of the transistors 25 through 28 comprising the differential amplifiers 23 and 24 are applied with control signals supplied to input terminals 29 and 30 from a phase detection circuit, not shown, whereby the relative amplitude ratio of signals -e2 and e2 is controlled by the control signals and then the signals -e2 and e2 are added to each other. The results of additions are derived out from the collector electrodes respectively of transistors 25 and 27. These two outputs are expressed as follows.
e.sub.a =pe.sub.x +(1-p)e.sub.y . . .                      (1)
e.sub.b =+(1-p)e.sub.x +pe.sub.y . . .                     (2)
where p is a variable coefficient expressed by 0≦p≦1 and ex and ey represent signals to be added to each other, ex corresponds to e2 and ey to -e2, or ex corresponds to -e2 and ey to +e2, and |ex |=|ey |.
Signal e2 from the junction b is applied to the base electrode of transistor 33 with its emitter electrode connected to a constant current source 31 together with the emitter electrode of transistor 34 thus constituting a fourth differential amplifier 32. The base electrode of transistor 34 is connected to receive signal e1 at the junction a. The differential amplifier 32 produces the difference between signals e1 and e2 to obtain signals e3 and -e3 shown in FIG. 2 on the respective collector electrodes of transistors 33 and 34. Signal e3 is added to the outputs from the differential amplifiers 23 and 24 to form a signal e4 as shown in FIG. 2. For example, the equations 1 and 2, if we put p=1/2, then signal e4 will have the same phase as signal e3. The phase of signal e4 varies in a range of 90° about e2 depending upon the magnitude of the control signal, and the precise phase is determined by the magnitude of the control signal. Signal e4 is derived by a collector resistor 35 of transistor 25 and then applied to a phase shifter 38 through an emitter follower transistor 37 having an emitter electrode grounded through a resistor 36. The phase shifter 38 may be constituted by a resistor 39 and a capacitor 40 for example and constructed to form a voltage vector coinciding with the input vector of the tank circuit 15. In other words, the emitter follower transistor 37, the phase shifter 38 and the tank circuit 15 constitute a positive feedback circuit for the voltage controlled type oscillator 11.
A hue adjusting circuit 12 comprises a fifth differential amplifier 43 made up of a pair of transistors 41 and 42 having commonly connected emitter electrodes. The signal -e3 appearing on the collector electrode of the transistor 34 of the fourth differential amplifier 32 is applied to the commonly connected emitter electrodes of the transistors 41 and 42. The hue adjusting circuit 12 further comprises a sixth differential amplifier 47 made up of a pair of transistors 45 and 46. The signal e2 appearing at the junction b is applied to the base electrode of transistor 45. The commonly connected emitter electrodes of the transistors 45 and 46 are connected to a constant current source 44. The base electrode of the transistor 46 is supplied with a predetermined bias voltage from a bias terminal 10. As a consequence, a signal -e2 corresponding to the inversion of signal e2 appears on the collector electrode of transistor 45. On the other hand, signal e2 having the same phase as above described signal e2 appears on the collector electrode of the other transistor 46. These signals are applied to the commonly connected emitter electrodes respectively of transistors 48 and 49, and 50 and 51 that constitute seventh and eigth differential amplifiers 52 and 53, respectively. The seventh differential amplifier 52 and the fifth differential amplifier 43 are connected as a doubly balanced type as are the fifth and eighth differential amplifiers 43 and 53. The base electrodes of transistors 41, 42, 48 through 51 of the differential amplifiers 43, 52, and 53 are supplied with control voltage from DC control terminals 54 and 55 for adjusting the relative amplitude ratio of the signals. Considering a combination of the fifth differential amplifier 43 and the seventh differential amplifier 52, the relative amplitude ratio of signals -e3 and -e2 is adjusted by the control voltages and then signals -e3 and -e2 are added together for producing signal e5 shown in FIG. 2 by the collector resistor 56, the signal e5 being derived out from terminal 57. In the case of the combination of the fifth and eighth differential amplifiers 43 and 53, the relative amplitude ratio of the signals -e3 and e2 is controlled by the control voltages and thereafter the signals -e3 and e2 are added to each other for producing a signal e6 shown in FIG. 2 which is taken out from terminal 59 connected to a collector resistor 58. The signals e5 and e6 appearing on the output terminals 57 and 59 are applied to a demodulation circuit, not shown. Signals e5 and e6 have a phase difference of 90° which is maintained constant irrespective of the control voltages. Consequently, signals e5 and e6 are suitable for use as the demodulation axes for hue signals R-Y and B-Y. The circuit shown in FIG. 1 is supplied with an operating voltage from a source terminal 60.
The signal produced by the voltage controlled type oscillator 11 described above can be applied directly to the DC hue adjusting circuit 12 and the output thereof can be applied directly to the demodulation circuit for setting the demodulation axes thereof. Since substantially all portions of these circuits can be made of semiconductor circuits they can be fabricated as integrated circuits. Moreover, as external circuits are greatly simplified (comprising only the tank circuit and the phase shifter) it is possible to form an integrated circuit having a small number of pins.
It should be understood that the invention is not limited to the specific embodiment described above.
FIG. 3 shows a modification of this invention wherein elements corresponding to those shown in FIG. 1 are designated by the same reference numerals. The modification shown in FIG. 3 is different from the embodiment shown in FIG. 1 in that there are added a circuit for switching the output from the voltage controlled type oscillator 11 between a phase detection circuit (not shown) of an automatic phase control circuit APC and a color killer detection circuit, not shown, and a voltage dividing circuit is connected between the tank circuit and the first differential amplifier. More particularly, a resistor 101 is connected across the junction a between the tank circuit 15 and the phase shifter 18 and the base electrode of the transistor 21, and a predetermined bias voltage is applied to the base electrode of transistor 21 from a bias terminal 103 via a resistor 102. The signals applied to the respective base electrodes of the other transistors 21, 34 and 45 are the same as those used in the embodiment shown in FIG. 1.
More particularly, resistor 101 constitutes a voltage dividing circuit 104 together with resistor 102. Where the resistance values of resistors 101 and 102 are made equal the signal produced at the point of voltage division is shown by e1 /2 as shown in FIG. 4. The signal e1 /2 causes a signal -e1 /2 to be generated at the collector electrode of transistor 21 and a signal e1 /2 at the collector electrode of transistor 22. Thus, these two signals e1 /2 and -e1 /2 are applied to the second and third differential amplifiers 23 and 24 respectively and are added to each other after the relative amplitude ratio has been adjusted in the same manner as in the embodiment shown in FIG. 1. The sum signal is added to the output from transistor 33 of the fourth differential amplifier 32 which calculates the difference between signals e2 and e1 /2 thus producing a signal e11 shown in FIG. 4 on the collector electrode of transistor 33. Signal e11 is added to the outputs from the second and third differential amplifiers 23 and 24. As can be noted from equations 1 and 2, since the value of P is selected to satisfy a relation 0≦P≦1, the result of addition varies in a range of ±45° about signal e11. As a consequence, the signal e11 is controlled within this range by the control voltages from terminals 29 and 30. Where the control voltage is set to be 1/2P, an output signal having the same phase as signal e11 will be produced. Thus, the output signal has a phase difference 90° with respect to signal e1. The sum signal e11 passes through transistor 37 and phase shifter 38 and then is positively fed back to the oscillator via the tank circuit 15. Thus, signal -e11 is produced on the collector electrode of transistor 34 of the fourth differential amplifier 32, and the signal -e11 is applied to the fifth differential amplifier 43. Signal e1 /2 is supplied to the base electrode of the transistor 45 of the sixth differential amplifier 47 for producing signals -e1 /2 and e1 /2 respectively on the collector electrodes of transistors 45 and 46. Signals -e1 /2 and -e11 are added to each other by the fifth and seventh differential amplifiers 43 and 52 to obtain a signal e12 whereas signals e1 /2 and -e11 are added to each other by the fifth and eighth differential amplifiers 43 and 53 to obtain signal e13. Signals e12 and e13 have a phase difference of 90°. This phase difference is maintained constant regardless of the magnitudes of the control voltages from DC control terminals 54 and 55 so that it is possible to use signals e12 and e13 as the demodulation axes for R-Y and B-Y. Signals e1 and e2 are applied respectively to the base electrodes of transistors 107 and 108 with commonly connected emitter electrodes connected to a constant current source 105 thus forming a ninth differential amplifier 106, in which signals e1 and e2 are subtracted from each other thus forming a signal e14 and -e14. In the circuit shown in FIG. 3, signal -e14 is obtained from the collector resistor 109 of the transistor 107 through an output terminal 110 and then applied to a product phase detection circuit, not shown. Signal e2 is also supplied to the base electrode of transistor 113 constituting a tenth differential amplifier 112 and the base electrode of the other transistor 114 is supplied with a predetermined bias signal from the bias terminal 10. The emitter electrodes of transistors 113 and 114 are commonly connected to a constant current source 111. As a consequence, a signal -e2, that is an inversion of signal e2, appears on the collector resistor 115 and is supplied at output terminal 116 and applied to the color killer detection circuits.
Suppose now that signal e12 appearing on terminal 57 sets the R-Y demodulation axis and signal e13 appearing on terminal 59 the B-Y demodulation axis, the burst signal will be advanced by 90° than the R-Y demodulation axis so that it will have the same axis as signal e2 (e13).
With regard to the color killer detection circuit, where it is constructed by an integrated circuit its circuit construction generally has a form of synchronous detector so that it has a phase relationship that produces a maximum output when shifted by 90° with reference to the subcarrier wave supplied to the detection circuit. Accordingly, an output is produced from terminal 116 for application to the color killer detection circuit when signal e2 or phase inverted signal -e2 is at the same or opposite phase with respect to the burst signal. As a consequence it is possible to use the signal -e2 derived out from output terminal 116 for color killer detection circuit. On the other hand, signal -e14 derived from signal 110 has a phase difference of 90° with respect to the burst signal. Since a synchronous detection circuit is generally used for an automatic phase control circuit, where signal -e14 has a phase difference of 90°, the output from the detection circuit becomes zero. When the output becomes zero the oscillation is stabilized. Of course, as the phase departs from 90°, an output is produced to correct the oscillation frequency.
With the embodiments shown in FIGS. 1 and 3, it is possible to directly apply to the demodulation circuit the two output signals produced by a hue adjusting circuit by utilizing a phase shifter utilized in a voltage controlled type oscillator, or to decrease the number of the phase shifters by coupling directly the two output signals to the demodulation circuit thereby affording a plurality of functions to the phase shifter. For this reason, it is possible to incorporate into an integrated circuit not only the voltage controlled type oscillator and the hue adjusting circuit but also the demodulation circuit thus greatly decreasing the number of pins for external connections. This not only simplifies the fabrication of the integrated circuit but also reduces it size.
FIG. 5 is a connection diagram of a modified voltage controlled type oscillator utilized to design the phase control circuit described above.
Assume now that a voltage vector E1 at one end of a resistor 16 shown in FIG. 5 comprises a reference vector, and that the voltage vector at the other end of resistor 16 whose phase has been shifted by a predetermined angle by phase shifter 18 is represented by vector E2. Vector E1 is impressed upon the base electrode of transistor 34 while vector E2 is impressed upon the common junction between the base electrodes of transistors 21 and 33. In other words vectors E2 and E1 are impressed upon transistors 33 and 34 respectively which constitute the differential amplifier 32. Accordingly, a vector (E1 -E2) appears on the collector electrode of transistor 33 by the differential amplifying action while a vector -(E1 -E2) appears on the collector electrode of transistor 34.
The vector E2 applied to the base electrode of transistor 21 of the differential amplifier 20 creates a vector -E2 which is an inversion of vector E2 on the collector electrode of transistor 21 by the differential amplifying action of the differential amplifier 20. In the same manner, vector E2 is formed on the collector electrode of transistor 22. These vectors -E2 and E2 are applied to differential amplifiers 23 and 24 respectively which are connected to form a doubly balanced type differential amplifier whereby these vectors are added vectorially after the relative ratio of their absolute values has been adjusted to a predetermined ratio in accordance with the control voltages impressed upon terminals 29 and 30. An output vector (E1 -E2) produced by transistor 33 is added to the resultant or sum vector thus producing a vector E3 across resistor 35.
The resultant vector E3 is applied to phase shifter 38 and tank circuit 15 via transistor 37 whereby the phase of the vector E3 is lagged. If there is a phase difference between the delayed vectors E3 and E1, the oscillation frequency of the quartz oscillator 14 is corrected to eliminate such phase difference.
In this manner, in the modification shown in FIG. 5, the vectors which are added to each other after the ratio of their absolute values has been adjusted to a predetermined ratio are the vector -E2 appearing on the collector electrode of transistor 21 and vector E2 produced on the collector electrode of transistor 22 by the differential amplifying action of the differential amplifier 20 and having the same absolute value as vector -E2. The advantage of producing vectors -E2 and E2 having the same absolute value on the collector electrodes of transistors 21 and 22 that constitute the differential amplifier 20 will now be described with reference to the vector diagram shown in FIG. 6.
The differential amplifier 32 is supplied with a reference vector E1 and a vector E2 which is phase shifted from vector E1 by a predetermined angle, and transistor 33 forms a vector (E1 -E2) corresponding to an inversion of the difference vector between vectors E1 and E2. The phase difference between vectors E2 and (E1 -E2) is 90°. As vector E2 is impressed upon the base electrode of transistor 21 an inverted vector -E2 appears on the collector electrode. Further a vector E2 is produced on the collector electrode of transistor 22 by the differential amplifying action of the differential amplfier 20. In this manner, vectors appearing on the collector electrodes of transistors 21 and 22 which comprise a differential amplifier have the same absolute value but are of opposite phase. The ratio of the absolute values of these vectors is adjusted by the control voltages applied to the terminals 29 and 30 connected to the differential amplifiers 23 and 24 and the vectors are then added together by these differential amplifiers having an ability of addition. The sum vector is then added to vector -(E1 -E2) to form a vector E3. When the ratio between the vectors E2 and -E2 appearing on the collector electrodes of transistors 22 and 21 is selected to be P: (1-P), vector E3 can be obtained by adding these two vectors as follows.
E.sub.3 =PE.sub.2 +(1-P)(-E.sub.2)+(E.sub.1 -E.sub.2) . . . (3)
where P is an real number expressed by 0≦P≦1.
For the purpose of investigating the range of the phase angle in which the vector E2 is caused to vary by the variation in the control voltages impressed upon the terminals 29 and 30, let us consider cases wherein P=0 and P=1. In the case of P=0
E.sub.3 =E.sub.3(max) =-E.sub.2 +(E.sub.1 -E.sub.2)=E.sub.1 -2E.sub.2 (4)
showing that the phase angle of the vector E2 is expressed by that of the vector E3(max) shown in FIG. 6. In the case of P=1
E.sub.3 =E.sub.3(min) =E.sub.2 +(E.sub.1 -E.sub.2)=E.sub.1 (5)
showing that the phase angle of vector E2 is expressed by that of the vector E3(min) shown in FIG. 6.
Considering a case wherein the value of the control voltages impressed upon the terminals is one half of the maximum, that is P=1/2,
E.sub.3 =(E.sub.1 -E.sub.2)                                (6)
This equation shows that the phase of vector (E1 -E2) coincides with the half value of the vector E3(max) because, as shown in FIG. 6, vector (E1 -E2) has a phase difference of 90° with respect vectors E2 and -E2 and because |E2 |=|-E2 |.
As can be noted from equation (6) the half value of the variable phase vector E3 always coincides with the phase of vector E3(max) when the value of the impressed control voltage is one half of the maximum.
In FIG. 6, where P=1/2 and where θ represents the angle of phase shift, the phase β of vector E3 is shown by
β=θ                                             (7)
As a consequence, even when the gain of the differential amplifier deviates from a prescribed value it is possible to coincide the half value of the voltage control range with the half value of the variable phase range of vector E3.
Where the voltage controlled type phase shifter shown in FIG. 5 is applied to a voltage controlled type oscillator, a vector whose phase angle is delayed from vector E3 by the phase shifter 38 and the tank circuit 15 is formed and this vector is used to vary the oscillation frequency of the quartz oscillator 14 to a frequency determined by the phase which is necessary to compensate for the phase difference between this vector and vector E1. The lagging phase θ acts as a filter for higher harmonics thus suppressing the same.
FIG. 7 shows a modified voltage controlled type oscillator constituting a VCO with a phase control circuit of this invention and FIG. 8 is a vector diagram showing the phase relationship of the signals at various portions of FIG. 7. A signal e1 produced by a tank circuit 64 is applied to a phase shifter 65 so that the phase θi of the input signal e1 applied to the phase shifter 65 is shifted by θ3 thus producing an output e3. The phase of this output e3 is shifted 180° by a phase shifter 66 to obtain a vector e4. The phase shifter 66 may comprise resistors, capacitors and inductors of a phase inverting circuit. This phase shifter may invert the phase. Voltage vectors e3 and e4 are added by an adder 63 to produce a sum output e34 as follows
e.sub.34 =K.sub.1 {α·e.sub.3 +(1-α)e.sub.4 }(8)
where K1 is the maximum transmission coefficient of the adder 63.
The input signal e1 is amplified by the phase shifter 67 to produce a vector e5 having the same phase as the input signal e1. The input to the tank circuit 64 is the vector sum e0 of the vectors e34 and e5 which is positively fed back to phase shifter 65 through the tank circuit 64. Signal e0 is expressed by the following equation
e.sub.0 =e.sub.34 +e.sub.5.
By using an oscillation frequency produced by the tank circuit as a reference frequency when control voltage E0 (that controls the relative ratio of the absolute values of the voltage vectors e3 and e4) applied to the adder is at the center of the range, the vector e34 can be expressed as follows
e.sub.34 =(K.sub.1 /2) (K.sub.3 e.sub.3 +K.sub.4 e.sub.4)  (10)
As above described since vectors e3 and e4 have opposite phases when e3 =+e4 and K3 =K4, from equation (10) e34 =0. Thus, the reference frequency is determined by vector e5 having the same phase as the input signal e1 and not influenced by the phase shifters 65 and 66, showing the variation in the phase angle shifted by the phase shifters 65 and 66 does not cause any variation in the reference frequency. Consequently, it is possible to obtain extremely stabilized oscillation frequencies. This enables non-adjustment of the oscillation frequency. Even when an adjustment is necessary, its range may be narrow because variation in the phase shift is prevented.
FIG. 9 shows the detail of the construction of the block diagram shown in FIG. 7, and FIG. 10 is a vector diagram showing the phase relationship of the signals at various portions of FIG. 9. In FIG. 9, a phase shifter constituted by an inductor L1, a capacitor C1 and a resistor R1 corresponds to the phase shifter 65 shown in FIG. 7; a quartz vibrator X0 and a capacitor C2 correspond to the tank circuit 64 and a differential amplifier made up of transistors Q3 and Q4 corresponds to phase shifter 67. Transistor Q2 of a differential amplifier made up of a pair of transistors Q1 and Q2 corresponds to the phase shifter 66 shown in FIG. 7. In this case, the phase shifter 66 acts as a phase inverter. Two differential amplifiers constituted by transistors Q5, Q6 and transistors Q7 and Q8 respectively are combined to form a doubly balanced type differential amplifier which corresponds to adder 63 shown in FIG. 7. By denoting the base input to transistor Q4 by e1 ' the phase angle of vector e1 is delayed by inductor L1, capacitor C1 and resistor R1 to obtain a delayed vector e3. Vector e1 ' is applied to the collector electrode of transistor Q3 via transistors Q4 and Q3 as a vector e5 having the same phase as vector e1 '. The voltage vector e3 produces vectors e3 and -e3 on the collector electrodes of transistors Q1 and Q2. Denoting these vectors by e30 and -e30 respectively, the amplitudes thereof are controlled by transistors Q6 and Q8 respectively and then applied to the base electrodes of transistors Q6 and Q8 with their collector electrodes commonly connected, whereby the voltage vectors are added to each other for producing vector e34 expressed by equation 8. At the same time, these voltage vectors are combined with vector e5 appearing on the collector electrode of transistor Q3 for producing a vector e0 expressed by equation 9 and appearing on the emitter electrode of transistor Q9 connected to act as an emitter follower. The voltage vector e0 is applied to tank circuit 64.
Where the control voltage Ec is equal to E0 (the voltage at the center of the range of the control voltage), or Ec =VB1 in the case of FIG. 9, where VB1, represents the base bias voltage of transistors Q6 and Q7, α in equation (8) becomes 1/2 so that vectors e30 and -e30 cancel each other and the output voltage vector e0 =e5. In this manner, the output vector e0 will have the same phase as the input signal e1 ' without being affected by the amount of phase shift provided by the phase shifter 65. For this reason, the variation in the frequency caused by the deviations in the values of elements L1, C1 and R1 that constitute the phase shifter 65 is extremely small. When the control voltage Ec at the center of the control range the only loop utilized is the loop including the differential amplifier constituted by transistors Q3 and Q4 so that the phase of a path from the base input to the transistor Q4 and to the emitter output of transistor Q9 does not deviate from a prescribed value.
Another form of the voltage controlled type oscillator is illustrated in FIG. 11, the detail thereof being shown in FIG. 12. The circuit shown in FIG. 11 is similar to that shown in FIG. 7 except that the phase shifter 67 is replaced by a phase shifter 65 which is constructed to lag the phase by 90° and that a capacitor C3 is added between the junction between resistor R5 and the quartz vibrator X0 of the tank circuit 64 and the ground. In this case too, when the control voltage Ec =E0, (E0 is a voltage at the center of the control voltage) the oscillation frequency is determined by the output voltage e5 of the phase shifter 65 connected between the input and output so that when the constants of the phase shifter 65 deviate the oscillation frequency will vary.
According to this embodiment, however, by designing the phase shifter 65 to provide a 90° phase lag, not only the phase shifting operation of the phase shifter 65 and hence the oscillation frequency can be stabilized but also higher harmonics can also be suppressed. As shown in FIG. 12, the phase shifter 65 is constituted by an inductor L1, a capacitor C1 and a resistor R1. Denoting the input to transistor Q2 by e1 ' (phase 0°) the phase relationship between this input and the input e3 to transistor Q4 is expressed by the following equation:
e.sub.1 '/e.sub.3 =(1-ω.sup.2 L.sub.1 C.sub.1)+jω(L.sub.1 /R.sub.1)                                                 (11)
Where the values of inductor L1 and capacitor C1 are selected to satisfy a relation 1=ω2 L1 C1, then we obtain the following relation
1-ω.sup.2 L.sub.1 C.sub.1 <<1(L.sub.1 /R.sub.1)      (12)
Thus
e.sub.1 '/e.sub.3 =jω(L.sub.1 /R.sub.1)              (13)
Even when the values of the inductance and capacitance of the elements L1 and C1 deviate more or less, equation (12) holds so that it is possible to maintain the phase θ3 of vector e3 a -90° irrespective of the deviation in the values of the elements L1 and R1. In other words, with this phase shifter it is possible to prevent variation in the set value of the phase delay. The output e3 of the phase shifter 65 is amplified by a differential amplifier constituted by transistors Q3 and Q4 thus producing an inverted voltage vector e5 (having a phase difference of 90° with respect to vector e1 '). The vector e1 ' is amplified by a differential amplifier constituted by transistors Q1 and Q2 thus producing vectors e11 and -e11 on the collector electrodes of transistors Q1 and Q2 respectively. The relative amplitude of vectors e11 and -e11 is controlled by the control voltage Ec applied to a doubly balanced type differential amplifier constituted by transistors Q5, Q6, Q7 and Q8 and then the vectors e11 and -e11 are added to each other on the collector outputs of the transistors Q6 and Q8 thus producing a sum vector e10. Further, this vector e10 is added to vector e5 to produce an output vector e0 on the emitter electrode of transistor Q9. As a consequence, when the control voltage Ec is at the center of the control range, that is when Ec =E0, e10 =O. Consequently, the signal representing the reference signal is determined by vector e5 which is an inversion of the output e3 from the phase shifter 65 which is free from any variation in the phase delay caused by the variation in the values of the elements that constitute the phase shifter. In other words, the reference frequency does not vary. Further, the phase angle of vector e0 is advanced 90° with respect to vector e1 ', and the output e0 is fed back to the oscillator through a tank circuit, including resistor R5 capacitors C3 and C2 and quartz vibrator X0 (in this case, the tank circuit includes the phase shifter) such that e0 and e1 ' will have the same phase but as the resistor R5 and capacitor C3 constitute a lowpass filter, the high harmonic gain of the oscillation loop becomes smaller than the loop gain for the fundamental frequency, thereby efficiently suppressing higher harmonics.
FIG. 14 shows another example of the VCO with a phase control circuit of this invention, which comprises an oscillator 200 for producing a subcarrier wave, a hue control circuit 201 connected to the oscillator 200 for producing subcarrier wave signals having a phase difference of 90° necessary to adjust the hue, R-Y axis and B-Y axis, an APC circuit 202 connected to the oscillator 200 through the hue control circuit 201 for forming a closed loop so as to stabilize the subcarrier wave by phase control, and an ACC circuit 203 connected to the output of the hue control circuit 201 for controlling the gain of the band amplification of the carrier color signal and for controlling the color killer, by detecting the phase.
The hue control circuit 201 comprises a balanced type differential amplifier D4 constituted by a differential amplifier D1 including transistors Q10 and Q11, a differential amplifier D2 including transistors Q12 and Q13, and a differential amplifier D3 including transistors Q14 and Q15, a differential amplifier D5 including transistors Q16 and Q17 and provided with a constant current source 204, a differential amplifier D6 including transistors Q18 and Q19 and provided with a constant current source 205, a resistor 206 for deriving out the output from the differential amplifier D1 and D3 a resistor 207 for deriving out the output from the differential amplifiers D1 and D3, bias resistors 208 and 209, a diode 211 with its anode electrode connected to one end of the bias resistor 208 and the cathode electrode connected to a terminal 210 for receiving a burst gate pulse, a variable resistor 212 for controlling the bias voltage of balanced differential amplifier D4, and a 90° phase shifter 213 connected across the base electrodes of transistors Q16 and Q18.
The phase control circuit shown in FIG. 14 operates as follows.
At first, the scanning interval in which no burst gate pulse is applied to the terminal 210 that is when the transistor Q15 is normally biased will be described. Signal e1 synchronous with the burst signal generated by the oscillator 200 is applied to the base electrode of transistor Q16 and the phase of signal e1 is shifted 90° by the phase shifter 213 for producing a signal e2 which is applied to the base electrode of transistor Q18. Accordingly a signal -e1, an inversion of e1, appears on the collector electrode of transistor Q16 and signal e1 appears on the collector electrode of transistor Q17 which is paired with transistor Q16. In the same manner, -e2 appears on the collector electrode of transistor Q18 supplied with a signal e2 having a 90° phase difference with respect to e1 thus producing a signal e2 on the collector electrode of transistor Q19. The ratio of the absolute values of the collector voltages -e1, e1 and -e2 of the transistors Q16, Q17 and Q18 respectively is adjusted to a prescribed ratio by a balanced type differential amplifier D4 constituted by differential amplifiers D1, D2 and D3 and these collector voltages are then added vectorially by variable resistor 212.
Suppose now that the ratio of the transistors Q10 and Q11 of the differential amplifier D1 is P:(1-P), the proportional signal distribution coefficient of a transistor of the balanced differential amplifier D4 having its base electrode connected to the base electrode of transistor Q10 is P and that of the transistor having its base electrode connected to the base electrode of transistor Q11 is (1-P). Thus, in the differential amplifier D2, the ratio of the signals flowing through transistors Q12 and Q13 is (1-P):P whereas in the differential amplifier D3, the ratio of the signals flowing through transistors Q14 and Q15 is P:(1-P), where P is expressed by a relation
0≧P≧1
The manner of compounding vectors by a balanced type differential amplifier will be described with reference to the vector diagram shown in FIG. 15.
At the resistor 206 connected to the collector electrode of transistor Q11 comprising the differential amplifier D1, the collector voltage -(1-P)e1 of transistor Q11 and the collector voltage -Pe2 of the transistor Q14 are added vectorially to obtain a sum voltage e.sub.(R-Y)
e.sub.(R-Y) =-(1-P)e.sub.1 -Pe.sub.2                       (13)
At the resistor 207, the collector voltage -(1-P)e2 of transistor Q15 and the collector voltage Pe1 of transistor Q13 are added vectorially, thus
e.sub.(B-Y) =Pe.sub.1 -(1-P)e.sub.2                        (14)
The results of additions expressed by equations 13 and 14 have a positional relationship as shown in FIG. 15.
Denoting the angle between vectors e1 and e.sub.(B-Y) by α, triangles aob and cod are identical so that vector e.sub.(R-Y) is perpendicular to vector e.sub.(B-Y).
Two vectors e.sub.(B-Y) and e.sub.(R-Y) which are phase shifted by α by controlling the bias voltage of transistors Q10, Q13 and Q14 by variable resistor 212 with respect to the output from the oscillator 200, thus having a phase difference of 90° are used as the subcarrier waves for effecting two axis demodulation. At this time, since the burst gate pulse is not present at terminal 210, the APC circuit 202 does not operate.
When a negative burst gate pulse reaches terminal 210 a diode 211 becomes conductive thus turning OFF transistors Q15, Q12 and Q11 and the value of P shown by equations 13 and 14 becomes 1 and signal e1 synchronous with the burst signal and 90° phase shifted, and signal -e2 appear across resistor 206 and 207 respectively. The outputs from the hue control circuit 201 having a phase difference of 90° (which are produced when the burst gate signals are received) are used as the phase detection signal for the APC circuit 202 (which responds to the burst gate pulse to stabilize the oscillation frequency of the oscillator 200 by phase control) and for the ACC circuit 203 (which controls automatically the gain of the band amplification of the carrier color signal by the burst signal injected by the burst gate pulse).
With this construction the required phase shifting is accomplished by only one phase shifter 213 which provides a 90° phase shift whereby the number of the phase shifters is decreased thus making easy to incorporate it into an integrated circuit.
Denoting the phase difference between the signal of the hue control circuit 201 and the burst signal at the time of receiving the same by θ0, and by denoting the amount of phase shift by the hue control circuit 201 which depends upon a variable P by θ(P), the angle θburst between the burst signal and one of the axes utilized for the two axis demodulation is expressed by the following equation
θ.sub.burst =θ.sub.0 +θ(P)               (15)
In some cases θ0 fluctuates due to the circuit condition of the burst gate pulse circuit, but in this invention θ0 is maintained at a constant value by making P=1.
A circuit for maintaining P at a constant value during the burst signal interval is shown in FIG. 16, in which circuit elements identical to those shown in FIG. 14 are not shown.
Thus, the circuit for maintaining the value of the variable P at a constant value during the burst signal interval comprises transistors Q20 and Q21 with their base electrodes connected to bias resistor 251 and 252 respectively, a resistor 253 connected between the emitter electrodes of these transistors, a resistor 254 connected between the emitter electrode of transistor Q20 and the base electrode of transistor Q15 which constitutes a balanced type differential amplifier, a transistor Q22 with its collector electrode connected to the emitter electrode of transistor Q21, a differential amplifier D7 including a transistor Q23 with its collector electrode connected to resistor 252 and the base electrode connected to a burst gate pulse receiving terminal 255, a constant current source 256 connected between the commonly connected emitter electrodes of transistors Q22 and Q23 that constitute the differential amplifier and the ground, and a constant current source 257 connected between the emitter electrode of transistor Q20 and the ground.
Where a negative burst gate pulse is not applied to terminal 255, transistor Q23 is conductive whereas transistors Q21 and Q22 are not conductive so that a bias voltage suitable for adjusting the hue is applied to the base electrode of transistor Q15 which constitute the balanced type differential amplifier through resistor 254 and transistor Q20 which is now conductive.
When a burst gate pulse is applied to terminal 255, transistor Q23 is turned OFF, whereas transistors Q20, Q21 and Q22 are turned ON. Since the current values of the constant current sources 256 and 257 are selected such that the base potential of transistor Q15 that constitutes the balanced type differential amplifier D4 and connected to resistor 254 will be equal to the collector potential of transistor Q22 the value of P is maintained at a constant value of 1/2.

Claims (7)

What is claimed is:
1. A voltage controlled oscillator comprising:
a resonant circuit;
means for phase-shifting by a predetermined amount a first reference vector signal (e1) from one end of said resonant circuit, thereby generating a second reference vector signal (e2);
means for generating a third vector signal (e3) equal to the difference between said first and said second reference vector signals (e1, e2);
means for generating a vector signal e4 and for feeding back said vector signal and said third vector signal e3 to said resonant circuit, including means for generating a vector signal 180° out of phase with said vector signal e4 and including a first control-addition means for receiving one of said first, second and third vector signals, for controlling the absolute value of said vector signal e4 relative to said vector signal 180° out of phase with said vector signal and for combining both vector signals; and
hue control signal generating means including means for generating a fourth vector signal -e3 that is 180° out of phase with said third vector signal e3, and further including a first vector adding circuit for adding one of said third vector signal e3 and fourth vector signal (-e3) to a vector signal (-e2 or +e2) which differs in phase by +90° from said third or fourth vector signals, and generating a fifth vector signal (e6) said hue control signal generating means further including a second vector adding circuit for adding one of said third vector signal (e3) and said fourth vector signal (-e3) to a vector signal (-e2 or +e2) which differs in phase by -90° from said third or fourth vector signal, thereby generating a sixth vector signal (e5).
2. A voltage controlled oscillator according to claim 1, wherein said fifth and sixth vector signals are used as demodulation axes.
3. A voltage controlled oscillator according to claim 2, wherein said first vector adding circuit includes a second control-addition means for controlling the absolute values of both signals to be added and for then adding both signals; and said second vector adding circuit further including a third control-addition means for controlling the absolute values of both signals to be added and for then adding both signals.
4. A voltage controlled oscillator according to claim 1, wherein said hue control signal generating means further includes means for shifting the phases of said fifth and sixth vector signals, while maintaining a phase difference of 90° between said fifth and sixth vector signals.
5. A voltage controlled oscillator according to claim 1, wherein said hue control signal generating means includes means for coupling one of said fifth and sixth vector signals to an automatic phase control detecting circuit.
6. A voltage controlled oscillator according to claim 1, wherein said hue control signal generating means includes means for coupling one of said fifth and sixth vector signals to an automatic chroma control detecting circuit.
7. A voltage controlled oscillator according to claim 1, wherein said hue control signal generating means includes means for coupling one of said fifth and sixth vector signals to an automatic phase control detecting circuit, and the other is supplied to an automatic chroma control detecting circuit.
US05/923,643 1976-03-03 1978-07-11 Voltage controlled oscillator with phase control circuits Expired - Lifetime US4234858A (en)

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JP2227076A JPS52106230A (en) 1976-03-03 1976-03-03 Phase control circuit
JP51-22270 1976-03-03
JP2464676A JPS52108754A (en) 1976-03-09 1976-03-09 Voltage control type phase circuit
JP2464776A JPS52108728A (en) 1976-03-09 1976-03-09 Colour signal process circuit
JP51-24646 1976-03-09
JP51-24647 1976-03-09
JP2499876A JPS5850442B2 (en) 1976-03-10 1976-03-10 voltage controlled oscillator
JP51-24998 1976-03-10

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WO1989011180A1 (en) * 1988-05-11 1989-11-16 Plessey Overseas Limited An improved oscillator
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