US3909669A

US3909669A - Circuit for controlling light displays and the like

Info

Publication number: US3909669A
Application number: US508988A
Authority: US
Inventors: Laurence Clark White
Original assignee: Individual
Current assignee: Individual
Priority date: 1974-09-25
Filing date: 1974-09-25
Publication date: 1975-09-30
Anticipated expiration: 1992-09-30

Abstract

A circuit for controlling activation of lamps in a light display by an A.C. source includes a clock for generating a sequence of clock pulses, and a shift register for storing a plurality of electrical representations and for successively altering the stored representations in response to receive clock pulses. Also included is switch apparatus responsive to the signal representations stored in the shift register for producing a set of signals which enable activation of selected ones of the lamps by the alternating current source. A clamping circuit prevents application of clock pulses to the shift register during alternate half cycles of the A.C. source, and an array of switches enable activation of the selected lamps only during the alternate half cycles. In this manner, lamps are activated only at or near zero crossover of the A.C. source output.

Description

United States Patent 1191 White 1 Sept. 30, 1975 CIRCUIT FOR CONTROLLING LIGHT DISPLAYS AND THE LIKE Laurence Clark White, 1357 28th St., Ogden, Utah 84403 [22] Filed: Sept. 25, 1974 [21] Appl. No.: 508,988

[76] Inventor:

[52] US. Cl l. 315/250; 315/316 511 int. c1. ..n05B 37/00; HOSB 39/00;

[58] Field of Search 315/250, 315, 316

[56] References Cited UNITED STATES PATENTS 3.706.914 12/1972 Van Burcn 315/316 $763,394 10/1973 Blanchard 315/315 X Primary E.\-aminerPalmcr C. Demco Attorney. Agent, or FirmCriddle & Thorpe l I I I I I I II I: I II I D.C. Power StppIy l0 Clamping Circuit 18 ' 26a 26b 26c I l 5 7 ABSTRACT A circuit for controlling activation of lamps in a light display by an A.C. source includes a clock for generating a sequence of clock pulses, and a shift register for storing a plurality of electrical representations and for successively altering the stored representations in response to receive clock pulses. Also included is switch apparatus responsive to the signal representations stored in the shift register for producing a set of signals which enable activation of selected ones of the lamps by the alternating current source. A clamping circuit prevents application of clock pulses to the shift register during alternate half cycles of the A.C. source, and an array of switches enable activation of the selected lamps only during the alternate half cycles. In this manner. lamps are activated only at or near zero crossover of the A.C. source output.

15 Claims, 1 Drawing Figure :Shift Register 22 l l I Function Switch 30 CIRCUIT FOR CONTROLLING LIGHT DISPLAYS AND THE LIKE BACKGROUND OF THE INVENTION This invention relates to apparatus for controlling the activation of light displays and the like.

Light and other visual displays are used extensively in advertising and marketing. Such displays oftentimes include either moving or changing patterns of lights and, of course, control apparatus must be employed to properly sequence the light patterns displayed, i.e., to control the turnon and turnoff of the lamps used to create the display.

Light display control apparatus in general use at the present time utilizes mechanical switches to turn on and turn off the lamps of the display. The switches respond to sequencing apparatus to effect turnon and turnoff of the lamps at random points in the waveform of the A.C. source signal. That is, a lamp might be turned on or turned off at the peak of the positive half cycle of the A.C. source waveform or at any other point therein. Because of this, electromagnetic waves are generated when the lamps are turned off or turned on and these waves tend to interfere with local radio and television signals. Further, since lamp turnon may occur at a peak of a half cycle of the A.C. source, a large instantaneous current inrush to the lamps might result and this tends to reduce the life of a lamp.

With the typically used mechanical control apparatus, it is difficult to vary the time during which lamps or lamp patterns are either on or off. Generally, some mechanical change must be made in order to do this and such changes are time consuming and costly. Finally, because such control apparatus consists of me chanical parts, the apparatus is bulky, heavy and subject to fairly rapid wear.

Some of these problems can be overcome by electronic apparatus such as that described in an article entitled A Designers Compendium of Flashing Light Circuits, EDN, July 5, 1974, pp. 84-93. Included in the article are descriptions of circuits which use shift registers for producing different signal patterns depending upon the contents of the registers. These circuits are more compact and reliable, but the problem of unwanted generation of electromagnetic waves still exists.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a compact, reliable and long lasting circuit for controlling light displays and the like.

It is also an object of the present invention to provide such a control circuit in which very little electromagnetic radiation is generated.

It is still another object of the present invention to provide such a control circuit in which the turnon and turnoff of the electrical elements to be controlled occurs at or near zero crossover of the signal waveform output of the A.C. source used to energize the display.

It is an additional object of the present invention in accordance with one aspect thereof to provide such a control circuit in which the period of turnon and turnoff of the display elements may be readily varied.

It is a further object of the present invention in accordance with another aspect thereof to provide such a control circuit in which application of power to the electrical elements of the display is allowed only during alternate half cycles of the A.C. source.

The above and other objects of the present invention are realized in a specific illustrative embodiment of a control circuit capable of controlling the activation of a plurality of electrical elements by an A.C. supply in which the circuit includes circuitry responsive to suecessively received signal patterns for selectively enabling the activation of the electrical elements by the A.C. supply, and circuitry for producing the signal patterns and for changing from one signal pattern to a succeeding signal pattern at or near zero crossover of the waveform of the output of the A.C. supply. The electrical elements activated at any particular time are determined by the signal pattern then persisting. By enabling activation of the electrical elements at zero crossover, very little electromagnetic radiation is generated and therefore very little interference with local radio and television transmission occurs. The circuitry provided is all electronic and therefore long lasting and reliable.

BRIEF DESCRIPTION OF THE DRAWING The objects, features and advantages of the present invention will become apparent from a consideration of the following detailed description presented in connection with the accompanying drawing which shows one illustrative embodiment of a circuit for controlling lamp displays and the like made in accordance with the principles of the present invention.

DETAILED DESCRIPTION The circuit shown in the drawing is connected between an A.C. supply 2 and a. plurality of lamps 6a through 6d. Although the circuit of the drawing will be described in connection with controlling the turnon and turnoff of lamps 6a through 6d, it should be understood that the circuit could be utilized for controlling activation ofa variety of other electrical elements such as solenoids, electrical switches, etc.

The circuit of the drawing includes a DC. power supply 10 coupled directly to the A.C. supply 2, a clock circuit 14 which is powered by the DC. power supply 10, a clamping circuit 18 coupled to the A.C. supply 2 and to the output of the clock circuit 14, and a multistage shift register 22 coupled to the output of the clamping circuit 18. Each stage of the shift register 22, consisting of a plurality of bistable storage elements 26a through 26e, is coupled to a function switch or translator 30. The function switch 30 includes a plurality of outputs, some of which are coupled to gate electrodes of a plurality of silicon-controlled rectifiers (SCRs) 34a through 34d, others of which are connected to a NOR gate 38, and still others of which are connected to bistable element 26a. The output of the NOR gate 38 is coupled by way of a pair of inverters 42 to the input of the bistable element 26a. The power electrodes (cathode and anode) of the SCRs 34a through 34d are each coupled in series between ground potential and a different one of the lamps 6a through 6d which are, in turn, coupled to the A.C. supply 2. It should be understood that although only five bistable elements are shown for the shift register 22 and only four SCRs and four lamps are shown, either a greater or lesser number could be provided as desired by the user.

Before describing the details of the circuit of the drawing and of the operation thereof, a general description of the operation will be given. The DC power supply activates the clock circuit 14 to produce and supply to the clamping circuit 18 a sequence of positive-going clock pulses. The clamping circuit 18 is responsive to the output of the A.C. supply 2 to pre'- vent application of the clock pulses to the shift register 22 during every other half cycle of the A.C. supply output and particularly during every positive half cycle of the A.C. supply output. Each time a clock pulse is sup plied to the shift register 22, signal representations stored therein are altered or changed in accordance with the interconnections between the shift register and the function switch 30. The outputs of the shift register 22 are supplied to the function switch which may or may not translate or alter this output, depending upon the internal wiring of the function switch, and the function switch then supplies a set of signals to selected ones of the SCRs 34a through 340' to place the selected SCRs in a conducting condition; Those lamps 6a through 6d which are connected to the conducting SCRs are thereby activated by the A.C. supply 2 during positive half cycles of the output of the A.C. supply. In this manner, the sequence of turnon and turnoff of the lamps 6a through 6d is controlled to thereby provide different lamp activation patterns. The change from one lamp pattern to another occurs at or near zero crossover of the A.C. supply output and therefore little electromagnetic radiation is generated so that very little radio and television signal interference will occur. Also, instantaneous inrush of current to. the lamps is eliminated so lamp life is extended. A more detailed description of the circuit of the drawing will now i be given.

The DC. power supply 10 is included in the circuit to provide the clock circuit 14 and other components of the circuit with DC. power. The supply 10 includes a resistor R1 connected to the A.C. supply 2 and a diode D1 for rectifying current from the supply. The anode of the diode D1 is connected to the resistor R1 and the cathode is connected to the cathode of a zener diode D2. The anode of the zener diode D2 is coupled to ground potential. A capacitor C1 is coupled in parallel with the zener diode D2 and is provided for storing I a positive charge supplied via the resistor R1 and diode D1 from the A.C. supply 2. The zener diode D2 pre' vents the voltage level across the capacitor C1 from exceeding some predetermined value equal to the breakover voltage of the zener diode..The configuration of the DC. power supply 10operates to convert the output of the A.C. supply 2 to a DC. voltage which is supplied to the clock circuit 14.

The clock circuit 14 is a standard circuit which, through threshold-triggered charge-discharge cycles. of a capacitor C2, produces a sequence of clock pulses which are supplied to an inverter 1. For example, the timer designated NE 555 produced by Signetics Corp. might illustratively be utilized as the clock circuit 14.

The clock circuit 14 includes a pair of variable resistors R2 and R3,'the first of which controls the charge time of a capacitor C2 and thus theinterval between clock The negative-going pulse output of the clock circuit anode of the diode D3 is connected to ground potential. The emitter and base electrodes of the transistor Q are coupled between a resistor R5 and ground potential and the resistor. R5 couples the inverter 1 to the shift register 22. The capacitor C4 serves to phase shift the outputof the A.C. supply 2 and the diode D3 serves to protect the base-emitter junction of the transistor Q r from the negative half cycles of the A.C. supply output.

The clamping circuit 18 operates to .clamp the output of the clock circuit 14 to ground on positive half cycles'of the A.C. supply output. In particular, on positive half cycles'of the A.C. supply 2 which are supplied via the capacitor C4 and resistor R4 to the base of the transistor Q, the transistor is placed in a conducting condition so that any signal applied by the clock circuit 14 via the inverter I to the resistor R5 is conducted to ground by the transistor Q. During negative half cycles of the output of the A.C. supply 2, the transistor Q is biased into a nonconducting condition so that the output of the clock circuit 14 is supplied to the shift register 22.

Clock pulses which are allowed to reach the shift register 22 are applied to the clock C of each of the bistable elements 26a through 26c. The shift register 22 is provided for storing signal representations which, as

already mentiond,are used to define activation patterns of the lamps 6a through 6d. Each of the bistable.

elements 26a through 262 is a type D master-slave flipflops and operates, in response to a clock pulse on its clock input terminal, to apply to its Q output whatever i signal level is present on its D input terminal. For exampulses. and the second of which controls the discharge I time a clock pulse were received on the ClOCkillPUt C of the element, thenthe high level would be applied to the Q outputof the element. The 6 output of each element'is the complement of the Q output of the element. That is, when the Q-output is high, the (j output is low and vice-versa. A positive-going pulse or high level on the reset input R of a bistable element causes that element to assume a condition in which a low level or a logical 0" is being produced on the Q output and a high level or logical 1 is being produced on the 0 output.

The Q outputs of the bistable elements 26a through 26e are connected via inverters to a function switch 30. The function switch 30 utilizes these outputs to (1) apply sets of signals via resistors R8 to the gate electrodes. of SCRs 34a through 34d, and '(2) to apply other sets of signals to various ones of the'bistable elements 26a through 26c to effect changes in the signal representations stored in the elements. Thelatter sets of signals are applied tothe shift register 22 by a reset lead 46 which is coupled through a pairof inverters 50 to the reset inputs. R of bistable elements 26a through inverters 62 and 66 to the clock input Cland reset input R respectively of the bistable element 26e. The particular configuration of the drawing by which the function switch 30 applies signals to the shift register 22 is illustrative and it should be recognized that a variety of configurations may be provided for applying signals to the shift register 22 to thereby alter its contents. The

particular configuration selected would be in accordance with the needs of the user. Similarly, the specific internal construction of the function switch 30 would be selected according to the needs of the user and an illustrative construction only as shown by dotted line in the drawing. The operation of the shift register 22 and function switch 30 to activate the lamps 6a through 6d will now be described for the illustrative circuit of the drawing.

Assume that each of the elements 26a through 26e are in the reset condition so that each Q output is low and each 6 output is high. Since theinputs to the NOR gate 38 are grounded or low (as indicated by the dotted line interconnection of the function switch 30), the output of the NOR gate is high and high level is applied to the D input of element 26a. Upon receipt of a clock pulse from the clock circuit 14 (which pulse would be received during a negative half cycle of the output of the A.C. supply 2, as previously discussed), the high level on the D input of the first bistable element 26a is shifted to the Q output of the element. The Q outputs of elements 26a through 26e, after receipt of the clock pulse, and as represented by logical 0 and 1 notation, is 10000, where the logical 1 represents a high level on output Q of element 26a and the logical Os" represent low leygls on the Q outputs of elements 26b through 26e. The Q output of element 26a is thus low, but this low level is inverted to a high level forapplication via the function switch 30 to the gate electrode of SCR 34a. SCR 34a is thus enabled to conduct current from the A.C. supply 2 through the lamp 6a to ground on succeeding positive half cycles of the A.C. supply output.

On the next clock pulse received by the shift register 22, the high level on the 0 output of element 26a is shifted to the Q output of element 26b and the high level on the D input of element 26a is shifted to the elements Q output. The Q outputs of elements 260 through 26e after this clock pulse are thus 11000 and lamp 6b, as well as lamp 6a, is activated. On the next two clock pulses, the Q outputs of elements 26a through 26e change successively to 1110 and then to 11110 to activate lamp 6c and then lamp 6d. After all lamps have been activated, the next received clock pulse causes the Q output of element 262 to become low and this output is inverted to cause elements 260 through 26d to reset. The Q outputs of the elements are then 00001 and all lamps are extinguished. Upon receipt of the next clock pulse, the above sequence of activating the lamp is repeated.

In the manner described, different ones of the lamps 6a through 6d are successively activated, of course, as determined by the state of the bistable elements 26a through 26e of the shift register 22 and by the internal wiring of the function switch 30. The sequence of activating the lamps may be changed simply by appropriate internal wiring of the function switch 30.

Since a clock pulse may be applied to the shift register 22 only during negative half cycles of the output of the A.C. supply 2, and since the SCRs 34a through 34d may conduct only during positive half cycles of the output, the change or switching from one pattern of activation of the lamps to another can only occur at the beginning of the positive half cycles of the A.C. supply output, i.e., only at zero crossover of the output. Because of this, very little electromagnetic radiation is generated at the time of switchover or change of lamp patterns so that very little interference would occur with local radio and television transmission. Also, no large current inrush to the lamps occurs at the time of a pattern change so the life of the lamps is extended. And, by using SCRs, power is delivered to the bulb only on every other half cycle and the effect of this is to further extend the life of the lamps.

The frequency of changing lamp activation patterns may be varied simply by appropriate adjustment of the variable resistors R2 and R3. By adjusting these resistors, the clock pulse frequency can be varied and, of course, this varies the frequency at which a lamp pattern change is made. i

It is to be understood that the above-described arrangement is only illustrative of the application of' the principles of the present invention. Numerous other modifications and alternative arrangements may be devised by those skilled in the art without departing from the spirit and scope of the present invention and the appended claims are intended to cover such modifications and arrangements.

What is claimed is:

1. A circuit for controlling the activation of a plurality of electrical elements by an A.C. supply comprising clock means for generating a sequence of clock pulses,

register means for storing signal representation and for altering the stored representations in response to said clock pulses,

a clamping circuit coupled between the clock means and register means and responsive to the A.C. supply output for preventing application of clock pulses to the register means during every other half cycle of the A.C. supply output, and

means responsive to the signal representations stored in the register means for enabling the A.C. supply to activate selected ones of the electrical elements during said every other half cycle of the A.C. supply output, the electrical elements activated being determined by the signal representations stored in the register means.

2. A circuit as in claim 1 wherein said clock means includes adjustable means for varying the pulse rate of the clock pulses generated by the clock means.

3. A circuit as in claim 1 wherein said clamping circuit includes a transistor whose collector and emitter electrodes are coupled between ground potential and the junction of the clock means and register means, and

means coupling the A.C. supply to the base electrode of said transistor.

4. A circuit as in claim 3 wherein said clamping circuit further comprises a diode connecting the base electrode of said transistor to ground potential and wherein said coupling means includes a capacitor and resistor connected in parallel.

5. A circuit as in claim 1 wherein said enabling means includes a plurality of unilateral triode switches each having two power electrodes coupled in series with a different one of the electrical elements and the A.C. supply, and each having a gate electrode coupled to said register means, said triode switches being adapted to conduct current only during said every other half cycle in response to certain signal representations stored in said register means to thereby enable activation of the selected electrical elements.

6. A circuit as in claim wherein said triode switches comprise silicon-controlled rectifiers. 1

7. A circuit as in claim 1 wherein said register means is adapted to alter the stored representations in response to a second set of signals and wherein said enabling means comprises switch means responsive to the signal representation stored in said register means for producing said second set of signals and for producing a third set of signals, and means responsive to said third set of signals for conducting current from the A.C. supply to selected ones of the. electrical elements during said every other half cycle of the A.C. supply output.

8. A circuit as in claim 7 wherein said current conmeans coupled to the lamps for enabling activation of selected ones thereof in response to successively received sets of signals, said enabling means being operable to enable activation oflamps only during every other half cycle of the A.C. supply output,

storage means,

means for causing the storage means to successively change its contents, said causing means being operable only during half cycles of the A.C. supply output opposite said every other half cycles, and

means coupled to said storage means for producing said sets of signals, the sets of signals produced means.

10. A circuit as in claim 9 wherein said enabling 1 means comprises a plurality of unilateral triode switches, each coupled to a different one of said lamps and each responsive to a differentsignal in each .set of signals.

1 l. A circuit as comprises a shift register.

12. A circuit as in claim 9 wherein said causing means comprises a clock means for producing a sequence of clock pulses, and a clamping circuit coupled between the clock means and the storage means and responsive to the A.C. supply for applying the clock pulses to the storage means only during half cycles of the A.C. supply outputropposite said every other half cycles, said storage means being adapted to change its contents inresponse to received clock pulses. 13. A circuit as in claim 12 wherein said clock means includes adjustable means for varying the pulse rate of the clock pulses produced by the clock means.

14. A circuit as in claim9 wherein said producing means comprises a translator for generating said sets of signals and for generating additional sets of signals which are a function of the contents of said storage means, and wherein said storage means is adapted to alter its contents in response to said additional sets of signals,

15. A circuit for controlling the activation of a plurality of electrical elements by an A.C. supply comprising means responsive to successively received signal patterns for selectively enabling the activation of electrical elements by the A.C. supply in which the electrical elements activated are determined by the received signal patterns, and means for producing the signal patterns and for changing from one signal pattern output to a succeeding signal pattern output at a time corresponding to zero crossover of the A.C. supply output.

in claim 9 wherein said storage means

Claims

1. A circuit for controlling the activation of a plurality of electrical elements by an A.C. supply comprising clock means for generating a sequence of clock pulses, register means for storing signal representation and for altering the stored representations in response to said clock pulses, a clamping circuit coupled between the clock means and register means and responsive to the A.C. supply output for preventing application of clock pulses to the register means during every other half cycle of the A.C. supply output, and means responsive to the signal representations stored in the register means for enabling the A.C. supply to activate selected ones of the electrical elements during said every other half cycle of the A.C. supply output, the electrical elements activated being determined by the signal representations stored in the register means.

3. A circuit as in claim 1 wherein said clamping circuit includes a transistor whose collector and emitter electrodes are coupled between ground potential and the junction of the clock means and register means, and means coupling the A.C. supply to the base electrode of said transistor.

6. A circuit as in claim 5 wherein said triode switches comprise silicon-controlled rectifiers.

7. A circuit as in claim 1 wherein said register means is adapted to alter the stored representations in response to a second set of signals and wherein said enabling means comprises switch means responsive to the signal representation stored in said register means for producing said second set of signals and for producing a third set of signals, and means responsive to said third set of signals for conducting current from the A.C. supply to selected ones of the electrical elements during said every other half cycle of the A.C. supply output.

8. A circuit as in claim 7 wherein said current conducting means comprises a plurality of triode switches, each having a pair of power electrodes coupled in series with the A.C. supply and a different one of said electrical elements, and each having a gate electrode, and means for applying said third set of signals to the gate electrodes of various ones of said triode switches to cause said various switches to conduct current between their respective power electrodes.

9. A circuit for controlling the sequence and pattern of activation of a plurality of lamps by an A.C. supply comprising means coupled to the lamps for enabling activation of selected ones thereof in response to successively received sets of signals, said enabling means being operable to enable activation of lamps only during every other half cycle of the A.C. supply output, storage means, means for causing the storage means to successively change its contents, said causing means being operable only during half cycles of the A.C. supply output opposite said every other half cycles, and means coupled to said storage means for producing said sets of signals, the sets of signals produced being determined by the contents of the storage means.

10. A circuit as in claim 9 wherein said enabling means comprises a plurality of unilateral triode switches, each coupled to a different one of said lamps and each responsive to a different signal in each set of signals.

11. A circuit as in claim 9 wherein said storage means comprises a shift register.

12. A circuit as in claim 9 wherein said causing means comprises a clock means for producing a sequence of clock pulses, and a clamping circuit coupled between the clock means and the storage means and responsive to the A.C. supply for applying the clock pulses to the storage means only during half cycles of the A.C. supply output opposite said every other half cycles, said storage means being adapted to change its contents in response to received clock pulses.

13. A circuit as in claim 12 wherein said clock means includes adjustable means for varying the pulse rate of the clock pulses produced by the clock means.

14. A circuit as in claim 9 wherein said producing means comprises a translator for generating said sets of signals and for generating additional sets of signals which are a function of the contents of said storage means, and wherein said storage means is adapted to alter its contents in response to said additional sets of signals.