US3821599A

US3821599A - Transistor control apparatus

Info

Publication number: US3821599A
Application number: US00313273A
Authority: US
Inventors: E Peters
Original assignee: Owens Illinois Inc
Current assignee: Techneglas LLC
Priority date: 1972-12-08
Filing date: 1972-12-08
Publication date: 1974-06-28
Anticipated expiration: 1991-06-28

Abstract

There is disclosed a system utilizing transistor control apparatus for supplying operating potentials which is particularly useful with load devices wherein at least two transversely oriented conductors are dielectrically isolated from a gaseous discharge medium between the conductors. The invention is illustrated in wave form generators, each having at least one output transistor. Novel transformer-diode clamping means are provided to automatically sense saturation of an output transistor and to reverse bias the collector-base junctions of the output transistors, to bring deeply saturated transistors out of saturation and enable them to turn off much more rapidly than was possible heretofore. The system shown thus produces a more effective wave form having steeper leading and trailing edges, the wave form in the embodiment shown being used as a sustaining voltage for cells in a gas discharge display/memory panel.

Description

United States Patent [191 Peters [11'] 3,821,599 [451 June 28, 1974 1 TRANSISTOR CONTROL APPARATUS [75] Inventor: Edwin F. Peters, Maumee, Ohio [73] Assignee: Owens-Illinois, Inc., Toledo, Ohio [22] Filed: Dec. 8, 1972 [21] App]. No: 313,273

Primary Examiner-Nathan Kaufman Attorney, Agent, or FirmE. J. Holler; Donald Keith Wedding 57 2 ABSTRACT There is disclosed a system utilizing transistor control apparatus for supplying operating potentials which is particularly useful with load devices wherein at least two transversely oriented conductors are dielectrically isolated from a gaseous discharge medium between the conductors The invention is illustrated in wave form generators, each having at least one output transistor. Novel transformer-diode clamping means are provided to automatically sense saturation of an output transistor and to reverse bias the collector-base junctions of the output transistors, to bring deeply saturated transistors out of saturation and enable them to turn off much more rapidly than was possible heretofore. The system shown thus produces a more effective wave form having steeper leading and trailing edges, the wave form in the embodiment shown being used as a sustaining voltage for cells in a gas discharge display/memory panel.

18 Claims, 3 Drawing Figures wit 1 TRANSISTOR CONTROL APPARATUS BACKGROUND OF THE INVENTION In the Baker, et al. US. Pat. No. 3,449,167, issued Mar. 3, 1970, there is disclosed a multiple discharge display and/or memory panel which may be characterized as being of the pulsing discharge type having a gaseous medium, usually a mixture of two gases at a relatively high gas pressure, in a thin gas chamber or space between opposed dielectric charge storage members which are backed by conductor arrays. The conductor arrays backing each dielectric member are transversely oriented to define or locate a plurality of discrete discharge volumes or sites and constitute a discrete discharge unit. In some cases, the discharge units may be additionally defined 'by physical structures such as preforated glass plates and the like and in other cases capillary tubes and like structures may be used. In the above-identified patent application of Baker, et al., physical barriers and isolation members for discrete discharge sites have been eliminated. In such devices charges (electrons and ions) produced upon ionization of the gas at a selected discharge site or conductor crosspoint, when proper operating potentials are applied to selected conductors thereof, are stored upon the surfaces of the dielectric at the selected locations or sites and constitute an electrical field opposing the electrical field which created them. After a firing potential has been applied to initiate a discharge, the elec trical field created by the charges stored upon the dielectric members aids in initiating subsequent momentary or pulsing discharges on succeeding half-cycles of an applied sustaining potential so that the applied potential, and hence the storage charges indicate the previous discharge condition of a discharge unit or site and can constitute an electrical memory.

In dynamic operation, in addition to the sustaining voltages, writing and erasing pulses may be superimposed on and algebraically added to the sustaining wave forms applied to selected transverse conductor pairs in the conductor arrays to manipulate discharge conditions of discharge sites. Some of the preferred types of circuits for supplying the sustaining potentials, and for generating the manipulating pulses to be added to the sustaining potentials, utilize output transistors which are driven into deep saturation to abruptly switch the wave form from one potential level to another. Difficulties have been encountered in the past, in that when a transistor is turned on and driven into deep saturation, it is difficult to bring the transistor out of saturation and turn it .off quickly. This makes control of the shape of the trailing edge of the wave form difficult, may interfere with the addition of manipulating pulses, may make a manipulating pulse have an effective width that is too narrow, etc., and is undesirable. Diode clamping circuits have been proposed and are useful in certain applications for bringing transistors out of saturation within the time limits of those previous systems. However, as the switching speeds increase and as the type of wave forms applied as sustaining potentials and as manipulating pulses become more complex, the diode clamping circuit is not suitable for all applications.

Accordingly, it is an object of this invention toprovide an improved transformer-diode clamping means, which is particularly useful in providingimproved systems for supplying operating potentials to load devices,

2 and even further particularly useful wherein the load devices are of the gas discharge display/memory type.

SUMMARY OF THE INVENTION The invention is disclosed and described herein in a system for supplying operating potentials to a gas discharge display/memory device of the type described hereibefore. A wave form generating means is shown which includes at least two sections, a first of the sections being operative to connect a first potential level to the output of the generator, while a second of the sections is operative to connect a second potential level to the output, the output being connected to conductors in the array of the gas discharge device.

Each of the output sections includes at least one output transistor means operating as a switching means between its respective potential level and the output of the wave form generating means Each of the transistors has a collector, base and emitter electrode and a collector-base junction.

Means are provided for selectively applying turn-on or driving signals to the base electrodes of the output transistor means, the signals being sufficient in magnitude to drive the output transistor into saturation. Means are shown wherein the circuit may be selfsensing in that the circuit may be responsive to the saturation of the transistor for enabling reverse biasing of the collector-base junction.

The reverse bias establishing means for the output transistors includes a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting a reverse bias source to the primary winding of the transformer.

Thereare different embodiments of the reverse bias establishing means disclosed herein, each useful in a particular application. The reverse bias establishing means may be generically described as having secondary winding means of the transformer means connected in a circuit with the collector-base junction to enable current from secondary winding means to flow through the collector-base junction in a reverse bias direction. The isolating rectifier means may be generically described as'connected in a circuit between the collector and base electrodes which includes at least one of the primary and secondary winding means of the transformer means to'prevent current flow between the collector and base electrodes through the winding means in response to potential differences between the collector and base electrodes which establish a forward bias on the collector-base junction. The primary winding means of the transformer means may be generically desscribed as connected to receive current from a reverse bias source, which may be derived from the turnon or driving source for the transistor, and which will induce a potential on the secondary winding means connected in circuit with the collector-base junction to cause current flow through the collector-base junction in a direction to reverse bias the collector-base junction and discharge the minority carriers from the junction if saturated to enable the transistor to turn off quickly.

Specifically, in the embodiments of the transformerdiode clamping means disclosed herein, the secondary winding is connected in a circuit with the collectorbase junction to enable current from the secondary winding to flow through the collector-base junction in reverse bias direction. The primary winding is connected in a circuit to receive current from the reverse bias source which will induce a potential on the secondary winding to cause current flow through the collector-base junction to discharge minority carriers from the junction, if saturated, to enable the transistor means to turn off quickly. The primary winding circuit is connected to be responsive to the potential of the collector electrode whereby current flow through the primary winding is prevented as long as an isolating rectifier connected in series with the primary winding is reverse biased by the collector potential. The isolating rectifier means is interposed between at least one of the secondary and primary winding means and the collector electrode, thus preventing current flow from the windings to one of the collector and base electrodes in response to potential differences between the collector and base which establish a forward bias on the collector-base junction, thereby reflecting a high impedance to the other of the windings and preventing current flow therethrough in response to the application of a turn-on signal to the base electrode.

Thus, in the embodiments herein, the seocndary winding is connected between the collector and base electrodes through an isolating rectifier means, while the primary winding is also connected between the collector and base electrode through an isolating rectifier means and a bias resistance.

In a first of the specific embodiments disclosed herein a separate turn-on source is utilized to provide a driving turn-on signal to the output power transistor, while a separate reverse bias source is provided for driving the primary winding of the transformer. In this first embodiment the reverse bias source is connected to the primary winding by a circuit which includes second and third transistors, and second transistor being responsive to a tum-off signal to enable the third transistor to connect a reverse bias source to supply driving current to the primary winding. A feedback means is responsive to the driving current supplied to the primary winding for regulating the output of the second transistor means. When the end of the primary winding which is receiving driving current from the reverse bias source is connected to the base electrode through a base resistance, the feedback means may maintain the first-mentioned power output transistor means near saturation as the current flow through the collectoremitter circuit thereof varies and thus also varies the current flow through the secondary winding connected to the collector electrode of the first-mentioned transistor means. The feedback means may include a unidirectional current device connected between a junction, of an output electrode of the third transistor and said one end of the primary winding, and an output electrode of the second transistor.

In a second specific embodiment disclosed herein, a turn-on source for driving the transistor is connected to he junction of the bias resistance and the primary winding. The reverse bias source for driving the primary winding is thus derived from the driving signal to the base electrode. Flow of the driving current through the primary winding is prevented, however, until the rectifier isolating the primary winding from the collector electrode of the output power transistor senses saturation of the output power transistor thus enabling the isolating rectifier to become biased in a forward direction and enable current to flow through the primary winding.

Other objects, features, and advantages will become apparent from the following description when taken in conjunction with the accompanying drawings, in which:

FIG. 1 is a diagrammatic layout of a system for supplying sustaining voltage for a gaseous discharge display/memory panel;

FIG. 2 is a schematic diagram of a circuit embodying the teachings of this invention for supplying sustaining voltage to the row conductors of the panel; and

FIG. 3 is a schematic diagram of a circuit illustrating further teachings of this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The gaseous discharge display/memory device, as fully disclosed in the hereinbefore referenced Baker, et al. US. Pat. No. 3,499,167, and indicated generally at 20 in FIG. 1, utilizes a pair of dielectric films separated by a thin layer of a gaseous discharge medium, the medium producing a copious supply of charges (ions and electrons) which are alternately collectable on the surfaces of the dielectric members at opposed or facing elemental or discrete areas defined by the conductor matrix on non-gas-contacting sides of the dielectric members, each dielectric member presenting alarge open surface area and a plurality of pairs of elemental or discrete areas. While the electrically operative structural members such as the dielectric members and the conductor matrixes l3 and 14 are all relatively thin they are formed on and supported by rigid nonconductive support members 16 and 17, respectively, as diagrammatically shown in FIG. 1.

Typically, one or both of nonconductive support members 16 and 17 pass light produced by discharge in the elemental gas volumes. Usually, they are transparent glass members and these members essentially define the overall thickness and strength of the panel. For example, the thickness of gas layer 12, as determined by a spacer is usually under 10 mils and typically about 4 to 6 mils, the dielectric layers (over the conductors at the elemental or discret areas) are usually between 1 and 2 mils thick; and conductors 13 and 14 about 8,000 angstroms thick. However, support members 16 and 17 are much thicker (particularly in large panels) so as to provide as much ruggedness as may be desired to compensate for stresses in the panel 20. Support members 16 and 17 also serve as heat sinks for heat generated by discharges and thus minimize the ef fect of temperature on operation of the device. If it is desired that only the memory function be utilized, then none of the members need be transparent to light.

Except for being nonconductive or good insulators the electrical properties of support members 16 and 17 are not critical. The main function of support members 16 and 17 is to provide mechanical support and strength for the entire panel, particularly with respect to pressure differential acting on the panel and thermal shock. As noted earlier, they should have thermal expansion characteristics substantially matching the thermal expansion characteristics of the dielectric layers. Ordinary A inch commercial grade soda lime plate glasses have been used for this purpose. Other glasses such as low expansion glasses or transparent devitrified glasses .can be used provided they can withstand processing and have expansion characteristics substantially matching expansion characteristics of the dielectric coatings. For given pressure differentials and thickness of plates, the stress and deflection of plates may be determined by following standard stress and strain formulas (see R. J. Roark, Formulas for Stress and Strain, MeGraw-Hill, 1954).

The spacers may be made of the same glass material as dielectric films and may be an integral rib or ribs formed around the outside of the area in which the gas is to be confined and on one of the dielectric members, and fused to the other member to form a bakeable hermetic seal enclosing and confining the ionizable gas volume. However, a separate, outer final hermetic seal may be effected by a high strength devitrified glass sealant, if desired. Tubulation is provided for exhausting the space between the dielectric members and filling that space with the volume of ionizable gas. For large panels small bead-like solder glass spacers may be located between conductor intersections and fused to the dielectric member to aid in withstanding stress on the panel and maintain uniformity of thickness of gas volume.

Conductor arrays 13 and 14 may be formed on support members 116 and 17 by a number of well-known processes, such as photoetching, vacuum deposition, stencil screening, etc. In one embodiment, the centerto-center'spacing of conductors in the respective arrays is about 17 mils. Transparent or semitransparent conductive material such as tin oxide, gold or aluminum can be used to form the conductor arrays and should have a resistance less than about 1,000 ohms per linear inch of conductor line, usually less than about 50 ohms per inch. Narrow opaque electrodes may alternately be used so that discharge light passes around the edges of the electrodes to the viewer. It is important to select a conductor material that is not attacked during processing by the dielectric material.

It will be appreciated that conductor arrays 13 and 14 may be wires or filaments of copper, gold, silver or aluminum or any other conductive metal or material. For example, 1 mil wire filaments are commercially available and may be used in the invention. However, formed in situ conductor arrays are preferred since they may be more easily and uniformly placed on and adhered to the support plates 16 and 17.

The dielectric layer members are formed of an inorganic material and are preferably formed in situ as an adherent film or coating which is not chemically or physically effected during bake-out of the panel. One such material is a solder glass such as Kimble SG-68 manufactured by and commercially available from the assignee of the present invention.

This glass has thermal expansion characteristics substantially matching the thermal expansion characteristics of certain soda-lime glasses, and can be used as the dielectric layer when the support members 16 and 17 are soda-lime glass plates. The dielectric layers must be smooth and have a dielectric strength of about 1,000 volts per mil and be electrically homogeneous on a microscopic scale (e.g., no cracks, bubbles, crystals, dirt, surface films, etc.) In addition, the surfaces of the dielectric layers should be good photoemitters of electrons in a baked out condition. Alternatively, the dielectric layers may be overcoated with materials designed to produce good electron emission, as in U.S. Letters Pat. No. 3,634,719, issued to Roger E. Emsthausen. Of course, for an optical display at least one of the dielectric layers should pass light generated on discharge and be transparent or translucent and, preferably, both layers are optically transparent.

The preferred spacing between surfaces of the dielectric films is about 4 to 6 mils with conductor arrays 13 and 14 having center-to-center spacing of about 17 mils.

The ends of conductors 14-1 14-4 and support member 17 extend beyond the enclosed gas volume and are exposed for the purpose of making electrical connection to interface and addressing circuitry indicated generally at 19. Likewise, the ends of conductors 13-11 13-4 on support member 16 extend beyond the enclosed gas volume and are exposed for the purpose of making electrical connection to interface and ad dressing circuitry 119.

As described in detail in the Baker, et al. U.S. Pat. No. 3,499,167, the entire gas volume can be initially conditioned for subsequent operation at substantially uniform firing potentials by the use of internal or external radiation to supply free electrons throughout the gas medium.

Normal operation of a panel of the type described herein will be described with reference to FIG. 1. Potentials having the wave forms and as shown in FIG. 1 are supplied from row and column sustainer circuit generators 80, 1110 via row and column pulsing and addressing circuits 1100, to conductor arrays 14, 13 in response to control pulses from :row and

column sections

72, 74 respectively of the logic control circuit 70. The resultant or composite potential wave form appearing across each cell is indicated at 1140 in FIG. 4 as a periodic wave form of an alternating character. The wave form is derived for the purpose of analysis of the operation of the panel by assuming that the wave forms 90 and 120 are spaced apart or are oppositely phased within the cycles of the periodic composite wave form 140, and that the wave form 120 is subtracted from the wave form 90.

In the examples set forth in FIG. 1, the wave form 90 is a square wave with a duration of less than one-half of the cycle defined by the composite wave form 140 and with a magnitude of +Vcc. Thus, more than 180 of the cycle of the composite wave form 140 elapses between occurrences. The wave form 120 is a square wave with a duration of less than one-half of the cycle defined by the composite wave form 1140, and with a magnitude of +Vcc, since the sustainer 1110 may be identical to the sustainer 80. The logic inputs to the sustainers 80 and 11.0 are phased 180 apart with respect to the cycle of wave form 1140. Therefore, the positive wave 120 is produced when the positive wave 90 is not being produced. When the positive wave form 1120 is subtracted from the positive wave form 90, the wave form 1120 appears to be negative in the composite wave form 140. Thus the composite wave form shown in the inset in FIG. 1 is the voltage wave form applied to the gas, the subtraction function being perfonned since the two voltage wave forms 90 and 120 are applied to opposite conductors with the portion of the wave form labeled 90 being due to the output from row sustainer circuit 80 and the portion labeled 120 being due to the output from the column sustainer circuit 110.

The voltage 9% from sustainer 80 constitutes approximately one-half of the sustaining voltage necessary to operate the panel, the remaining one-half which is necessary being supplied by voltage 120 phased 180 as noted above with respect to the voltage 90. Thus, onehalf of the sustainer potential 140 is applied to each of the row conductors l4 and one-half of the sustainer potential 140 is applied to each of the column conductors 13. The

sustainer circuits

80 and 110 advantageously have a common ground so that the panel 10 floats with respect to ground.

Individual cells or discharge sites located by the crossing of selected conductors or conductor arrays l4, 13 are manipulated by adding unidirectional voltage pulses at the proper time to each of the sustaining voltages on the selected conductors, which, when combined, are sufficient to exceed the firing potential for the selected cells and to initiate a sequence of discharges, one for each half-cycle of the applied composite sustaining potential 140. By also properly timing such unidirectional voltage pulses and applying them at a different portion in a cycle of the composite sustaining potential l40 to each of the sustaining voltages on the selected conductors, the sequence of discharges may be terminated. Thus, any individual discharge site may be manipulated ON or OFF, by manipulation of the times of occurrences of the unidirectional voltage pulses.

The unidirectional voltage pulses are added to the

sustainer voltages

90, 120 on the selected conductors by the row and column pulsing and addressing

circuits

100, 130 in response to logic signals from the logic control circuit 70 via leads 72-1 through 72-4 and 74-1 through 74-4, respectively, to select the conductor pairs for the individual cells.

It will be noted that between the positive half-cycles 90 and the negative half-cycles 120 of the composite wave form 140 there are provided plateaus at the apparent zero voltage level indicating a brief time interval between the cessation of the generation of one-half cycle of the wave form 140 and the initiation of the other half-cycle of the wave form 140. These plateaus may be provided to reduce interference between operation of various circuits for reasons that need not be detailed here.

However, the plateaus provide an opportunity to discuss what happens as the composite sustaining voltage 140 periodically alternates between the opposite polarities derived by subtracting the wave form 120 from the wave form 90. As the wave form 140 goes from the negative level of the subtracted wave form 120 to the zero level, a cell displacement current flow occurs and causes a positive current spike. As the wave form 140 goes from the zero level to its positive level 90, a

.-second cell displacement" current flow occurs and causes a second positive current spike.

Similarly, as the wave form 140 goes from the positive level 90 to the zero level, a negative displacement current spike is produced. As the wave form 140 goes from zero to the negative level of the subtracted wave form 120 a second negative displacement current spike occurs.

If separation plateaus are not provided then the spikes would occur at substantially the same time and a single resultant larger displacement current spike would occur when the composite wave form 140 reverses polarity.

If the cell in question has been manipulated to an ON condition as hereinbefore described, then the cell will discharge when the difference between the wall voltage built up from a previous discharge and the sustainer potential exceeds the firing potential necessary to discharge the cell. There then occurs a cell discharge current flow.

It is desirable that the cell not see any appreciable voltage change in the sustainer wave form during the discharge period, since this may interfere with the transfer of wall charge during the discharge, so that subsequent discharges every half-cycle of the sustainer wave form will continue to occur in a manner to maintain the cell ON in the condition required.

Row and column sustainer circuits 80, are advantageously constructed using power transistors as output devices. It is desirable to be able to turn the power transistors ON and OFF as quickly as possible so that the transition slope in the wave form controlled by the power transistors is as steep as possible. To turn a power transistor ON quickly it is necessary to drive it with a comparatively large current pulse which will drive the transistor into deep saturation. The further the transistor is driven into saturation the smaller the internal resistance will be to the power output circuit it is controlling. If driven sufficiently far into saturation the displacement and discharge currents may flow freely through the transistor and there will be very little voltage drop across the transistor during the time the cell is discharging. Therefore, the voltage drop across the transistor will be very small during the discharge cycle of the cell, will make very little change as a subtraction to the composite sustainer wave form, and will not appreciably effect the transfer of wall charges during the discharge cycle of a cell.

Difficulties have been encountered, however, in that when the transistor is driven into deep saturation to reduce the wave form alteration resulting from displacement and discharge current flow to and below a desired level, it takes a longer time to turn the transistor OFF. This decreases the slope of the wave form being produced and may delay or slow a voltage transition to a point which will interfere with proper panel operation. Furthermore, a power loss is associated with slow tum-off. The circuits of this invention provide increased efficiency and reliability by preventing unnecessary component heating.

A diode clamping network has been used in the past to overcome the above-discussed problem. In one embodiment a single diode is connected to conduct in a forward direction from a clamping bias junction to the collector electrode of a power transistor connected to a voltage being controlled. Two diodes in series are connected to conduct in a forward direction from the clamping bias junction to the base electrode of the transistor toward deep saturation, changing the configuration of the wave form being controlled and permitting the free flow therethrough of the displacement current and discharge current, if any, from the panel being controlled. Since the transistor is going toward deep saturation the resistance offered thereby to the discharge" current results only in a voltage change in the composite sustaining wave form which is below a level which would significantly interfere with the transfer on the wall charges in any cells in the panel which are ON.

If, in the embodiment of the diode clamping circuit being discussed, the collector electrode is connected to an output voltage source being controlled, when the flow of displacement" and discharge current ceases there is no load on the transistor and if the transistor is still being driven hard, then deep saturation will occur because the collector voltage is lower than the base voltage.

To keep the transistor out of deep saturation the collector voltage is kept just above the base voltage by the diode clamping circuit. The diode between the collector and the clamping bias junction is requiredto isolate the voltage wave form being controlled from the base of the transistor. If the transistor requires a V voltage drop across the base-emitter junction (and the resistor connecting the base and emitter electrodes) to turn it on then the isolating diode means is selected to have a voltage drop in the forward direction in response to current flow through the clamping bias junction which is less than the voltage drop in the forward direction of the serially connected base diode means plus the voltage drop across the base-emitter resistor in response to current flow through the clamping bias junction.

Thus, if the isolating diode and any resistance associated therewith has a voltage drop thereacross which is less than the clamping bias voltage necessary at the clamping bias junction to keep the transistor on, then the collector voltage is equal to the clamping bias voltage minus the isolating diode voltage drop and is therefore larger than the base voltage. The transistor is kept out of saturation and turns off when the drive pulse is removed and stops conducting relatively quickly.

The clamping bias voltage is preferably applied to the clamping bias junction at the same time that the drive pulse is removed from the base of the transistor.

While the just-described diode clamping circuit has worked well in some applications, it is desirable to be able to turn the power transistor off even more quickly in certain applications. It is also desirable to be able to use power transistors which have longer storage times (the length of time a transistor stays in saturation without a driving potential applied) since the longer storage time transistors are less expensive. It is further desirable to be able to saturate the power transistor as much as possible, without interfering with the ability to turn the transistor off quickly, to reduce the internal resistance even further than reduced with the diode clamping circuit, so that the voltage drop across the transistor during flow of cell discharge current is as low as possible.

Referring now to FIG. 2 there is illustrated in more detail a schematic diagram of a circuit which may be used as the sustainer wave form generator 80 to produce the wave form 90 as shown in FIG. 1. As noted hereinbefore, an identical circuit may be used to produce the wave form R20.

The upper half of the circuits in FIGS. 2 and 3 is not illustrated in detail since one of the embodiments shown herein, or one of my other embodiments of a transformer-diode clamping circuit disclosed in my concurrently filed and copending application illustrating improvements enabling use of the teachings of this invention in other systems, may be used. In order to understand the operation of this invention, there is included hereinafter a description of the operation of an embodiment which is suitable for use as the upper switching circuits 84).

In operation of the upper switching section, a short duration pull-up turn-on pulse is applied to the base of a first switching transistor from the logic control via the lead MUN (See FIG. 1) to turn an output power transistor of the upper switching section on. The driving pulse induced in the secondary of an isolating transformer (not shown but connected as shown for transformer T1 in FIG. 2) is of sufficient magnitude to drive the output power transistor (not shown but which may be the same as output power transistor Q2 of FIGS. 2 and 3) very hard to bring the output terminal 92 to the voltage level +Vcc as indicated in FIG. 2, and also leaves the output power transistor of the upper switching section saturated. Any time after the panel displacement and discharge current flow is, for the most part, over a pull-up turnoff pulse is applied to the'upper switching section via the lead 74UF from the logic circuit 70 (FIG. I). This pulse causes the switching transistor (not shown) in the upper switching section to conduct, which, in turn, causes a further switching transistor (not shown) to conduct and provide a current flow in the primary winding of a transformer of a transformer-diode clamping circuit. Current flow is induced in the secondary winding of the clamping circuit transformer causing a potential to be provided between the collector and the base of the output switching transistor which is higher at the collector than at the base. The minority carriers of the saturated collector-base junction of the output power transistor of the upper switching section are discharged through a diode connected in series with the secondary winding of the clamping transformer. The transformer-diode circuit just described turns the output power transistor off very quickly allowing negative panel-address pulses to also be applied quickly to the sustainer wave form 90, which is a requirement in some addressing circuit schemes or techniques.

The circuit illustrated in FIG. 2 will now be described, it being appreciated that the circuit of FIG. 2 may, as indicated earlier herein, be used as the upper switching section 80. Thus, in FIG. 1, the row sustainer circuit is constituted by upper and lower switching sections as shown in FIG. or FIG. 3 and the column sustainer circuit is constituted by corresponding upper and lower switching sections. When the voltage is to be dropped at the output terminal 92 from the level of the potential Vcc to ground or zero as illustrated in FIG. 1, a short duration pull-down turn-on pulse is applied to the terminal 86T connected to the base of the transistor Q1 by suitable means via the lead 74DN from the logic circuit 70. This turns the transistor Oil on allowing conduction of driving current from a tum-on source VdcZ through its emitercollector circuit thereby also turning the output transistor Q2 on. The driving current is sufficiently large to turn the output power transistor Q2 on very quickly, deeply saturating the transistor. This quickly reduces the voltage at the terminal 92 to ground level providing the zero output from the sustainer circuit 80 as noted in FIG. 1.

Any time after panel displacement and discharge current flow through the transistor O2 is, for the most part, over a pull-down tum-off pulse may be applied to terminal 8ST connected to the base of the transistor Q3 via the lead 74DF from the logic circuit 70. The transistor Q3 conducts causing the transistor O4 to conduct and allow current flow from the reverse bias source +Vdc1 through the primary winding of the clamping circuit transformer T1 through the isolating rectifier D1 and the collector-emitter circuit of the now saturated transistor Q2. A potential is then induced on and current flow occurs from the secondary winding of the clamping circuit transformer T1 which is connected between the collector and the base electrodes of the power transistor Q2. The developed potential allows current to flow from the secondary winding through the isolating diode D2, the saturated collector-base junction of the power transistor Q2, and back to the secondary winding of the clamping circuit transformer T1, discharging the minority carriers from the saturated collector-base junction and turning off the power transistor Q2 very quickly.

It shoul be noted that there will be no significant current flow through the primary winding of the clamping circuit transformer T1 from the driving pulses for the transistor Q2 and no significant current flow through the secondary winding of the transformer Tl, if there is a potential on the collector of the transistor Q2 which reverse biases the dioded D1 and D2.

The operation of the circuit of FIG. 2 has been described to this point as if the feedback diode Df was not connected in the circuit between the primary winding of the transformer T1 and the output emitter of the transistor 03.

Assume now that the diode Df is in the circuit as shown. The operation of the circuit is still the same until the collector-base junction of the transistor Q2 has recovered from saturation and becomes a high impedance to the passage of current from the primary winding and the secondary winding of the transformer Tl, indicating that the transistor O2 is out of saturation.

This higher impedance to current flow from the primary winding and the reflected higher impedance from the secondary will cause the voltage across the primary to increase. A bias current will then flow from the junction of the output collector of Q3 and one end of the primary winding through the resistor Rb which is sufficient to maintain the loading of the transistor Q2 near the saturation level.

The increased voltage across the primary winding of the transformer T] will also forward bias the feedback diode Df and provide a negative feedback to the output emitter of the transistor Q3. The negative feedback will control the action of the transistor Q4 causing it to conduct only enough to maintain a voltage across the primary winding that will match the input to the transistor Q2, if that input is less than the reverse bias source Vdcl. (Such a smaller input signal to O3 is desirable, since only low voltage level logic circuits need be used as input with the inherent advantages attendant therewith.) The circuit utilizing the feedback diode Df and bias resistor Rb thus provides automatic control of drive current to match the load presented by the collector-base junction of the transistor Q2.

If the bias resistor Rb is omitted from the circuit and the primary winding is not connected to the base of transistor Q2 then the circuit, including the components Q3, Q4, and T1, serves only to turn the transistor Q2 off. However, the diode Df would still function in the same manner to control the amount of driving current supplied in the primary winding of the transformer Tl.

Referring now to FIG. 3, there is illustrated another embodiment of the teachings of this invention which is particularly useful in connecting a load device to ground or zero potential.

When the voltage is to be dropped at the output terminal 92 in FIG. 3 from the level of the potential Vcc to ground or zero, a short duration pull-down turn-on pulse is applied to the terminal 86T connected to the base of the transistor Q1 by suitable means from the lead 74DN from the logic circuit 70. This turns the transistor Q1 on allowing conduction through its emitter-collector circuit and application of a driving pulse to the base-emitter circuit of the power transistor Q2 turning it on very quickly and deeply saturating the transistor. This reduces the voltage at the terminal 92 to ground level providing the zero output from the sustainer circuit 80.

When the transistor O2 is deeply saturated and the panel displacement and discharge current flow through the transistor O2 is over, for the most part, there will be very little voltage drop across the collector-emitter circuit of the transistor Q2, both because the internal resistance has been reduced by the hard driving pulse, and because there is little or no current flow, since terminal 92 is now effectively connected to ground, through the internal resistance to cause a voltage drop. Therefore, when the voltage drop across Q2 falls below the value necessary to reverse bias the diode D1, then the diode D1 becomes forward biased and permits current flow, from the voltage drop across Rb derived from the drive current, through the primary winding of the clamping circuit transformer T1.

Once current starts to flow through the primary winding of the transformer T1, the voltage induced on the secondary winding of the transformer T1 causes current flow through isolating diode D2 to the collector of the power transformer Q2, the saturated collectorbase junction of the power transistor Q2, and back to the other side of the secondary winding, discharging the minority carriers from the saturated collector-base junction, enabling the power transistor Q2 to turn off very quickly when the drive current is removed from the base thereof.

As is evident by examining FIG. 3, only one source is now required since the reverse bias source may be derived from the turn-on source, or vice versa. Therefore an extra source of supply and/or an extra set of connections to an additional source are not required.

The isolating rectifiers D1 and D2 are preferably interposed between the windings and the collector electrode of Q2, rather than on the other side of the windings so that the transfomer will not be directly connected to the output wave form.

It should be noted that logic leads 72DF and 74DF from the logic circuit to the sustainer circuits 80,

1 are not needed for the embodiment illustrated in FIG. 3. There is no need for a pull-down tum-off logic pulse when using the present invention, because of the automatic sensing and acting capabilities of the novel circuit of this invention. This circuit thus saves components and computer logic.

It should also be noted that a mirror image type modification of the circuit illustrated in FIGS. 2 and 3 may be constructed to produce negative pulse outputs 90 amd 120, rather than the positive pulses as shown.

It should also be noted that combinations of positive and negative sustainer wave form generator circuits may be used in certain applications.

There have thus been describedk and disclosed transformer-diode clamping circuits which may be used to turn output power transistors off after a very heavy turn-on drive pulse, enabling the power transistors to be turned off in a fraction of the normal storage time for such devices. This enables a sustainer performance to meet and match the very fast switching speed and high current requirements of newly developed display/- memory panels, as well as prior art panels. The very fast, high voltage, high current switching of the apparatus disclosed herein far outperforms the present prior art devices. The use of the transformer-diode clamp described herein also permits greater flexibility in unique logic address requirements and permits turning transistor Q2 off more quickly than other transformerdiode clamping circuits. The present invention may also be used to take advantage of gaseous mediums which are presently being tested and which exhibit much faster discharge times than past mediums.

What is claimed is:

1. In a system for supplying square wave sustaining potentials to transversely related conductor arrays in a capacitive load type gas discharge panel wherein each of the cross-points of said conductor arrays locates a discharge site in the panel, a high voltage direct current voltage source having a pair of output terminals, a first pair of normally open transistor switch means connected in series across said high voltage source and having a point intermediate said pair of switches connected to one of said conductor arrays, a second pair of normally open transistor switch means connected in series across said high voltage source and having a point intermediate said second pair of switches connected to the other one of said condcutor arrays, switch control means for controlling the alternate closing and opening of said pair of switch means at selected times such that said high voltage source is connected to said conductor arrays alternately, respectively, to supply charging current thereto and secondly to said point of reference potential common to said source to discharge said conductor arrays, respectively each of said switches in a pair of switches being consistuted by at least one switching transistor circuit and wherein said switch control means controls each transistor to control the time duration of each square wave potential, and a source of low level logic signal voltage and means connecting each said control circuit to receive said low level logic signal voltage from said source thereof, each switching transistor circuit including collector, base and emitter electrodes and a collector-base junction, the improvement comprising,

reverse bias circuit means for establishing current flow through said collector-base junction to reverse bias said junction and thereby enable said transistor means to turn off quickly, said reverse bias circuit means including a transformer having primary and secondary windings, isolating rectifier means, a reverse bias source and means for connecting said reverse bias source to said primary winding,

means connecting said isolating rectifier means between said collector and base electrodes to prevent current flow between said collector and base elec trodes through the windings of said isolating transformer in response to potential differences be tween said collector and base electrodes which forward bais said collector-base junction,

means connecting said secondary winding in said circuit with said collector-base junction to enable current from said secondary winding to flow through .said collector-base junction in a reverse direction;

and

means connecting the primary winding of said isolating transformer in circuit with said reverse bias source to receive current therefrom and induce a potential on said secondary winding to cause current flow through said collector-base junction to discharge the minority carriers from said junction if saturated to thereby enable said transistor switch to turn off quickly, said primary winding circuit being connected to be responsive to the potential of said collector electorde whereby current flow through said primary winding is prevented if said collector potential is greater than said reverse bias source potential.

2. A system as defined in claim 1 in which said isolating rectifier means is interposed between at least one of said winding means and said collector electrode, thus preventing current flow from said windings to one .of said collector and base electrodes in response to potential differences between said collector and base which establish a forward bias on said collector-base junction, thereby reflecting a high impedance to the other of said windings and preventing current flow therethrough in response to the application of a turn-on signal to said base electrode.

3. A system as defined in claim 1 in which a. said means for selectively applying turn-on signals includes a turn-on source and switching means responsive to a turn-on signal for connecting said turn-on source to said base electrode of said transistor means, and which further includes b. means for deriving one of said turn-on and reverse bias sources from the other, whereby requiring the provision of only one source for the control of said transistor.

4. Apparatus as defined in claim 1 which further includes means for connecting said primary winding in a circuit responsive to saturation of said transistor for enabling current flow in said primary winding.

5. Apparatus as defined in claim 4 in which said saturation responsive means includes means connecting said primary winding in a series circuit with said isolating rectifying means wherein said isolating rectifying means is reverse biased until saturation of said transistor means occurs.

6. Apparatus as defined in claim 1 in which said means for connecting a reverse bias source to said primary winding means includes switching means, interposed between the reverse bias source and primary winding means of said transformer means, which is responsive to a turn-off signal to connect said reverse bias source to said primary winding.

7. Apparatus as defined in claim 6 in which said switching means includes a. second transistor means responsive to a turn-off signal to supplying driving current to said primary winding means, and

b. feedback means responsive to the driving current required by said primary winding means for regulating the output of said second transistor means.

8. Apparatus as defined in claim 6 which further includes means for also connecting said primary winding means driving current to the base electrode of said first-mentioned transistor means, thereby enabling said feedback means to control the-driving of said firstmentioned transistor means to maintain the firstmentioned transistor means near saturation as current flow through the collector emitter circuit thereof varres.

9. Apparatus as defined in claim 6 in which one end of said primary winding means and the side of the reverse bias switching means opposite from the reverse bias source is connected to said base electrode while the other end of said primary winding is connected in circuit with isolating rectifier means to said collector electrode.

10. Apparatus as defined in claim 1 in which a. a first switching means is interposed between a turn-on source and said base electrode and is responsive to a turn-on signal to connect said turn-on source to said base electrode,

b. a second switching means is interposed between said reverse bias source and said primary winding and is responsive to a tum-off signal to connect said reverse bias source to said primary winding.

11. Control apparatus, comprising a. transistor means having collector, base, and emitter electrodes and a collector-base junction;

b. means for connecting a turn-on source to provide a driving signal to said base electrode having a magnitude sufficient to drive said transistor into a saturated condition, and

c. a reverse bias establishing circuit means for establishing current flow through said collector-base junction of said transistor means to reverse bias said collector-base junction to enable said transistor to turn off quickly;

d. said reverse bias establishing circuit means including a transformer having primary and secondary windings, isolating rectifier means, a reverse bias voltage source, and means for connecting said reverse bias source to one end of said primary winding, means connecting the other end of said primary winding to said collector electrode;

e. said secondary winding being connected across said collector-base junction, current flow in said primary winding from said reverse bias source incuding a potential on said secondary winding to cause current flow therefrom through said collector-base junction in a reverse direction;

f. said isolating rectifier means being connected to prevent current flow through said primary and secondary windings in response to potential differences between said collector and base electrodes which establish a forard bias on said collector-base junction.

12. Apparatus as defined in claim ill in which said one end of said primary winding is connected to said collector electrode.

13. Apparatus as defined in claim 12 which further includes bias resistance means connected between said one end of said primary winding and said base electrode.

14. Apparatus as defined in claim 13 which further includes means for deriving said reverse bias source from said driving signal to said base electrode.

15. Apparatus as defined in claim E3 in which said means for connecting a reverse bias source to said primary winding includes second and third transistors, said second transistor being responsive to a turn-off signa] to enable said third transistor to connect a reverse bias source to supply driving current to said primary winding.

16. Apparatus as defined in claim 15 which further includes feedback means responsive to the driving current supplied to said primary winding for regulating the output of said second transistor means.

17. Apparatus as defined in claim 16 in which the end of said primary winding receiving driving current from said reverse bias source is also connected to said base electrode of said first-mentioned transistor means, thereby enabling said feedback means to maintain said first-mentioned transistor means near saturation as the current flow through the collector-emitter circuit varies and thus also varies the current flow through said secondary winding connected to the collector electrode of said first-mentioned transistor means.

18. Apparatus as defined in claim 16 in which said feedback means includes a unidirectional current device connected between a junction of an output electrode of said thrid transistor and said one end of said primary winding, and an output electrode of said second transistor.

Claims

1. In a system for supplying square wave sustaining potentials to transversely related conductor arrays in a capacitive load type gas discharge panel wherein each of the cross-points of said conductor arrays locates a discharge site in the panel, a high voltage direct current voltage source having a pair of output terminals, a first pair of normally open transistor switch means connected in series across said high voltage source and having a point intermediate said pair of switches connected to one of said conductor arrays, a second pair of normally open transistor switch means connected in series across said high voltage source and having a point intermediate said second pair of switches connected to the other one of said condcutor arrays, switch control means for controlling the alternate closing and opening of said pair of switch means at selected times such that said high voltage source is connected to said conductor arrays alternately, respectively, to supply charging current thereto and secondly to said point of reference potential common to said source to discharge said conductor arrays, respectively each of said switches in a pair of switches being consistuted by at least one switching transistor circuit and wherein said switch control means controls each transistor to control the time duration of each square wave potential, and a source of low level logic signal voltage and means connecting each said control circuit to receive said low level logic signal voltage from said source thereof, each switching transistor circuit including collector, base and emitter electrodes and a collector-base junction, the improvement comprising, reverse bias circuit means for establishing current flow through said collector-base junction to reverse bias said junction and thereby enable said transistor means to turn off quickly, said reverse bias circuit means including a transformer having primary and secondary windings, isolating rectifier means, a reverse bias source and means for connecting said reverse bias source to said primary winding, means connecting said isolating rectifier means between said collector and base electrodes to prevent current flow between said collector and base electrodes through the windings of said isolating transformer in response to potential differences between said collector and base electrodes which forward bais said collector-base junction, means connecting said secondary winding in said circuit with said collector-base junction to enable current from said secondary winding to flow through said collector-base junction in a reverse direction; and means connecting the primary winding of said isolating transformer in circuit with said reverse bias source to receive current therefrom and induce a potential on said secondary winDing to cause current flow through said collector-base junction to discharge the minority carriers from said junction if saturated to thereby enable said transistor switch to turn off quickly, said primary winding circuit being connected to be responsive to the potential of said collector electorde whereby current flow through said primary winding is prevented if said collector potential is greater than said reverse bias source potential.

2. A system as defined in claim 1 in which said isolating rectifier means is interposed between at least one of said winding means and said collector electrode, thus preventing current flow from said windings to one of said collector and base electrodes in response to potential differences between said collector and base which establish a forward bias on said collector-base junction, thereby reflecting a high impedance to the other of said windings and preventing current flow therethrough in response to the application of a turn-on signal to said base electrode.

7. Apparatus as defined in claim 6 in which said switching means includes a. second transistor means responsive to a turn-off signal to supplying driving current to said primary winding means, and b. feedback means responsive to the driving current required by said primary winding means for regulating the output of said second transistor means.

8. Apparatus as defined in claim 6 which further includes means for also connecting said primary winding means driving current to the base electrode of said first-mentioned transistor means, thereby enabling said feedback means to control the driving of said first-mentioned transistor means to maintain the first-mentioned transistor means near saturation as current flow through the collector emitter circuit thereof varies.

10. Apparatus as defined in claim 1 in which a. a first switching means is interposed between a turn-on source and said base electrode and is responsive to a turn-on signal to connect said turn-on source to said base electrode, b. a second switching means is interposed between said reverse bias source and said primary winding and is responsive to a turn-off signal to connect said reverse bias source to said primary winding.

11. Control apparatus, comprising a. transistor means having collector, base, and emitter electrodes and a collector-base junction; b. means for connecting a turn-on source to provide a driving signal to said base electrode having a magnitude sufficient to drive said transistor into a saturated condition, and c. a reverse bias establishing circuit means for establishing current flow through said collector-base junction of said transistor means to reverse bias said collector-base junction to enable said transistor to turn off quickly; d. said reverse bias establishing circuit means including a transformer having primary and secondary windings, isolating rectifier means, a reverse bias voltage source, and means for connecting said reverse bias source to one end of said primary winding, means connecting the other end of said primary winding to said collector electrode; e. said secondary winding being connected across said collector-base junction, current flow in said primary winding from said reverse bias source incuding a potential on said secondary winding to cause current flow therefrom through said collector-base junction in a reverse direction; f. said isolating rectifier means being connected to prevent current flow through said primary and secondary windings in response to potential differences between said collector and base electrodes which establish a forard bias on said collector-base junction.

12. Apparatus as defined in claim 11 in which said one end of said primary winding is connected to said collector electrode.

15. Apparatus as defined in claim 13 in which said means for connecting a reverse bias source to said primary winding includes second and third transistors, said second transistor being responsive to a turn-off signal to enable said third transistor to connect a reverse bias source to supply driving current to said primary winding.