US3816808A - Changing the frequency of a polyphase alternating current supply and apparatus therefor - Google Patents

Changing the frequency of a polyphase alternating current supply and apparatus therefor Download PDF

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Publication number
US3816808A
US3816808A US00290470A US29047072A US3816808A US 3816808 A US3816808 A US 3816808A US 00290470 A US00290470 A US 00290470A US 29047072 A US29047072 A US 29047072A US 3816808 A US3816808 A US 3816808A
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triacs
scr
supply
current
triggering
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US00290470A
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English (en)
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Villiers Enslin N De
J Chapman
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TIME MODULATION Ltd ZA Pty
TIME MODULATION Pty Ltd
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TIME MODULATION Pty Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/25—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M5/27—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means for conversion of frequency
    • H02M5/271—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means for conversion of frequency from a three phase input voltage

Definitions

  • Appl' 290470 are made available for triggering in a predetermined stepping sequence.
  • the current flow in the supply [30] Foreign Application Priority Data phases is monitored and when current zeros are de- 0m. 7, 1971 South Africa 71/6729 tected in the p y Phases the then available Set of SCRs or triacs are triggered. If desired, current zeros 52 us.
  • c1 321/61, 318/227, 318/231 can vbe induced in the p y p
  • H02m 5/30 pp to aha load is aaaarallabla y varying the rate 5 Field f Search 31 /227 231; 321/ 1 9 at which the sets of SCRs or triacs are made available 323 3 24 for triggering.
  • the effective voltage applied to the g load is also controllable by varying the time period be- 5 R f en i tween the detection of current zeros and the triggering Of the Sets Of SCR,S or triacs.
  • This invention relates to the changing of the frequency of a polyphase alternating current supply and to apparatus therefor.
  • it relates to a frequency changer suitable for use with synchronous and asynchronous alternating current motors.
  • a method of controlling the frequency of a polyphase alternating current supply applied to a polyphase load includes connecting'an SCR or Triac Matrix between each supply phase and each end of each load phase;
  • a frequency changer for controlling the frequency of a polyphase alternating current supply applied to a polyphase load which includes an SCR or Triac matrix connectable between each supply phase and'each end of each load phase;
  • monitoring means for detecting current zeros in the supply phases
  • the sets of SCRs or control means adapted to make selected sets of SCRs or triacs in the matrices available for triggering in a predetermined cyclic stepping sequence and the control means being responsive to the monitoring means to trigger the then available set of SCRs or triacs when current zeros are detected in the supply phases by the monitoring means.
  • the method may further include selectively inductv ing current zeros in the supply phases, commutation.
  • the frequency changer may thus include inhibiting means connectable in series with at least one of the supply phases and operable to induce current zeros in a particular supply phase.
  • the rate at which the sets of SCRs or triacs are made available for triggering in succession may be adjustably variable. In this manner the output frequency applied to the load can be varied.
  • the time period between the detection of the current zeros in the supply phases and the triggering of the then available set of SCRs or triacs may be controllably varied. This permits variation of the effective voltage applied to the load.
  • a delay unit may be provided intermediate the monitoring means and the control means for controllably delaying the time period between the detection of the current zeros and the triggering of the sets of SCRs or triacs. The delay unit may then be adjustably variable to permit variation of the said time period.
  • the sets of SCRs or triacs may be .made available for triggering in fixed steps of sixty e.g. by forced triacs may only be triggered in multiples of steps of 60 electrical degrees.
  • the control means may include a stepping unit e.g. in the form of a ring counter for making the sets of SCRs or triacs in the matrices successively available for triggering.
  • a stepping unit e.g. in the form of a ring counter for making the sets of SCRs or triacs in the matrices successively available for triggering.
  • a plurality of trigger circuits responsive to the control means may be provided for triggering the various sets of the SCRs or triacs.
  • the trigger circuits may be connected to the control means via a decoding matrix and a buffer amplifier provided intermediate the stepping unit and the trigger circuits.
  • FIG. 1 shows a phasor diagram of the relationship in time of the supply phases applied to the frequency changer in accordance with the invention
  • FIG. 2 shows a phasor diagram of the relationship in time of the derived phases emitted by the frequency changer in accordance with the invention
  • FIG. 3 shows a table indicating the steps in which the supply phases are stepped and applied to the windings A, B and C of a three phase motor;
  • FIG. 4 shows a schematic block diagram of a frequency changer in accordance with the invention
  • FIG. 5 shows a schematic circuit diagram of a master oscillator used in the frequency changer shown in FIG.
  • FIG. 6 shows a schematic circuit diagram of a stepping unit used for stepping the frequency changer shown in FIG. 4;
  • FIG. 7 shows a schematic circuit diagram of gating means used in the frequency changer shown in FIG. 4;
  • FIG. 8 shows a schematic circuit diagram of a decoding matrix and buffer amplifier circuit used in the frequency changer shown in FIG. 4;
  • FIG. 8a shows in table form the relationship between the inputs and outputs of the decoding matrix and buffer amplifier shown in FIG. 8;
  • FIG. 9 shows a schematic circuit diagram of portion of a trigger circuit used for controlling the SCRs or triacs in the frequency changer shown in FIG. 4;
  • FIG. 10 shows an SCR matrix used in the frequency changer shown in FIG. 4;
  • FIG. 11 shows a schematic circuit diagram of a current detector used for detecting current zeros in the Referring to FIG. 1, the three supply phases designated Red (R), Yellow (Y) and Blue (B) are shown. The phases are in the normal manner displaced by degrees in time fromone another.
  • the derived phases obtained from the frequency changer are shown as applied to the windings A, B and C of a motor.
  • Each derived phase is, as shown, available in steps of 60 electrical degrees relative to the supply phases.
  • FIG. 3 the various steps in whichthe derived phases are applied to the windings A, B and C of a motor are shown. In this system, six steps are possible at intervals of 60 electrical degrees. The six types of connections are'respectively referenced (i) to (vi).
  • the SCR or triac matrices are triggered so that the red and yellow phases are connected to winding A, the yellow and blue phases are connected to winding B, and the blue and red phases are connected to winding C;
  • the red and blue phases are connected to winding A, the yellow and red phases are connected to winding B; and the blue and yellow phases are connected to winding C, and so on.
  • the fourth, fifth and sixth steps are similar to the first, second and third steps respectively, except that the connections are reversed on each winding.
  • the red and yellow phases are-connected to winding A, in the direction of red to yellow
  • the fourth step the yellow and red phases are connected to winding A in.
  • FIG. 4 a block diagram of the frequency changer generally designated by a reference numeral is shown.
  • the frequency changer includes three SCR or triac matrices generally indicated by a reference numeral 12.
  • Matrix A is connected to both ends of winding A, matrix B to both ends of winging B and matrix C to both ends of winding C, of a three phase motor (not shown).
  • a matrix is connected between eachbad phase R, Y, and B of the supply 14 and each end 0 each load winding A, B and C of the motor.
  • the triggering of selected sets of SCRs or triacs in thematrices 12 is accomplished by a plurality of trigger circuits 16(which are more clearly shown in FIG.'9).
  • the control means includes gating means including AND gates 18 and a latch;20, both of which are shown in detail in FIG. 7.
  • the control means also includes a stepping unit in the form of a six stage ring counter 22 (details of which are shown in FIG. '6).
  • a decoding matrix and buffer amplifier circuit 24 (details of which are shown in FIG. 8) and a master oscillator 26 (details of which are shown in FIG. 5) are provided intermediate the ring counter 22 and the trigger circuits 16.
  • Monitoring means are provided in theform of three current detector circuits 28. Each of the supply phases R, Y and Bare connected in series with one of the three current detector circuits 28. Details of the current detectors are shown in FIG. 11. t i
  • the red and yellow phases are connected to the SCR or triac matrices 12 via inhibiting means in the form of forced commutation circuits 30. (details of which are shown in FIG. 13) for inducing forced commutation in these two supply phases.
  • the current detectors 28 control the latch and thus the gating means 18 via a logic detection unit and delay circuit 32 (details of which are shown in FIG. 12).
  • the logic detection unit 32.1 is in the form of an AND gate by means of which the outputs of the current detectors 28 are ANDED.
  • the delay circuit 32.2 is made adjustable in order that the period after which the latch 20 is unset when current zeros occur may be varied.
  • the operation of the frequency changer shown in FIG. 4 is as follows.
  • the master oscillator 26 emits pulses to the six stage ring counter 22.
  • selected sets of the trigger circuits 16 can be made operative via the decoding matrix and buffer amplifier circuit 24 so that selected sets of SCRs ortriacs in the matrices 12 are available for triggerin in the stepping sequence shown in FIG. 3.
  • the master oscillator 26 also emits pulses to the latch 20 to set it.
  • an inhibit gating pulse is applied to the AND gates 18 thereby preventing the triggering of the sets of SCRs or triacs in the matrices 12.
  • the latch20 is set, the gating signal applied to the preceding set of SCRs or triacs which were triggered while the latch 20 was unset, is also removed. I I
  • the SCRs or triacs corresponding to the sixth step will be triggeredand will remain ON until the line current in the supply phases goes to zero.
  • the latch 20 When the ring counter 22 is moved to its first step by a pulse from the master oscillator 26, the latch 20 is simultaneously set and the AND gates 18 are inhibited to prevent further sets of SCRs or triacs beingtriggered.
  • The'SCRs or triacs triggered on the 6th step may however still be ONprovided no natural current zeros have occurred in the interim period. If current zeros now occur and the delay provided by the delay unit 32.2 is such that the latch 20 is reset before the beginning of the second step, then the first set of SCRs or triacs will be triggered.
  • the latch 20 remins set. While the latch 20 is set, the previously triggered set of SCRs or triacs will remain triggered until current zeros occur when they will extinguish naturally. Successive sets of SCRs or triacs are prevented from being triggered by the latch 20 inhibiting AND gates 18. In the meantime, the ring counter 22 may have been stepped up to any one of its six steps. When current zeros do occur, the latch 20 is unset thereby causing another particularset of SCRs or triacs to be triggered, the particular set being dependent on which step the ring counter 22 is on.
  • selected sets of SCRs will be triggered in sequence in each cycle. For example, with a particular setting of the frequency of the master oscillator 26, in every cycle, the selected sets of SCRls or triacs of steps (i), (iii) and (v) may be triggered, the selected sets of SCRs or triacs of steps (ii), (iv) and (vi) being inoperative, that is these steps are skipped. As the frequency of the master oscillator 26 is increased, more steps in each cycle will be skipped and be inoperative.
  • variable delay circuit 32.2 By varying the delay in the variable delay circuit 32.2, in each cycle, the time period between the detection of the current zeros and the triggering of the then available set of SCRs or triacs can be varied. This permits adjustment of the effective voltage applied to the motor windings.
  • the latch 20 will remain in the inhibit mode between the first and second clock pulses, thus preventing any SCRs from firing.
  • the current will thus remain at zero, and reactivation of the commutation circuit 30 by the second clock pulse will have no effect.
  • the only effect the second clock pulse will have, is to move the ring counter 22 to its second position.
  • the delay unit 32.2 will emit a pulse. This pulse will then unset the latch 20, and result in the SCRs corresponding to position 2 of the ring counter 22 being fired. Current will then flow through the circuit as the commutation circuit 30 only blocks current flow for the duration of the clock pulse, until the third clock pulseactivates the commutation circuit 30 (forcing the currents to zero), resets the latch 20 to the inhibit mode, and moves the ring counter 22 to the third position. As the latch 20 is in the inhibit mode, the SCRs corresponding to the third position will not fire.
  • the delay unit 32.2 is set for a delay of one and a half periods, after the fourth clock pulse, the SCRs corresponding to the fourth position of the ring counter 22, will be tired, thus allowing current to flow. This current flow will be extinguished by the fifth clock pulse.
  • the delay unit 32.2 will emit a pulse prior to the sixth clock pulse.
  • the SCRs corresponding to the fifth position will therefore be fired, allowing current to flow in the circuits for a short period, till the advent of the sixth clock pulse, whereafter the current will be extinguished.
  • the master oscillator 26 is shown.
  • This circuit comprises a unijunction oscillator 26.1 and two transistor stages 26.2 and 26.3.
  • An output 26.4 is taken from the transistor stage 26.2 to the latch 20 of FIG. 4 and an output 26.5 is taken from the transistor stage 26.3 to the ring counter 22 and the forced commutation circuits 30 of FIG. 4.
  • the frequency of the master oscillator 26 is controlled by a variable resistor 26.6 and by a switch 26.7 which connects one of two difference capacitors 26.8 or 26.9 in circuit to control the frequency over a range from 0 to 300 Hz.
  • the ring counter 22 is shown which is made of standard integrated circuits. For every pulse applied from the oscillator 26 on an input line 22.], the ring counter is stepped up one position and its outputs 22.2 are successively operative.
  • the latch 20 and AND gates 18 are shown.
  • the latch 20 has an input 20.1 from the oscillator 26 to set it and an input 20.2 from the current detectors 28 via the summing unit 32.1 and delay circuit 32.2 to unset it.
  • the output of the latch 20 is connected via a line 20.3 to one input of each of the AND gates 18.
  • Each of the AND gates 18 are identical.
  • the other inputs to the respective AND gates 18 are obtained from the ring counter 22 via input connections 18.1.
  • the outputs of each of the AND gates are provided on output connections 18.2.
  • the inputs collectively referenced 24.1 comprise six inputs corresponding to the sixsteps of the ring counter 22, and cause outputs collectively referenced 24.2 as shown in the table given in FIG. 8a.
  • the trigger circuits 16 comprise a multivibrator oscillator 16.1 which feeds twelve similar amplifiers, one of which is shown at 16.2. There are twelve such amplifiers for each of the three matrices 12.
  • the output of the multivibrator oscillator 16.1 is taken from two leads 16.3 and fed to each of the amplifiers 16.2 in parallel via input connections 16.4.
  • Each amplifier 16.2 also includes an isolating transformer 16.5 which is connected to a selected SCR or triac in the matrices 12 via two output connections 16.6.
  • Each amplifier 16.2 also has a controlling input from the decoding matrix and buffer amplifier 24 connected to connection 16.7, there being two amplifiers 16.2 connected to each of the outputs 24.2 of the amplifiers 24 (FIG. 8).
  • triac matrices 12 is shown," the three matrices being similar.
  • SCRs are shown in place of triacs, the SCRs being connected in anti-parallel relationship in series with each end of each motor windincreased from zero cycles per second to 300 cycles per second, more of the steps in the cycle of steps shown ing.
  • the outputs 16.6 of the amplifiers 16.2 (FIG. 9) are connected across the gate and cathode electrodes of the SCRs as shown, each pair of amplifiers 16.2 controlling the triggering of one pair of anti-parallel connected SCRs. If triacs are used, the number of trigger circuits 16 can be halved.
  • a'current detector 28 is shown. Only one of the current detectors connectedin series with one of the supply phases has been shown, the other two being identical.
  • the line current in the supply phases is detected as a voltage across two anti-parallel connected power'diodes 28.1 of low-voltage but high current rating. This detected voltage is adapted to inhibit the output from a multivibrator 28.2 to provide a zero output on lines 28.3 whenever current in the supply lines is not at zero.
  • the inhibit signal applied to the multivibrator 28.2 is removed and a DC signal is developed at output terminal 28.3
  • the outputs 28.3 of each current detector 28 are connected to the logic detection unit 32.1.
  • the inputs from the current detectors 28 are applied on lines 32.3 to the logic detection unit 32.1 and when all the current detectors 28 yield the DC signal indicating that current zeros are present and that the previously triggered SCRs or triacs have, extinguished, an output is provided on line 32.4 via a NAND gate 32.5 after a period dependent upon the setting of the delay circuit 32.2 A
  • FIG. 13 the forced commutationcircuit is shown.
  • a circuit as shownin FIG. 13 is connected in series with each of the red and yellowphases of the sup- .ply.
  • the circuit includes a power transistor 30.1 in a bridge connection.
  • the power transistor 30.1 is controlled by the output from a multivibrator 30.2.
  • multivibrator 30.2 is gated when a control signal from the master oscillator 26 is applied to a line 30.3.
  • a pulse is received from the master oscillator 26 on the line 30.3, the result is that the power transistor 30.1 is cut off thereby blocking that particular phase to the motor windings and causing current zeros in that phase.
  • the multivibrator 30.2 is no longer gated and again pulses the power transistor 30.1 which no longer blocks that phase and allows current to flow if the relevant SCRs are switches on.
  • SCRs in place of the power v transistor 30.1, in which case, the SCRs have to be force-commutated with the aid of reactors and capacitors.
  • the speed of a three phase motor can be varied from above synchronous speed to standstill in both directions of rotation.
  • the output frequency of the frequency changer depends upon the output frequency ofthe master oscillator 26. As the frequency of the master oscillator 26 is in FIG. 3 will be skipped thereby reducing the speed of the motor.
  • a method of controlling the frequency of a polyphase alternating current supply applied to a polyphase load which includes connecting an SCR or Triac Matrix between each supply phase and-each end of each load phase; making selected sets of SCRs or triacs in the matrices available for triggering in a predetermined cy- ,clic stepping'sequence; and i monitoring current flow in the supply phases to detect current-zeros inthe supply phases and triggering the then available set of SCRs or triacs in the t, matrices in a time period after the detection of said current zeros.
  • a frequency changer for controlling the frequency of a polyphase alternating current supply applied to a polyphase load which includes an SCR or triac matrix connectable between each supply phase and each end of each load phase; monitoring means for detecting current zeros in the supply phases; and control means adapted to make selected sets of SCRs or triacs in the matrices available for triggering in a predetermined cyclic stepping sequence and the control means being responsive to the monitoring means to trigger the then available set of SCRs or triacs when current zeros are detected in the supply phases by the monitoring means.
  • Afrequency changer as claimed in claim 6, which further includes a delay unit intermediate the monitoring means and the-control means for controllably delaying the time period between the detection of the current zeros and the triggering of the sets of SCRs or triacs.
  • delay unit is adjustably variable to permit

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Ac-Ac Conversion (AREA)
  • Control Of Ac Motors In General (AREA)
US00290470A 1971-10-07 1972-09-20 Changing the frequency of a polyphase alternating current supply and apparatus therefor Expired - Lifetime US3816808A (en)

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ZA716729A ZA716729B (en) 1971-10-07 1971-10-07 Changing the frequency of a polyphase alternating current supply and apparatus therefor

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US (1) US3816808A (it)
JP (1) JPS4947846A (it)
AU (1) AU4692972A (it)
DE (1) DE2247427A1 (it)
GB (1) GB1363036A (it)
IT (1) IT968502B (it)
ZA (1) ZA716729B (it)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3946293A (en) * 1974-09-13 1976-03-23 Conco Inc. Thyristor control system
US4078192A (en) * 1976-06-24 1978-03-07 Pertec Computer Corporation Synthesizer for multiphase waveforms
FR2449360A1 (fr) * 1979-02-13 1980-09-12 Telemecanique Electrique Dispositif de commande d'un montage triphase a thyristors
US4468725A (en) * 1982-06-18 1984-08-28 Texas Instruments Incorporated Direct AC converter for converting a balanced AC polyphase input to an output voltage
GB2213657A (en) * 1986-10-28 1989-08-16 Torcon Products Inc Frequency converter for a three-phase motor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665273A (en) * 1968-08-15 1972-05-23 Nicholas Charl De Villiers Ens Polyphase alternating current frequency variator for induction and synchronous type motor
US3678369A (en) * 1969-10-24 1972-07-18 Technology Uk Cycloconverters
US3686558A (en) * 1971-01-04 1972-08-22 Ajax Magnethermic Corp Control for frequency converters
US3703672A (en) * 1970-05-05 1972-11-21 Nat Res Dev Three-phase induction-motor, speed-changing method and control circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665273A (en) * 1968-08-15 1972-05-23 Nicholas Charl De Villiers Ens Polyphase alternating current frequency variator for induction and synchronous type motor
US3678369A (en) * 1969-10-24 1972-07-18 Technology Uk Cycloconverters
US3703672A (en) * 1970-05-05 1972-11-21 Nat Res Dev Three-phase induction-motor, speed-changing method and control circuit
US3686558A (en) * 1971-01-04 1972-08-22 Ajax Magnethermic Corp Control for frequency converters

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3946293A (en) * 1974-09-13 1976-03-23 Conco Inc. Thyristor control system
US4078192A (en) * 1976-06-24 1978-03-07 Pertec Computer Corporation Synthesizer for multiphase waveforms
FR2449360A1 (fr) * 1979-02-13 1980-09-12 Telemecanique Electrique Dispositif de commande d'un montage triphase a thyristors
US4468725A (en) * 1982-06-18 1984-08-28 Texas Instruments Incorporated Direct AC converter for converting a balanced AC polyphase input to an output voltage
GB2213657A (en) * 1986-10-28 1989-08-16 Torcon Products Inc Frequency converter for a three-phase motor

Also Published As

Publication number Publication date
ZA716729B (en) 1973-02-28
GB1363036A (en) 1974-08-14
AU4692972A (en) 1974-03-28
JPS4947846A (it) 1974-05-09
DE2247427A1 (de) 1973-04-12
IT968502B (it) 1974-03-20

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