US3812670A - Converter drive circuit in an electronic timepiece - Google Patents

Converter drive circuit in an electronic timepiece Download PDF

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Publication number
US3812670A
US3812670A US00291531A US29153172A US3812670A US 3812670 A US3812670 A US 3812670A US 00291531 A US00291531 A US 00291531A US 29153172 A US29153172 A US 29153172A US 3812670 A US3812670 A US 3812670A
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United States
Prior art keywords
drive
circuit
converter
timepiece movement
frequency
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Expired - Lifetime
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US00291531A
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English (en)
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A Nikaido
T Machida
T Toida
F Nakajima
M Onda
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Citizen Watch Co Ltd
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Citizen Watch Co Ltd
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C3/00—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means
    • G04C3/14—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor
    • G04C3/143—Means to reduce power consumption by reducing pulse width or amplitude and related problems, e.g. detection of unwanted or missing step

Definitions

  • ABSTRACT A converter drive circuit in an electronic timepiece movement, which provides pulses of adjustable pulse width to a drive coil of an eIectro-mechanical converter of the timepiece movement, to thereby generate an induced voltage in the coil and thus drive the timepiece.
  • the drive circuit is designed so as to be able to sense the oscillation amplitude of the converter in terms of electrical voltage, and increase the pulse width of the drive pulses fed to the coil in an abruptly and stepwisely way when an outside mechanical disturbance is applied to the timepiece movement in the reducing sense of the induced voltage in the drive coil.
  • This invention relates generally to improvements in and relating to electronic timepieces. It relates more specifically to improvements in the drive circuit adapted for driving the electro-mechanical converter, such as drive balance wheel, tuning fork, tuning lead or the like time-keeping drive means in the above kind of timepiece, especially crystal quartz type electronic watch.
  • the resonance converter where a resonator such as balance wheel, tuning fork, tuning lead or the like member is forcedly driven with a series of time base frequency signal pulses delivered from a time-base signal source such as crystal quartz oscillator, it is requisitely necessary to keep the oscillation amplitude of the converter within a specifically selected range for transmitting the corresponding movements thereof through the gear train to the time-display means of the timepiece for accurate operation thereof.
  • a time-base signal source such as crystal quartz oscillator
  • the amplitude and phase of the oscillatory movements thereof are maintained substantially constant by the voltage, current, frequency and pulse width of the input signal fed inthe form of a series of regular pulses.
  • the timepiece movement will be influenced frequently and adversely by unavoidable and disturbing outside mechanical disturbances such as shocks, thereby disturbing the steady, regular and stabilized timekeeping operation of the timepiece movement.
  • the variation of the width of the input drive voltage pulses is carried into effect in a continuous way in response to the disturbed variation of the oscillation amplitude of the resonator, thereby a quick and rapid recovery of the regular oscillation mode to acquire a quicker response in the corrective control operation.
  • the object of the present invention is to provide an amplitude control circuit of simple design, yet capable of operating in a quickly responsive manner.
  • a further object of the invention resides in the provision of the amplitude control circuit of the above kind, capable of dispensing with otherwise necessary amplitude detecting or sensing coil means.
  • FIG. 1 represents a schematic connection diagram substantially represented in blocks, of a preferred embodiment of the invention, representing an electromechanical converter usable in an electronic watch.
  • FIG. 2 is a circuit diagram illustrative of a detector or sensor contained in the circuit arrangement shown in FIG. 1.
  • FIG. 3 is a circuit diagram of an input switcher in cluding an AND- and a NOR-circuit and contained in the circuit arrangement shown in FIG. 1.
  • FIG. 4 is a circuit diagram of a converter drive circuit contained in the circuit arrangement shown in FIG. 1.
  • FIGS. 5 and 6 are two equivalent circuits of that shown in FIG. 4 combined with FIG. 2.
  • FIG. 7 shows several signal wave curves appearing at several places of the circuit arrangement shown in FIG. 1 under its steady and regular operating conditions.
  • FIG. 8 is a similar view to FIG. 7, wherein, however, an amplitude reducing outside disturbance such as a mechanical shock is applied to the timepiece movement.
  • numeral 1 represents schematically, an oscillator adapted for delivery of a series of electrical pulses of precisely constant amplitude and frequency, such as, for instant, a quartz crystal oscillator although not limitative.
  • the frequency may be 32.768 kc, as an example.
  • a resistor 101 is connected across the crystal oscillator l for feedback purpose.
  • The'output from the crystal oscillator l is fed to a conventional inverter 2, the design thereof being similar to that shown in FIG. 2 at 13.
  • These elements I, 2 and 101 constitute in combination a crystal oscillator circuit.
  • the output from the circuit 102' is fed alternatively to the one or another input of first flip-flop 5 through second and third inverters 3 and 4.
  • Output terminals 6' and 7 of the first flip-flop 5 are connected through a plurality of similar flip-flops, not shown, to the input terminals 8 and 9 of a first main flip-flop 10 of similar design, the number of frequency dividing flip-flop stages arranged between two section lines X-X and Y-Y depending upon occasional demands and having been omitted from the drawing only for simplicity.
  • the input frequency at these input terminals 8 and 9 may be 128 Hz.
  • Further second and third main frequency dividing flip-flops 11 and 12 are connected in series to the first one 10 as shown.
  • Numeral 13 is a, amplitude detector circuit, to be more specifically described hereinafter by reference to FIG. 2, the output side of said detector being connected electrically through a terminal A" to one of two inputs of a state memory circuit, preferably a flipflop.
  • the remaining input of the state memory circuit I4 is connected through a lead 104 to one of the output 3 terminal 102 of the third main flip-flop 12.
  • the output of the detector 13 is fed to the memory 14
  • the latter is set to 0, while the output, denoted with P3," of the last stage flip-flop 12 is fed to the memory 14, the latter is set to l
  • the output of the memory 14 is connected through a terminal B to one of the two inputs of AND-gate 15.
  • the remaining input of the latter is connected through a lead 105 to a terminal 106 which is provided between the first and second main flip-flops and 11.
  • One of the inputs of the first main flip-flop 10 is connected through flip-flops 1 1 and 12 a lead 104, memory circuit 14 and AND-gate 15 to one of the inputs of a NOR-gate 16, the input of the latter being connected through a lead 110 with the output of AND-gate 15.
  • the remaining input of NOR-gate .16 is connected through a lead 109 with the said input terminal 9.
  • NAND-gate 17 has four input terminals 111, 112, 113 and 114.
  • the first input terminal 111 is connected with another output terminal 103 of the third main flipflop stage 12 through a lead 115.
  • the second input terminal 112 is connected through a lead 117 with a terminal 116 .which is provided in one of two connecting routes between the third and four main flip-flops 11 and 12.
  • the third input terminal 113 is connected through a lead 108 with a terminal 107 inserted in one of two connecting routes between the first and second main flip-flop stages 10 and 11. i
  • the fourth input 114 is connected through a terminal C with the output of NOR-gate 16 which constitutes an input switching circuit 30 in combination with AND-gate 15. v
  • Numerals 18 and 19 denote respective inverters
  • the output of NAND-gate 17 is connected through a terminal D" and lead 120 to one of two inputs of the first inverter 18.
  • the remaining input of this inverter 18 is connected with a positive voltage source, only schematically shown at V, say 1.5 volts.
  • One of two outputs of this inverter 18 is earthed as shown, while the remaining output is connected through terminal 118, coil and terminal 119 to the output of the second inverter 19.
  • One of two inputs of this inverter 19 is earthed as shown, while the remaining input is fed back through lead 122 to the terminal 118.
  • Input of the amplitude detector 13 is connected through lead 121 and terminal E to said terminal 119.
  • Inverters 18 and 19, coil 20 and terminals 118 and 119 are shown more specifically in FIG.
  • Coil 20 is arranged to drive an electro-mechanical converter such as a balance wheel of a timepiece, although not specifically shown only for simplicity.
  • Theamplitude detector circuit is shownmore specifically in FIG. 2.
  • This detector 13 comprises P-channel MOS-transistor 131 and N-channel MOS-transistor 132 connected in a' complementary manner as shown.
  • E represents input terminal, while A represents output terminal as referred to hereinbefore.
  • the input switching circuit is more specifically shown.
  • the AND-gate 15 comprises transistors 301; 304; 305 and 306', while the NOR-gate 16 comprises transistors 301; 302; 303 and 306.
  • Transistors 301; 303 and 304 represent P-channel MOS- transistors, while transistors 302; 305 and 306 are N- channel MOS-tragistors.
  • input signal, P0 is applied to terminal 122; output signalfrorn first rnain flip-flop 10, W, is applied to terminal 123; and output signal from memdry'aieuit '14 is applied to terminal 124 through terminal B.”
  • the drive circuit 40 is more specifically shown, as comprising N-channel MOS-transistors 401 and 403; and P-channel MOS-transistor 402.
  • Inverter 18 comprises transistors 401 and 402, while inverter 19 comprises the remaining transistor 403.
  • the source voltage is applied. With this arrangement, the source voltage V does not appear at output terminal E, when there is no input signal at the terminal D.
  • FIG. 5 is an equivalent circuit of the circuit arrangement shown in FIG. 4 combined with FIG. 2 when input signals are not applied to the amplitude detector 13, and inverters 18; 19, while an equivalent circuit shown in FIG. 6 is obtained, when these input signals are applied.
  • FIG. 7 a series of voltage curves are shown when the electro-mechanical converter, preferably a electromagnetically driven balance wheel of an electronic watch, not shown, is operating under regular and undisturbed conditions.
  • the electro-mechanical converter preferably a electromagnetically driven balance wheel of an electronic watch, not shown
  • the uppermost voltage curve 51' represents the voltage induced in the drive coil 20.
  • the straight line 52 represents the amplitude detecting voltage level, while numeral 53 represents a corresponding current wave form supplied to the same drive coil 20. Further voltage curves can be easily understood by reference to the corresponding explanatory symbols given at the left sideof the drawing. g
  • the voltage 51a induced in the coil 20 is lower than the amplitude detecting voltage level 52.
  • the drive coil 20 is arranged to cooperate electromagnetically with permanent magnets fixedly mounted on the balance wheel.
  • the induced voltage curve 51 in the drive coil 20 is the results of such electromagnetic cooperation. At 51 and 51", the induced voltage attains its maximum value. These maximum voltages are induced twice in the drive coil 20 during a complete angular oscillation of the balance wheel, when the latter has its maximum moving velocity by attaining a full overlap with the magnet.
  • the electromagnetic converter By proper design of the electromagnetic converter, it is possible to generate a forced drive force when the induced voltage in the drive coil 20 attains at the peak value 51".
  • the induced voltage peak 51' is utilized for the desired amplitude detection.
  • each of the inverters 18; 19 of the detector circuit 40 shown in FIGS. 1 and 2 it is further possible to set the threshold voltage of each of the inverters 18; 19 of the detector circuit 40 shown in FIGS. 1 and 2 to about 0.75 volt, with the source voltage V be set to L5 volts, while the peak values of the induced voltage in drive coil 20 is set to L0 l.2 volts under regular working conditions. Under these conditions, the induced voltage will take the curve shown at L in FIG. 7, as a representative example. In this case, the detecting voltage level 52 will be 0.75 volt. This voltage corresponds to the threshold voltage of the detector circuit (comparator) l3 and is the reference voltage for comparison with the induced voltage in the drive coil. This peak voltage 51' will cross the level line 52 at points a and b, respectively.
  • voltage input P0 will appear at an input terminal 114 to NAND-gate 17; P1 at terminal 113; P2 at 112; and P3 at 111, as shown in FIG. 7 by respective wave curves 58, 59 and 60.
  • a series of pulses as shown by wave curve 61, FIG. 7, having a frequency of 16 Hz, will appear at the output terminal D.
  • the pulse width amounts to one-sixteenth of the period.
  • the forcingly synchronizing input 61 has a predetermined frequency of l6 Hz and a pulse width of outside mechanical shock or the like disturbing force to the converter, as may be frequently encountered during personal carriage of the timepiece, preferably watch, thereby the induced voltage as at 51a in the drive coil 20 becoming a lower value than the detection level 52 (refer to FIG. 8), transistor 131 will turn to on, while transistor 132 becomes off. Therefore, no output pulse will appear at the output terminal A. Thus, no set pulses will be applied to memory circuit 14 and on the contrary, reset pulses, P3 will alway be applied.
  • the circuit 14 is always reset to l and the output appearing at B is of l of the binary logic. From this reason, the P-channel MOS-transistor of the input switching circuit, FIG. 3, will be off, while the N-channel MOS-transistor thereof will be on.
  • the pulse series P1 can therefore pass through the AND-gate 15 the output appearing at C being of the wave form at 62, representing: (P0 Pl). This output is applied to the input terminal 114 or (O) to'NAND-gate 17.
  • Input P1 of the wave form 58 will be applied to the input terminal (1) or 113; P2 of wave form 59 to (2) or 112; and P3 of one-sixteenth period.
  • Memory circuit 14 is impressed with reset pulses in the form of P3 and reset to 1 upon each application of a drive pulse, thereby returning its state to that appearing in advance of the application of set pulse at input terminal A.” It will thus be understood that for each oscillation of the converter, its amplitude in terms of voltage is compared with the detection level voltage at 52.
  • the synchronizing input pulses to the converter has been set to 16 Hz and a pulse of one-sixteenth amplitude.
  • the pulse width was increased to one-eighth of the amplitude.
  • W being an integer such as l, 2, which means that in the case of reduction in the oscillation amplitude, the pulse width may be increased to twice, triple, quadruple of the original and so on, by proper modifications of the whole circuit arrangement as may easily occur to any person skilled in the art, upon being guided by the novel teachings of the present invention so far shown and described.
  • the drive pulse frequency should not be limited to 16 Hz.
  • a superior advantage of the present invention resides in such that in the case of reduction in the oscillation amplitude to that lower than the detection level, the drive pulse width is automatically increased, in the above specific embodiment, to a doubled value, towards quicker recovery to the steady and regular oscillation of the converter, so as to invite a stabilized operation of the converter, upon occasional invitation of an outside mechanical disturbance, such as outside shocks.
  • a further advantage resides in that for the time being upon initiation of the switching-in operation of the electronic timepiece movement, the width of each of between the switching-in and the regular time-keeping operation.
  • a still further advantage resides in such that an independent maximum value of the forced synchronizing phase ofeach oscillative movement and in the course of a voltage curve corresponding to an oscillation of the converter is utilized for the desired purpose, and thus, a specifically provided coilmean's for sensing the oscillation amplitude could be dispensed with.
  • this kind of condenser may have preferably its capacity in the order of 0.5 microfarad (,uF) which fact invites generally a substantial difficulty in the realization of the overall MOS-lization and thus in a larger dimensioning of the circuit arrangement than otherwise and a miniaturization thereof would become difficult to realize.
  • UPF microfarad
  • N-channel MOS-transistor 401 is on, while P-channel MOS-transistor 402 and N-channel MOS-transistor 22 are off.
  • one end F" of the drive coil is earthed and the opposite end 6" is connected with inlet terminal E of the amplitude detector circuit, and thus, only the induced voltage in the drive coil is applied to the said input terminal E.
  • N-channel MOS- transistor 40] is off and P-channel MOS-transistor 402 and N-channel MOS-transistor 403 are on, so as to earth the coil end terminal G. Therefore, the drive circuit becomes as shown in FIG. 6 wherein the source voltage is cut off. Thus, only the induced voltage in the drive coil is utilized for amplitude detection purpose. In this way, the overall MOS-lization can be realized with easiness for realization of a miniatured circuit.
  • circuit arrangement is highly simple in its design and provide a composite service, yet consuming a specifically added power to the conventional one. It is therefore easily understood that the circuit arrangement proposed by the present invention is highly valuable for use in electronic watches, especially crystal quartz type watches for the conversion service of the above kind.
  • a converter drive circuit in an electronic timepiece movement comprising:
  • a time base signal source for providing a series of first output pulses of predetermined amplitude and frequency
  • wave-shaping means connected with a predetermined number of said outputs of said frequency dividers for receiving and processing said dividedfrequency pulsed signals and providing a first drive pulsed signal of predetermined pulse width to a first control terminal of a drive coil of an electromechanical converter of the timepiece movement to generate an induced voltage therein to operate the movement successively under regular operating conditions; switching means connected between said waveshaping means and a predetermined number of said outputs of said frequency dividers; sensing means coupled at a first input to a second terminal of said drive coil, at a second input to at least one output of the said frequency dividers and at its output to said switching means, said sensing means sensing the oscillation amplitude of said converter in terms of said induced voltage at said drive coil and comparing the latter with the input threshold voltage level of the said sensing means to provide a first indication signal when said induced voltage is above said threshold voltage and a second indication signal when it is lower, whereby under normal operating conditions of said timepiece movement said switching means operates in response to said first indication signal to permit passage

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Stepping Motors (AREA)
  • Electromechanical Clocks (AREA)
US00291531A 1971-09-25 1972-09-25 Converter drive circuit in an electronic timepiece Expired - Lifetime US3812670A (en)

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JP7475971A JPS5319944B2 (fr) 1971-09-25 1971-09-25

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Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3855781A (en) * 1972-12-22 1974-12-24 Suwa Seikosha Kk Step motor mechanism for electronic timepiece
US3952497A (en) * 1973-10-24 1976-04-27 Heinz Jauch Method and apparatus for synchronizing andoscillating system which is driven by an energy storage device
US3965667A (en) * 1973-07-19 1976-06-29 Ebarches S.A. Device for the maintenance and control of the oscillations of the balance wheel of a timepiece
US3978649A (en) * 1973-07-20 1976-09-07 Kabushiki Kaisha Suwa Seikosha Quartz crystal electronic timepiece
US3998044A (en) * 1973-12-19 1976-12-21 Citizen Watch Co., Ltd. Electronic timepiece
US4051663A (en) * 1973-12-05 1977-10-04 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
DE2745052A1 (de) * 1976-10-06 1978-04-20 Suwa Seikosha Kk Elektronische uhr
US4098070A (en) * 1975-01-13 1978-07-04 Kabushiki Kaisha Suwa Seikosha Digital display electronic wristwatch
US4104860A (en) * 1976-12-27 1978-08-08 Solid State Scientific Inc. High speed dynamic flip-flop system
US4114364A (en) * 1976-01-29 1978-09-19 Kabushiki Kaisha Daini Seikosha Driving pulse width controlling circuit for a transducer of an electronic timepiece
FR2388324A1 (fr) * 1977-04-23 1978-11-17 Seiko Instr & Electronics Montre electronique analogique a faible consommation
FR2388329A1 (fr) * 1977-04-23 1978-11-17 Seiko Instr & Electronics Mouvement d'horlogerie electronique/r
DE2841946A1 (de) * 1977-12-02 1979-06-07 Seiko Instr & Electronics Elektronische uhr
US4162608A (en) * 1974-06-05 1979-07-31 Kabushiki Kaisha Suwa Seikosha Electronic timepiece frequency regulating circuit
US4164842A (en) * 1976-08-20 1979-08-21 Citizen Watch Co., Ltd. Buffer amplifier circuit
US4192131A (en) * 1977-01-19 1980-03-11 Kabushiki Kaisha Suwa Seikosha Step motor control mechanism for electronic timepiece
FR2435076A1 (fr) * 1978-06-20 1980-03-28 Ebauches Sa Procede pour reduire la consommation d'une piece d'horlogerie electronique et piece d'horlogerie electronique mettant en oeuvre ce procede
US4219999A (en) * 1977-03-03 1980-09-02 Citizen Watch Company, Limited Electronic timepiece equipped with battery life display
US4241433A (en) * 1977-08-04 1980-12-23 Kabushiki Kaisha Daini Seikosha Electronic watch
US4283783A (en) * 1978-11-28 1981-08-11 Citizen Watch Company Limited Drive control system for stepping motor
US4382691A (en) * 1977-03-16 1983-05-10 Kabushiki Kaisha Daini Seikosha Electronic watch
US4439717A (en) * 1981-02-04 1984-03-27 U.S. Philips Corporation Control device for a stepping motor
GB2203866A (en) * 1987-03-06 1988-10-26 Seikosha Kk Electromagnetic drive circuit
US5550795A (en) * 1993-01-18 1996-08-27 Seiko Instruments Inc. Electronic timepiece and a method of driving a stepping motor of electronic timepiece

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5653154Y2 (fr) * 1977-04-25 1981-12-11
JPS54156676A (en) * 1978-05-31 1979-12-10 Seiko Epson Corp Wristwatch
JPS5860292U (ja) * 1982-07-22 1983-04-23 セイコーエプソン株式会社 アラ−ム付電子時計
JPS6333196U (fr) * 1987-04-10 1988-03-03
JPH02222859A (ja) * 1990-01-11 1990-09-05 Seiko Epson Corp アラーム付電子機器

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Publication number Priority date Publication date Assignee Title
US3370414A (en) * 1965-06-22 1968-02-27 Benrus Watch Company Inc Electronic timepiece
US3648453A (en) * 1968-07-19 1972-03-14 Suwa Seikosha Kk Electric timepiece
US3699762A (en) * 1971-04-05 1972-10-24 Timex Corp Synchronized contact watch
US3712045A (en) * 1970-01-28 1973-01-23 Seiko Instr & Electronics Quartz crystal watch

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1809223B2 (de) * 1968-11-15 1972-11-30 Gebrüder Junghans GmbH, 7230 Schramberg Armbanduhr mit einem piezoelektrischen kristall als zeithaltendem schwinger
FR2060185B2 (fr) * 1969-09-10 1974-03-15 Lavet Marius

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3370414A (en) * 1965-06-22 1968-02-27 Benrus Watch Company Inc Electronic timepiece
US3648453A (en) * 1968-07-19 1972-03-14 Suwa Seikosha Kk Electric timepiece
US3712045A (en) * 1970-01-28 1973-01-23 Seiko Instr & Electronics Quartz crystal watch
US3699762A (en) * 1971-04-05 1972-10-24 Timex Corp Synchronized contact watch

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3855781A (en) * 1972-12-22 1974-12-24 Suwa Seikosha Kk Step motor mechanism for electronic timepiece
US3965667A (en) * 1973-07-19 1976-06-29 Ebarches S.A. Device for the maintenance and control of the oscillations of the balance wheel of a timepiece
US3978649A (en) * 1973-07-20 1976-09-07 Kabushiki Kaisha Suwa Seikosha Quartz crystal electronic timepiece
US3952497A (en) * 1973-10-24 1976-04-27 Heinz Jauch Method and apparatus for synchronizing andoscillating system which is driven by an energy storage device
US4051663A (en) * 1973-12-05 1977-10-04 Kabushiki Kaisha Suwa Seikosha Electronic timepiece
US3998044A (en) * 1973-12-19 1976-12-21 Citizen Watch Co., Ltd. Electronic timepiece
US4162608A (en) * 1974-06-05 1979-07-31 Kabushiki Kaisha Suwa Seikosha Electronic timepiece frequency regulating circuit
US4098070A (en) * 1975-01-13 1978-07-04 Kabushiki Kaisha Suwa Seikosha Digital display electronic wristwatch
US4114364A (en) * 1976-01-29 1978-09-19 Kabushiki Kaisha Daini Seikosha Driving pulse width controlling circuit for a transducer of an electronic timepiece
US4164842A (en) * 1976-08-20 1979-08-21 Citizen Watch Co., Ltd. Buffer amplifier circuit
DE2759956C1 (de) * 1976-10-06 1990-08-02 Kabushiki Kaisha Suwa Seikosha, Tokio/Tokyo Elektronische Uhr mit einem Schrittmotor
US4212156A (en) * 1976-10-06 1980-07-15 Kabushiki Kaisha Suwa Seikosha Step motor control mechanism for electronic timepiece
DE2745052A1 (de) * 1976-10-06 1978-04-20 Suwa Seikosha Kk Elektronische uhr
US4104860A (en) * 1976-12-27 1978-08-08 Solid State Scientific Inc. High speed dynamic flip-flop system
US4192131A (en) * 1977-01-19 1980-03-11 Kabushiki Kaisha Suwa Seikosha Step motor control mechanism for electronic timepiece
US4219999A (en) * 1977-03-03 1980-09-02 Citizen Watch Company, Limited Electronic timepiece equipped with battery life display
US4382691A (en) * 1977-03-16 1983-05-10 Kabushiki Kaisha Daini Seikosha Electronic watch
FR2388324A1 (fr) * 1977-04-23 1978-11-17 Seiko Instr & Electronics Montre electronique analogique a faible consommation
FR2388329A1 (fr) * 1977-04-23 1978-11-17 Seiko Instr & Electronics Mouvement d'horlogerie electronique/r
US4241433A (en) * 1977-08-04 1980-12-23 Kabushiki Kaisha Daini Seikosha Electronic watch
DE2841946A1 (de) * 1977-12-02 1979-06-07 Seiko Instr & Electronics Elektronische uhr
FR2435076A1 (fr) * 1978-06-20 1980-03-28 Ebauches Sa Procede pour reduire la consommation d'une piece d'horlogerie electronique et piece d'horlogerie electronique mettant en oeuvre ce procede
US4281405A (en) * 1978-06-20 1981-07-28 Ebauches S.A. Reduction of energy consumption of electronic timepiece
US4283783A (en) * 1978-11-28 1981-08-11 Citizen Watch Company Limited Drive control system for stepping motor
US4439717A (en) * 1981-02-04 1984-03-27 U.S. Philips Corporation Control device for a stepping motor
GB2203866A (en) * 1987-03-06 1988-10-26 Seikosha Kk Electromagnetic drive circuit
GB2203866B (en) * 1987-03-06 1991-01-30 Seikosha Kk Electromagnetic drive circuit
US5550795A (en) * 1993-01-18 1996-08-27 Seiko Instruments Inc. Electronic timepiece and a method of driving a stepping motor of electronic timepiece

Also Published As

Publication number Publication date
GB1355892A (en) 1974-06-05
DE2247210C2 (de) 1983-01-20
JPS4841772A (fr) 1973-06-18
DE2247210A1 (de) 1973-03-29
JPS5319944B2 (fr) 1978-06-23

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