US3774123A

US3774123A - Broad band microstrip n-pole m-throw pin diode switch having predetermined spacing between pole and throw conductors

Info

Publication number: US3774123A
Application number: US00314055A
Authority: US
Inventors: R Hume
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1972-12-11
Filing date: 1972-12-11
Publication date: 1973-11-20
Anticipated expiration: 1990-11-20

Abstract

The bandwidth characteristic of a microstrip N-pole M-throw switch is improved by providing the spacing, which is between a printed pole conductor and a printed throw conductor thereof and across which is connected a PIN diode to the two conductors, with a predetermined spacing relationship W 0.215 lambda /3, where lambda is the wavelength at the upper frequency of the bandwidth range of the switch. Further improvement of the bandwidth characteristic is provided by utilizing the inductances of bare wire conductors as chokes or as the inductive component of low pass LC filters that are used in the biasing of the switches.

Description

United States Patent [1 1 Hume [ Nov. 20, 1973 [75] Inventor: Robert M. Hume, Vestal, NY.

[73] Assignee: International Business Machines Corporation, Armonk, NY.

[22] Filed: Dec. 11, 1972 [21] Appl. No.1 314,055

[52] US. Cl. 333/7 D, 333/81 A, 333/84 M [51] Int. Cl. H0lp 1/10 where l wavelength at frequency 58 Field of Search 333/7 R 7 D 81 A' the bandwidth range the Fmher imPmve' 3323/84 ment of the bandwidth characteristic is provided by utilizing the inductances of bare wire conductors as [56] References Cited chokes or as the inductive component of low pass LC UNITED STATES PATENTS filters that are used in the biasing of the switches. 3,475,700 10/1969 Ertel 333/7 D 10 Claims, 13 Drawing Figures BEAM LEAD PIN DIODES 3,568,105 3/1971 Felsenheld 333/7 D X Primary Examiner-Paul L. Gensler Attorney-Norman R. Bardales et al.

[57] ABSTRACT The bandwidth characteristic of a microstrip N-pole M-throw switch is improved by providing the spacing, which is between a printed pole conductor and a printed throw conductor thereof and across which is connected a PlN diode to the two conductors, with-a predetermined spacing relationship W 0.215A/3,

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FIG. Io HGJc t. m FIG. 5

PAlENlinnuvzo ms 3.774.123

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PATENTED NUV 201973 SHEET 5 BF 6 FIG. Id

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l BROAD BAND MICROSTRIP N-POLE M-TI-IROW PIN DIODE SWITCH I-IALVING PREDETERMINED SPACING BETWEEN POLE AND THROW CONDUCTORS BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to microstrip N-pole M-throw switches, where N and M are predetermined integers.

2. Description of the Prior Art The use of N-pole M-throw switches for switching rf energy is well-known in the art and is particularly wellknown in microwave applications. The prior art devices usually incorporated these switches in conventional microwave cavity structures, as well as stripline and microstrip structures and/ or hybrids of the foregoing.

In these prior art devices, the switches generally included at least two spaced conductors designated pole and throw conductors, respectively. An electronic switch means, such as a diode, was coupled to the two conductors in such a manner that when forward biased, i.e. conductive, the two conductors would be electrically connected and when reverse biased would be electrically disconnected. Hence, the switch with regards to these two conductors would be closed and opened, respectively. Heretofore in the prior art, the spacing provided between the two conductors was to provide an electrical discontinuity in theelectrical circuit path of which the two conductors were part. The prior art, as far as I am aware, did not provide a spacing relationship between the'conductors to improve the bandwidth characteristic of the switch and/or provide it with a broad band characteristic.

Some of these aforementioned prior art structures employed a PIN diode as the switching element between the respective pole conductor and throw conductor of the switch. However, these aforementioned prior art structures have certain disadvantages including a limited bandwidth characteristic.

For example, a known prior art device employs a conventional microwave cavity structure with the PIN diode chips located therein. This device has a frequency range of 0.5 to 12.4 GI-Iz. Moreover, the physical dimensions and size associated with the microwave plumbing for implementing the cavity structure limits the upper frequency of the bandwidth. Furthermore, these devices are readily subject to deformation and, hence, degradation of performance, and are not readily applicable to compact applications.

In still another prior art device, the switch is implemented'as a hybrid of a conventional microwave cavity and stripline structures. The common conductor of the switch is a conductive post, which may be cylindrical or planar. Orthogonally disposed on an end of the post are the other conductors of the switch which are implemented in stripline form. These Iasbmentioned conductors have their ends symmetrically spaced from the sides of the post in a radial manner. Connected to each of the radial conductors and the center conductive post is a PIN diode across the gap formed therebetween. The aforedescribed prior art structure has a bandwidth characteristic with an upper frequency band limitation of GHz. Moreover,'bccause of the structure and the dimensions of the elements of the switch of the prior art device, the upper frequency of the bandwidth characteristic of the switch is limited. As in the previouslydescribed prior art device, the last-mentioned prior art device also is subject to deformation and, hence, misalignment between the switch conductive elements. This results in degradation of its performance. It also is not readily adaptable to applications requiring compact switches. Fabrication of these devices is also complicated and particularly if integrated circuit PIN diodes are utilized.

In still another prior art structure, a semiconductor substrate is used to support the printed conductors of a strip line configured switch. In this last-mentioned prior art structure, the conductors are radially disposed about a center printed conductor also supported by the semiconductor substrate. The center conductor is separated from the radially-disposed conductors by a few microns so as to provide a DC blocking gap between the two conductors. Beneath each radial printed eonductor there is located an integrated circuit PIN diode which is formed in the semiconductor substrate. It should be noted that the diode is not located across the gap. In the particular prior art device, the P region is in electrical contact with the particular overlying printed conductor of the switch and the N region is in contact with the common ground layer located on the other surface of the semiconductor body. The particular radial conductors are a quarter wavelength of the operating frequency of the switch, which distance is measured from the point of contact with the P region of the diode with which it is associated and the center conductor. As a consequence, these prior art devices have a very narrow bandwidth. Moreover, fabrication of these devices is complicated because of the processes involved in making the PIN diode as an integral part of the switch structure.

Still another prior art device, a microwave duplex switch, is implemented in microstrip apparatus. It requires a semiconductor material of a given'conductivity type, e.g. N doped. It has a common ground plane layer on one of its major surfaces. On the opposite surface is formed three printed conductors associated with the switch. The three conductors have a T-shaped configuration. A spacing is formed between each side of the center conductor and an end of each horizontal conductor. A pair of surface-oriented PIN diodes are formed in the aforementioned opposite surface of the semiconductor body. More specifically, each diode has its P region beneath a small mutually exclusive portion of the center conductor with which it is in electrical contact. The N region of each diode is disposed beneath the endportion of a mutually exclusive one of the two horizontal conductors with which it is in electrical contact. The intrinsic region of each PIN diode, which is between the separated P and N regions of the particular diode, lies beneath one of the aforementioned spacings. This prior art structure uses printed quarter wavelength chokes thereby resulting in the device having a narrow bandwidth. The fabrication of the device is complicated since it requires formation of integrated PIN diodes and alignment of the printed circuit conductors therewith.

SUMMARY OF THE INVENTION It is an object of this invention to provide a microstrip N-pole M-throw switch which has a wide band frequency characteristic.

It is still another object of this invention to provide a compact microstrip N-pole M-throw switch.

Still another object of this invention is to provide a microstrip N-pole M-throw switch which is rugged, simple, and easily constructed.

According to one aspect of this invention there is provided a microstrip N-pole M-throw switch having a predetermined bandwidth, N and M being first and second integers, respectively. The switch comprises a planar dielectric substrate having first and second opposite surfaces. A planar metallic ground planar layer is disposed on the first surface. A predetermined number of printed circuit conductor means corresponding to one of the integers is disposed on the second surface. A predetermined number of printed circuit conductor means corresponding to the other of the integers is disposed also on the second surface. At least one of the first printed conductor means and at least one of the second printed conductor means have a spacing equal to W 0.215M3, where A is the wavelength of the upper frequency of the predetermined bandwidth. A discrete beam-lead surface-oriented PIN diode means is serially connected to the last-mentioned ones of the first and second printed circuit conductor means across the last-mentioned spacing.

The foregoing and other objects, features, and advantages of the invention will be apparent from the following more particular description of the preferred embodiments of the invention, as illustrated in the accompanying drawing.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a diagram showing the relative juxtaposition of FIGS. Ia to 1d;

FIGS. Ia 1d are an enlarged plan view of circuit apparatus which includes preferred embodiments of the microstrip N-pole M-throw switch of the present invention FIG. 2 is an enlarged partial schematic view of the switch conductors of one of the preferred embodiments shown in FIG. la;

FIG. 3 is an enlarged partial schematic view of the switch conductors of another one of the preferred embodiments shown in FIG. lb;

FIGS. 4 and 5 are enlarged partial schematic views of the respective switch conductors of still two other preferred embodiments shown in FIG. lb and 1c, respectively;

FIG. 6 is an enlarged partial schematic view of the switch conductors of still another embodiment of the I present invention;

FIG. 7 is an enlarged partial cross-sectional view taken along the line 7-7 of FIG. lb;

FIG. 8 is a schematic circuit diagram of certain embodiments of the present invention, and

FIG. 9 is an enlarged partial schematic view of still another embodiment of the present invention.

In the figures, like elements are designated with the same reference characters.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIGS. la 1d, reference numeral 1 designates a flat planar dielectric substrate. Preferably, substrate 1 is a ceramic composition such as AI O A planar metallic ground plane layer 2 is disposed on the lower surface of substrate 1, cf. FIG. 7, such as for example, by a conventional vapor deposition process. Preferably, conductive layer 2 is a gold or gold alloy and is co-extensive with the lower surface of substrate 1. For sake of explanation, there are provided in the apparatus of FIGS. la ld, eight microstrip single pole multi-throw switches of the present invention, the elements of each of which are described hereinafter in greater detail. It should be understood, however, that substrate 1 and layer 2 are part-of and common-to each of these eight switches.

Briefly, disposed on the upper and opposite parallel surface of substrate 1 are the pole and throw conductors of the aforementioned eight switches, which conductors are designated by the reference characters P and T, respectively, for sake of clarity. For sake of explanation, respective portions of conductors P and T which are associated with each of the aforementioned eight switches are outlined in FIGS. la Id by respective rectangular dash line boxes or regions designated by the reference characters I VIII. The conductors P and T are formed on the upper surface of substrate 1 using conventional printed circuit techniques and are preferably gold or some other appropriate conductor. The switches associated with regions I to V1 are single pole double throw, or simply SPDT, types. The switches associated with regions VII and VIII are single pole three, i.e. triple, throw, or SPTT types.

Before describing each of the eight switches in greater detail, for sake of simplicity some-of the identical elements utilized in the apparatus of FIGS. la Id will be first'described. The apparatus includes a metallic chassis box 3 which is appropriately grounded as shown schematically in FIG. In at the point designated by reference numeral 4. For sake of explanation, the switches associated with regions I. VI, VII and VIII are interconnected to form one channel designated A, cf. FIGS. la and 1c, and the switches associated with re-' gions II, III, IV, V, cf. FIGS. Ib and 1d are interconnected to form another channel designated B. Mounted in the box 3 are the substrate 1 with its layer 2 being electrically connected to box 3 and, hence, to ground 4. Coaxial connectors 5-12 are mounted in the side walls of box 3 in a protruding manner and their respective outer conductors are mounted in anon-insulated manner thereto and, hence, are connected to ground 4. Connectors 5-7 and connectors 9-11 serve as selectable rf input connections to channels A and B, respectively, and connectors 8 and 12 serve as their respective rf output connections. Alternatively, connectors 5-7 and connectors 9-11 can serve as selectable rf output connections and connectors 8 and 12 as input connectors. For this purpose, the inner conductors b of connectors 5-12 are connected to certain conductors of certain switches as explained hereinafter.

Also mounted on the side walls of box 3 in an insulated and protruding manner are the noise filtercondensers 13-25. Connected to each of the outer electrode leads 0, which act as bias terminals, of condensers 13-25 is a bipolar bias voltage source means for biasing the identical PIN diodes hereinafter described of the microstrip switches as is subsequently explained. For sake of clarity, only the bias means connected to filter 14 is shown. The inner electrode leads of condensers 13-25 are designated by the reference character d. Condensers 13-25 suppress or filter extraneous electrical noise which may be present in the bias source being connected thereto in a manner wellknown to those skilled in the art.

A plurality of plated through holes 26 are provided on the substrate 1 for interconnecting the circuitry associated with its upper surface to the ground layer 2 in a manner well-known to those skilled in the art. The reference character e is used to designate the conductive lands or pads of holes 26.

In addition, each throw conductor of the multi-throw switch has electrically coupled to it a corresponding low pass LC filter comprising the inductance of a bare wire conductor and the capacitance of a discrete chip type condenser. For sake of clarity, each such filter 27-28 is designated in FIGS. la 1d by the combined reference characters used for its constituent components, to wit, a bare wire conductor 27 and a discrete capacitor 28. Each low pass LC filter 27-28 allows the bias voltage, which is applied to the particular one of the noise filter condensers 13-25 with which it is associated, to bias ahereinafter described particular associated PIN diode, or series-connected PIN diodes as the case may be, which is or are associated with a particular switch without degradation to the rf energy being passed by the particular switch. The inductances of conductors 27 thus serve as rf chokes and the capacitors 28 serve as bypass capacitors for rf shortingbias terminals c to ground. The DC bias voltage return for each PIN diode, or series-connected PIN diodes as the case might be, is provided by a series-connected bare wire conductor and one of the plated through holes 26 and which series-connected elements are electrically coupled to the pole conductor of the particular associated switch. These last-mentioned bare wire conductors are designated with the common reference characters 29 for sake of clarity. The inductances of the bare wire conductors 29 serve as rf chokes. The characteristic impedance of each wier

conductor

27 or 29 is selected to be greater, e.g. at least five times greater, than the characteristic impedance of the particular throw or pole conductor to which it is connected. Preferably, the throw and pole conductors are provided with a conventional 50 ohm characteristic impedance in a manner well-known to those skilled in the art. The pole and throw conductors P and T are provided with the same uniform width dimensions.

The SPDT microstrip switch associated with region I, cf. FIG. la, has three spaced signal printed

circuit conductors

30, 31 and 32, which are its two throw and one pole conductors, respectively. FIG. 2 is an enlarged view of the

conductors

31, 32, 33, the view of FIG. 2 being oriented 90 counterclockwise with respect to the view of FIG. 1a. The

edges

30a, 31a of

conductors

30 and 31 are disposed in a parallel and symmetrical spaced relationship with the

parallel sides

32b and 32c, respectively, of conductor 32. As a result, a pair of

single gaps

33, 34 of width W is formed. Gap 33 is between

conductors

30 and 32 and gap 34 is between the

conductors

31 and 32. The value of spacing W is selected in accordance with the principles of the present invention hereafter described. Conductors 30-32 have, as aforementioned, uniform width dimensions W1. In the embodiment of FIG. 2, the

top sides

30b, 31b of

conductors

30 and 31 as viewed therein are substantially co-linearly aligned with the edge 32a of conductor 32.

Sides

30b and 31b are parallel to their respective

opposite sides

30c and 31c.

Across each

gap

33, 34 there is connected, e.g. by thermal compression bonding, to the

conductors

30, 31 and 32 an aforementioned beam-lead surface-oriented PIN diode, i.e.

diodes

35 and 36, cf. FIG. 1a. By way of example, diodes 35 an 36 are poled such that their respective anodes are commonly connected to pole conductor 32, and their respective cathodes are connected to throw

conductors

30 and 31, respectively.

The SPDT microstrip switch associated with region lI, cf. FIG. Id, is similar to the SPDT switch associated with region I. The SPDT switch associated with region II includes three spaced printed circuit conductors 37,

38 and 39 which are its two throw and one pole conductors, respectively. The spacing and alignment as well as their respective width dimensions of the

conductors

37, 38 and 39 are identical to the corresponding parameters of their

respective counterparts

30, 31 and 32 associated with the SPDT switch of region I. Across the spacings which are formed between the

conductors

37 and 39 and

conductors

38 and 39, there are provided respective beam-lead surface-oriented PIN diodes 40, 41. The anodes of the diodes 40, 41 are commonly connected to the conductor 39 and their cathodes are connected to the

conductors

37 and 38, respectively.

In each of the SPDT switches associated with regions I and II, two of its conductors are in co-linear alignment and a third conductor is disposed between and in orthogonal relationship with its two co-linear aligned conductors. In each of the SPDT microstrip switches associated with the regions III and IV, cf. FIGS. lb and 1d, the three conductors have the same angular orientation and spacing alignment with respect to each other, however, the orthogonal oriented conductor of the trio is offset or displaced to one side of one of the two co-linearly aligned conductors and not in between.

More specifically, the SPDT switch associated with the region III, cf. FIG. lb, has three printed

conductors

39, 42 and 43 which are its pole conductor P and its two throw conductors T, respectively.

Conductors

39, 42 and 43 are aligned such that

conductors

39 and 42 are in a co-linear alignment. In addition, conductor 43 is orthogonal to the co-linearly

aligned conductors

39 and 42 but is offset or juxtaposed adjacent to one side 39b of conductor 39, as shown in greater detail in FIG. 3, the view thereof being oriented clockwise with respect to the view of FIG. lb.

As shown in FIG. 3, the aforementioned spacing W is provided between parallel edge 43a and side 39b of

conductors

43 and 39, respectively. Likewise, the same spacing W is provided between edges 42a and 39a of

conductors

42 and 39, respectively. In the embodiment of FIG. 3, side 43b is co-linearly aligned with edge 39a. In practice, conductor 43 may be disposed orthogonally adjacent to the side 39b of conductor 39 with its side 43b being co-linearly aligned anywhere from the edge 390 down to the dash line 43b shown in FIG. 3. The spacing between edge 39a and line 43b is 3W, i.e. three times the dimension of spacing W. Conductor 43, it should be understood, could be alternatively arranged on the opposite side 39c of conductor 39 or on

side

42b or 42c of conductor 42, if desired, with similar orientation, spacing and alignment relationships being provided. It should be noted that conductor 39 is commonly used for the pole conductors P of the SPDT switches associated with regions II and III. Across the

spacings

44 and 45, cf. FIG. 3, between

conductors

39 and 42 and

conductors

39 and 43, respectively, are disposed beam-lead surface-oriented PIN diodes 46 and 47, respectively, cf. FIG. 1b. The anodes of diodes 46 and 47 are commonly connected to the conductor 39 and their respective cathodes are connected to the

conductors

42 and 43, respectively.

The SPDT switch associated with the region IV, cf. FIG. M, is similarly configured as the SPDT switch associated with region III. It has two spaced printed

conductors

38 and 48 that are co-linearly aligned. The offset conductor 37 is spaced adjacent to one side of the conductor 48 in an orthogonal manner. The spacings between and alignment, as well as their respective width dimensions, of the

conductors

37, 38 and 48 with respect to each other are identical to the corresponding parameters of their similar

respective counterparts

43, 42 and 39 of the SPDT switch associated with region III. It should be noted that each of the

conductors

37 and 38 is common to the SPDT switches associated with regions II and IV.

Conductors

37 and 38 are the two throw conductors T and conductor 48 is the pole conductor P of the SPDT switch associated with region IV.

Beam-lead surface-oriented

PIN diodes

49, 50 are disposed across the spacings formed between

conductors

38 and 48 and

conductors

37 and 48, respectively. More specifically, the anodes of

diodes

49, 50 are commonly connected to conductor 48 and their respective cathodes to conductors'38 and 37, respectively.

In the SPDT switches associated with the regions I to IV only one PIN diode is used between each throw conductor T and pole conductor P of the particular switch. In accordance with the the principles of the present invention, if it is desired to provide additional isolation between the throw conductors and the pole conductor of the switch, additional PIN diodes may be provided. In each of the SPDT switches associated with regions V and VI, cf. FIGS. lb and la, respectively, such additional isolation is provided between each respective throw conductor and respective pole conductor of the particular switch.

More specifically, and as shown in greater detail in FIG. 4, the SPDT switch associated with region V has two bi-segmented throw printed conductors 51-51A and 52-52A, which are co-Iinearly aligned and symmetrically disposed on

sides

42c and 42b, respectively, of its pole conductor 42. It should be noted that conductor 42 is common to the switches associated with regions III and V, conductor 42 being a throw conductor T for the former and a pole conductor P for the latter. Edge 42a of conductor 42 is co-linearly aligned with

co-aligned sides

51b, 51b, 52b, and 52b of the

conductor segments

51, 51A, 52, 528, respectively. Each of the spacings 53-56 between

segments

51 and 51A, segment 51A and conductor 42, conductor 42 and segment 52A, and

segments

52A and 52, respectively, are provided with the aforementioned value W. The longitudinal dimensions of

segments

51A and 52A are each approximately twice, i.e. double, the aforementioned spacing W. As aforementioned, the width dimensions of the conductor 42, and

segments

51, 51A, 52, 52A are the aforementioned dimension Wl.

Across each of the spacings 53-56 is provided an aforementioned PIN diode 57-60, respectively, cf. FIG. lb.

Diodes

57 and 58 are poled in the same direction and in a series-coupling relationship with each other. Diodes 59-60 are also poled in the same direction and in a series-coupling relationship with each other. More specifically, diode 57 has its cathode and anode connected to

segments

51 and 51A, respectively; diode 58 has its cathode and anode connected to segment 51A and conductor 42, respectively; diode 59 has its anode and cathode connected to conductor 42 and segment 52A, respectively; and diode 60 has its anode and cathode connected to

segments

52A and 52, respectively.

Referring now to FIG. la, the angular orientation, spacing and alignment relationships of the two throw bi-segmented conductors 61-61A, 62-62A, and the pole conductor 30 of the SPDT switch associated with the region VI are identical to their counterparts 51-51A, 52-52A and 42, respectively, of the SPDT switch associated with region V. Likewise, the beamlead surface-oriented PIN diodes 63-66 are connected electrically to the segments or conductors, asthe case may be, 61, 61A, 62, 62A, 30 as their counterpart diodes 57-60, respectively, are connected to the counterpart segments or

conductors

51, 51A, 52, 52A, 42 of the switch associated with region V. It should be noted that conductor 30 is common to the switches associated with regions I and VI as a throw and pole conductor, respectively.

In the switch embodiments associated with the regions V and VI, symmetrical or balanced isolation is provided in each of the respective throw arms or conductors of each of these switches. It should be understood, however, that in certain cases asymmetrical isolation may be provided. In the SPDT switches associated with the regions VII and VIII, cf. FIG. 10, asymmetrical isolation is provided as will be explained in the following description.

Conductor 32, which is the pole conductor of the SPDT switch associated with region I, is also common to and is the pole conductor of the SPTT switch associated with the region VII. The conductors of this lastmentioned SPTT switch are shown in greater detail in FIG. 5, the view of which is oriented 90 counterclockwise with respect to the view of FIG. 1c. More specifically, it has two

throw conductors

67, 68, and a third throw conductor that is part of trisegmented throw conductor A-70C, which is also common to and is-part of a throw conductor of the SPTT switch associated with region VIII, cf. FIG. 1c. Thus, as shown in FIG. 1c, segment 70A and one-half of common segment 70B forms a throw conductor associated with the switch of region VII; and the segment 70C and the other half of the common segment 708 form a throw conductor the switch associated with the region VIII.

Referring again to FIG. 5, throw

conductors

67, 68 are in co-linear alignment and the pole conductor 32 is symmetrically disposed orthogonally to the

co-aligned conductors

67, 68 and in between their edges 67a and 68a, respectively. Edge 32a of conductor 32 is coaligned with the edges 67b and 68 b of

conductors

67, 68.

Conductor segments

70A, 70B, as well as segment 70C, and conductor 32 are also aligned with respect to each other. The

gaps

71, 72, 73, 74 between

conductors

67 and 32, 32 and 68, 32 and 70A, and 70A and 708, respectively, have the aforementioned

spacing W. Conductors

67, 68, 32, and

segments

70A, 70B, and 70C have the aforementioned width dimension WI. The respective longitudinal dimensions of the

segments

70A, 70B and 70C, are each twice the respective spacing W, that is, they are each 2W.

Beam-lead surface-oriented diodes 75-78, cf. FIG. 1c, are provided across the spacings 71-74 respectively. The anodes of diodes 75, 76, and 77 are commonly connected to the conductor 32, and their respective cathodes are connected to the

conductors

67, 68 and 70A, respectively. Diode 78 is poled in the same direction as diode 77. That is to say, the anode and cathode of diode 78 are connected to the

segments

70A and 708, respectively. Diodes 77 and 78 provide double the isolation in throw conductor arms 70A-'70B. Only single isolation is provided in each of the

other throw arms

67 and 68 by their. respective associated diodes 75, 76. Accordingly, the switch associated with region V11 has the aforementioned asymmetrical isolation.

Conductors

67 and 68 are also common to the SPTT switch associated with the region Vlll, cf. FIG. 1c. These

conductors

67 and 68 are two of the three throw conductors of .this last-mentioned switch. The third throw conductor to this switch is formed by the aforementioned segment 70B and 70C, segment 708 being common to the other switch associated with region Vll as previously explained. The conductor 79 is the pole conductor of the switch associated with the region V111.

Conductors

67, 68, 70B-70C, 79 of the SPTT switch associated with region Vlll have angular orientation, spacing and alignment relationships with respect to each other which are identical to the corresponding parameters of and are the mirror symmetry of their

respective counterparts

67, 68, 70A-70B, 32 of the switch associated with region VII. The beam-lead surface-oriented diodes 80-83 are poled in the same manner as their respective counterparts 75, 76, 77, 78, respectively. That is to say, the respective anodes of diodes 80-82 are commonly connected to the conductor 79, and their respective cathodes are connected to the conductors 80, 81 and 70C, respectively. Diode 83 has its cathode and anode connected to the segments 70B and 70C, respectively.

The operation of the apparatus shown in FIGS. la 1d will now be described. Under quiescent conditions, the switches associated with the regions l-Vlll are normally turned off. This is accomplished by providing a reverse-bias across each of the PIN diodes of the various switches. For the particular manner in which these diodes are poled, appropriate positive voltages are applied to the electrodes 6 of the noise filter condensers 13-25 to provide the reverse bias. To turn on one of the switches, the PIN diode, or diodes as the case may be, that connects the particular throw conductor T and pole conductor P desired to be switched on, is or are as the case may be forward-biased. This may be accomplished by selectively providing an appropriate negative voltage to the appropriate electrode c. 'As a result of the forward-biasing, the conductive path between the associated pole and particular throw conductor is completed. This allows the rf signal energy, if present, to be passed by the particular switch between its two so connected conductors. This will become more apparent from the more detailed description hereinafter.

Referring now to the operation of channel A, under quiescent conditions aforementioned appropriate positive voltages are applied to the electrodes of filters 13-19 through suitable respective biasing networks. For sake of clarity, only the biasing network 84 used to bias the diode 36 of the switch associated with region I, is ShOWlL'R includes a suitable power supply and switching means shown schematically as battery 85 and SPDT switch 86. Switch means 86 is preferably of the electronic type. By closing the arm of the switch 86 with its respective contacts R, the positive terminal of battery 85 is connected to the electrode 0 of filter 14 and its negative terminal is grounded with respect to the common ground 4. As a result, a positive voltage is applied to the electrode c and hence, to the cathode of diode 36 via the series-connection of filter 14, insulated wire conductor 87, printed conductor 88, bare wire conductor 27, and printed conductor 31. The anode of diode 36 is connected to the negative terminal of battery 85 by virtue of its connection to printed conductor 32, bare wire conductor 29, plated through hole 26, and ground layer 2 which as aforementioned is connected to the common ground 4. As a result, diode 36 is reverse-biased and hence, any rf signal present at coaxial connector 7 cannot be transmitted from the conductor 31 to the conductor 32 and vice versa. To place a forward bias across diode 36 so as to connect

conductors

31 and 32, the arm of switch 86 is closed on its contacts F.

The other biasing networks similar to the biasing network 84 are connected to the respective electrodes c of

filter

13, 15 to 19. The biasing network applied to the electrode 0 of filter 13 provides the biasing voltages for the series-connected diodes 63 and 64 of the switch associated with the region V1 and also to the diode 35 of the switch associated with the region I. The connection of series-connected diodes 63, 64 and 35 to the lastmentioned biasing network is by means of the filter 13, insulated wire conductor 89, printed conductor 90, bare wire conductor 27, printed conductor 61, diode 63, printed conductor segment 61A, diode 64, printed conductor 30, diode 35, printed conductor 32, bare wire conductor 29, plated through hole 26, layer 2 and from there to the common ground 4.

In a similar manner, the biasing network associated with the series-connected

diodes

65, 66 and 35 is connected thereto by means of filter 19, insulated wire conductor 91, printed conductor 92, bare wire conductor 27, printed conductor 62, diode 66, printed conductor segment 62A, diode 65, printed conductor 30, diode 35, printed conductor 32, bare wire conductor 29, plated through hole 26, layer 2 and from there to the common ground 4. Applying an appropriate negative voltage to the electrode 0 of filter 13, diodes 63, 64 and 35 become forward-biased thereby placing

conductors

61 and 30 and

conductors

30 and 32 in electrical connection. As a result, rf signals, if present at connector 6 can be transmitted through the conductor 32 and vice versa.

In a similar manner, if an appropriate negative voltage is applied to the electrode 0 of filter l9,

diodes

66, 65 and 35 become forward-biased and any rf signal at connector 5 will be transmitted via the

electriallyconnected conductors

62, 30 and 32, or vice versa. It should be understood that a forward-biased voltage would be selectively applied to one of the respective electrodes c of

filters

13, 14 or 19 so as to provide the selective electrical connection of one of the

conductors

61, 62, 31 to conductor 32.

In a similar manner, diode of the switch associated with region Vll isbiased by a biasing network which is connected to electrode 0 of filter 15. This same lastmentioned biasing network also biases the diode of the switch associated with the region Vlll. More specifically, the last-mentioned biasing network is connected to the filter 15, insulated wire conductor 92, printed conductor 94 and from there to two branch circuits. One branch circuit comprises the series-connected bare wire conductor 27, printed conductor 67, diode 75, printed conductor 32, bare wire conductor 29, plated through hole 26 and from there to the layer 2 and hence, common ground 4. The other branch circuit includes the series-connected are wire conductor 27, printed conductor 67, diode 80, printed conductor 79, bare wire conductor 29, plated through hole 26, and from there to layer 2 and the common ground 4.

Diode 76 is biased by a biasing network connected to the electrode c of filter 18. More specifically, the lastmentioned biasing network is connected to seriesconnected filter 18, insulated wire conductor 95, printed conductor 96, bare wire conductor 27, printed conductor 68, diode 76, printed conductor 32, bare wire conductor 29, plated through hole 26, and from there to the commonly grounded layer 2. Seriesconnected diodes 77, 78 of the switch associated with the region Vll, have a biasing network which is connected as follows: filter 16, insulated wire conductor 97, printed conductor 98, bare wire conductor 27, printed circuit conductor segment 70B, diode 78, printed circuit conductor segment 70A, diode 77, conductor 32, bare wire conductor 29, plated through hole 26, and from there to the commonly grounded layer 2. The last-mentioned biasing network also provides bias for series-connected diodes 83 and 82 of the switch associated with region Vlll via filter 16, insulated wire conductor 97, printed conductor 98, bare wire conductor 27, segment 70B, diode 83, segment 70C, diode 82, printed conductor 79, bare wire conductor 29, plated through hole 26 and from there to layer 2 and the common ground 4. The diode 81 of the switch associated with region VIII is biased by a biasing network which is connected to the filter 17, which in turn is connected to the following series-connected elements, insulated wire 99, printed conductor 100, bare wire conductor 27, conductor 68, diode 81, printed conductor 79, bare wire conductor 29, plated through hole 26, and from' there to the layer 2 and common ground 4.

Connected across the throw arm 67 and the elongated common pad e of the series of five plated through holes 26 shown thereat, are a pair of discrete attenuation networks 101 of the discrete chip type, each having a predetermined attenuation value, e.g. 20 decibels. An identical discrete attenuation network 101 is also connected across the printed conductor 68 and elongated pad e of the plated through holes 26 shown thereat. Another such attenuation network 101 is connected across the conductor 37 of the switches associated with regions ll and 1V, cf. FIG, 1d and the elongated common pad e of the five plated through holes 26 shown thereat.

By applying a negative voltage to the electrode c of filter l6, diodes 77-82 are forward-biased and conductor 32 is electrically connected 'to the conductor 79. Applying a positive voltage to the electrode c of filter l5 on the other hand, will forward-bias both diodes 75 and 80 and consequently, conductor 32 is electrically connected to conductor 67 and conductor 67 will be electrically connected in turn to conductor 79.

Conductor 32 is electrically connected to conductor 79 via conductor 68 by applying a negative voltage to both electrodes 0 of the

filters

17, 18 which forwardbiases diodes 76 and 81 simultaneously, thereby electrically connecting conductor 32 to conductor 68. Conductor 68 in turn is connected electrically to conductor 79. In operation, to connect conductor 32 electrically to conductor 79 via

conductor

67, 68 or the trisegmented conductor 70A-70C, a negative voltage is applied exclusively to the appropriate one of the respective electrodes 0 of filters l5, l7 and 18, 16, respectively.

For the aforementioned decibel example of the networks 101, the SPTT switches associated with regions VII and VIII coact to allow the rf signal being passed between

conductors

32 and 79 to have zero or 20 or 40 decibels of attenuation depending upon whether diodes 7778 and 8283, or diodes 76 and 81, or diodes and are forward-biased respectively.

Referring now to the operation of channel B, under quiescent conditions, as aforementioned, the respective electrodes c of filters 20-25 have applied thereto appropriate positive bias voltages from suitable power supplies, not shown in FIGS. lb-ld for sake of clarity. As a result, the respective PlN' diodes of the switches associated with channel B are reverse-biased and the corresponding switches are hence, in an open or turned-off condition.

In FIG. 8 there is shown in greater detail a schematic representation of the biasing and switching network and the circuitry of the switch associated with the region V. Biasing and switching network 102 has a DPDT schematically shown switch 102A which when closed with its contacts R allows the positive voltage from the battery 102B to be applied to the electrode 0 of the filter 20. More specifically, under these connections the positive terminal of battery 1028 is connected to electrode c of filter 20 and through the series-connected following elements: filter 20, insulated wire conductor 103, printed conductor 104, bare wire conductor 27, printed conductor 51, diode 57, printed conductor segment 51A, diode 58, printed conductor 42, diode 46 of the switch associated withh region lll, printed conductor 39, bare wire conductor 29, plated through hole 26, layer 2, and from layer 2 back to the negative terminal of battery 1023 through the common ground connection, cf. FIGS. la-lb and FIG. 8. As such, the

diodes

57, 58 and 46 are reverse-biased. By placing the switch 102A in closed position with its contacts F,

diodes

57, 58 and 46 become forward-biased causing conductor 51 to be electrically connected to conductor 42 and the latter to be electrically connected to conductor 39. I

In a similar manner switching network 102', which includes a schematically shown DPDT switch 102a and power supply 10212, is electricallyconnected to the series-connected elements, filter 25, insulated wire conductor 105, printed conductor 106, bare-wire conductor 27, printed wire conductor 52, diode 60, printed conductor segment 51A, diode 59, printed conductor 42, diode 46, printed conductor 39, bare wire conductor 29, plated through hole 26, layer 2, and back to the network 102' through a common ground connection, cf. FIGS. 1a-1b and FIG. 8. Thus, switch 102a provides reverse and forward bias to the

diodes

46, 59 and 60, thereby providing electrical disconnection and connection, respectively, between the

conductors

52 and 42 and between

conductors

42 and 39. In FIG. 8, for sake of clarity,

bare wire conductors

27 and 29 are represented schematically by their inductive impedances.

The other diode 47 of the switch associated with region 111 is biased by a biasing network which is connected to it via the series-connected elements to wit:

filter 24, insulated wire 105A, printed conductor 106A, bare wire conductor 27, printed conductor 43, and from there to the diode 47. The return path includes the series-connected printed conductor 39, bare wire conductor 29, plated through hole 27, layer 2 and from there back to the bias network via the common ground connection.

Diode 41 of the switch associated with region 11, cf. FlG. 1d, is biased by a biasing network, not shown, which is applied to the electrode c of filter 21. The connection is affected through the filter 21 and seriesconnected elements as follows: insulated wire conductor 107, printed conductor 108, bare wire conductor 27, printed conductor 37, diode 41, printed conductor 39, bare wire conductor 29, plated through hole 26, layer 2, and from there back to the biasing networks via the common ground connection. The other diode 40 of the switch associated with region I] is biased by a biasing network that is connected to filter 23, and from there to insulated wire conductor 109, printed conductor 110, bare wire conductor 27, printed conductor 38, diode 40, printed conductor 39, bare wire conductor 29, plated through hole 26, layer 2, and from there back to the biasing network through a common ground connection. Hence, with appropriate negative and positive voltages applied to the respective electrodes of

filters

21 and 23, respectively, and electrical connection is provided between

conductor

39 and 37 and not between conductor 39 and conductor 38, respectively. If the aforementioned voltage polarity being applied to the electrodes c of

filters

21 and 23 are reversed, then conductor 39 is electrically connected to conductor 38 but not to conductor 37.

The biasing network which biases the diode 40 of the switch associated with region ll is also used to provide the bias for the diode 49 of the switch associated with the region IV. The biasing arrangement is connected to the aforementioned series-connected elements of filter 23,

conductors

109, 110, 27, 38, diode 49, and from there to conductor 48, bare wire conductor 29, and plated through hole 26, layer 2, and from there back to the biasing network through the common ground connection. As a consequence, when a forward-bias voltage is applied to electrode of filter 23, diodes 40 and 49 will be forward-biased concurrently and the

conductors

39, 38 and 48 will be electrically connected. Positive bias voltage applied to the electrode c of filter 23 reverse-biases concurrently the diodes 40 and 49 resulting in the

conductors

39, 38 and 48 being electrically disconnected.

The other diode 50 of the switch associated with the region IV is biased bya biasing network applied to the electrode 0 of filter 22. Electrical connection takes place through the series-connected elements insulated wire conductor 111, printed conductor 112, bare wire conductor 27, printed conductor 37, diode 50, printed conductor 48, bare wire conductor 29, plated through hole 26, ground layer 2, and from there back to the biasing network through the aforementioned common ground connection.

By judiciously applying the appropriate bias voltages to the appropriate electrodes c of the filters 20-25, rf energy between connector 12 and one of the connectors 9-11 is passed by channel B with zero or 20 decibel attenuation, as the case may be, depending upon if diodes 40 and 49 or diodes 41 and 50 are forward biased, respectively.

In accordance with the principles of my inventive discovery, l have found a critical spacing relationship W between the pole and throw conductors of an N-pole M-throw microstrip switch, where N and M are integers. This spacing relationship W provides the particular switcli with a substantially constant amplitude signal response characteristic over a wide frequency range, heretofore unknown in the art. The spacing relationship W is expressed in the following equation:

where A is the wavelength at the upper frequency of the frequency bandwidth. In certain cases, the spacing W is provided between the short, i.e. width, edges ofa particular pole conductor and a particular throw conductor of the same particular switch. in other cases, the spacing W is provided between the edge of one and the elongated side of the other. For example, it may be between the edge of a particular throw conductor and the side of a particular pole conductor of a particular switch, or alternatively between the edge ofa particular pole conductor and the side of a particular throw conductor of a particular switch. in these latter cases, the particular conductor having its edge so spaced may be disposed anywhere along the side of the other conductor from a first position to a second position. In the first position, the side of the particular conductor, which has its edge so spaced, and which last-mentioned side is closest to the other conductors edge, is co-linearly aligned with the last-mentioned edge. In the second position, the last-mentioned side of the particular conductor is a distance equal to the product 3W from the lastmentioned edge. This was previously discussed with respect to the side 43b of conductor 43 and the edge 39aof conductor 39 of the switch associated with region ill, of. FIG. 3. By way of further example, side 3112 of the conductor 31 may be disposed anywhere along the side 32c of conductor 32 from the position shown in FIG. 2 to a position indicated by the dash-line 31bshown therein. Furthermore, in case where multiple PlN diodes are provided in cascade, such as the cascaded

diodes

57 and 58 or the cascaded

diodes

59 and 60 of the switch associated with region V of FIG. lb or cascaded diodes 63 and 64 or cascaded diodes 65 and 66 of the switch associated with region VI of FIG. la, or the cascaded diodes 77 and 78, or 78 and 83, or 83 and 82 of the switches associated with regions VII and VIII of FIG. 1c, a center-to-center spacing between the particular cascaded diodes is provided which is equal to the product 3W.

To further enhance the bandwidth characteristic of the switch, there is provided a certain angular relationship a of the

bare wire conductors

27, 29 with respect to the planar surface of the particular printed conductors to which they are connected and the maintenance of these conductors in this angular position for a certain minimum height relationship H, cf. FIG. 7. The height relationship H off the particular bare wire conductor is from its point of contact or connection with the particular printed conductor to which it is connected to a point above said connection, cf. FIG. 7. The optimum angular relationship a is to a minimum of 45. The height relationship H is approximately 0.100 t 0.030 inches.

Presence of adverse signal interference is mitigated by configuring and connecting the insulated wire conductors, e.g. conductor 87, so as not to directly pass over the printed conductors of the apparatus of FIG. 1, wherever possible.

One such SPDT microstrip switch built in accordance with the principles of this invention had a substantially constant amplitude response for a bandwidth of 9:1 with a bandwidth of 2 to 18 gigahertz.

In accordance with still other principles of my invention, the edge of the conductor associated with the gap having the aforementioned spacing W may be elongated to improved coupling between itself and the side or edge as the case may be of the other conductor which is associated with the particular gap. For sake of clarity, there is shown in FIG. 4 in dash-line form elongated extensions 113 to 116 which are provided on the respective left and right edges of printed conductor segment 51A and left and right edges of the printed conductor segment 52A, respectively, as shown therein. The extensions 113-116 are extended adistance W1 above and below the top and bottom respective sides of the

segments

51A and 52A. The orthogonal other dimensions of the extensions 113 to 116 are each 2W/3 as shown in FIG. 4. It should be understood that alternatively a similar extension could have been provided on the edge 51a of the conductor 51, associated with the gap 53, for example, in lieu of the extension 113. However, by providing both extension 113 and an opposite extension on edge 51a even further coupling is enhanced.

Turning now to FIG. 6, there is partially shown a configuration for the printed conductors of a single pole four throw microstrip switch utilizing the principles of the present invention. Each of the throw conductors 117 to 120 arespaced from the pole conductor 121 with the aforementioned spacing W. Across the gap formed between edge 117a and side 12lb of

conductors

117 and 121 there is provided a beam-lead diode connecting the last two-mentioned conductors but omitted in FIG. 6 for sake of clarity. A beam-lead diode, not shown, is also provided across each of the gaps formed between the edges 118a and 121a, between edges 119a and 121a and between edge 120a and side 1210, the respective conductors 118 to 121. The four beam-lead surface-oriented PIN diodes are soconnected that the same type electrodes, e.g. their respective anode electrodes, are connected in common to the conductor 121 and their other type electrodes are connected to individual ones of the conductors 117 to 120.

Referring now to FIG. 9 there are partially shown the pole and throw conductors of a double-pole, doublethrow microstrip switch made in accordance with the principles of the present invention. Shown schematically therein is the interconnecting circuitry to the biasing networks, not shown, used to bias the schematically shown beam-lead, surface-oriented PIN diodes associated with the switch. The biasing networks are connected to the electrodes c of the noise filters 122 to 125. The noise filters in turn are connected to the LC filter network 27-28'.

Conductors

126 and 127 are the two pole conductors and

conductors

128 and 129 are the two throw conductors of the DPDT switch of FIG. 9. Printed conductor segments 130 to 133 are provided between

conductors

126 and 128, between

conductors

128 and 127, between

conductors

127 and 129, and between

conductors

129 and 126, respectively.

Conductors

128 and 129 are co-linearly aligned with respect to each other, and

conductors

126 and 127 are co-linearly aligned with respect to each other.

Conductors

128 and 129 are orthogonal to

conductors

126 and 127. A gap having the aforementioned spacing W is formed between the parallel adjacent edges of each conductor 126-129 and segment -133. A beamlead surface-oriented PIN diode, i.e. diodes 134-141, is connected across each of the aforementioned gaps to the printed conductor and segment associated with the particular gapsln addition, the spacing between the particular diodes of each diode pair 134-135, 136-137, 138-139, and -141 is equal to the product 3W. By way of explanation, the respective anodes of the diodes 134-141 are connected to their associated conductors 126-129 and their respective cathodes are connected to their associated segments 130-133. The return DC bias paths are affected through the bare wire conductors 29.

In operation, under quiescent conditions, the diodes 134-141 are reverse-biased by applying a positive bias voltage to the electrodes 0. By applying a negative volt- 7 age to the electrode c of filter 122,

diodes

140 and 141 become forward-biased thereby providing an electrical connection between the conductor 129 and segment 133 and between conductor 126 and segment 133 and hence, between the

conductors

129 and 126. If concurrently, a negative bias voltage is applied to the electrode c of filter 124

diodes

136 and 137 will become forward-biased and hence, cause

conductors

128 and 127 to be electrically connected. Under these condi- ,

tions diodes

134, 135, 138 and 139 are maintained reverse-biased and hence, there is no electrical connection effected between

conductors

126 and 128 or between

conductors

127 and 129.

If on the other hand, negative bias voltages are applied to the electrodes 0 of

filters

123 and 125, exclusively, and the other electrodes 0 of

filters

122 and 124 remain at the positive bias voltage levels, then

diodes

134, 135, 138 and 137 become forwardbiased and as a

result conductors

126 and 128 are electrically connected and

conductors

127 and 129 are electrically connected.

It should be understood that while the invention has been described in particular preferred embodiments and preferred operational modes, that the invention could be practiced with other modifications and/or operational modes. For example, the PIN diodes of the various embodiments may be poled in a direction opposite to that previously described in which case appropriate negative and positive bias voltages would be applied to the electrodes 0 to reverse bias and forward bias, respectively, the particular PINdiode.

It is to be further understood that the invention can be practiced for N-pole multi-throw microstrip switches where N is an integer greater than two.

Thus, while the invention has been particularly shown and described with reference to the preferred embodiments, it will be understood by those skilled in the art that the foregoing and other changes in form and detail may be made therein without departing from the spirit and scope of the invention.

I claim:

1. A microstrip N-pole M-throw switch having a predetermined bandwidth, N and M being integers, respectively, said switch comprising in combination:

a planar dielectric substrate having first and secon opposite surfaces,

a planar metallic ground plane layer disposed on said first surface,

N printed circuit conductor means disposed on said second surface,

beam-lead surface-oriented PIN diode serially connected to said first and second elements across said second spacing, each of the two said PIN diodes being poled in the same direction with respect to each other, the spacing between the centers of said diodes being equal to the product 3 X 0.2l5A/3. 5. A microstrip switch according to claim 3 wherein M printed circuit conductor means disposed on said 5 N 1 and M is greater than I, said first and second second Surface" predetermined numbers corresponding to said first at least one of Said p f conductor means and and second integers, respectively, and each of the at least one e Said M P conductor means remainder of the M said second printed conductor havlng P 8 therebetween equal to means is spaced from said such one printed conwhere A is the wavelength at the pp r q y 10 ductor means of said first printed conductor means of the predetermined bandwidth and by a respective mutuall l y exc usive other spacing a discrete beam-lead surface-oriented PIN diode seriequal to id 0 215 /3 each, d

2: fiz t ggggd scfg of Such ones iiand said switch further comprising additional M 1 dismeans across Sal spaemgcrete beam-lead surface-oriented PIN diodes each 2. A microstrip switch according to claim 1 wherein 15 of Said M 1 diodes being serially connectezj to a said one of said M printed circuit conductor means mutually exclusive one of Said remainder M Second comprises first a second primed circuit conduc' printed conductor means and said such one N first $2:; d g f rtz d 'gsgliixgfdiiigiintgg printed conductor means across the respective said other spacing therebetween. by Said and sald second element befng 6. A microstrip switch according to claim 3 further spaced from said first element by a second spacing comprising. ?:1 yz z guflflf ggsgsing another discrete means for selectively biasing said PIN diode in for- ,r ward and reverse modes, and 22:23::132255'25:2:2fg jlgggz z gigzsigx 25 means for coupling said means for selectively biasing to said diode. second s acin each of the two said PIN diodes being p F ingthe same direcfion with res ect to 7. A microstrip switch according to claim 6 wherein each other the p g between the centerszf Said said such one printed conductor means of said first diodes g equal to the product 3 X 0 215A printed circuit conductor means comprises first 3- A microstrip p M throw switch g a p l and second printed circuit conductor elements, determined bandwidth, N and M being first and second 23523 12 2221;f ggzg gz lgg g itg g zzj integers, respectively, said switch comprising in combip nation: circuit conductor means by said spacing, and said a planar dielectric substrate having first and second Second element bemg .spaced from i first eleopposite surfaces ment by a second spacing equal to said 0.2l5k/3, a planar metallic ground plane layer disposed on said first Surface said switch further comprising another discrete a predetermined first number of printed circuit conbeamgead igie i g senany ductor means disposed on said second surface, said necte to an 2 i e f g first number corresponding to one of said integers, 4O f i each 9 Y I dlo es a predetermined second number of printed circuit bemg poled m the s ame dlrecuon respect F conductor means disposed on said second surface, f j' the spacmg between the centers of Sam said second number corresponding to the other of dlodes bemg equal to the product 3 X Glue/3' said integers, f at least one of said first printed conductor means and means for selecuvely blasmg further b'asmg Sam at least one of said Second primed conductor diodes ln concurrent forward bias and concurrent means having a spacing therebetween equal to e 0215A, where A is the wavelength at the upper 8. A microstrip switch accord ng to claim 6 wherein frequency of the predetermined bandwidth, and N: 1 e M 15 greater than q first i eecond P a discrete beam-lead surface-oriented PIN diode seridetermlf'led numbers eofl'espofidmg to 531d first e ally connected to each of such ones of said first and second 8 P y: and each of the fsecond primed conductor means acmss said sPacder of the M said second printed conductor means is ing' spaced from said such one printed conductor means of 4. A microstrip switch according to claim 3 wherein said first p f conduetoemeans by a resPective said such one printed conductor means of said first exeluslve other Spaemg equal to Said 0215M 3 printed circuit conductor means comprises first each, and and second printed circuit conductor elements, 531d Switch further eempl'lsmgi said first element being spaced from said such one additional M i discrete beam-lead surface-oriented printed conductor means of said second printed PIN diodes, each 0f Said M l dlodes belng serlauy circuit conductor means by said spacing, and said connected to a mutually exclusive one of said resecond element being spacedfrom said first elemain M Second printed Conductor means and ment by a second spacing equal to said 0.2l5A/3, said such one N first printed conductor means and across the respective said other spacing therebesaid switch further comprising another discrete tween,

additional selective M l biasing means for selectively biasing mutually exclusive ones of said M l diodes in forward and reverse bias modes, and

3 ,774, 1 23 19 20 other coupling means for coupling each of said seleccapacitor, said rfchoke being a bare wire conductor.

five M l biasing means to the Particular diode of 10. A microstrip switch according toclaim 9 wherein the M 1 diodes which the particular M l biassaid rf choke and said bypass capacitor are connected mg means biases.

9. A microstrip switch according to claim 6 wherein to said diode as a low pass LC filtersaid coupling means comprises an rf choke and bypass

Claims

1. A microstrip N-pole M-throw switch having a predetermined bandwidth, N and M being integers, respectively, said switch comprising in combination: a planar dielectric substrate having first and second opposite surfaces, a planar metallic ground plane layer disposed on said first surface, N printed circuit conductor means disposed on said second surface, M printed circuit conductor means disposed on said second surface, at least one of said N printed conductor means and at least one of said M printed conductor means having a spacing therebetween equal to 0.215 lambda /3, where lambda is the wavelength at the upper frequency of the predetermined bandwidth, and a discrete beam-lead surface-oriented PIN diode serially connected to each of such ones of said N and M printed conductor means across said spacing.

2. A microstrip switch according to claim 1 wherein said one of said M printed circuit conductor means comprises first and second printed circuit conductor elements, said first element being spaced from said one of said N printed circuit conductor means by said spacing, and said second element being spaced from said first element by a second spacing equal to said 0.215 lambda /3, and said switch further comprising another discrete beam-lead surface-oriented PIN diode serially connected to said first and second elements across said second spacing, each of the two said PIN diodes being poled in the same direction with respect to each other, the spacing between the centers of said diodes being equal to the product 3 X 0.215 lambda /3.

3. A microstrip N-pole M-throw switch having a predetermined bandwidth, N and M being first and second integers, respectively, said switch comprising in combination: a planar dielectric substrate having first and second opposite surfaces, a planar metallic ground plane layer disposed on said first surface, a predetermined first number of printed circuit conductor means disposed on said second surface, said first number corresponding to one of said integers, a predetermined second number of printed circuit conductor means disposed on said second surface, said second number corresponding to the other of said integers, at least one of said first printed conductor means and at least one of said second printed conductor means having a spacing therebetween equal to 0.215 lambda /3, where lambda is the wavelength at the upper frequency of the predetermined bandwidth, and a discrete beam-lead surface-oriented PIN diode serially connected to each of such ones of said first and second printed conductor means across said spacing.

4. A microstrip switch according to claim 3 wherein said such one printed conductor means of said first printed circuit conductor means comprises first and second printed circuit conductor elements, said first element being spaced from said such one printed conductor means of said second printed circuit conductor means by said spacing, and said second element being spaced from said first element by a second spacing equal to said 0.215 lambda /3, and said switch further comprising another discrete beam-lead surface-oriented PIN diode serially connected to said first and second elements across said second spacing, each of the two said PIN diodes being poled in the same direction with respect to each other, the spacing between the centers of said diodes being equal to the product 3 X 0.215 lambda /3.

5. A microstrip switch according to claim 3 wherein N 1 and M is greater than 1, said first and second predetermined numbers corresponding to said first and second integers, respectively, and each of the remainder of the M said second printed conductor means is spaced from said such one printed conductor means of said first printed conductor means by a respective mutually exclusive other spacing equal to said 0.215 lambda /3 each, and said switch further comprising additional M - 1 discrete beam-lead surface-oriented PIN diodes, each of said M - 1 diodes being serially connected to a mutually exclusive one of said remainder M second printed conductor means and said such one N first printed conductor means across the respective said other spacing therebetween.

6. A microstrip switch according to claim 3 further comprising: means for selectively biasing said PIN diode in forward and reverse modes, and means for coupling said means for selectively biasing to said diode.

7. A microstrip switch according to claim 6 wherein said such one printed conductor means of said first printed circuit conductor means comprises first and second printed circuit conductor elements, said first element being spaced from said such one printed conductor means of said second printed circuit conductor means by said spacing, and said second element being spaced from said first element by a second spacing equal to said 0.215 lambda /3, and said switch further comprising another discrete beam-lead surface-oriented PIN diode serially connected to said first and second elements across said second spacing, each of the two said PIN diodes being poled in the same direction with respect to each other, the spacing between the centers of said diodes being equal to the product 3 X 0.215 lambda /3, and said means for selectively biasing further biasing said diodes in concurrent forward bias and concurrent reverse bias modes.

8. A microstrip switch according to claim 6 wherein N 1 and M is greater than 1, said first and second predetermined numbers corresponding to said first and second integers, respectively, and each of the remainder of the M said second printed conductor means is spaced from said such one printed conductor means of said first printed conductor means by a respective mutually exclusive other spacing equal to said 0.215 lambda /3 each, and said switch further comprising: additional M - 1 discrete beam-lead surface-oriented PIN diodes, each of said M - 1 diodes being serially connected to a mutually exclusive one of said remainder M second printed conductor means and said such one N first printed conductor means across the respective said other spacing therebetween, additional selective M - 1 biasing means for selectively biasing mutually exClusive ones of said M - 1 diodes in forward and reverse bias modes, and other coupling means for coupling each of said selective M - 1 biasing means to the particular diode of the M - 1 diodes which the particular M - 1 biasing means biases.

9. A microstrip switch according to claim 6 wherein said coupling means comprises an rf choke and bypass capacitor, said rf choke being a bare wire conductor.

10. A microstrip switch according to claim 9 wherein said rf choke and said bypass capacitor are connected to said diode as a low pass LC filter.