US3767991A

US3767991A - Microelectronic three-wire synchronizer

Info

Publication number: US3767991A
Application number: US00285296A
Authority: US
Inventors: R James
Original assignee: Bendix Corp
Current assignee: Bendix Corp
Priority date: 1972-08-31
Filing date: 1972-08-31
Publication date: 1973-10-23
Anticipated expiration: 1990-10-23

Abstract

A three-wire synchronizer includes a system of microcircuits interfaced for determining with minimum interaction and at a command instant the position of a synchro transmitter shaft, and using the Y-connected synchro stator voltage relationship as a zero reference for providing a bipolar d.c. signal proportional to changes in shaft position with respect to the reference.

Description

O Umted States Patent 1191 1111 3,767,991 James Oct. 23, 1973 1 MICROELECTRONIC THREE-WIRE 2,819,438 1/1958 Angelo 318/608 x SYNCHRONIZER 3,340,451 9/1967 Farrand 318/607 X 3,379,944 4/1968 Nuttall et al 1 318/608 X Inventor: Robert J Bloomfield, 3,665,500 5/1972 Lewis 318/599 x [73] Assignee: The Bendix Corporation, Teterboro,

Primary ExaminerB. Dobeck [22] Filed: 31 1972 Att0rneyAnthony F. Cuoco et a1.

[21] Appl. No.: 285,296

g [57] ABSTRACT [52] Cl 318/606 318/607 A three-wire synchronizer includes a ystem of micro- Int Cl Gosh 1/01 circuits interfaced for determining with minimum ini 607 608 teraction and at a command instant the position of a o earc 3l8/654 synchro transmitter shaft, and using the Y-connected synchro stator voltage relationship as a zero reference References Cited for providing a bipolar d.c. signal proportional to UNITED STATES PATENTS changes in shaft position with respect to the reference.

2,433,195 12/1947 Bond 318/608 9 Claims, 2 Drawing Figures REGULATED 0 POWER SUPPLY 2 4 6 e 12 14 3 (a) 1 1 1 WTRANSLATOR 1 FREQ PHASE D|FF W CIRCUIT DOUBLER EJ 3825? AMP H llfl E ll H q CUIT CIRCUIT REFER SAWTOOTH PULSE REE' TRANS. GEN. WIDTH l f g fiSYNC |NpUT CIRCUIT CIRCUIT MOD. COMMAND THRESHOLD DETECTOR 1 MICRO ELECTRONIC THREE-WIRE SYNCHRONIZER BACKGROUND OF THE INVENTION the type described wherein an arrangement of micro- I circuits is used for accomplishing the desired result at a lower cost and with reduced space and weight requirements.

2. Description of the Prior Art Prior to the present invention three-wire synchronizers were constructed of relatively large numbers of discrete circuit elements which added to the size, weight and complexity of the resulting apparatus and hence limited design versatility. The present invention adapts standard available microcircuits to provide advantages of complex circuit performance within the size and weight of a relatively few microelectronics packages.

SUMMARY OF THE INVENTION square wave carrier signal. At a synchronizing instant and thereafter, the phase of this output is held constant by switching an analog integrator to a hold mode and thereby opening of feedback loop. This sets the final phase of the output which corresponds to an updated zero synchro shaft angle reference position. Further changes in shaft angle position generate a phase difference which appears as a proportional d.c. signal at the output of a phase detector.

The. main object of this invention is to provide a novel system of microelectronics for implementing a three-wire synchronizer function commonly required in flight control systems and having the advantage or reduced cost and economy of space and weight.

Another object of this invention is to interface the microelectronics with a minimum of interaction for relatively easy assembly of functionally complex subsystems in simple building blockfashion.

Another object of this invention is to replace a relatively large number of discrete circuit elements with microelectronics for implementing complex circuit performance within the size of a relatively few standard available microcircuit packages.

The foregoing and other objects and advantages of the invention will appear more fully hereinafter from a consideration of the detailed description which follows, taken together with the accompanying drawings wherein one embodiment of the invention is illustrated by way of example. It is to be expressly understood, however, that the drawings are for illustration purposes only and are not to be construed as defining the limits of the invention.

DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing generally the components of the invention and the novel arrangement thereof.

FIG. 2 is an electrical schematic diagram showing in substantial detail the components of the invention shown in FIG. 1.

DESCRIPTION OF THE INVENTION With reference first to FIG. 1, three-wire sinusoidal signals (a), (b) and (c) at for example, a 400 Hz. frequency, such as may be provided by a conventional Y- connected synchro transmitter stator, are applied as inputs to a translator circuit 2. Translator circuit 2 shifts the phase of two of the three-wire input signals, (a) and (b) for example, and provides at its output a square wave carrier signal E which has a phase corresponding to synchro shaft angular position.

Signal E is applied to a frequency doubler 4 which provides a short duration square wave signal at double the frequency, but of the same phase as signal E The double frequency signal is applied to a phase detector 6. A reference signal from a pulse width modulator 16 is applied to phase detector 6.

The output from phase detector 6 which corresponds to the difference in phase between the signals from frequency doubler 4 and pulse width modulator 16 is applied to a chopper circuit 8 which chops a regulated dc. power supply 10. Chopper circuit 8 is connected to a differential amplifier 12 which applies a large dc. gain to the dc component of the chopper circuit output. The output from differential amplifier 12 is applied to an output filter 14 which provides a signal E which is a bipolar d.c. signal proportion to the change in angular position of the synchro shaft.

The reference signal for phase detector 6 is provided by pulse width modulator 16 in response to inputs from an analog integrator 18 and a sawtooth generator 20. Sawtooth generator 20 is driven by a reference signal (d) applied to a translator circuit 22 for providing a 400 Hz. fixed phase signal. Analog integrator 18 applies a feedback signal to pulse width modulator 16 for providing a zero shaft position reference when the integrator is in the hold mode as commanded by a synchronizingcommand signal (f). When the integrator is not in the hold mode, a threshold detector circuit 24 insures continuous updating of the zero reference over a full 360 of synchro shaft angle rotation by resetting integrator 18 to a level in its linear range where the now closed feedback loop can find the new zero reference.

With reference now to FIG. 2, translator circuit 2 includes two

phase shifting circuits

30 and 32 for performing a trigonometric conversion on three-wire sinusoidal signals (a) and (b), respectively. By phase shifting the 400 Hz. carriers of the signals, one by -30 and the other by trigonometric identities are implemented for enabling an amplifier 34 connected to

phase shifting circuits

30 and 32 in open loop configuration to provide signal E In this connection it is to be noted that square wave signal E, is produced conveniently from the sine wave result of the trigonometric conversion by virtue of the high internal gain of amplifier 34 and the sensing of zero crossings of its input difference sine wave.

Phase shift circuits

30 and 32 will be recognized as all pass filters with

amplifiers

36 and 38 therein being of the inverting type having unity gain and low output impedance.

Direct interfacing of translator circuit 2 and frequency doubler 4 is made possible through a zener diode 40, connecting amplifier 34 and the frequency doubler, utilizing the advantage of built-in current limiting of the amplifier. Frequency doubler 4 is implemented as an exclusive OR circuit which is a logic type monolithic integrated circuit interfacing directly with phase detector 6 which is also a logic type integrated circuit. The short duration of the signal from frequency doubler 4 still permits an accurate phase comparison, since phase detector 6 responds only to the negative trailing edge of its input square waveforms to provide an output pulse train.

The average value of the output pulse train from phase detector 6 is accurately proportional to the pulse duty cycle and hence to the phase difference of the input signals, only if the pulse amplitude is held cons: tant. To accomplish this a transistor 48 in chopper 8 is driven by the pulse train from phase detector 6 for chopping the output of regulated d.c. supply circuit 10.

The output from chopper circuit 8 is applied to differential amplifier circuit 12, with filtering being provided by a capacitor 52 connected in feedback relation to an amplifier 54 in differential amplifier 12. Thus, the differential amplifier circuit provides a large d.c. gain to the d.c. component in the output of chopper circuit 8. Since one input to amplifier 54 is biased by the output from regulated supply circuit 10, a mid-value duty cycle is set for providing a bipolar d.c. output corresponding to synchro shaft angular position. Low offset, offset drift and high internal gain of the differential amplifier circuit limits errors to the tolerance of external precision resistors used in this circuit.

Output filter 14 includes an amplifier 56 with multiple feedback provided by a capacitor 58 and a resistor 60 to make possible a ripple reduction in the system outputwithout a significant increase in output response time, and with a minimum of-external circuit components. This RC filter arrangement requires a low source impedance as provided by the output of amplifier 52 in differential amplifier circuit 12.

The reference signal for thephase comparison made by phase detector 6 is provided by pulse width modul'ator 16. The phase shift of the negative going edge of the square wave output provided by pulse width modulator 16 as sensed by phase detector circuit 6 results from the zero difference detection of two input signals at the input of an amplifier 62 connected in open loop configuration in the pulse width modulator. One of the input signals is a feedback signal derived from the synchronizer output and the other is a sawtooth wave derived from and in fixed phase relationship with the 400 Hz. synchro-excitation supply. An external zener diode 64 conditions the output of pulse width modulator 16 to a suitable logic level for driving phase detector circuit 6. The high input resistance of amplifier 62 minimizes errors from temperature sensitive loading of input coupling networks.

Sawtooth generator generates its sawtooth wave input to pulse modulator 16 by discharging, in fixedphase relationship with the 400 Hz. synchro excitation, a constant current charging capacitor 66. Sawtooth stabilization is provided by amplifier feedback control of the constant current through

amplifiers

68 and 70 which conveniently provide high d.c. gain for holding average value.

Pulse width modulator circuit 16 receives negative feedback from analog integrator 18. Analog integrator 18 includes a microcircuit operational amplifier 72 with an internal field effect transistor input stage having exceptionally low input current requirements, and is used with a low leakage feedback capacitor 73 for providing extremely long hold capability for the integrator. Synchronizing command signal (f) is applied at a command instant to a relay 72 which opens a normally closed switch 74, whereupon the integrator feed back loop is opened and the integrator is in the hold mode. This establishes the final phase of the output from pulse width modulator 10 to represent an updated synchro-shaft angle reference position. Further changes in shaft angle position generate a phase difference which appears as a proportional d.c. output from phase detector 6.

When integrator 18 is not in the hold mode i. e. when switch 74 is closed, threshold detector 24 insures continuous updating of the zero angle reference over a full 2 360 of synchro shaft angle rotation by resetting analog integrator 18 from saturated limits to linear'operation. Because of the frequency doubling feature implemented by frequency doubler 4, phase comparison can be made with an adjacent pulse of the double frequency signal pulse waveform. This allows a synchronizer output null to be found always within the-linear range of the integrator.

As will now be evident from the aforenoted description of the invention, microcircuits have been interfaced to each other with a minimum of interaction so as to make possible relatively simple assembling of functionally complex subsystems in building block fashion. This accomplishes replacement of relatively large numbers of discrete circuit components with standard available microelectronics components which provide a three-wire synchronizer having the advantages of reduced cost and maximum economy of space and weight. v

Although but one embodiment of the invention has been illustrated and described in detail, it is to be expressly understood that the invention is notlimited thereto. Various changes may also be made in the design and arrangement of the parts without departing from the spirit and scope of the invention as the same will now be understood by those skilled in theart.

What is claimed is: i

1. For use with a signal device having an angularly displaceable element and providing alternating signals corresponding to the displacement of said element, a synchronizer comprising:

a phase shifter connected to the signal device for shifting the phase of the signals therefrom and for providing a signal having a phase corresponding to the displacement of the signal device element;

means connected to the phase shifter for increasing the frequency of the signal therefrom;

means for providing a fixed phase signal commensurate with a reference displacement of the signal device element at a predetermined instant;

phase detector means connected to the frequency increasing means and to the reference displacement signal means for providing a signal corresponding to the difference in phase of the signals therefrom; and

means connected to the phase detector means and responsive to the signal therefrom for providing a signal corresponding to the change in displacement of the signal device element.

2. A synchronizer as described in claim 1, wherein the phase shifter includes:

a first phase shifting circuit for shifting the phase of the carrier of one of the alternating signals by a predetermined angle;

a second phase shifting circuit for shifting the phase of the carrier of another of the alternating signals by another predetermined angle; and

amplifier means connected in open loop configuration for sensing zero crossing of the signals from the first and second phase shifting circuits to provide the signal having a phase corresponding to the displacement of the signal device element.

3. A synchronizer as described by claim 1, wherein:

the means connected to the phase shifter for increasing the frequency of the signal therefrom includes an exclusive OR circuit for doubling the frequency of said signal; and

a zener diode is connected for directly interfacing the phase shifter and the exclusive OR circuit.

4. A synchronizer as described by claim 1, wherein the means for providing a fixed phase signal commensurate with a reference displacement of the signal device element at a predetermined instant includes:

means for providing a reference signal at the frequency of the alternating signals from the signal device;

means connected to the reference signal means for providing a signal at said frequency and at a predetermined fixed phase;

means connected to the fixed phase signal means and driven by the signal therefrom for providing a signal having a sawtooth waveform;

integrator means connected to the phase detector means and responsive to a command signal at the predetermined instant for providing a feedback signal; and

a pulse width modulator connected to the sawtooth waveform signal means and to the integrator and responsive to the sawtooth waveform and the feedback signal for providing the reference displacement signal.

5. A synchronizer as described by claim 1, wherein the phasedetector means includes:

a phase detector circuit connected to the frequency increasing means and to the reference displacement signal means for providing pulses at an amplitude corresponding to the phase difference of the signals therefrom; and

means connected to the phase detector circuit for maintaining the amplitude of the pulses therefrom at a constant level.

6. A synchronizer as described by claim 5, wherein:

the means connected to the phase detector circuit for maintaining the amplitude of the pulses therefrom at a constant level includes:

means for providing a regulated output;

a chopper circuit connected to the phase detector circuit and to the regulated output means and driven by the phase detector for chopping the regulated output; and

a differential amplifier having one input connected to the regulated output means and another input connected to the chopper circuit, and filtering means connected in feedback relation to the chopper circuit input of the amplifier.

7. A synchronizer as described by claim 1, wherein the means connected to the phase detector means and responsive to the signal therefrom for providing a signal corresponding to the change in displacement of the signal device element includes:

filter means having an amplifier with feedback means for reducing output ripple without increasing output response time.

8. A synchronizer as described by claim 4, including:

means connecting the pulse width modulator to the phase detector means for conditioning the reference displacement signal for driving said phase detector means.

9. A synchronizer as described by claim 4, including:

a threshold circuit connected to the phase detector means and to the integrator and effective at times other than the predetermined instant for resetting the integrator to update the reference displacement of the signal device element.

Claims

1. For use with a signal device having an angularly displaceable element and providing alternating signals corresponding to the displacement of said element, a synchronizer comprising: a phase shifter connected to the signal device for shifting the phase of the signals therefrom and for providing a signal having a phase corresponding to the displacement of the signal device element; means connected to the phase shifter for increasing the frequency of the signal therefrom; means for providing a fixed phase signal commensurate with a reference displacement of the signal device element at a predetermined instant; phase detector means connected to the frequency increasing means and to the reference displacement signal means for providing a signal corresponding to the difference in phase of the signals therefrom; and means connected to the phase detector means and responsive to the signal therefrom for providing a signal corresponding to the change in displacement of the signal device element.

2. A synchronizer as described in claim 1, wherein the phase shifter includes: a first phase shifting circuit for shifting the phase of the carrier of one of the alternating signals by a predetermined angle; a second phase shifting circuit for shifting the phase of the carrier of another of the alternating signals by another predetermined angle; and amplifier means connected in open loop configuration for sensing zero crossing of the signals from the first and second phase shifting circuits to provide the signal having a phase corresponding to the displacement of the signal device element.

3. A synchronizer as described by claim 1, wherein: the means connected to the phase shifter for increasing the frequency of the signal therefrom includes an exclusive OR circuit for doubling the frequency of said signal; and a zener diode is connected for directly interfacing the phase shifter and the exclusive OR circuit.

4. A synchronizer as described by claim 1, wherein the means for providing a fixed phase signal commensurate with a reference displacement of the signal device element at a predetermined instant includes: means for providing a reference signal at the frequency of the alternating signals from the signal device; means connected to the reference signal means for providing a signal at said frequency and at a predetermined fixed phase; means connected to the fixed phase signal means and driven by the signal therefrom for providing a signal having a sawtooth waveform; integrator means connected to the phase detector means and responsive to a command signal at the predetermined instant for providing a feedback signal; and a pulse width modulaTor connected to the sawtooth waveform signal means and to the integrator and responsive to the sawtooth waveform and the feedback signal for providing the reference displacement signal.

5. A synchronizer as described by claim 1, wherein the phase detector means includes: a phase detector circuit connected to the frequency increasing means and to the reference displacement signal means for providing pulses at an amplitude corresponding to the phase difference of the signals therefrom; and means connected to the phase detector circuit for maintaining the amplitude of the pulses therefrom at a constant level.

6. A synchronizer as described by claim 5, wherein: the means connected to the phase detector circuit for maintaining the amplitude of the pulses therefrom at a constant level includes: means for providing a regulated output; a chopper circuit connected to the phase detector circuit and to the regulated output means and driven by the phase detector for chopping the regulated output; and a differential amplifier having one input connected to the regulated output means and another input connected to the chopper circuit, and filtering means connected in feedback relation to the chopper circuit input of the amplifier.

7. A synchronizer as described by claim 1, wherein the means connected to the phase detector means and responsive to the signal therefrom for providing a signal corresponding to the change in displacement of the signal device element includes: filter means having an amplifier with feedback means for reducing output ripple without increasing output response time.

8. A synchronizer as described by claim 4, including: means connecting the pulse width modulator to the phase detector means for conditioning the reference displacement signal for driving said phase detector means.

9. A synchronizer as described by claim 4, including: a threshold circuit connected to the phase detector means and to the integrator and effective at times other than the predetermined instant for resetting the integrator to update the reference displacement of the signal device element.