US3753402A - Explosive and/nand logic element - Google Patents

Explosive and/nand logic element Download PDF

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US3753402A
US3753402A US00181994A US3753402DA US3753402A US 3753402 A US3753402 A US 3753402A US 00181994 A US00181994 A US 00181994A US 3753402D A US3753402D A US 3753402DA US 3753402 A US3753402 A US 3753402A
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explosive
logic element
path
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input
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F Menz
M Osburn
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    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F42AMMUNITION; BLASTING
    • F42DBLASTING
    • F42D1/00Blasting methods or apparatus, e.g. loading or tamping
    • F42D1/04Arrangements for ignition
    • F42D1/042Logic explosive circuits, e.g. with explosive diodes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S102/00Ammunition and explosives
    • Y10S102/701Charge wave forming

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  • ABSTRACT An explosive controlled rectifier, an explosive AND/- NAND logic element and a three-input-seven-output explosive logic element.
  • the three-input-seven-output explosive logic element comprises four explosive AND/NAND logic'elements.
  • Each explosive AND/- NAND logic element has two inputs and three outputs and includes one explosive controlled rectifier.
  • FIG. 5 Sheets-Sheet 2 SYMBOL n FIG. 4.
  • FIG. 5 Sheets-Sheet 2 SYMBOL n FIG. 4.
  • FIG. 8 OUTEUTS D C DE CE CD CDE 8 BE BD BDE A AE AD ADE BC BCE 8CD AC ACE AC D ABE ABD DETONATOR N PUTS FIG. 8.
  • This invention pertains to a multi-input-multi-output explosive logic circuit. 7
  • 3,340,564 require time delays along the explosive path in order to provide a number of outputs greater than the number of inputs to the logic element.
  • the present invention requires activation of single inputs along or simultaneous activation of single inputs. By eliminating the need for time delays in the explosive circuits, the present invention has greatly increased the reliability of a given explosive logic circuit.
  • the present inventions include a three-input-sevenoutput-explosive logic element including four explosive AND/NAND logic elements.
  • Each AND/NAND logic element is a two-input-three-output circuit and includes an explosive controlled rectifier.
  • a primary advantage of the present invention is that it does not require the input to be initiated in a particular order in order to obtain a particular output, but rather requires only that the input be initiated individually or that a plurality of inputs be initiated simultaneously.
  • FIG. 1 shows a destructive crossover of an explosive trail and the symbol therefor
  • FIG. 2 shows an explosive diode and the symbol therefor
  • FIG. 3 shows an explosive controlled rectifier and the symbol therefor
  • FIG. 4 shows an OR logic element and the symbol therefor
  • FIG. 5 shows a multi-input (OR) logic element
  • FIG. 6a shows the explosive paths of an AND/NAND logic element
  • FIG. 6b shows a schematic representation of an AND/NAND logic element
  • FIG. 60 shows a symbolic representation of an AND/- NAND logic element
  • FIG. 7 shows a schematic representation of a three-input-seven-output logic element
  • FIG. 8 shows a five-input-25-output logic element.
  • FIG. 1 An example of the corner effect is seen in the destructive cross-over of FIG. 1.
  • this destructive crossover an explosive reaction starting at A will propagate to B without turning the comer at the intersection and traveling to x or y. Having crossed the intersection it will also have severed the path from x to y thereby preventing subsequent transfer between these points.
  • This element allows an explosive reaction in either direction along either path while allowing only the reaction which arrives at the intersection first to be transmitted across the intersection.
  • the straight path from B to C is shorter and therefore the detonation traveling along the straight path arrives at C prior to the detonation traveling along the curved path, thereby severing the path to the aft end D without turning the corner.
  • the reaction following the curved path arrives at C it is unable to pass through the 10 junction and therefore stops.
  • an explosive reaction started at the fore end will never reach the aft end.
  • a reaction starting at the aft end proceeds along the curved path to the fore end without being impeded.
  • An explosive diode is used as a building block for an explosive control rectifier as shown in FIG. 3.
  • the explosive controlled rectifier is similar to the electronic counterpart except that unlike its electronic counterpart it does not perform a blocking function in the reverse direction.
  • FIG. 4 is seen an OR logic element and the symbol therefore while FIG. 5 shows a multi-input OR logic element and the symbol therefore.
  • the OR logic elements have narrow portions where the inputs meet so that the inputs will turn the comer 45 and continue towards the right of the page but will not make a turn to the left. This is due to the corner effect. Thereby the circuit may have several inputs but only one output.
  • the explosive controlled rectifier is constructed like the diode but with the addition of a gating path from F to E.
  • the rectifier acts like the diode in that the detonation will be stopped at C.
  • the gating path is initiated first, it propagates upwardly and severs the path from B to C at E. Consequently, when the reaction is started at the fore end, it proceeds from A to B and branches. The straight leg is stopped at E and the curved portion is allowed to proceed to D.
  • the rectifier must have previously been gated by initiating F.
  • an AND/NAND logic element as shown in FIGS. 6a, 6b and 6c may be constructed.
  • reaction If a reaction is started only at A, the reaction travels across the destructive crossover at 1 and branches at 2. It continues on to 3, 4 and 5 thus severing the path to A B The second branch at 2 travels to 6 and onto source output A,,.
  • a three-input-seven-output logic element as shown schematically in FIG. 7 may be constructed by using four AND/NAND logic elements.
  • path A will branch at 11 and continue on to gate the explosive controlled rectifier at 12.
  • the other path will continue across the destructive crossover at 13 and will die at the destructive crossover at 14 which has been previously crossed by path A.
  • path A will have branched at 4 with one leg proceeding to the previously crossed destructive crossover at 13 and dying while the other path proceeds through the previously gated explosive controlled rectifier and onto output AC.
  • the explosive paths are designed such that the length of the path divided by the detonation velocity of the explosive gives the desired time delay.
  • the three-input-seven-output logic element of FIG. 7 can be combined with other like elements in a stacking arrangement as shown symbolically in FIG. 8.
  • the total combinations possible are given by:
  • An explosive logic circuit comprising:
  • said destructive crossovers comprising two explosive paths which cross each other generally orthogonally and the portions of said paths cross are narrowed so that a detonation wave traveling along one of said paths will not be transferred along the other of said paths due to a corner effect;
  • first and second explosive paths for receiving explosive inputs into said circuit
  • said first and second paths each branching into first and second branches
  • said second branch of said second path comprising a gating path for said explosive controlled rectifier and said second branch of said first path being connected to the fore end of said explosive controlled rectifier.
  • An explosive logic circuit comprising:
  • first, second and third paths of explosive material for receiving explosive inputs into said circuit
  • first, second, third and fourth explosive AND/NAND logic elements said paths being connected to said first and second logic elements;
  • said first path being the source input for said first logic element
  • said second path being the gate input for said first logic element
  • said third path being the gate input for said second logic element

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  • Power Conversion In General (AREA)

Abstract

An explosive controlled rectifier, an explosive AND/NAND logic element and a three-input-seven-output explosive logic element. The three-input-seven-output explosive logic element comprises four explosive AND/NAND logic elements. Each explosive AND/NAND logic element has two inputs and three outputs and includes one explosive controlled rectifier.

Description

nited States Patent Menz et al.
[451 Aug. 21, 1973 EXPLOSIVE AND/NAND LOGIC ELEMENT [75] Inventors: Fred L. Menz; Michael R. Osburn,
both of China Lake, Calif.
[73] Assignee: The United States of America as represented by the Secretary of the Navy, Washington, DC.
[22] Filed: Sept. 20, 1971 [21] Appl. No.: 181,994
[52] L5. Cl. 102/22, lO2/DlG. 2 [51] Int. Cl. F42d 1/04, C06c 5/04 [58] Field of Search 102/22, DIG. 2
[56] References Cited UNlTED STATES PATENTS 3,430,564 Silvia et al. 102/22 3,496,868 2/1970 Silvia et al. 102/22 Primary Examiner-Verlin R. Pendegrass Attorney-R. S. Sciascia and Roy Miller 5 7] ABSTRACT An explosive controlled rectifier, an explosive AND/- NAND logic element and a three-input-seven-output explosive logic element. The three-input-seven-output explosive logic element comprises four explosive AND/NAND logic'elements. Each explosive AND/- NAND logic element has two inputs and three outputs and includes one explosive controlled rectifier.
2 Claims, 10 Drawing Figures Patented Aug. 21, 1973 3,753,402
4 Sheets-Sheet 1 A+B FIG. I.
SYMBOL Patent ed Aug. 21, 1913 3,753,402
4 Sheets-Sheet 2 SYMBOL n FIG. 4. FIG. 5.
Patented Aug. 21, 1973 3,753,402
4 Shoots-Sheet 4.
OUTEUTS D C DE CE CD CDE 8 BE BD BDE A AE AD ADE BC BCE 8CD AC ACE AC D ABE ABD DETONATOR N PUTS FIG. 8.
This invention pertains to a multi-input-multi-output explosive logic circuit. 7
In the past, explosive logic elements such as the one disclosed in the patent to Silvia et al., U. S. Pat. No.
3,340,564, require time delays along the explosive path in order to provide a number of outputs greater than the number of inputs to the logic element. The present invention requires activation of single inputs along or simultaneous activation of single inputs. By eliminating the need for time delays in the explosive circuits, the present invention has greatly increased the reliability of a given explosive logic circuit.
SUMMARY OF THE INVENTION The present inventions include a three-input-sevenoutput-explosive logic element including four explosive AND/NAND logic elements. Each AND/NAND logic element is a two-input-three-output circuit and includes an explosive controlled rectifier. A primary advantage of the present invention is that it does not require the input to be initiated in a particular order in order to obtain a particular output, but rather requires only that the input be initiated individually or that a plurality of inputs be initiated simultaneously.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows a destructive crossover of an explosive trail and the symbol therefor;
FIG. 2 shows an explosive diode and the symbol therefor;
FIG. 3 shows an explosive controlled rectifier and the symbol therefor;
FIG. 4 shows an OR logic element and the symbol therefor;
FIG. 5 shows a multi-input (OR) logic element;
FIG. 6a shows the explosive paths of an AND/NAND logic element;
FIG. 6b shows a schematic representation of an AND/NAND logic element;
FIG. 60 shows a symbolic representation of an AND/- NAND logic element;
FIG. 7 shows a schematic representation of a three-input-seven-output logic element; and
FIG. 8 shows a five-input-25-output logic element.
DESCRIPTION OF THE PREFERRED EMBODIMENT To perform functions explosively, this invention uses the corner effect" as described in the US. Pat. to Silvia et al., No. 3,496,868, dated Feb. 24, 1970.
An example of the corner effect is seen in the destructive cross-over of FIG. 1. In this destructive crossover, an explosive reaction starting at A will propagate to B without turning the comer at the intersection and traveling to x or y. Having crossed the intersection it will also have severed the path from x to y thereby preventing subsequent transfer between these points. This element allows an explosive reaction in either direction along either path while allowing only the reaction which arrives at the intersection first to be transmitted across the intersection.
A further use of the corner effect is seen in its emexplosive diode works like its electronic counterpart in that the reaction is only allowed to pass in one direction. If the reaction starts at the fore end A, it travels to B where it branches.
The straight path from B to C is shorter and therefore the detonation traveling along the straight path arrives at C prior to the detonation traveling along the curved path, thereby severing the path to the aft end D without turning the corner. When the reaction following the curved path arrives at C it is unable to pass through the 10 junction and therefore stops. Thus, an explosive reaction started at the fore end will never reach the aft end. However, a reaction starting at the aft end proceeds along the curved path to the fore end without being impeded.
An explosive diode is used as a building block for an explosive control rectifier as shown in FIG. 3. The explosive controlled rectifier is similar to the electronic counterpart except that unlike its electronic counterpart it does not perform a blocking function in the reverse direction.
In FIG. 4 is seen an OR logic element and the symbol therefore while FIG. 5 shows a multi-input OR logic element and the symbol therefore. The OR logic elements have narrow portions where the inputs meet so that the inputs will turn the comer 45 and continue towards the right of the page but will not make a turn to the left. This is due to the corner effect. Thereby the circuit may have several inputs but only one output.
Physically the explosive controlled rectifier is constructed like the diode but with the addition of a gating path from F to E. With a detonation starting at the fore end A, the rectifier acts like the diode in that the detonation will be stopped at C. However, if the gating path is initiated first, it propagates upwardly and severs the path from B to C at E. Consequently, when the reaction is started at the fore end, it proceeds from A to B and branches. The straight leg is stopped at E and the curved portion is allowed to proceed to D. Thus, for a reaction to propagate through the explosive controlled rectifier from A to D, the rectifier must have previously been gated by initiating F.
By utilizing the explosive controlled rectifier and the destructive crossover, an AND/NAND logic element as shown in FIGS. 6a, 6b and 6c may be constructed.
With the AND/NANd logic element of FIG. 60 it is possible to derive three distinct outputs from two distinct inputs. For example, assume that inputs are received at source input A, and gate input B, simultaneously. The reaction started at A, proceeds to l, a destructive crossover, and propagates across, thus severing the path leading to gate output 8,. The reaction continues, branching at 2, to 3 and 6. During this period the reaction started at B, has traveled to 7, branched to 4 and 6, and arrived at the destructive crossover at 6 prior to the arrival of the reaction started at A,. Thus the reaction coming from 2 to 6 is stopped at 6. Also, the path from 6 to B,, has been severed at 1. Meanwhile, at 4, the reaction from B, has arrived prior to the reaction from A,. The path from 3 to 5 is, therefore, severed. When the reaction from A, reaches 3, it follows the curved path leading to 5 and on to the desired simultaneous-input output A, B,,.
If a reaction is started only at A,, the reaction travels across the destructive crossover at 1 and branches at 2. It continues on to 3, 4 and 5 thus severing the path to A B The second branch at 2 travels to 6 and onto source output A,,.
In a similar manner, a reaction started at B, travels to 7 where it branches to 4 and 6. The reaction ceases at 4, but continues from 6 to l and onto B,.
It is thus seen that with the AND/NAND logic element, two inputs may be used to obtain three distinct outputs.
A three-input-seven-output logic element as shown schematically in FIG. 7 may be constructed by using four AND/NAND logic elements.
For example, if the AC output were desired, simultaneous reactions would be started at inputs A and C. Following the path of the reaction of the input A, it is seen in FIG. 7 that the path would travel across the destructive crossover at 1 and to the branch at 2 where one path would lead to the ungated explosive controlled rectifier and die and the other path would proceed across the destructive crossover at 3 and onto 4 of AND/NAND element IV. Meanwhile, the reaction started at input C would travel to AND/NAND II and branch at 5. One branch will gate the explosive controlled rectifier and die while the other branch will proceed across the destructive crossover at 6 and across the destructive crossover at 7 and onto AND/NAND Ill. The path follows the same pattern as in AND/- NAND [I along points 8, 9 and 10 and onto AND/- NAND IV. The path will branch at 11 and continue on to gate the explosive controlled rectifier at 12. The other path will continue across the destructive crossover at 13 and will die at the destructive crossover at 14 which has been previously crossed by path A. Meanwhile, path A will have branched at 4 with one leg proceeding to the previously crossed destructive crossover at 13 and dying while the other path proceeds through the previously gated explosive controlled rectifier and onto output AC.
It is to be noted that to obtain the proper sequencing of events the explosive paths are designed such that the length of the path divided by the detonation velocity of the explosive gives the desired time delay.
The three-input-seven-output logic element of FIG. 7 can be combined with other like elements in a stacking arrangement as shown symbolically in FIG. 8. The total combinations possible are given by:
where N total number of inputs R number of simultaneous inputs P number of outputs For example with five inputs: P= 5!/(5 3)!3! 5l/(5 -2)!2!+5!/(5- l)!=25 outputs What is claimed is:
1. An explosive logic circuit comprising:
first and second destructive crossovers;
said destructive crossovers comprising two explosive paths which cross each other generally orthogonally and the portions of said paths cross are narrowed so that a detonation wave traveling along one of said paths will not be transferred along the other of said paths due to a corner effect;
an explosive controlled rectifier;
first and second explosive paths for receiving explosive inputs into said circuit;
said first and second paths each branching into first and second branches;
said first path crossing said first branch of said second path at said first destructive crossover;
said first branch of said second path crossing said first branch of said first path at said second destructive crossover;
said second branch of said second path comprising a gating path for said explosive controlled rectifier and said second branch of said first path being connected to the fore end of said explosive controlled rectifier.
2. An explosive logic circuit comprising:
first, second and third paths of explosive material for receiving explosive inputs into said circuit;
first, second, third and fourth explosive AND/NAND logic elements; said paths being connected to said first and second logic elements;
said first path being the source input for said first logic element;
said second path being the gate input for said first logic element;
said third path being the gate input for said second logic element;
the gate output of said first logic element being connected to the source input of said third logic element;
the source output of said first logic element being connected to the source input of said fourth logic element;
the simultaneous-input output of said first logic element being connected to the source input of said second logic element;
the gate output of said second logic element being connected to the gate input of said third logic element; and
the gate output of said third logic element being connected to the gate input of said fourth logic element;
whereby explosive inputs into either of said first,-second or third paths alone, any two of said first, second or third paths simultaneously or said first, second and third paths simultaneously can produce at least seven different outputs.
s: e a 4 e

Claims (2)

1. An explosive logic circuit comprising: first and second destructive crossovers; said destructive crossovers comprising two explosive paths which cross each other generally orthogonally and the portions of said paths cross are narrowed so that a detonation wave traveling along one of said paths will not be transferred along the other of said paths due to a ''''corner effect;'''' an explosive controlled rectifier; first and second explosive paths for receiving explosive inputs into said circuit; said first and second paths each branching into first and second branches; said first path crossing said first branch of said second path at said first destructive crossover; said first branch of said second path crossing said first branch of said first path at said second destructive crossover; said second branch of said second path comprising a gating path for said explosive controlled rectifier and said second branch of said first path being connected to the fore end of said explosive controlled rectifier.
2. An explosive logic circuit comprising: first, second and third paths of explosive material for receiving explosive inputs into said circuit; first, second, third and fourth explosive AND/NAND logic elements; said paths being connected to said first and second logic elements; said first path being the source input for said first logic element; said second path being the gate input for said first logic element; said third path being the gate input for said second logic element; the gate output of said first logic element being connected to the source input of said third logic element; the source output of said firSt logic element being connected to the source input of said fourth logic element; the simultaneous-input output of said first logic element being connected to the source input of said second logic element; the gate output of said second logic element being connected to the gate input of said third logic element; and the gate output of said third logic element being connected to the gate input of said fourth logic element; whereby explosive inputs into either of said first, second or third paths alone, any two of said first, second or third paths simultaneously or said first, second and third paths simultaneously can produce at least seven different outputs.
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3973499A (en) * 1974-08-27 1976-08-10 The United States Of America As Represented By The Secretary Of The Navy Safe rocket motor igniter using sequenced initiation to an explosive logic network
US4412493A (en) * 1981-11-04 1983-11-01 The United States Of America As Represented By The Secretary Of The Navy Explosive logic safing device
US4838165A (en) * 1987-04-30 1989-06-13 The Ensign-Bickford Company Impeded velocity signal transmission line
US4974514A (en) * 1981-09-25 1990-12-04 The United States Of America As Represented By The Secretary Of The Navy Explosive safety junction
US4989516A (en) * 1981-07-02 1991-02-05 The United States Of America As Represented By The Secretary Of The Navy Safe/arm explosive delay path
US4998963A (en) * 1981-12-23 1991-03-12 The United States Of America As Represented By The Secretary Of The Navy Explosive logic clock
US5009162A (en) * 1981-12-28 1991-04-23 The United States Of America As Represented By The Secretary Of The Navy Explosive logic resolver network
US5022326A (en) * 1982-05-20 1991-06-11 The United States Of America As Represented By The Secretary Of The Navy Asynchronous explosive logic safing device
US5311819A (en) * 1986-05-23 1994-05-17 The United States Of America As Represented By The Secretary Of The Army Explosive logic network
US5311818A (en) * 1986-05-23 1994-05-17 The United States Of America As Represented By The Secretary Of The Army Self limiting explosive logic network
RU2442949C1 (en) * 2010-07-29 2012-02-20 Российская Федерация, от имени которой выступает Государственная корпорация по атомной энергии "Росатом" - Госкорпорация "Росатом" Protective and detonating device
RU2642689C1 (en) * 2016-10-10 2018-01-25 Владимир Викторович Черниченко Electrodetonator with safety function

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3430564A (en) * 1967-05-03 1969-03-04 Us Navy Explosive gate,diode and switch
US3496868A (en) * 1967-05-29 1970-02-24 Us Navy Explosive elements

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3430564A (en) * 1967-05-03 1969-03-04 Us Navy Explosive gate,diode and switch
US3496868A (en) * 1967-05-29 1970-02-24 Us Navy Explosive elements

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3973499A (en) * 1974-08-27 1976-08-10 The United States Of America As Represented By The Secretary Of The Navy Safe rocket motor igniter using sequenced initiation to an explosive logic network
US4989516A (en) * 1981-07-02 1991-02-05 The United States Of America As Represented By The Secretary Of The Navy Safe/arm explosive delay path
US4974514A (en) * 1981-09-25 1990-12-04 The United States Of America As Represented By The Secretary Of The Navy Explosive safety junction
US4412493A (en) * 1981-11-04 1983-11-01 The United States Of America As Represented By The Secretary Of The Navy Explosive logic safing device
US4998963A (en) * 1981-12-23 1991-03-12 The United States Of America As Represented By The Secretary Of The Navy Explosive logic clock
US5009162A (en) * 1981-12-28 1991-04-23 The United States Of America As Represented By The Secretary Of The Navy Explosive logic resolver network
US5022326A (en) * 1982-05-20 1991-06-11 The United States Of America As Represented By The Secretary Of The Navy Asynchronous explosive logic safing device
US5311819A (en) * 1986-05-23 1994-05-17 The United States Of America As Represented By The Secretary Of The Army Explosive logic network
US5311818A (en) * 1986-05-23 1994-05-17 The United States Of America As Represented By The Secretary Of The Army Self limiting explosive logic network
US4838165A (en) * 1987-04-30 1989-06-13 The Ensign-Bickford Company Impeded velocity signal transmission line
RU2442949C1 (en) * 2010-07-29 2012-02-20 Российская Федерация, от имени которой выступает Государственная корпорация по атомной энергии "Росатом" - Госкорпорация "Росатом" Protective and detonating device
RU2642689C1 (en) * 2016-10-10 2018-01-25 Владимир Викторович Черниченко Electrodetonator with safety function

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