US3736415A - Electric analogue calculating circuits - Google Patents
Electric analogue calculating circuits Download PDFInfo
- Publication number
- US3736415A US3736415A US00180308A US3736415DA US3736415A US 3736415 A US3736415 A US 3736415A US 00180308 A US00180308 A US 00180308A US 3736415D A US3736415D A US 3736415DA US 3736415 A US3736415 A US 3736415A
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- US
- United States
- Prior art keywords
- output
- input
- circuit
- signal storage
- storage devices
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/24—Arrangements for performing computing operations, e.g. operational amplifiers for evaluating logarithmic or exponential functions, e.g. hyperbolic functions
Definitions
- ABSTRACT An electric analog calculating circuit uses a single logarithmic stage for all steps of a calculation. Each input quantity is applied to the stage and the resulting output stored in a signal storage device.
- Logarithms are commonly used in mathematical operations to simplify the procedure, and electric circuits have been developed to take advantage of the logarithmic characteristics of certain circuit elements, such as the diode.
- One of the simplest mathematical operations employing logarithmic techniques is the multiplication of two quantities. Such an operation requires the separate derivation of the logarithm of each quantity, the summing of these two logarithms, and the determination of the antilogarithm of thissum.
- Conventional circuits employ separate logarithmic elements for each of the stages of this calculation, and this gives rise to a serious problem.
- Diodes which are normally used as logarithmic circuit elements, are temperature-sensitive, and the use of three such devices may lead to serious inaccuracies unless complex and costly precautions are taken to maintain all three at the same temperature.
- an electric analogue calculating circuit which includes 1 a logarithmic stage arranged to produce an output signal proportional to the logarithmof an input signal, N signal storage devices, a high-gain differential amplifier, and switchable interconnections to allow the output from the logarithmic stage in response to N successive input signals to be stored in the N signal storage devices respectively and thereafter to apply the sum of the stored signals in relative senses predetermined in accordance with the nature of the calculation as one input to said amplifier whilst applying the output from the amplifier in a negative feedback sense to its other input by way of the logarithmic stage, whereby the output from the amplifier represents the result of the calculation.
- FIG. 1 is a schematic circuit diagram of a circuit for multiplying together two quantities
- FIG. 2 to 5 illustrate the operation of the circuit of FIG. I.
- FIGS. 6 and 7 illustrate other applications of the invention.
- the basic circuit comprises two differential amplifiers Al and A2, a circuit element providing a logarithmic characteristic, three storage capacitors and six ganged four-position switches.
- a stage 10 having a logarithmic characteristic is provided by a differential amplifier Al having its non-inverting input earthed and with the collector-base diode of a transistor TL connected between its output and its inverting input. The base of the transistor is connected to earth potential. Also connected to the inverting input is one end of an input resistor R, the other end of which is connected to the moving contact of a four-position switch S1. Positions 1, 2 and 3 of. this switch are for connection respectively to a reference voltage V and to input voltages V, and V whilst the fourth position is not connected.
- the output of amplifier Al besides being connected to the emitter of transistor TL, is connected to the moving contacts of switches S2 and S3. Only the fourth position of S2 is used, being connected to the noninverting input of a second high-gain differential amplifier A2.
- the first two positions of switch S3 are connected together and to the junction between two signal storage devices in the form of capacitors Cl and C3.
- the other side of capacitor C3 is connected to the inverting input of amplifier A2, whilst the other side of capacitor C1 is connected through a further signal storage device in the form of a capacitor C2 to earth potential.
- the third position of switch S3 is connected to the junction between capacitors Cl and C2.
- a fourth switch S4 has its moving contact earthed, and positions 1 and 2 are connected together to the junction between Cl and C2.
- the non-inverting input of amplifier A2 is also connected to the moving contact of a switch S5, having positions 1, 2 and 3 earthed and position 4 not connected.
- the output of amplifier A2 is connected to the moving contact of the last switch S6.
- Position 1 of this switch is connected to the inverting input of the amplifier, whilst position 4,-is connected to an output terminal and to the moving contact of switch S1.
- FIG. 1 is a schematic circuit diagram showing the circuit connection at eachstage of its operation.
- FIG; 2 shows the circuit arrangement for this stage of the operation.
- the voltage V is applied to the input of the logarithmic stage, the output of which is applied to capacitors C1 and C3.
- the output of amplifier A2 is connected to its inverting input, thereby acting in a negative feedback mannerto maintain the adjacent plate of capacitor C3 at virtual earth, and the noninverting input is earthed.
- the output voltage of A1 representing the quantity log V is stored on both capacitors, the two common ends having the same polarity.
- FIG. 5 shows.
- the output of the logarithmic stage 10 is now applied directly to the non-inverting input of amplifier A2, whilst the three capacitors C1, C2 and C3 are connected in series between earth and the inverting input.
- the output of A2 is connected to the output terminal and to the resistor R to form the input to the logarithmic stage.
- the logarithmic stage 10 forms the feedback element in the negative-feedback path of amplifier A2.
- the three voltages stored on the capacitors C1, C2 and C3 represent respectively log V log V and log V the last-mentioned being of opposite polarity to the other two.
- the voltage applied to the inverting input of A2 represents (log V log v log V that is log (V,.V /V Amplifier A2 operates in such a manner as to maintain its two inputs equal to one another, and hence the output of A2 becomes such that the voltage applied to its non-inverting input also represents log (V V IV
- this input voltage applied to the non-inverting input of A2 is itself the output of the logarithmic stage.
- the input to the logarithmic stage which is equal to the output of the amplifier A2 must represent the function V W/V
- the reference voltage may conveniently be used as a scale factor in the operation of this circuit.
- V R of one volt effectively results in an output equal to the product of the two inputs.
- the reference voltage may also be made larger to provide the necessary scale factor.
- the circuit described above has several advantages over known circuits.
- the main advantage is that a single logarithmic element is used which is time-shared between the various functions which it has to perform. Thus if the switching is carried out at a suitable speed the question of temperature sensitivity will probably not arise.
- the circuit is such that the offset voltages are automatically taken care of, so that output errors do not result from this source.
- FIG. 6 shows the modifications which are necessary to enable the circuit of FIG. 1 to perform division. This requires alteration of some of the connections to switches S3 and S4, and the addition of a further four-position switch S7 between capacitor C2 and earth potential.
- position 3 of switch S3 is no longer connected to the junction of Cl and C2, but is now connected to the bottom end of C2.
- Position 3 of switch S4 is connected to the junction of Cl and C2, as are positions l and 2.
- the extra switch is arranged to connect the bottom" end of C2 to earth when all the switches are in position 4.
- the operation of the circuit is very similar to that of FIG.
- FIG. 7 shows the arrangement, which is that of FIG. 1 apart from the addition of a potentiometer VR between the output of the logarithmic stage 10 and switch S3.
- the potentiometer is used to apply to the capacitors C1, C2 and C3 a desired fraction of the output from the logarithmic stage 10.
- the potentiometer is set to apply to the capacitors only half of the output voltage from stage 10, then the input to A2 with the switches in position 4 would be zlog V xfilog V mog V that is rlog (V .V /V or log (V .V /V Hence the output would be the square root of the product of V and V allowing for the scale factor V,
- circuit may be modified to perform many other mathematical operations without departing from the essence of the invention, and with the advantages already referred to.
- An electric analogue calculating circuit operable to perform calculations involving a number of quantities each represented by a discrete input signal, which includes a logarithmic stage arranged to produce an output signal proportional to the logarithm of an input signal, a plurality of signal storage devices equal to the number of discrete input signals, a high-gain differential amplifier, and switching means operable to apply the input signals to the logarithmic stage one at a time in a predetermined sequence and simultaneously to connect the output of the logarithmic stage to selected ones of the signal storage devices in a predetermined sequence, and thereafter to interconnect the signal storage devices in predetermined senses to one another and to one input of the differential amplifier whilst applying the output from the amplifier in a negativefeedback sense to its other input by way of the logarithmic stage, the output of the amplifier at this time representing the result of the calculation.
- a circuit as claimed in claim 1 having three signal storage devices wherein the switching means includes a switching device having four positions in three of which the output from the logarithmic stage is connected to the three signal storage devices respectively, and in the fourth position of which the signal storage devices are connected in series in said predetermined senses to said one input of the amplifier.
- each signal storage device is a capacitor.
- a circuit as claimed in claim 1 in which the logarithmic stage comprises a differential amplifier having a semiconductor device connected between its output terminal and one input terminal.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Amplifiers (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB4472670 | 1970-09-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US3736415A true US3736415A (en) | 1973-05-29 |
Family
ID=10434492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US00180308A Expired - Lifetime US3736415A (en) | 1970-09-19 | 1971-09-14 | Electric analogue calculating circuits |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3736415A (enExample) |
| CA (1) | CA941069A (enExample) |
| DE (1) | DE2145885A1 (enExample) |
| FR (1) | FR2106625B1 (enExample) |
| GB (1) | GB1302056A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4041299A (en) * | 1975-04-04 | 1977-08-09 | Hitachi, Ltd. | Multiplication apparatus |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3453423A (en) * | 1966-03-16 | 1969-07-01 | Atomic Energy Commission | Four quadrant logarithmic multiplier for time-dependent signals |
| US3532868A (en) * | 1968-07-24 | 1970-10-06 | Electronic Associates | Log multiplier with logarithmic function generator connected in feedback loop of operational amplifier |
| US3584232A (en) * | 1969-01-21 | 1971-06-08 | Bell Telephone Labor Inc | Precision logarithmic converter |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3540825A (en) * | 1968-01-18 | 1970-11-17 | Mcpherson Instr Corp | Double beam spectrometer readout system |
-
1970
- 1970-09-19 GB GB4472670A patent/GB1302056A/en not_active Expired
-
1971
- 1971-09-13 CA CA122,634A patent/CA941069A/en not_active Expired
- 1971-09-14 DE DE19712145885 patent/DE2145885A1/de active Pending
- 1971-09-14 US US00180308A patent/US3736415A/en not_active Expired - Lifetime
- 1971-09-16 FR FR7133416A patent/FR2106625B1/fr not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3453423A (en) * | 1966-03-16 | 1969-07-01 | Atomic Energy Commission | Four quadrant logarithmic multiplier for time-dependent signals |
| US3532868A (en) * | 1968-07-24 | 1970-10-06 | Electronic Associates | Log multiplier with logarithmic function generator connected in feedback loop of operational amplifier |
| US3584232A (en) * | 1969-01-21 | 1971-06-08 | Bell Telephone Labor Inc | Precision logarithmic converter |
Non-Patent Citations (3)
| Title |
|---|
| Davis 31 Ways to Multiply Nov. 1954 Control Engineering. pages 36 46. Note page 44 of interest. * |
| Dobkin Logarithmic Converters IEEE Spectrum Nov. 1969. pages 69 72. * |
| Halperin et al. Mass Scale Linearizer IBM Tech. Disclosure Bull. Vol. 10, No. 10 March 1968. p 1581/1582. * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4041299A (en) * | 1975-04-04 | 1977-08-09 | Hitachi, Ltd. | Multiplication apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1302056A (enExample) | 1973-01-04 |
| FR2106625B1 (enExample) | 1976-03-26 |
| DE2145885A1 (de) | 1972-03-23 |
| FR2106625A1 (enExample) | 1972-05-05 |
| CA941069A (en) | 1974-01-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AS | Assignment |
Owner name: FERRANTI INTERNATIONAL PLC Free format text: CHANGE OF NAME;ASSIGNOR:FERRANTI INTERNATIONAL SIGNAL PLC;REEL/FRAME:005847/0656 Effective date: 19910729 |