US3700927A

US3700927A - Electronic reversing switch

Info

Publication number: US3700927A
Application number: US147758A
Authority: US
Inventors: James Edwin Dalley; Nelson Tsin Tsao-Wu
Original assignee: Bell Telephone Laboratories Inc
Current assignee: AT&T Corp
Priority date: 1971-05-28
Filing date: 1971-05-28
Publication date: 1972-10-24
Anticipated expiration: 1989-10-24

Abstract

A reversing switch which changes connection paths for external circuits in response to a change in polarity of a control signal is disclosed. The control signal alters the phase in which a carrier signal is applied to select different sets of diode bridges that provide the connection paths for the external circuits. Switches capable of providing connection paths on alternate and successive half cycles of the carrier are shown.

Description

United States Patent Dalley et al. Oct. 24, 1972 [54] ELECTRONIC REVERSING SWITCH [56] References Cited [72] Inventors: James Edwin Dalley, Sherrelwood UNITED STATES PATENTS Estat s; N ls0 Tsin Tsatr u, 3,247,323 4/1966 Carroll ..307/250 X B ul C1ty.both of Colo- 3,207,927 9/1965 Wells ..307/246 I73] Assignee: Be" Telephone Laboratories [mob 3,292,010 12/1966 Brow et al. ..307/246 'l Murray Berkeley Primary Examiner-Herman Karl Saalbach Assistant Examiner-B. P. Davis [22] Fil d; M 28, 1971 Att0mey-R. J. Guenther and James Warren Falk [21] Appl. No.: 147,758 57 ST C A reversing switch which changes connection paths [52] US. Cl ..307/257, 307/249 for external circuits in response to a change in polarity [51'] Int. Cl. ..H03k 17/00 of a control signal is disclosed. The control signal al- [58] Field of Search ..307/250, 254, 255, 246, 247, mm Phase in which a carrier signal is applied to 307/249, 240, 315, 257; 323/75 FE; 179/18 GF select different sets of diode bridges that provide the connection paths for the external circuits. Switches capable of providing connection paths on alternate and successive half cycles of the carrier are shown.

10 Claims, 2 Drawing Figures PATENTEDUCT 24 1972 SHEET 1 BF 2 J E DALLEV INVENTORS N. r TSAO-Wu ATTOPNFV BACKGROUND OF THE INVENTION This invention relates to electronic switches and more particularly to electronic switches using selectively controllable gating elements.

It has heretofore been appreciated that electronic devices such as transistors or vacuum tubes could be employed for switching purposes in much the same fashion as electromechanical relays. In many applications, however, the electromechanical switch or relay continues to be an attractive component because its contacts provide a low resistance path when made, a high resistance path when open, its operation is reliable over a long lifetime and it is readily available in a great variety of contact configurations. However, for certain applications the tendency of electromechanical contacts to bounce for short periods after initial closing and the fact that their operating speed is many times slower than that of electronic switches, detracts from the universality of their application. Electronic switches, on the other hand, such as that exemplified by N. F. Bounsall U.S. Pat. No. 3,179,817 issued Apr. 20, l965, are also reliable, have fairly low contact resistance when on, reasonably high contact resistance when off, and are of reasonable cost. However, electronic switches are not readily available to perform some of the standard functions for which electromechanical relays are readily available. For example, single-pole, double-throw and double-pole, double-throw electromechanical switches and relays are standard shelf items that are readily obtainable from electrical supply houses. Unfortunately, this type of contact congifuration is not presently available in electronic switches. On the other hand, electromechanical relays capable of double-throw operation require considerable power from the control source and take several milliseconds to operate.

During the time that the contacts of an electromechanical relay are undergoing mechanical reverberation, electrical transients are induced in the load circuit. In many applications such as in conventional telephone systems, the contact bounce occurs during an interval prior to the commencement of the telephone conversation and so several milliseconds of contact bounce may be tolerated without affecting the quality of a telephone conversation. However, in the rearrangeable telephone network of the type described in the copending application of A. E. Joel, Jr. Ser. No. 728,157 filed May 10, 1968, now U.S. Pat. No. 3,593,295 issued July 13, 1971 and that of D. C. Opferman and N. T. Tsao-Wu Ser. No. 7,871 filed Feb. 2, 1970, now U.S. Pat. No. 3,638,193 issued Jan. 25, 1972, connections may be changed during the continuance of a telephone conversation that has been established through the network. As described in these applications, the basic switching element for establishing the rearrangeable paths is an electromechanical double-throw switch, sometimes also referred to as a beta-element. Because of the fairly long operate time and the contact bounce attendant upon the use of electromechanical contacts having a finite mass and springconstant, the active connection path may be interrupted and re-interrupted for a finite interval thereby inducing a noticeable noise transient in the established conversational connection that is likely to be a source of customer complaint. Accordingly, it has become necessary to provide a double-pole, double-throw switch that is free from contact bounce and which may be operated rapidly and without requiring appreciable power from the control source.

SUMMARY OF THE INVENTION The foregoing and other objects of the present invention are achieved in accordance with one illustrative embodiment in which two pairs of electronic gating elements are each supplied with a conduction controlling carrier signal. The carrier signal in turn is selectively directable among the gating elements so as to render different pairs of temiinals associated with the gating elements connectable together during specific half cycles of the carrier. Advantageousiy, the carrier signal is of a much higher frequency than the frequency of the signals to be provided with a path by the gating elements so that the gating elements will appear to provide a continuous path for the external circuit at the terminals of the switch.

In one illustrative embodiment, each of four switch terminals is associated with a respective four-diode bridge. The carrier signal is applied to the primary windings of two transformers and the secondary of each transformer supplies the carrier signal to a pair of the diode bridges. The pair of bridges associated with a given transformer are poled oppositely to each other. One terminal of each of the bridges is connected to a common point or bus. The selection of a particular pair of bridges that become conductive on a given half cycle of carrier is determined by the polarity of a bias voltage that is applied to the primary windings of the transformers together with the carrier signal.

In a specific embodiment of the invention four steering diodes are associated with the primary windings of the transformers so that, as determined by the polarity of the bias voltage, the primary windings are connected to receive the carrier signal directly in parallel or in phase reversed parallel. Accordingly, the polarity of the bias voltage applied to the primary of the transformers determines which bridges at the secondaries of the transformers are energized on a given half cycle of carrier. When a bridge is rendered conductive, it connects its respective external circuit terminal to the common point or bus. The two bridges that are rendered simultaneously conductive accordingly provide a path from their respective external circuit terminals to the common point or bus thereby temporarily connecting together the external circuits associated with the terminals. Since the polarity of the bias voltage determines which bridges shall be rendered simultaneously conductive during a particular carrier half cycle, a given terminal associated with a bridge fed by one transformer may be selectively connected to the terminal associated with one or the other of the bridges fed by the other transformer. In this manner, an electronic double-throw switch is effectuated.

DESCRIPTION OF THE DRAWINGS The foregoing and other objects and features of our invention may become more apparent by referring to the drawing in which:

FIG. 1 shows one illustrative embodiment of an electronic double-poled, double-throw reversing switch according to our invention; and

minal may take place during both half cycles of the carrier signal.

DETAILED DESCRIPTION Referring now to FIG. 1, there is shown a doublepole, double-throw electronic switch in accordance with our invention. The switch of FIG. 1 will selectively connect terminal Ll with either terminal L2 or L4 while connecting terminal L3 with either terminal L4 or L2. Terminal L1 cannot be connected to terminal L3 and terminal L2 cannot be connected to terminal L4. If terminal L1 is thought of as being connected to a first telephone set, not shown, a connection may be established to either of the telephone sets, also not shown, associated with terminals L2 or L4. Likewise, if a telephone set is thought of as being associated with terminal L3, the electronic switch of FIG. 1 may function to connect that telephone set with the telephone station associated with terminals L4 or L2, respectively. When a connection path is established between ter minal L1 and terminal L2, no connection can exist between terminals L3 and L2 or between terminals L1 and L4. Accordingly, the circuit of FIG. 1 precludes the phenomenon of double connection from taking place.

Since the circuit is completely symmetrical when viewed from terminals Ll through L4, any terminal can be used for either input or output; or, as in the case of telephone terminations, a given terminal may be used for input and output simultaneously.

Each of terminals L1, L3, L2, and L4 is provided with a respective-electronic gate device B1, B3, B2, and B4. In FIG. 1 these gate devices each take the form of a four-diode bridge. The four diodes of each bridge are poled so that the diodes in the upper branch are inserted back-to-back between the external terminal L- and common bus CB while the diodes in the lower branch are inserted face-to-face between the external terminal and the common bus. The pair of bridges, such as bridges B1 and B3, that are associated with external terminals (L1 and L3) that are never to be connected together, are supplied with carrier signals from secondary windings of the same transformer (T1). The windings W1 and W3 of transformer T1 supplying bridges B1 and B3 are out of phase with each other. When winding W1 is energized to make the,upper vertex of bridge B1 positive with respect to the lower vertex of that bridge, diodesDLl, Dl-4, D1-2, and D13 are all simultaneously rendered conductive. These diodes will all be rendered nonconductive when winding W1 applies the opposite polarity carrier signal. At the same time that winding W1 applies a carrier signal to render the diodes of bridge Bl nonconductive, winding W3 applies a carrier signal to the vertical vertexes of bridge B3 to render diodes D3-1, D3-4, D3-2, and D3-3 all conductive.

Similarly, bridges B2 and B4 are associated with respective secondary windings W2 and W4 of transformer T2 such that bridge B2 has carrier signal voltages applied to its vertical vertexes that are of opposite phase to the carrier signal voltages applied to the vertical vertexes of bridge B4.

When the diodes of bridge B1 are rendered conductive by the appropriate phase-carrier voltage from winding W1, terminal L1 is connected to common bus CB by the upper branch containing forward-biased diodes DL] and D1-2, and by the lower branch path containing forward-biased diodes D14 and Dl-3. Assurning that the positive-going swing of the external circuit signal voltage that may be connected at terminal L1 is not sufficiently great to overcome the forwardbias voltage applied by winding W1 to diode Dl-l, a low impedance path is provided by diode Dl-l for the external signal to the upper vertex of bridge B1; and since diode D1-2 is also forward biased by the carrier voltage from winding W1, the external signal is provided with a low impedance path from the upper vertex of bridge B1 to common bus CB. Simultaneously, bridge B1 provides a parallel path for the external signal applied at terminal L1 through diode D14 and diode Dl-3 to common bus CB. In this case, the positive-going swing of the external voltage applied at terminal L1 must not be so great so as to overcome the forward bias on diode D1-3. When the external voltage applied at terminal Ll undergoes its negative excursion, the diodes of bridge B1 will also provide a low impedance path from terminal L1 to common bus CB so long as the negative voltage excursion does not overcome the forward bias provided by winding W1 to diodes D1-2 to D1-4.

When winding W1 applies the half cycle of carrier voltage which back biases the diodes of bridge Bl, terminal L1 is isolated from common bus CB. Though a positive-going excursion of the external signal that may be applied at terminal L1 would tend to overcome the back bias of diodes Dl-4 and D1-2 the same signal tends further to back bias diodes D1-3 and Dl-l, thereby assuring the isolation of terminal Ll from common bus CB. Similarly, terminal L1 remains isolated from common bus CB during the negative-going excursion of any external signal so long as winding W1 maintains the diodes of bridge Bl back-biased.

During the time that winding W1 delivers the half cycle of carrier voltage that back biases the diodes of bridge B1, the polarity of the carrier signal applied by winding W3 to bridge B3 is such as to forward-bias diodes D3-1, D3-4, D3-2, and D3-3. Terminal L3 is effectively connected to common bus CB through the upper branch of bridge B3 containing serially-connected diodes D31 and D3-2 and through the simultaneously enabled lower branch path containing diodes D3-4 and D3-3. Accordingly, terminal L1 is connected to common bus CB on one half cycle of carrier signal and terminal L3 is connected to common bus CB on the next half cycle.

Thus far, it has been explained how an external voltage of positive or negative excursion applied at terminal L1 may reach common bus CB during the interval that winding W1 applies a carrier signal of ap propriate magnitude to render the diodes of bridge Bl all simultaneously conductive, and how an external signal applied at terminal L3 may reach common bus CB when winding W3 is energized. From common bus CB a connection may be completed to either terminals L2 or LA- on a given half cycle of carrier. If winding W2 renders the diodes of bridges B2 conductive at the same interval of time that winding W1 renders the diodes of bridge B1 conductive, a path is completed from terminal L1 to common bus CB and thence to terminal L2. On the other hand, if winding W3 renders the diodes of bridge B3 conductive during the same time that winding W1 renders bridge B1 Conductive, a path would be completed from terminal L1 to common bus CB and thence to terminal L3. The manner in which the correct phase of carrier signal is selected will be described hereinafter. It should be observed, however, that since windings W1 .and W3 are out of phase with each other, the diodes of bridges B1 and B3 cannot simultaneously be rendered conductive. Accordingly, no path can ever be provided between terminals L1 and L3. Similarly, since windings W2 and W4 are out of phase, the diodes of bridges B2 and B4 cannot simultaneously be rendered conductive so that no path'can be provided between terminals L2 and L4.

The development of the correct phase of carrier voltage at secondary windings W1 through W4 for effecting the desired interconnections among terminals L1 through L4 is controlled by the polarity of the direct current bias signal applied between terminal VC connected to the center tap of the primary winding of transformer T2 and ground, at the center tap of transformer T1. The carrier signal, applied at terminals VS, is directly connected to the primary of transformer T1. The upper end of the primary winding of transformer T2 is connected to the upper end of the primary winding of transformer T1 by a path which includes diode D82 and the shunt combination of resistor R2 and capacitor C2. Resistor R2 is provided to limit the forward control current through steering diode DS2. Capacitor C2 is provided to provide a bypass for the carrier signal current. The lower end of the primary winding of transformer T2 is connected to the lower end of the primary winding of transformer T1 through a path which includes diode D83 and the parallel combination of capacitor C3 and resistor R3. Diodes D82 and D83 will be rendered conductive provided terminal VC at the center tap of the primary winding of transformer T2 is rendered positive with respect to the grounded center tap at the primary winding of transformer Tl. When diodes D82 and D83 are simultaneously rendered conductive the upper end of the primary winding of transformer T2 is connected to the upper end of the primary winding of transformer T1 and the lower end of the primary winding of transformer T2 is exclusively connected to the lower end of the primary winding of transformer T1. Accordingly, the primary winding of transformers T1 and T2 are effectively directly connected in parallel to terminals VS.

The primary winding of transformers T1 and T2 may be connected in phase reversed parallel to terminals VS by making terminal VC at the center tap of the primary of transformer T2 negative with respect to the grounded center tapped primary of transformer T1. When the center tap of transformer T2 is negative with respect to the center tap of transformer T1, diodes D82 and D83 are back biased whereas diodes D81 and D84 are rendered conductive. With diode DSl rendered conductive, the upper end of the primary winding of transformer T1 is connected to the lower end of the primary winding of transformer T2. With diode DS4 rendered conductive, the lower end of the primary winding of transformer T1 is connected to the upper end of the primary winding of transformer T2. In this manner, the primary windings of transformers T1 and T2 are connected in opposite phase to terminals VS.

When the primary winding of transformers T1 and T2 are directly connected in parallel to terminals VS by the bias voltage that renders diodes D32 and D83 conductive, secondary winding W1 of transformer T1 and secondary winding W2 of transformer T2 are in phase with each other. Similarly secondary windings W3 and W4 are in phase with each other. When the primary windings of transformers T1 and T2 are connected in opposite sense to terminals VS by the bias voltage rendering diodes D81 and D84 conductive, secondary winding W1 is in phase with secondary winding W4 and secondary winding W3 is in phase with secondary winding W2. As previously mentioned, the bridges associated with in-phase secondary winding of transformers T1 and T2 will be rendered simultaneously conductive thereby establishing a path between their-associated external terminal and common bus CB. Accordingly, it is seen that for one given polarity of the control voltage applied at terminal VC a connection path can be provided between terminals L1 and L2 and between terminals L3 and L4 and for the opposite polarity of controlvoltage a connection path can be provided between terminals L1 and L4 and between terminals L3 and L2. Thus a double-pole, double-throw switching arrangement is achieved.

Referring now to FIG. 2, an alternate form of a double-pole, double-throw reversing switch is shown which is capable of establishing connection paths between the terminals on both successive half cycles of the carrier signal. Once again, two transformers are employed whose primary windings P1 and P2 are supplied either in phase or out of phase with each other from a carrier signal source. Terminal Ll, however, in addition to being connected to a four-diode bridge B1 associated with secondary winding W1 of transformer T1 is also connected to another four-diode bridge Bl that is supplied with carrier signal voltage from a separate secondary winding W1 of transformer T1. During the time that winding W1 renders the diodes of bridge Bl conductive, winding W1 will be back biasing all of the diodes of bridge B1. On the other hand, bridge Bl will be enabled by the carrier signal supplied by winding W1 during the interval that bridge B1 is nonconductive. During the interval that bridge B1 is conducting, external signals applied to terminal L1 will be conveyed to common bus CB. During the time that bridge B1 is conducting, external signals applied at terminal Ll will be conducted to common bus CB. Assuming that it is desired to establish a connection between terminals L1 and L2, bridge B2 will be rendered conductive by winding W2 of transformer T2 at the same time that bridge B1 is rendered conductive by winding W1 of transformer T1. This condition will occur during one half cycle of the carrier when windings P1 and P2 are connected directly in parallel. During the succeeding half cycle, terminals L1 and L2 will be connected over a path which includes bridge B1, common bus CB and bridge B2.

In a similar fashion, with primary windings P1 and P2 connected directly in parallel to receive the same carrier signal, terminal L3 will be connected to terminal L4 on each successive half cycle of the carrier. More particularly, terminal L3 will be connected through bridge B3 to common bus CB during the same half cycle that terminal L1 is blocked from common bus CB inasmuch windings W1 and W3 apply out-of-phase voltages to the respective bridges B1 and B3. Common bus CB is connected to terminal L4 by bridge B4 during the half cycle that terminal L2 is isolated from bus CB backbiased bridge B2. windings W4 and W3 being in phase, terminal L3 is connected with terminal L4 over the path which includes forward-biased bridge B3, common bus CB and forward-biased bridge B4. On the succeeding half cycle, terminal L3 is connected to terminal L4 by a path which includes forward-biased bridge B3, common bus CB and forward-biased bridge B4. During this half cycle, common bus CB is isolated from terminals L1 and L2 by back-biased bridges B1 and B2, respectively.

. In order to connect terminal L1 with terminal L4 and terminal L3 with terminal L2, primary windings P1 and P2 are connected in phase reversed parallel to the carrier signal source at terminal VS. A somewhat different manner of controlling the application of carrier signal to the primaries of transformers T1 and T2 is shown in FIG. 2 than was employed in FIG. 1. The carrier signal at terminal VS is applied to the primary windings P1 and P2 of transformers T1 and T2 via transistors Q1 and Q2, respectively. The carrier signal is directly applied to the base of transistor Q1, but is applied to the base of transistor Q2 over a path which includes exclusive-OR gate GSC. The lower input of exclusive OR gate GSC is selectively supplied with a direct current control voltage at terminal VC. When the control voltage at terminal VC is low, exclusive-OR gate GSC applies an output to the base of transistor Q2 which is the same as the carrier signal that is applied to the base of transistor Q1. When the control voltage at terminal VC is in its high signal condition, exclusive-OR gate GSC inverts the carrier signal. Under these conditions, the signal applied to the base of transistor Q2 is out of phase with the signal applied to the base of transistor Q1. In this manner, the carrier signal applied by the collectors of transistors Q1 and Q2 to windings P1 and P2, respectively, may be caused to be in phase when the control signal VC is in its low signal condition and out of phase when the control signal VC is in its high signal state.

What is claimed is:

1. An electronic reversing switch comprising a pair of input and a pair of output terminals, a common bus, a respective diode bridge connected between each of said input terminals and said common bus and between said common bus and each of said output terminals, each said diode bridge being adapted when rendered conductive to pass an alternating current signal between its respective one of said terminals and said common bus, means defining a sequence of phase signals having a higher frequency than said alternating current signal, and means controlled by said phase signals defining means and coupled to pairs of said diode bridges for selectively rendering one of said diode bridges in one of said pairs conductive to couple one of said input terminals to said common bus and simultaneously another of said diode bridges in the other of said pairs conductive to couple said common bus to one of said output terminals when one sense of said phase signals is present and for rendering the others of said diode bridges in said one and in said other of said pairs simultaneously conductive when the opposite sense of said phase signals is present.

2. An electronic reversing switch according to claim 1 wherein said means defining said sequence of phase signals comprises a pair of transformers each having primary and secondary windings, a carrier signal source, and steering circuit means for selectively coupling said carrier signal source to said primary windings.

3. An electronic reversing switch according to claim 2 wherein a secondary winding of each of said transformers is coupled to a respective pair of said diode bridges.

4. An electronic reversing switch according to claim 2 wherein; said steering circuit means comprises unidirectional current element means connecting the said primary windings of said pair of transformers and means for applying a control voltage selectively to render predetermined ones of said unidirectional rent means conductive.

S. An electronic reversing switch according to claim 4 wherein said primary windings of said transformers each includes a center tap, wherein said unidirectional current element means interconnect the ends of said primary windings of said transformers in opposite sense, and wherein said means for applying said control voltage includes said center tap of saidtransfonners.

6. An electronic reversing switch comprising a pair of input and output terminals, a common bus, a respective electronic bridge circuit connected between each of said input terminals and said common bus, a respective electronic bridge circuit connected between-said common bus and each of said output terminals, and phase reversible pulse source means coupled to a first and second pair of said electronic bridge circuits for selectively rendering conductive one of said electronic bridge circuits in said first pair of bridge circuits connecting one of said input terminals to said common bus and one of said electronic bridge circuits in said second of said pairs conductive connecting said common bus to one of said output terminals during one phase of said pulses and for rendering the others of said electronic bridge circuits in said first and said second pairs conductive during the other phase of said pulses.

7. An electronic reversing switch according to claim 6 wherein each of said electronic bridge circuits comprises a pair of oppositely-poled semiconductor devices serially connected between one of said terminals and said common bus.

8. An electronic reversing switch according to claim 7 wherein said semiconductor devices are unidirectional diodes.

9. An electronic reversing switch comprising a pair of input and output terminals, a common bus, a first respective diode bridge connected between each of said input terminals and said common bus and between said common bus and each of said output terminals, a source of bipolar cam'er signals, first means for coupling said bipolar carrier signals to a pair of said bridges connected between said input terminals and said common bus, second means for coupling said bipolar carrier signals to a pair of said bridges connected between said output terminals and said common bus, said first and said second coupling means each including a transformer having primary and secondary windings, said primary windings being connected .to said source of bipolar carrier signals, said secondary curput-terminals, each said additional bridge being poled oppositely to said first respective diode bridge, each said additional diode bridge being connected to said second common bus, and each of said transformers being equipped with an additional secondary winding for delivering to one of said additional diode bridges carrier signals of opposite phase to said signals delivered to a respective one of said respective diode bridges.

Claims

4. An electronic reversing switch according to claim 2 wherein said steering circuit means comprises unidirectional current element means connecting the said primary windings of said pair of transformers and means for applying a control voltage selectively to render predetermined ones of said unidirectional current means conductive.

5. An electronic reversing switch according to claim 4 wherein said primary windings of said transformers each includes a center tap, wherein said unidirectional current element means interconnect the ends of said primary windings of said transformers in opposite sense, and wherein said means for applying said control voltage includes said center tap of said transformers.

6. An electronic reversing switch comprising a pair of input and output terminals, a common bus, a respective electronic bridge circuit connected between each of said input terminals and said common bus, a respective electronic bridge circuit connected between said common bus and each of said output terminals, and phase reversible pulse source means coupled to a first and second pair of said electronic bridge circuits for selectively rendering conductive one of said electronic bridge circuits in said first pair of bridge circuits connecting one of said input terminals to said common bus and one of said electronic bridge circuits in said second of said pairs conductive connecting said common bus to one of said output terminals during one phase of said pulses and for rendering the others of said electronic bridge circuits in said first and said second pairs conductive during the other phase of said pulses.

9. An electronic reversing switch comprising a pair of input and output terminals, a common bus, a first respective diode bridge connected between each of said input terminals and said common bus and between said common bus and each of said ouTput terminals, a source of bipolar carrier signals, first means for coupling said bipolar carrier signals to a pair of said bridges connected between said input terminals and said common bus, second means for coupling said bipolar carrier signals to a pair of said bridges connected between said output terminals and said common bus, said first and said second coupling means each including a transformer having primary and secondary windings, said primary windings being connected to said source of bipolar carrier signals, said secondary windings each being connected to a pair of said bridges and phase control means connecting said primary windings of said transformers directly in parallel or in phase reversed parallel to said source of carrier signals to determine whether said first and second coupling means couple said bipolar carrier signals in the same or in opposite phases to said bridges.

10. An electronic reversing switch according to claim 9 further comprising a second common bus, an additional diode bridge for each of said input and output terminals, each said additional bridge being poled oppositely to said first respective diode bridge, each said additional diode bridge being connected to said second common bus, and each of said transformers being equipped with an additional secondary winding for delivering to one of said additional diode bridges carrier signals of opposite phase to said signals delivered to a respective one of said respective diode bridges.