US3697861A

US3697861A - Short circuit protected voltage regulator

Info

Publication number: US3697861A
Application number: US138550A
Authority: US
Inventors: Melvin A Frazier
Original assignee: Collins Radio Co
Current assignee: Collins Radio Co
Priority date: 1971-04-29
Filing date: 1971-04-29
Publication date: 1972-10-10
Anticipated expiration: 1989-10-10

Abstract

A series voltage regulator providing both short circuit and overload protection having a transistor in series with a preceding resistor in a direct path from dc input to dc regulated voltage output. The transistor is a series control element part of current limiting circuit subject to control with voltage drop variation through the preceding resistor. The voltage regulator also has automatic self-starting circuitry coupled through to a regulator bias circuit subject to being decoupled when the bias circuit connected to regulated dc output is sustaining operational bias in the regulator during normal operation after regulated dc voltage is developed at the regulator output.

Description

United States Patent Frazier [451 Oct. 10, 1972 [541 SHORT CIRCUIT PROTECTED 3,305,763 2/1967 Kupferberg et al ..323/9 VOLTAGE REGULATOR Primary Examiner-A. D. Pellinen 72 I t M l A. F E73; 2 or C uf R 2; Attorney-Robert J. Crawford and Bruce C. Lutz sslgneez 0 ins a [0 ompany, as, 57 ABSTRACT [22] Filed: April 29, 1971 A series voltage regulator providing both short circuit [21] AWL 138,550 and overloadprotectionhaving a transistor in series with a preceding resistor m a direct path from dc input to do regulated voltage output. The transistor is a se- [52] US. Cl. ..323/9, 323/22 T, 323/38 fies control element pan of current limiting circuit [51] Ilil. Cl "605 1/58 Subject to comm] with vohage drop variation through [58] Flew of Search "317/33 v; 3 22 38 the preceding resistor. The voltage regulator also has automatic self-starting circuitry coupled through to a [56] References C'ted regulator bias circuit subject to being decoupled when UNITED STATES PATENTS the bias circuit connected to regulated dc output is sustaining operational bias in the regulator during norg; giatsumura nial operation after regulated dc voltage is developed emper at h re ulator t L 3,204,175 8/1965 Kuriger ..323/22 T g p 3,431,486 3/ 1969 Fruehling et a1 ..323/9 9 Claims, 2 Drawing Figures 2 l4 I2 l3 REGULATED p gg g Qfig NP VOLTAGE OUTPUT {j SWITCH J NPN PATENTEBULI 10 I972 REGULATED DC VOLTAGE SOURCE AND VOLTAGE OUTPUT LOAD SWITCH v REGULATED 0c VOLTAGE SOURCE AND VOLTAGE OUTPUT LOAD SWITCH ENI? 23 22 2O 27 25 2 INVENTOR MELVIN A. FRAZ/ER I BY W W ATTORNEY SHORT CIRCUIT PROTECTED VOLTAGE REGULATOR This invention relates in general to transistor equipped voltage regulators and, in particular, to a series voltage regulator providing both short circuit and overload protection with a minimum of circuit components.

With many series voltage regulators additional circuits, fuses or circuit breakers are added in order to attain short circuit protection. Fuses and circuit breakers used with such regulator circuits, however, generally respond too slowly to a short circuit to adequately protect semiconductor circuits with, as a result, some type of fast acting semi-conductor protective circuit required for adequate regulator circuit protection. Further, while some of the existing voltage regulators are provided with short circuit protective circuits, these are generally such as to rarely provide any protection from overload conditions with overload protection imposing a further requirement for additional circuitry. Such addition for short circuit and/or overload protection circuits considerably increase component part requirements, actually many times doubling the parts requirements over that of a basic regulator. Obviously, such circuit increased parts requirements greatly increase costs, lower reliability, increase space cooling requirements and add weight.

It is, therefore, a principal object of this invention to provide a series voltage regulator having both short circuit protection and overload protection provided with a minimum number of parts.

Specific embodiments representing what are presently regarded as the best modes of carrying out the invention are illustrated in the accompanying drawing.

In thedrawing:

FIG. 1 represents a schematic of applicant's transistor equipped protected series voltage regulator; and

FIG. 2, a schematic of a second embodiment of the protected series voltage regulator with a biasing circuit transistor added forming a current source independent hrs.

Referring to the drawing:

The protected series voltage regulator of FIG. 1 is provided with a dc voltage input connection from a relatively highly variable dc voltage source 11, with an on-oif switch or turn on means, to and through resistor 12 to the emitter of PNP transistor 13 having a collector regulated voltage output connection to load 14. This is with transistor 13 in addition to functioning as a voltage regulator also providing current limiting in conjunction with zener diode 15, diode 16, and resistor 17 as interconnected with the cathode of zener diode 15 to the input connection from dc voltage source 11 with resistor 12 and the zener diode l5 anode connected through resistor 17 to ground, The junction of the anode of zener diode 15 and resistor 17 is connected to the anode of diode 16 and through the diode 16 to the base of PNP transistor 13. This current limiting circuitry gives a current limiting action substantially inde pendent of transistor gain and stable with temperature. Resistor 17 provides bias for zener diode 15 as it is passed to ground, while diode 16 with reverse current blocking prevents any transistor 13 base current from flowing through resistor 17. Such action would saturate transistor 13 and adversely affect the bias developed across resistor 17. Limiting to a particular predetermined desired current is attained through selection of a proper value zener diode 15 and a proper resistor 12 value so that when the voltage drop across resistor 12 increases to the point that diode 16 becomes forwardly biased to thereby lessen the emitter to base bias of PNP transistor 13 in a current limiting balancing action.

A turn on network is provided for the regulator 10 with the input connection from dc voltage source 11 connected serially through resistor 18, capacitor 19 and resistor 20 to ground. The junction of capacitor 19 and resistor 20 in the turn on network is connected to the anode of diode 21 and through diode 21 to the base of NPN transistor 22 to supply base current thereto when the supply voltage is activated. When voltage source 11 is initially applied, the current surge through resistor 18 and capacitor 19 is sufficient to bias transistor 22 to conduction and therethrough PNP transistor 13 to conduction. The collector of transistor 22 is connected to the base of PNP transistor 13 and the emitter is connected through resistor 23 to ground and through resistor 24 to the collector of PNP transistor 13. The resistor 18 is of such value as to limit tum-on current to a safe value so as not to damage diode 21 or a zener diode 25 having a cathode connection to the base'of NPN transistor 22. The anode of zener diode 25 is connected to ground. The resistor 20 provides a discharge path for capacitor 19 when voltage from source 1 1 is removed. The collector output of PNP transistor 13 is also connected serially through

resistors

26 and 27 to ground with the junction of

resistors

26 and 27 connected to the base of NPN transistor 22,

reverse biases diodes

25 and 21 when transistor 13 is developing a"; collector regulated voltage output, to thereby decouple input voltage noise from the base of NPN transistor 22. The resistorvoltage dividers with their respective connections to NPN transistor 22 and zener diode 25 form a reference and error amplifier subcircuit driving PNP transistor 13 and maintaining the desired output voltage that in one embodiment built according to the teachings hereof is plus 5.0 volts dc.

Under an overload condition PNP transistor 13 begins current limiting so as to cause the collector output voltage to load 14 to drop. With

resistors

23 and 24 small enough that emitter current out of NPN transistor 22 causes negligible voltage change across resistor 23, and base current of PNP transistor 13 is relatively small as compared to the current through resistor 26 then a simple voltage equation may be derived to predict the minimum output voltage at which regulator shut-down will occur. This equation derivation is as follows:

R26+R27 m (EO)+VBE(PNP13 Also when E 5.0 V dc the quantity R27/R26 R27 (E 3.9 V do in order for zener diode 25 to regulate. For this case then: R27/R26 R27 0.78 minimum. As an example let R27/R26 R27 0.9

then: E, 0.6/(0.9 0.66)

E 2.5 V dc Thus, the protected series voltage regulator will shut down by the time the output voltage E drops to approximately 2.5 volts do. Knowledge of the minimum shut down voltage, the maximum input voltage, and the current limit is such as to determine the power rating for PNP transistor 13. Then with PNP transistor 13 properly selected, the series voltage regulator 10 is self protecting against overload as well as short circuits.

Referring now to the regulator of FIG. 2, the dc developed at the collector output of PNP transistor 13', rather than being the regulator output just as with the PNP transistor 13 in FIG. 1, is connected to the base of NPN transistor 28. The collector of NPN transistor 28 is connected to resistor 12 and the emitter is connected to load 14 as the regulated output of the regulator 10'. Please note that components the same as with the embodiment of FIG. 1 are numbered the same as a matter of convenience and common description of circuitry and operation in common are not necessarily repeated again with respect to the embodiment of FIG. 2. In FIG. 2 the circuit combination of resistor 12, resistor 17, zener diode 15 and diode 16 in conjunction with PNP transistor 13 forms a current source, connected collector to base of NPN transistor 28, substantially independent of h and more closely dependent upon actual load current less the relatively insignificant voltage drive requirements for the PNP transistor 13'. The regulator embodiment provides accurate current limiting and circuit turn off when the dc output drops on overload to about 2.0 volts do with a regulator built in accord with the embodiment of FIG. 2 using the following components and values.

Resistor 12 L8 ohms PNP transistor 13' 2N2905A Zener diode 15 M24617 (2.4 volt) Diode l6 IN645 Resistor I7 I K ohm Diode 21 IN645 NPN transistor 22 2N930 Resistor 23 l9l ohms Resistor 24 I00 ohms Zener diode 25 lN784A (3.9 volt) Resistor 26 47 ohms Resistor 27 I80 ohms The regulator 10' embodiment with the foregoing components and component values was subject to testing with temperature variation as set forth below, with load current held generally between 650 ma and 750 ma although shut-off load current for the circuit is 1.2 amps dc.

TemP- m ovr our (Volts) (Volts) (ma) "55C 7.010 4.700 668' "-55C 8.005 4.920 698 55C 9.012 4.956 700 25C 7.010 4.782 675' +25C 8.002 5.110 725 +25C 9.012 5.140 730 +I00C 7.020 4.820 682' +C 8.033 5.285 750 +100C 9.020 5.318 755 Please note the condition with the is with test input voltage E too low and NPN transistor 28 saturated.

Whereas this invention is herein illustrated and described with respect to two embodiments hereof, it should be realized that various changes may be made without departing from essential contributions to the art made by the teachings hereof.

I claim:

1. In a voltage regulator providing both short circuit and overload protection, input dc connective means; dc path series connected first resistive means, and a first transistor with a first electrode connected to said first resistive means, a second electrode connected to do regulated voltage output circuit means, and a base connection to voltage bias developing circuit means; current limiting circuit means comprising a zener diode and a resistor serially interconnecting said input dc connective means and the base of said first transistor, said current limiting means additionally including said first resistive means and a further diode, connected between the junction of said zener diode and the resistor of said current limiting means and the base electrode of said first transistor, said current limiting circuit means acting to control said transistor first electrode to base bias; said voltage bias developing circuit means including impedance voltage dividing circuit means connected between said dc regulated voltage output means and a potential reference source; and turn-on circuit means interconnecting said input dc connective means and said voltage bias developing circuit means for imparting starting voltage potential to the voltage bias developing circuit means when do is initially imparted to said input dc connective means, said turn-on circuit including resistive means and capacitive means serially connected between said dc input connective means and said voltage potential reference source; and first diode means connected from a junction of said capacitive means and a resistor of said resistive means in the turnon circuit to a junction in a voltage divider in said voltage bias developing circuit means, said first diode means permitting starting voltage flow to said voltage bias developing circuit means and blocks reverse dc when regulated output dc voltage is present on said regulated voltage output circuit means.

2. The voltage regulator of claim 1, wherein said first transistor is a PNP transistor with said first electrode an emitter and said second electrode a collector.

3. The voltage regulator of claim 1, wherein a second transistor is included as part of said voltage bias developing circuit means with connection of said first diode means to the base of said second transistor; connection of the emitter of said second transistor to said voltage potential reference source; and connection of the collector of said second transistor to the base of said first transistor.

4. The voltage regulator of claim 3, wherein said second transistor is an NPN transistor; the cathode of said first diode is connected to the base of said second transistor.

5. The voltage regulator of claim 4, wherein the cathode of a second zener diode is connected to the base of said second transistor, and the anode is connected to said voltage potential reference source.

6. The voltage regulator of claim 5, wherein resistive means is connected from the base of said second transistor to said dc regulated voltage output circuit means.

7. The voltage regulator of claim 6, wherein the emitter of said second transistor is connected to a junction in a voltage divider connected between said dc regulated voltage output circuit means and said voltage potential reference source.

8. The voltage regulator of claim 6, wherein said first transistor is an NPN transistor with said first electrode a collector and said second electrode an emitter.

9. The voltage regulator of claim 8, wherein a third transistor is included in said regulator circuit with said third transistor a PNP transistor with emitter connected to the collector of said first transistor, collector connected to the base of said first transistor, and base connected to the further diode of said current limiting circuit means and to the collector of said second transistor.

Claims

1. In a voltage regulator providing both short circuit and overload protection, input dc connective means; dc path series connected first resistive means, and a first transistor with a first electrode connected to said first resistive means, a second electrode connected to dc regulated voltage output circuit means, and a base connection to voltage bias developing circuit means; current limiting circuit means comprising a zener diode and a resistor serially interconnecting said input dc connective means and the base of said first transistor, said current limiting means additionally including said first resistive means and a further diode, connected between the junction of said zener diode and the resistor of said current limiting means and the base electrode of said first transistor, said current limiting circuit means acting to control said transistor first electrode to base bias; said voltage bias developing circuit means including impedance voltage dividing circuit means connected between said dc regulated voltage output means and a potential reference source; and turn-on circuit means interconnecting said input dc connective means and said voltage bias developing circuit means for imparting starting voltage potential to the voltage bias developing circuit means when dc is initially imparted to said input dc connective means, said turn-on circuit including resistive means and capacitive means serially connected between said dc input connective means and said voltage potential reference source; and first diode means connected from a junction of said capacitive means and a resistor of said resistive means in the turn-on circuit to a junction in a voltage divider in said voltage bias developing circuit means, said first diode means permitting starting voltage flow to said voltage bias developing circuit means and blocks reverse dc when regulated output dc voltage is present on said regulated voltage output circuit means.