US3696356A

US3696356A - Acknowledging circuit arrangement

Info

Publication number: US3696356A
Application number: US153966A
Authority: US
Inventors: Raymond C Franke; William B Dufer
Original assignee: Westinghouse Air Brake Co
Current assignee: Hitachi Rail STS USA Inc
Priority date: 1971-06-17
Filing date: 1971-06-17
Publication date: 1972-10-03
Anticipated expiration: 1989-10-03
Also published as: CA950551A

Abstract

An acknowledging arrangement comprising a charging circuit associated with each input signal, a warning actuating and acknowledging circuit means, and a secondary discharge circuit associated with each input signal except the least restrictive. Each charging circuit is controlled in response to the reception of the associated input signal to store a predetermined amount of operating energy. When a more restrictive signal is received, this stored energy is discharged to actuate a warning indicator. A time delay arrangement included in the actuating circuit delays the warning for a preset time to eliminate momentary false restrictive signals. A single relay is actuated to control the warning indicator for all input signals. This same relay responds to acknowledgement action by the train operator to halt the warning and restore the brake magnet valve, if other safety checks are proper. The secondary discharge circuits drain the stored energy from the activated charging circuit, when a less restrictive input signal is received, to inhibit the warning indication and the need for acknowledgement.

Description

United States Patent 51 3,696,356 Franke et a]. 1 Oct. 3, 1972 [54] ACKNOWLEDGING CIRCUIT ARRANGEMENT [57] ABSTRACT lnvemorsi Raymond Fl'allke, Glenshaw; An acknowledging arrangement comprising a charging William B. Dufer, Penn Hills Twp., Allegheny County, both of Pa.

3,289,783 12/1966 Buhler ..340/263X Primary Examiner-Donald J. Yusko Att0rneyH. A. Williamson et al.

circuit associated with each input signal, a warning actuating and acknowledging circuit means, and a secondary discharge circuit associated with each input signal except the least restrictive. Each charging circuit is controlled in response to the reception of the associated input signal to store a predetermined amount of operating energy. When a more restrictive signal is received, this stored energy is discharged to actuate a warning indicator. A time delay arrangement included in the actuating circuit delays the warning for a preset time to eliminate momentary false restrictive signals. A single relay is actuated to control the warning indicator for all input signals. This same relay responds to acknowledgement action by the. train operator to halt the warning and restore the brake magnet valve, if other safety checks are proper. The secondary discharge circuits drain the stored energy from the activated charging circuit, when a less restrictive input signal is received, to inhibit the warning indication and the need for acknowledgement.

20 Claims, 2 Drawing Figures Bro/to l rain brakes applied LIruuts a Pmdt'rmind time after magnet vilv Ml/Is dcancrglzd PATENTED B I973 3.696.356

sum 1 HF 2 T T Drama 2 I] 13 flllowad MV B+ Y J Spaad C I Complianca KY Clmc k T b k I d Circuits 6 predetermined time after magnet valve MI/Ls dnorgizcd V' V EN 7 03 f Raymond C. [funk e and PATENTEI] 0013 I972 SHEET 2 [IF 2 /Ia f d A H C; :L :1 i a |||ll|lI 2. W i w W V v m F 8 w 9 m Q m m 7W F. J m m c n u .T

ACKNOWLEDGING CIRCUIT ARRANGEMENT Our invention relates to a circuit arrangement for acknowledging the reception of a more restrictive signal among a plurality of input signals selectively applied to a control circuit, and more particularly to an arrangement employing a single actuating circuit for providing an indication of any more restrictive input signal.

In railway cab signaling and speed control systems, vehicle-carried circuit arrangements are employed for selectively receiving, one at a time, a plurality of input signals from the railway tracks, each bearing a code indicative of the speed at which the vehicle should be traveling. Each coded input signal energizes a signaling relay specifically associated therewith, the relays associated with other signals being normally deenergized. An example of the prior art systems, but not incorporating the feature under which all signaling relays other than that relay specifically associated with the received code signal are deenergized, is disclosed in Letters Patent of the US. Pat. No. 2,462,454, issued Feb. 22, 1949 to L. R. Allison. The existing combination of energized and deenergized signal responsive relays, in turn, positions their contacts to actuate the display of a speed control signal and, upon change to complete or disable an alarm actuating circuit arrangement in accordance with the new presence of a more restrictive or less restrictive coded input signal, respectively. This alarm actuating circuitry, in the prior art, consists of a bank of relays, at least equal in number to the plurality of coded input signals selectively delivered to the train-carried apparatus, and an operator acknowledging means. Accordingly, a complicated and difficult to service relay contact arrangement was developed to selectively energize and/or deenergize the alarm actuating bank of relays depending upon whether a more restrictive or less restrictive speed signal command was delivered to the vehicle. A later example of such alarm and acknowledging relays used in a cab signal system is disclosed in Letters Patent of the U.S. Pat. No. 3,046,391, issued July 24, 1962 to H. W. Bryan. These previous arrangements were costly due to the excessive number of relays employed in the alarm actuating and acknowledging circuitry as well as the amount of service and maintenance involved in maintaining accuracy of the circuit components. Further, the possibility that, in certain stretches of track, momentary false restrictive cab signal commands may be received, presented to the train operator the annoying problem of continually acknowledging each false restrictive indication. This particular problem desirably requires the incorporation of a time delay of predetermined length before a true indication of a more restrictive input signal causes an alarm actuation. Previous circuits of the above-described type either did not provide the required time delay or, even if such circuits had an inherent time delay, it was not sufficiently flexible, e.g., externally adjustable, to eliminate all false alarms.

It is, therefore, an object of our invention to provide a novel circuit arrangement for acknowledging more restrictive signals among a plurality of input signals to control apparatus which is simple in design, reliable in operation, durable in use, and efficient in service.

Another object of our invention is a new circuit arrangement for acknowledging more restrictive signals, among a plurality of input signals to a control circuit, which employs a single actuating circuit for providing an indication of a more restrictive input signal irrespective of the number of possible input signals.

A further object of our invention is an improved circuit arrangement for acknowledging the reception of more restrictive signals, among a plurality of input signals to the control circuit, which includes an actuating circuit time delay such as to ensure a true indication of a more restrictive input signal and eliminate momentary false restrictive signal alarms.

It is also an object of our invention to provide a novel circuit arrangement for acknowledging more restrictive signals among a plurality of input signals to a control circuit wherein the presence of a less restrictive input signal does not actuate the alarm and in no way affects the subsequent operation of its circuitry for indicating the presence of a more restrictive input signal.

Still a further object of our invention is a new and improved circuit arrangement for acknowledging the reception of more restrictive signals of a plurality of input signals wherein all logic functions of the actuating circuit are performed with solid state devices.

Still another object of our invention is a principally solid state circuit arrangement controlling a single relay for both actuating an alarm, when a more restrictive signal is received by the cab signal/speed control apparatus on a railroad train; and registering the acknowledgment of the more restrictive signal by the train operator.

Other objects, features, and advantages of our invention will become apparent from the following specification and appended claims.

In the attainment of the foregoing objects, we provide a circuit arrangement having a plurality of inputs, each for distinctly receiving one of a plurality of preselected signals having a preset order of restrictive importance, and actuating a warning indication which is to be acknowledged whenever a more restrictive signal supersedes a less restrictive signal. The arrangement comprises a bank of charging circuits, actuating and acknowledging circuit means, and a bank of secondary discharging circuits. Each of the charging circuits includes the serial combination of a resistive element and a capacitive device and is selectively connected to a common power source over contacts of a bank of relays associated with the plurality of signal inputs. Hence, a predetermined amount of energy is stored in the capacitive device of a particular charging circuit whenever a preselected input signal causes it to be connected to the power source. The actuating circuit means includes a time delay means and is selectively connected to the bank of charging circuits so that the predetermined amount of energy that is stored in a particular one of the charging circuits will be discharged through the actuating circuit, after a preselected time delay as determined by the time delay means, whenever a more restrictive signal appears on one of the plurality of inputs. The actuating circuit means controls an alarm device which provides an alarm indication, requiring acknowledgment, that a more restrictive signal has appeared on one of the plurality of inputs. The actuating means also controls a brake valve which causes a brake application unless acknowledgement is completed and speed conditions are proper.

One embodiment of the actuating circuit includes a first and a second resistive element, a capacitive device, a four-layer diode, and one coil of a magnetic stick relay. The capacitive device of the actuating circuit is connected in parallel with the first resistive element, this parallel connection being connected to the bank of charging circuits as well as to the four-layer diode. The predetermined amount of energy discharged from a particular charging circuit, upon reception of a more restrictive signal, will thus be transferred to the capacitive device of the actuating circuit. When the energy stored in this capacitive device exceeds the predetermined potential which produces conduction through the four-layer diode, the capacitive device of the actuating circuit discharges through the serial connection of the four-layer diode and the one coil of the magnetic stick relay, thereby energizing the relay coil. The'amount of time involved before the four-layer diode begins conducting is determined by the values of the resistive element of the particular charging circuit being discharged and the capacitive device and first resistive element of the actuating circuit. The current flow through the relay coil is so poled as to actuate relay operation to activate the warning device and to also complete a circuit through the second resistive element to rapidly discharge the capacitive device. The acknowledging or deactuating circuit includes a power source, a two-point make push button (the acknowleding means), and another coil of the aforementioned magnetic stick relay. Acknowledgment of a more restrictive signal by operation of the push button connects the power source to the other coil of the magnetic stick relay, so poled as to restore the relay to its normal position. This deactivates the warning indication and returns the actuating circuit to its inactive condition.

Another disclosed embodiment of the actuating circuit includes as a time delay means a solid state relaxation oscillator having an input connected to the bank of charging circuits and an output connected to a solid state bistable circuit means also included in the actuating circuit. The relaxation oscillator or time delay circuit includes a unijunction transistor and provides an output signal at the end of the preset time delay period after a more restrictive signal is received, The input signal is provided by the charging circuit then active. The bistable circuit means, shown as comprising a pair of silicon controlled rectifiers and a commutating capacitor, is normally in its first conducting condition. This circuit controls an acknowledging relay which in turn controls the audible warning device. An output signal from the time delay circuit arrangement triggers the bistable circuit into its second condition in which the relay is energized and picks up to activate the warning device. Operation of the acknowledging device restores the bistable circuit to its first condition, which releases the relay to interrupt the warning.

The plurality of secondary discharging circuits is connected to the bank of charging circuits for discharging the predetermined amount of energy stored in a. particular one of the charging circuits whenever a less restrictive signal appears at one of the plurality of inputs. In the first embodiment, a basic secondary discharge circuit comprises a Zener diode and a transistor. The transistor is so connected that, when activated, it drains the charge from the directly associated charging circuit capacitor. A transistor is associated with and so connected to each charging circuit except that for the least restrictive input signal. A Zener diode is associated with each charging circuit except that for the most restrictive input signal and is connected to become conducting when the charging circuit capacitor is charged. The biasing or base circuit of each transistor is connected to the Zener diode associated with each less restrictive signal so that it is activated when the Zener diode conducts. Thus a transistor becomes conducting when any less restrictive input signal is received and drains off the charge in the associated charging circuit to prevent actuation of the warning signal. In the second embodiment, the secondary discharge circuits comprise a circuit matrix of relay contacts responsive to the input signals. This circuit matrix is so connected to the charging circuits that the reception of any less restrictive input signal discharges the energy in the charging circuits and no warning signal is actuated.

For a more complete understanding of my invention, reference is made to the following detailed description taken in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic circuit diagram illustrating one embodiment of the circuit arrangement of the present invention.

FIG. 2 is a schematic circuit diagram illustrating a second embodiment of the circuit arrangement of the present invention.

In each of the drawings, similar reference characters designate similar parts of the apparatus. In each embodiment, a source of direct current energy is provided but is not specifically illustrated since any typical source having suitable voltage and sufficient capacity maybe used. Connections to the positive terminal of this source are designated by the reference B+ while connections to the negative terminal are shown by the conventional ground symbol.

Referring now to the drawings, and particularly to FIG. 1, there is shown a circuit arrangement for acknowledging the reception of more restrictive signals among a plurality ofinput signals in accordance with our invention. As shown, a plurality of inputs, over the circuits ll, 12, and 13, are connected, respectively, to signaling relays H, M, and L. The other terminals of these relays are connected to ground. This plurality of inputs may represent, for example, different speed commands in a railway cab signaling system, as disclosed in the cited US. Pat. No. 2,462,454, the input to relay H being the least restrictive, the input to relay M being the second least restrictive, and the input to relay L being the third least restrictive. The absence of all input signals is, of course, the most restrictive signal condition. Associated with the signal relays is a bank of charging

circuits

1, 2, and 3, controlled respectively by contacts a a and a of relays H, M, and L. Each of the charging circuits includes, in series, the signal relay contact a a or a a resistor R1, R2, or R3, respectively, and a capacitor C1, C2, or C3, respectively, which capacitor is also connected to ground. It will be noted that when any one of the contacts a,, 0 or a of relays H, M, and L, respectively, engages its front contact point, terminal B+ is connected to the particular resistor-capacitor combination associated with that contact.

Shown connected to the bank of charging

circuits

1, 2, and 3 through diodes D4, D5, and D6, respectively, and common lead 8 is an actuating circuit 4. The actuating circuit includes a resistor R8 connected in parallel with a capacitor C4 between lead 8 and ground. The parallel combination of resistor R8 and capacitor C4, through lead 8, is connected to the series combination of a four-layer diode D7, poled in the direction shown, and one coil RYl of a magnetic stick relay. A resistor R9 is at times also selectively connected to ground in parallel with capacitor C4 by the closing of reverse contact a of relay RY. Also shown in FIG. 1 is a deactuating or acknowledging circuit 7 comprising a two-point-make acknowledging push button ACKl and a second coil RY2 of the magnetic stick relay. When device ACKl is actuated to complete the circuit, coil RY2 is connected between terminal 8+ and ground. Further associated with actuating circuit 4 is an alarm circuit 9 chiefly comprising a bell BE or any equivalent audible warning device. Bell BE is obviously energized when reverse contact buy closes and operates, until acknowledged, to indicate the reception of a more restricted signal.

The previously described coils RY1 and RY2 are the two windings of a single magnetic stick type relay RY. Contacts a, b, and c (RY) controlled by this relay are shown, each illustrated with the movable armature portion in a vertical position. The fixed contact points to the right of an armature are herein defined as reverse contacts, those to the left as normal contacts. Magnetic stick relays have the characteristic that when the conventional current flow through either winding is in the normal direction, i.e., with the associated arrow symbol, normal contacts are closed. When current flows in the opposite direction, reverse contacts are closed. Contact armatures remain in the last occupied position when the relay coils are deenergized. It is to be noted that a normal current direction arrow symbol is as sociated with each coil RYl and RY2. The four-layer diode D7 is a conventional device known in the solid state art. Briefly, its remains nonconducting until the positive direction potential across its anode-cathode path builds to a predetermined level, e.g., on the order of 10-12 volts. The device then avalanches and conducts current, even at relatively low positive voltages such as l-2 volts, limited only by total circuit resistance.

Also connected to the bank of charging

circuits

1, 2, and 3 is a plurality of secondary discharging circuits respectively including Zener diode Z1, diode D1, resistors R4 and R6, and NPN-transistor Q1; Zener diode Z1, diode D2, resistors R5 and R7, and NPN-Transistor Q2; and Zener diode Z2, diode D3, resistors R5 and R7 and transistor Q2. As shown, the cathode electrode of Zener diode Z1 is connected to the serial combination of resistor R1 and capacitor C1. The anode electrode of Zener diode Z1 is connected in multiple to the anode electrodes of diodes D1 and D2, respectively. The cathode electrode of diode D1 is connected to the base electrode of transistor Q1 through resistor R4. The cathode electrode of diode D2 is connected to base electrode 25 of transistor Q2 through resistor R5. The cathode electrode of Zener diode Z2 is connected to the serial combination of resistor R2 and capacitor C2, while its anode electrode is connected to the anode electrode of diode D3. The cathode electrode of diode D3 is also connected to the base electrode 25 of transistor Q2 through resistor R5. Resistors R6 and R7 are respectively connected from the base electrodes 20 and 25 of transistors Q1 and Q2 to ground. The collector electrode 21 of transistor O1 is connected to the serial combination of resistor R2 and capacitor C2 whenever contact a; of relay M engages its back contact point, while the collector electrode 26 of transistor Q2 is connected to the serial combination of resistor R3 and capacitor C3 whenever contact a of relay L engages its back contact point. Both

emitter electrodes

22 and 27 of transistors Q1 and Q2, respectively, are connected to ground. It is to be noted that no Zener diode is associated with charging circuit 3 and that no transistor is connected to charging circuit 1.

Turning now to the operation of the circuit arrange ment embodied in FIG. 1, it will be assumed that all relay contacts are initially positioned as shown and that capacitors C1, C2, and C3 have no charge stored therein. It will be further assumed, for illustrative purposes, that two input signals can not be continuously present on the input leads 11, 12, and 13 simultaneously, although actually there will be a short overlap as signals change. It is now assumed that an input signal is present on lead 11 to relay H, which was previously defined as the least restrictive relay. Accordingly, relay H will become energized from lead 11 through the relay winding to ground. Upon the energization of relay H, its contact a, will be picked up to engage its front contact point. Hence, a circuit will be completed from terminal B+ through front contact a, of relay H, resistor R1, and capacitor C1 to ground, thereby charging capacitor C1 with a predetermined amount of charge. Assuming that all Zener diodes used are selected with characteristics so that the potential B+ of the power source is sufficient to cause a reverse breakdown of the Zener diode, a circuit will also now be completed from terminal B+ over front contact a, of relay H through Zener diode Z1, diode D1, resistor R4, base electrode 20 and emitter electrode 22 of transistor Q1 to ground, thereby forward biasing this NPN transistor. However, since it was initially assumed that capacitor C2 had no charge stored therein, transistor Q1 will not conduct since there is no positive potential provided at its collector electrode 21. Similarly, a circuit is also completed from B+ over front contact a of relay H through Zener diode Z1, diode D2, resistor R5, base electrode 25, and emitter electrode 27 of transistor Q2 to ground, thereby forward biasing the transistor. However, transistor Q2 also will not conduct since it was initially assumed that capacitor C3 had no charge stored therein and therefore no positive potential exists at the collector electrode 26 of transistor Q2.

It will now be assumed that a more restrictive input signal appears on lead 12 so that relay M becomes energized. Recalling that it was an operating condition that two input signals can not continue to exist simultaneously, the signal on lead 11 shortly disappears and relay H is deenergized. With relay M energized, its contact a will be picked up completing a circuit from terminal B+ over front contact a of relay M, resistor R2, and capacitor C2 to ground, thereby causing a predetermined amount of charge to be stored in capacitor C2. Upon deenergization of relay H, its contacts a drops to engage its back contact point. The charge stored in capacitor C1 will then discharge through resistor R1, back contact a, of relay H, diode D4, and lead 8 to capacitor C4. The discharge time is a function of the values of resistors R1, R8, and capacitor C4. When a predetermined amount of charge is stored in capacitor C4, the four-layer diode D7 will begin conducting. Capacitor C4 will then begin discharging, initially through four-layer diode D7 and magnetic stick relay coil RYl to ground, thereby energizing magnetic stick relay coil RYl with opposite direction current.

With magnetic stick relay coil RYl thus energized, reverse contact 1 of relay RY in the alarm circuit 9 will close to complete the alarm circuit from terminal B+ through bell BE to ground. This causes bell BE to begin ringing, thus indicating that a more restrictive signal is present at input leads 11, 12, and 13. Reverse contact a of relay RY in actuating circuit 4 also closes, connecting resistor R9 in parallel with capacitor C4 between lead 8 and ground so that capacitor C4 will quickly complete its full discharge through resistor R9. The opening of normal contact o of relay RY deenergizes magnet valve MV, which is normally held energized through a conventionally illustrated safety check circuit network typically used in the cab signal/speed control art. However, the acknowledging action next described will restore the energization of magnet valve MV, providing the safety check circuits are also properly maintained, prior to the emergency braking action noted in the drawing figure.

Upon this alarm indication, operation of the acknowledging pushbutton ACKl of deactuating circuit 7 by the train operator to acknowledge the more restrictive signal will complete a circuit from terminal B+ through pushbutton ACKl and magnetic stick relay coil RY2 to ground, thereby energizing coil RY2 with normal direction current. As previously described and known by those skilled in the art, this momentary energization of coil RY2 will cause magnetic stick relay RY to operate to its normal position, opening its contact b, to stop the ringing of bell BE. The opening of reverse contact any of relay RY interrupts the circuit through resistor R9. The closing of normal contact a restores the connection to terminal B+ for magnet valve MV and, if the other safety check circuits are complete, any emergency brake application is avoided.

Since its breakdown potential is no longer maintained at the cathode electrode of Zener diode Z1 due to the release of contact a, of relay H, transistor Q1 will not longer be forward biased. However, with contact a of relay M engaging its front contact portion, a circuit to base electrode 25 of transistor Q2 is now maintained from terminal B+ over front contact a of relay M, Zener diode Z2, diode D3, resistor R5, base electrode 25 and emitter electrode 27 of transistor 02 to ground. Hence, transistor Q2 remains forward biased, but still nonconducting since no positive potential is provided at its collector electrode 26.

Let us assume now that an even more restrictive input signal appears on lead 13, thereby energizing relay L. Again, recalling that two input signals will not continue to exist simulataneously, a signal no longer appears on lead 12 and relay M will become deenergized. With relay L energized, its contact a will be picked up, completing a circuit from terminal B+ over front contact a; of relay L, resistor R3, and capacitor C3 to ground, thereby causing a predetermined amount of charge to be stored in capacitor C3. Upon deenergization of relay M, its contact a drops to engage its back contact point. With back contact a of relay M closed, the charge stored in capacitor C2 will flow through resistor R2, back contact a of relay M, diode D5, and lead 8 to capacitor C4. The discharge time is a function of the values of resistors R2 and R8 and capacitor C4. When a predetermined amount of charge is stored in capacitor C4, the same actuating circuit, alarm circuit, and acknowledging circuit functioning, as previously described with respect to a more restrictive input signal on lead 12, will occur and indication and acknowledgment of a more restrictive input signal will have been completed. Since the breakdown potential of Zener diode Z2 is no longer maintained at its cathode electrode, the circuit to the base electrode 25 of transistor Q2 will be interrupted and neither transistor Q1 nor transistor Q2 will be forward biased.

It will be obvious that the occurrence of the most restrictive signal condition, i.e., no input on any of

leads

11, 12, and 13, will cause the same circuit operation as already described and require an acknowledgment. Let us now assume, however, that a signal once again appears on lead 12, which is less restrictive than the signal previously appearing on lead 13. Relay M will once again become energized, while relay L will shortly be deenergized. With relay M energized, its contact a will once again be picked up, completing a circuit from terminal B+ over front contact a of relay M, resistor R2, and capacitor C2 to ground, thereby again charging capacitor C2. Upon deenergization of relay L, its contact a drops to engage its back contact. Since the potential at the cathode of diode Z2 once again exceeds the breakdown potential of the Zener diode, transistor Q2 will again be forward biased. Since a positive potential is now present at collector 26 of transistor Q2, due to the charge stored in capacitor C3, transistor Q2 will begin conducting. Capacitor C3 will discharge, therefore, through resistor R3, back contact a of relay L, and the collector 26, emitter 27 circuit path of transistor Q2 to ground rather thanthrough capacitor C4 of the actuating circuit 4. Hence, there will be no alarm signal upon a less restrictive input signal on lead 12.

If we assume now that an even less restrictive input signal appears on lead 11, relay H will once again become energized, while relay M will shortly become deenergized. With relay H energized, its contact 0 will once again complete a circuit from terminal B+ over front contact al of relay H, resistor R1, and capacitor C1 to ground, thereby again charging capacitor C1. Upon deenergization of relay M, its contact 0 drops to engage its back contact point. Since the potential at the cathode of Zener diode Z1 once again exceeds its breakdown potential, transistor Q1 will be forward biased. Since a positive potential is now present at collector 21 of transistor Q1 due to the charge stored in capacitor C2, transistor Q1 will begin conducting. Capacitor C2 will be discharged, therefore, through resistor R2, back contact a of relay M, and the collector to emitter path of transistor Q1 to ground rather than through capacitor C4.

Should the input change directly from a signal on lead 13 to a less restrictive input signal on lead 11, capacitor C3 will again discharge through resistor R3, back contact a of relay L, collector electrode 26, base electrode 25, and emitter 27 of transistor Q2 to ground since this transistor is also forward biased when Zener diode Z1 conducts, as previously described. It will be appreciated that an infinite number of more restrictive input signals may be added to the circuit merely by increasing the number of charging circuits and secondary discharging circuits, while maintaining the exact same actuating, warning, and acknowledging circuitry.

Reference is now made to FIG. 2 which illustrates another embodiment of the circuit arrangement of our invention. As discussed in connection with FIG. 1, FIG. 2 also shows a plurality of inputs over the circuits ll, 12, and 13, connected respectively to relays H, M, and L. Respectively associated with the relays H, M, and L, through their respective contacts a a and a are the charging circuits la, 2a, and 3a. Each of these charging circuits is the equivalent, respectively, of the charging

circuits

1, 2, and 3 of FIG. 1 except that no Zener diode is associated with any circuit.

The bank of charging circuits 1a, 2a, and 3a is connected, through diodes D4, D5, and D6 and lead 8 to an actuating circuit 4a. Back contacts b and b of relays H and M, respectively, within circuit matrix 10, are interposed between the circuit paths through diodes D5 and D6 and lead 8. Also connected to the bank of charging circuits 1a, 2a, and 3a isa secondary discharging circuit arrangement, within matrix 10, including front contact b of relay M, front contact 12, of relay H, and resistor R15. As shown, the armature of contact b of relay M is connected to charging circuit 3a through diode D6 and to charging circuit 2a through diode D5.

The actuating circuit 4a includes a time delay circuit 4b and a bistable commutating circuit 4c. The time delay circuit 4b, which preferably has the circuit form of a conventional relaxation oscillator, includes resistors RT, R16, and c, R17, timing capacitor CT, and a conventional unijunction transistor Q5 having an emitter electrode e,, a first base electrode b and a second base electrode b One end of resistor RT is connected to lead 8, while the other end of resistor RT is connected to one terminal of capacitor CT, the other terminal of which is connected to ground. The emitter electrode e, of transistor Q5 is connected to the junction of resistor RT and capacitor CT. The first base electrode b of transistor Q5 is connected to ground through resistor R16 and is also connected to bistable circuit 40. The second base electrode b of unijunction transistor Q5 is connected to lead 8 through resistor R17.

The bistable commutating circuit 4c is divided into an actuating portion and a deactuating or acknowledging potion. The actuating portion includes a silicon controlled rectifier SCRl having a gate electrode 30, an anode electrode 31, and a cathode electrode 32; a commutating capacitor C a diode D10, and a neutral relay coil RY3. The deactuating portion of bistable circuit 40 includes a silicon controlled rectifier SCR2 having a gate electrode 33, an anode elec trode 34, and a cathode electrode 35, and a two-pointmake acknowledging pushbutton ACK2. Gate electrode 30 of rectifier SCRl is connected to the first base electrode b of unijunction transistor Q5 of the time delay circuit 4b, while cathode electrode 32 is connected to ground. The anode electrode 31 of rectifier SCRl is connected to terminal B+ of the power source through relay coil RY3 and directly to one terminal of capacitor C and the anode electrode of diode D10. Diode D10 is connected across relay coil RY3 to prevent the occurrence of voltage spikes. The anode electrode 34 of rectifier SCR2 is connected to terminal B+ through a resistor R19 as well as to the other terminal of capacitor C while the cathode electrode 35 is connected to ground. The gate electrode 33 of rectifier SCR2 is connected to terminal B+ through acknowledging pushbutton ACK2 and resistor R18 upon the operation of pushbutton ACK2. through front contact a of relay H, capacitor C1, and resistor R1 to ground, thereby charging capacitor C1 with a preselected amount of charge. Also with relay H energized, its contact b will engage its front contact point.

It will now be assumed that a more restrictive input signal appears on lead 12, energizing relay M. Recalling that it was initially assumed that two input signals will not continue to exist simultaneously, a signal no longer appears on lead 11 and relay H is deenergized. With relay M energized, its contact a will be picked up, completing a circuit from terminal B+ over front contact a of relay M, capacitor C2, and resistor R2 to ground, thereby causing a predetermined amount of charge to be stored in capacitor C2. Also, contact b of relay M will be picked up to engage its front contact point while the deenergization of relay H causes its contacts a and b to drop away to engage back contact points.

With back contact a of relay H closed, the charge stored in capacitor C1 discharges through diode D4, lead 8, and resistor RT to capacitor CT. When a predetermined amount of charge is stored in capacitor CT, that is, when a predetermined positive potential appears at emitter e unijunction transistor Q5 is turned on and begins conducting. With transistor Q5 conducting, a positive signal will appear at its first base b to turn on silicon controlled rectifier SCRl. With rectifier SCRl turned on, a path is completed from terminal B+ through resistor R19, capacitor C anode electrode 31 and cathode electrode 32 of controlled rectifier SCRl to ground, to thereby charge capacitor C with positive polarity at its right-hand terminal. A parallel path is also completed from terminal B+ through relay coil RY3 and rectifier SCRl to ground to energize relay coil RY3. With relay RY3 energized, its front contact a in the alarm circuit 9a will close, completing an alarm circuit from terminal B+ through hell BE to ground. This causes bell BE to begin ringing, indicating the reception of a more restrictive signal at the input. Although not specifically shown, another contact controlled by relay RY3 will control a magnet valve MV similar to FIG. 1.

Upon this alarm indication, operation of acknowledging pushbutton ACK2 will complete a circuit from terminal B+ over the contacts of pushbutton ACKZ to gate 33 of commutating silicon controlled rectifier SCR2, thereby turning on the rectifier. A circuit is thus completed from terminal B-lthrough resistor R19, anode electrode 34 and cathode electrode 35 of rectifier SCR2 to ground. With rectifier SCR2 in a conducting condition, capacitor C, also discharges through this rectifier and the positive charge on its right terminal, previously described, appears momentarily on the common ground connection between the two rectifier cathodes. This places a positive potential on cathode electrode 32 of silicon controlled rectifier SCRl, thereby reverse biasing this rectifier and causing it to turn off, since transistor O is no longer conducting. With rectifier SCRl turned off, there is no direct circuit path through relay coil RY3 and it is deenergized as soon as capacitor C is charged with opposite polarity by the circuit path through rectifier SCR2. This opens front contact a to stop the ringing of bell BE. It is to be noted that rectifier SCR2 remainsconducting and resistor R19 is selected to limit the current flow to a reasonable value. The charge on capacitor C with its left-hand terminal positive, is used=when the next trigger signal is applied to gate 30 of rectifier SCRl to help shift the state of the bistable circuit by momentarily reverse biasing rectifier SCR2 to shut off its conducting condition.

Let us assume now that an even more restrictive input signal appears on lead 13, thereby energizing relay L. Again, recalling the operating condition that two input signals will not continue to exist simultaneously, a signal no longer appears on lead 12 and relay M shortly becomes deenergized. With relay L energized, its contact a will be picked up to complete a circuit from terminal B+ over front contact a capacitor C3, and resistor R3 to ground, thereby causing a predetermined amount of charge to be stored in capacitor C3. Upon deenergization of relay M, its contacts a and b drop away to engage their back contact points. The charge stored in capacitor C2 will now discharge through diode D5, back contacts a and h of relay M, back contact 12 of relay H, lead 8, and resistor RT to capacitor CT. Once again, when a predetermined amount of charge is stored in capacitor CT, the same actuating circuit, alarm circuit, and acknowledging functions as described above with reference to a more restrictive signal on lead 12 will occur, and indication and acknowledgment of a more restrictive input signal will have been completed.

Let us now assume that a signal once more appears on lead 12 to relay M, which is less restrictive than the signal previously appearing on lead 13 to relay L. Relay M will again be energized, while relay L is deenergized. Contact a of relay M will again pick up, completing a circuit from terminal B+ over front contact a capacitor C2, and resistor R2 to ground, thereby again charging capacitor C2. Contact b of relay M will also pick up to engage its front contact point. Upon deenergization of relay L, its contact 11 is released to engage its back contact point. Accordingly, capacitor C3 will discharge through back contact a;, of relay L, diode D6, front contact b of relay M, and resistor R to ground rather than through capacitor CT of the actuating circuit 4a. Thus, there will be no alarm signal upon the reception of a less restrictive input signal on lead 12.

Let us assume now that an even less restrictive input signal appears on lead 11 to relay H. Relay H will again be energized, while relay M will be deenergized. Contact a of relay H will again pick up, completing the circuit for charging capacitor C1. Contact I), of relay H is also picked up to engage its front contact point. Upon deenergization of relay M, its contacts a and b release to engage their back contact points. Accordingly, capacitor C2 will discharge through back contact a of relay M, diode D5, back contact b of relay M, front contact b of relay H, and resistor R15 to ground rather than through capacitor CT.

Should the input signal change from a signal on lead 13 directly to a less restrictive input signal on lead 11, capacitor C3 will discharge through back contact a of relay L, diode D6, back contact b of relay M, front contact b, of relay H, and resistor R15 to ground. Thus, no alarm signal is actuated on any change to a less restrictive input signal. Once again, it will be appreciated that an infinite number of input signals may be added to the above circuit, without detracting from the inventive concept described herein, merely by adding additional charging circuits and additional secondary discharging circuit contacts within matrix 10.

While our invention has been described with regard to a circuit arrangement for acknowledging more restrictive signals among a plurality of input signals for railroad cab signaling application, it will be understood that the invention may have utility in other systems and unrelated areas remote from railroad and/or rapid transitoperation.

It will be appreciated, therefore, that the foregoing description of our invention is only illustrative and it is not intended that the invention be limited to the two embodiments described. Rather, changes and modifications within the scope of the appended claims may be made by those skilled in the art without departing from the scope and spirit of our invention.

Having thus described our invention, what we claim l. A circuit arrangement for acknowledging the reception of a more restrictive signal among a plurality of input signals selectively applied one at a time to a control system, the input signals having a predetermined order of more restrictive significance, comprising in combination,

a. a plurality of charging circuits, one for each of said plurality of input signals and responsive to the reception of the corresponding input signal by said control system to store a predetermined energy charge,

b. an actuating means operable from a first to a second condition at the end of a predetermined time delay interval after an actuating energy signal is applied thereto,

1. said actuating means selectively connected in accordance with the received input signal to receive an actuating energy signal from a particular one of said plurality of charging circuits when a more restrictive input signal is received,

0. a warning indicator controlled by said actuating means for providing a warning indication signal when said actuating means is in its second condition, and acknowledging means connected for restoring said actuating means to its first condition when operated to acknowledge said warning indication signal.

2. A circuit arrangement as defined in claim 1 which further includes,

a. a plurality of secondary discharge circuits, one for each charging circuit except that one associated with the least restrictive input signal,

b. each secondary discharge circuit being responsive to the reception of any input signal having a less restrictive significance than the corresponding input signal for discharging the associated charging circuit of any stored energy charge.

3. A circuit arrangement as defined in claim 1 in which,

a. said actuating means includes a timing delay means and a two condition means operable between its first and second conditions when activating signals are applied thereto,

b. said timing delay means comprises,

1. another energy storage means connected for receiving said energy charge from said particular charging circuit at a predetermined charging rate, and

2. an electrical device controlled by said circuit network for providing an output signal when the charge in said other storage means reaches a preset level,

c. said two condition means connected to receive said output signal and responsive thereto for operating to its second condition,

1. said acknowledging means connected when operated for applying another activating signal for operating said two condition means to its first condition,

(1. said two condition means further connected for actuating said warning indicator to provide said warning signal while said two condition means occupies its second condition.

4. A circuit arrangement as defined in claim 3 which further includes,

5. A circuit arrangement as defined in claim 4 in which,

a. each secondary discharge circuit includes a two condition switching means connected to interrupt the discharge circuit path for the associated charging circuit when in its first condition and to complete the discharge path when in its second condition,

b. each switching means being responsive to the reception of any input signal less restrictive than the corresponding input signal to occupy its second condition, otherwise occupying its first condition.

6. A circuit arrangement as defined in claim 5 in which,

each switching means is a transistor controlled by each charging circuit associated with a less restrictive input signal, each transistor biased to its conducting condition when an energy charge is stored and to its nonconducting condition when no energy charge is stored in any one of said less restrictive charging circuits.

7. A circuit arrangement as defined in claim 3 in which, i

a. said electrical device is a four layer diode having a predetermined breakdown potential for conduction in the forward direction to provide said output signal when conduction occurs,

b. said other energy storage means is a resistorcapacitor circuit network with preselected charg ing time characteristics such that the breakdown potential of said diode is exceeded by the capacitor charge level at the end of said predetermined time delay interval, and

c. said two condition means is a two position magnetic stick relay having a first winding connected to receive operating energy from said capacitor, when said diode conducts, poled to operate said relay to its second position,

1. a second winding of said relay connected for receiving operating energy when said acknowledging means is operated, poled to restore said relay to its first position,

2. a second position relay contact being connected for supplying actuating energy to said warning indicator to provide said warning signal.

8. A circuit arrangement as defined in claim 7 which further includes,

a. a plurality of secondary discharge circuits, one for each charging circuit except that associated with the least restrictive input signal,

b. each secondary discharge circuit comprising a transistor connected for discharging energy stored in the associated charging circuit when that transistor conducts, and a bias circuit network connected to normally hold the associated transistor nonconducting,

c. each bias network controlled by the charging circuits associated with all input signals less restrictive than that associated with he corresponding discharge circuit, for actuating the associated transistor to its conducting condition when energy is stored in any one of the less restrictive charging circuits.

9. A circuit arrangement as defined in claim 3 in which,

a. said electrical device is a unijunction transistor having a predetermined gating potential for actuating conduction to supply said output signal,

b. said other energy storage means is a resistorcapacitor circuit network connected' for supplying the gating signal to said transistor, and having charging time characteristics such that stored energy exceeds the required gating signal potential only at the end of said predetermined time delay interval,

c. said two condition means comprises a relay and a controlling bistable circuit network normally in a first conducting condition and energizing said relay when in a second conducting condition,

1. said bistable circuit network connected to receive the output signal from said transistor and responsive thereto for operating to said second conducting condition,

2. said bistable circuit network controlled by said acknowledging means for operating to said first conducting condition when said acknowledging means is operated, and

(1. said warning indicator is controlled by an energized position contact of said relay for providing a warning signal when said relay is energized.

10. A circuit arrangement as defined in claim 9 which further includes,

b. each secondary discharge circuit including in series a two position switching means associated with each input signal less restrictive than the corresponding input signal,

I. each switching means in a particular secondary discharge circuit connected for interrupting that circuit when in its first position and completing that circuit when in its second position;

c. each switching means responsive to the reception of the associated input signal for operating to its second position,

d. each secondary discharge circuit when completed bypassing the connection from the associated charging circuit to said resistor-capacitor network.

11. In a railroad cab signal and speed control system selectively providing a plurality of input signals to each set of train-carried apparatus, said input signals having a predetermined order for designating more restrictive speed signal indications, a train-carried acknowledging arrangement on each train comprising in combination,

a. a plurality of signal receiving means, one for each possible input signal,

b. a charging circuit means associated with each signal receiving means and controlled thereby for storing a predetermined energy charge when the corresponding input signal is received,

c. an actuating circuit means selectively connected by said signal receiving means for receiving the charge stored in a particular charging circuit means when a more restricted input signal is received,

d. said actuating circuit means being operable in response to the reception of an energy charge from one of said charging circuit means for actuating a more restricted signal warning indication a predetermined time delay interval after the reception of a more restricted input signal, and

e. an acknowledging means connected to said actuating circuit means and operable for restoring said actuating circuit means and halting the warning indication.

12. An acknowledging arrangement as defined in claim 1 1, which further includes,

a. a plurality of secondary discharge circuit means,

one for each charging circuit means except that,

one associated with the least restrictive input signal,

b. each secondary discharge circuit means controlled by all signal receiving means having a less restrictive order and connected for discharging the as-.

sociated charging circuit means when a less restrictive input signal is received.

13. An acknowledging arrangement as defined in claim 11 which further includes a warning indicator device and in which,

a. said actuating circuit means includes a time delay means and a relay means operable to a first and a second condition,

b. said delay means selectively connected by said signal receiving means for receiving the charge stored in said particular charging circuit means and operable in response to the reception of a charge to provide an output signal at the end of a predetermined time delay interval,

. said relay means controlled by said time delay means for operating to its second condition in response to said output signal,

d. said relay means connected for actuating said warning indicator device to provide a warning indication when said relay means is in its second condition,

e. said relay means further controlled by said acknowledging means for operating to its first condition when said acknowledging means is operated to acknowledge the reception of a more restricted input signal.

14. An acknowledging arrangement as defined in claim 13, which further includes,

a. a plurality of secondary discharge circuit means, one for each charging circuit means except that one associated with the least restrictive input signal,

b. each secondary discharge circuit means controlled by all signal receiving means having a less restrictive order and connected for discharging the associated charging circuit means when a less restrictive input signal is received.

15. An acknowledging arrangement as defined in claim 13 in which said time delay means comprises,

a. a four-layer diode having a predetermined breakdown potential for conduction in the forward direction,

a resistobcapacitor circuit network with preselected charging time characteristics such that said diode breakdown potential is exceeded by the.

capacitor charge level only after said predetermined time delay interval,

c. said resistor-capacitor network connected to supply said capacitor charge level to said diode for providing said output signal when said diode becomes conducting.

16. An acknowledging arrangement as defined in claim 15 in which,

a. said relay means is a two-position magnetic stick relay having a first winding connected to receive said output signal from said diode poled to operate said relay to its second position,

b. a second winding of said relay connected for receiving operating energy when said acknowledging means is operated, poled to restore said relay to its first position, and

c, a second position contact of said relay is connected for supplying energy for actuating said warning indication.

17. An acknowledging arrangement as defined in claim 16 which further includes,

a. a plurality of secondary discharge circuits, one for each charging circuit means except that associated with the least restrictive input signal,

b. each secondary discharge circuit comprising a 0. each bias network controlled by the charging circuit means associated with all input signals less restrictive than that associated with the corresponding discharge circuit, for actuating the associated transistor to its conducting condition when energy is stored in any one of the less restrictive charging circuits.

18. An acknowledging arrangement as defined in claim 13 in which said delay means comprises,

claim 18 in which said relay means comprises,-

a. a bistable circuit network controlled by said acknowledging means for operating to a first conducting condition when said acknowledging means is operated and normally holding in that first conducting condition,

I. said bistable circuit network connected to receive the output signal from said unijunction transistor and responsive thereto for operating to a second conducting condition, and

b. a neutral relay controlled by said bistable circuit network and energized when said network is in its second conducting condition,

c. an energized position contact of said relay, when closed, actuating said warning indicator device.

20. An acknowledging arrangement as defined in claim 19 which further includes,

a. a plurality of secondary discharge circuits, one for each charging circuit means except that one associated with the least restrictive input signal,

b. each secondary discharge circuit including in series a two-position switching means associated with each signal receiving means corresponding to an input signal less restrictive than that input signal corresponding to that discharge circuit,

1. each switching means in a particular secondary discharge circuit connected for interrupting that circuit when in its first position and completing that circuit when in its second position,

c. each switching means controlled by the associated signal receiving means for operating to its second position only when the corresponding input signal is received, d. each secondary dlscharge circuit when completed bypassing the connection from the associated charging circuit means to said delay means.

Claims

1. A circuit arrangement for acknowledging the reception of a more restrictive signal among a plurality of input signals selectively applied one at a time to a control system, the input signals having a predetermined order of more restrictive significance, comprising in combination, a. a plurality of charging circuits, one for each of said plurality of input signals and responsive to the reception of the corresponding input signal by said control system to store a predetermined energy charge, b. an actuating means operable from a first to a second condition at the end of a predetermined time delay interval after an actuating energy signal is applied thereto, 1. said actuating means selectively connected in accordance with the received input signal to receive an actuating energy signal from a particular one of said plurality of charging circuits when a more restrictive input signal is received, c. a warning indicator controlled by said actuating means for providing a warning indication signal when said actuating means is in its second condition, and d. acknowledging means connected for restoring said actuating means to its first condition when operated to acknowledge said warning indication signal.

2. A circuit arrangement as defined in claim 1 which further includes, a. a plurality of secondary discharge circuits, one for each charging circuit except that one associated with the least restrictive input signal, b. each secondary discharge circuit being responsive to the reception of any input signal having a less restrictive significance than the corresponding input signal for discharging the associated charging circuit of any stored energy charge.

2. an electrical device controlled by said circuit network for providing an output signal when the charge in said other storage means reaches a preset level, c. said two condition means connected to receive said output signal and responsive thereto for operating to its second condition,

2. said bistable circuit network controlled by said acknowledging means for operating to said first conducting condition when said acknowledging means is operated, and d. said warning indicator is controlled by an energized position contact of said relay for providing a warning signal when said relay is energized.

3. A circuit arrangement as defined in claim 1 in which, a. said actuating means includes a timing delay means and a two condition means operable between its first and second conditions when activating signals are applied thereto, b. said timing delay means comprises,

4. A circuit arrangement as defined in claim 3 which further includes, a. a plurality of secondary discharge circuits, one for each charging circuit except that one associated with the least restrictive input signal, b. each secondary discharge circuit being responsive to the reception of any input signal having a less restrictive significance than the corresponding input signal for discharging the associated charging circuit of any stored energy charge.

5. A circuit arrangement as defined in claim 4 in which, a. each secondary discharge circuit includes a two condition switching means connected to interrupt the discharge circuit path for the associated charging circuit when in its first condition and to complete the discharge path when in its second condition, b. each switching means being responsive to the reception of any input signal less restrictive than the corresponding input signal to occupy its second condition, otherwise occupying its first condition.

6. A circuit arrangement as defined in claim 5 in which, each switching means is a transistor controlled by each charging circuit associated with a less restrictive input signal, each transistor biased to its conducting condition when an energy charge is stored and to its nonconducting condition when no energy charge is stored in any one of said less restrictive charging circuits.

7. A circuit arrangement as defined in claim 3 in which, a. said electrical device is a four layer diode having a predetermined breakdown potential for conduction in the forward direction to provide said output signal when conduction occurs, b. said other energy storage means is a resistor-capacitor circuit network with preselected charging time characteristics such that the breakdown potential of said diode is exceeded by the capacitor charge level at the end of said predetermined time delay interval, anD c. said two condition means is a two position magnetic stick relay having a first winding connected to receive operating energy from said capacitor, when said diode conducts, poled to operate said relay to its second position,

8. A circuit arrangement as defined in claim 7 which further includes, a. a plurality of secondary discharge circuits, one for each charging circuit except that associated with the least restrictive input signal, b. each secondary discharge circuit comprising a transistor connected for discharging energy stored in the associated charging circuit when that transistor conducts, and a bias circuit network connected to normally hold the associated transistor nonconducting, c. each bias network controlled by the charging circuits associated with all input signals less restrictive than that associated with he corresponding discharge circuit, for actuating the associated transistor to its conducting condition when energy is stored in any one of the less restrictive charging circuits.

9. A circuit arrangement as defined in claim 3 in which, a. said electrical device is a unijunction transistor having a predetermined gating potential for actuating conduction to supply said output signal, b. said other energy storage means is a resistor-capacitor circuit network connected for supplying the gating signal to said transistor, and having charging time characteristics such that stored energy exceeds the required gating signal potential only at the end of said predetermined time delay interval, c. said two condition means comprises a relay and a controlling bistable circuit network normally in a first conducting condition and energizing said relay when in a second conducting condition,

10. A circuit arrangement as defined in claim 9 which further includes, a. a plurality of secondary discharge circuits, one for each charging circuit except that one associated with the least restrictive input signal, b. each secondary discharge circuit including in series a two position switching means associated with each input signal less restrictive than the corresponding input signal,

11. In a railroad cab signal and speed control system selectively providing a plurality of input signals to each set of train-carried apparatus, said input signals having a predetermined order for designating more restrictive speed signal indications, a train-carried acknowledging arrangement on each train comprising in combination, a. a plurality of signal receiving means, one for each possible input signal, b. a charging circuit means associated with each signal receiving means and controlled thereby for storing a predetermined energy chargE when the corresponding input signal is received, c. an actuating circuit means selectively connected by said signal receiving means for receiving the charge stored in a particular charging circuit means when a more restricted input signal is received, d. said actuating circuit means being operable in response to the reception of an energy charge from one of said charging circuit means for actuating a more restricted signal warning indication a predetermined time delay interval after the reception of a more restricted input signal, and e. an acknowledging means connected to said actuating circuit means and operable for restoring said actuating circuit means and halting the warning indication.

12. An acknowledging arrangement as defined in claim 11, which further includes, a. a plurality of secondary discharge circuit means, one for each charging circuit means except that one associated with the least restrictive input signal, b. each secondary discharge circuit means controlled by all signal receiving means having a less restrictive order and connected for discharging the associated charging circuit means when a less restrictive input signal is received.

13. An acknowledging arrangement as defined in claim 11 which further includes a warning indicator device and in which, a. said actuating circuit means includes a time delay means and a relay means operable to a first and a second condition, b. said delay means selectively connected by said signal receiving means for receiving the charge stored in said particular charging circuit means and operable in response to the reception of a charge to provide an output signal at the end of a predetermined time delay interval, c. said relay means controlled by said time delay means for operating to its second condition in response to said output signal, d. said relay means connected for actuating said warning indicator device to provide a warning indication when said relay means is in its second condition, e. said relay means further controlled by said acknowledging means for operating to its first condition when said acknowledging means is operated to acknowledge the reception of a more restricted input signal.

14. An acknowledging arrangement as defined in claim 13, which further includes, a. a plurality of secondary discharge circuit means, one for each charging circuit means except that one associated with the least restrictive input signal, b. each secondary discharge circuit means controlled by all signal receiving means having a less restrictive order and connected for discharging the associated charging circuit means when a less restrictive input signal is received.

15. An acknowledging arrangement as defined in claim 13 in which said time delay means comprises, a. a four-layer diode having a predetermined breakdown potential for conduction in the forward direction, b. a resistor-capacitor circuit network with preselected charging time characteristics such that said diode breakdown potential is exceeded by the capacitor charge level only after said predetermined time delay interval, c. said resistor-capacitor network connected to supply said capacitor charge level to said diode for providing said output signal when said diode becomes conducting.

16. An acknowledging arrangement as defined in claim 15 in which, a. said relay means is a two-position magnetic stick relay having a first winding connected to receive said output signal from said diode poled to operate said relay to its second position, b. a second winding of said relay connected for receiving operating energy when said acknowledging means is operated, poled to restore said relay to its first position, and c. a second position contact of said relay is connected for supplying energy for actuating said warning indication.

17. An acknowledging arrangement as defined in claim 16 which further includes, a. a plurality of secondary discharge circuits, one for eaCh charging circuit means except that associated with the least restrictive input signal, b. each secondary discharge circuit comprising a transistor connected for discharging energy stored in the associated charging circuit means when that transistor conducts, and a bias circuit network connected to normally hold the associated transistor nonconducting, c. each bias network controlled by the charging circuit means associated with all input signals less restrictive than that associated with the corresponding discharge circuit, for actuating the associated transistor to its conducting condition when energy is stored in any one of the less restrictive charging circuits.

18. An acknowledging arrangement as defined in claim 13 in which said delay means comprises, a. a unijunction transistor having a predetermined gating potential for actuating conduction and connected for conducting energy when actuated from said particular charging circuit means to provide said output signal, b. a resistor-capacitor circuit network connected for receiving energy from the selected charging circuit means and for supplying a gating signal to said transistor, and having charging time characteristics such that stored energy exceeds the required gating signal potential only at the end of said predetermined time delay interval.

19. An acknowledging arrangement as defined in claim 18 in which said relay means comprises, a. a bistable circuit network controlled by said acknowledging means for operating to a first conducting condition when said acknowledging means is operated and normally holding in that first conducting condition,

20. An acknowledging arrangement as defined in claim 19 which further includes, a. a plurality of secondary discharge circuits, one for each charging circuit means except that one associated with the least restrictive input signal, b. each secondary discharge circuit including in series a two-position switching means associated with each signal receiving means corresponding to an input signal less restrictive than that input signal corresponding to that discharge circuit,