US3665250A - Overload current suppression circuit network - Google Patents

Abstract

A circuit network adapted for interconnection between the electron gun of a cathode ray tube and the intensity coupler therefor for the purpose of suppressing resultant overload currents caused when arcing occurs within the tube in a path originating at the tube''s anode. A significant feature of the network is its ability to provide protection against serious malfunctioning of related circuitry especially overload current sensitive microcircuitry. The network greatly limits both the achievable levels of overload currents and rate of change thereof with attendant benefits.

Description

[15] 3,665,250 51 May 23, 19 72 [54] OVERLOAD CURRENT SUPPRESSION CIRCUIT NETWORK [72] lnventors: Walter D, Bales, III, Garden Grove; Neal l'l. Cosand, Fullerton, both of Calif.

73 Assignee: Hughes Aircraft Company, Culver City,

Calif.

22 Filed: May 19, 1970 21 App1.No.: 50,002

3,225,257 12/1965 Fegley ..3l7/16 X 1,921,830 8/1933 Krambeer... ....3l7/20 X 3,558,983 1/1971 Steen ..317/20 3,527,985 9/1970 Brown ..317/16 Primary Examiner-James D. Trammell Attorney-W. l-l. MacAllister and Paul M. Coble [57] ABSTRACT A circuit network adapted for interconnection between the electron gun of a cathode ray tube and the intensity coupler therefor for the purpose of suppressing resultant overload cur (g1 ..3l7/l6, 317/20,317/61.5 rents caused when arcing occurs within the tube in a p originating at the tubes anode. A significant feature of the [58] Field of Search ..317/16, 20, 61.5 network is its ability to provide protection against Serious functioning of related circuitry especially overload current [56] Reeremes Cited sensitive microcircuitry. The network greatly limits both the UNITED STATES PATENTS achievable levels of overload currents and rate of change thereof with attendant benefits. 3,181,033 4/1965 Bakker ..317/16X 3,411,039 11/1968 Moulton ..3l7/16 X 5 Claims, 2 Drawing Figures 77 l/ e v 7/ *0 :F/

7 T 71/ 5 4 72 ofi A l v 3 La l Z N 62 :QEYIZ l llpzpj 7:: 6 3 73 c l A F LC] LC4 N E l 'rtfi 7 4 74 a z i, 1 7 6 7 4/ l 75 m- 42 J W 76 Hz OVERLOAD CURRENT SUPPRESSION CIRCUIT NETWORK The present invention relates to arc suppression circuitry for channeling and limiting resultant current when arcing occurs in cathode ray tubes. The invention herein described was made in the course of or under a contract or subcontract thereunder with the United States Air Force.

The present invention specifically relates to an arc suppression circuit network which can be connected for use to terminal pins in the base of a cathode ray tube for the purpose of limiting and diverting overload currents that are produced when arcing occurs in the cathode ray tube. The invention is very effective in allowing the dissipation of such overload currents without incurring damage to, or other adverse effects upon, neighboring microcircuitry external of the cathode ray tube.

The are suppression circuitry of the present invention serves to suppress primary and secondary arcing which can occur when a cathode ray tube is operated thereby enabling use of the cathode ray tube in applications which would otherwise be found impractical and particularly in certain applications wherein associated circuitry, not necessarily directly associated in use with the cathode ray tube, must be protected from overload currents which may be caused as the result of arcing.

ln the more conventional cathode ray tube applications the necessity of limiting are induced overload currents in the manner described herein does not arise, and if arc induced overload currents are a problem then it is usually sufiicient to simply divert fault currents around associated sensitive microcircuitry and the like to prevent any damage thereto by the fault currents. This can be done in various ways known to the art.

In a cathode ray tube, beam electrons emitted by the cathode of an electron gun are accelerated under the influence of a strong electrostatic field existing between the cathode and the final accelerating anode in the neck of the envelope of the cathode ray tube past various electrodes fonning the electron gun assembly by a rather substantial voltage difference applied between the cathode and the accelerating anode. The beam electrons after passing through the various electrodes of the electron gun emerge from the final accelerating anode and continue onward toward the fluorescent screen on the face plate of the cathode ray tube, the electron beam being deflected as desired by the application of deflecting voltages to an arrangement of deflecting. coils or deflecting plates.

In almost any cathode ray tube conditions inside the tube are such that arcing will occur therein on occasion from time to time. Oftentimes, the occurrence of arcing is of little or no concern and has no serious effect but in certain instances, such as led to the present invention, arcing can give rise to serious problems. Arcing is likely to occur more frequently in cathode ray tubes when the tubes anode is operated at a much higher potential, as is quite commonly done, than the potentials of the cathode and other tube electrodes, and this is especially true when the resultant potential differences existing between the anode and the aforesaid electrodes is well in excess of about 5,000 volts, say about 15,000 to 20,000 volts.

In any cathode ray tube wherein the final accelerating anode is to be operated at rather high potential relative to the potentials of the cathode or other elements of the electron gun in the tube, which are operated at relatively low potentials, occasional arcing between the various tube electrodes forming the electron gun assembly and the final accelerating anode will occur from time to time'when the various electrodes are operated at different operating and biasing potentials giving rise to rather substantial voltage differences between the various electrodes.

Arcing between the anode electrode of the cathode ray tube and the other electrodes withinthe tube is usually of little consequence and not of real concern when the accelerating potential difference applied between the final accelerating anode and the various electrodes forming the electron beam gun is of a relatively small magnitude, say 5,000 volts. When, however, as is more often the case than not, cathode ray tubes are operated by applying rather large operating voltages or potentials to the anode relative to the voltages applied, say, to the cathode to produce rather large accelerating potential differences, say on the order of 15-20 kilovolts, between the final accelerating anode and the cathode, occasional interelectrode arcing between two or more of the electrodes is not only unavoidable but may also have serious consequences.

Normally, even such interelectrode arcing as just mentioned does not pose insuperable problems, it being quite rare for the electrodes of the cathode ray tube to be damaged by the arcing, but it is a practice sometimes to provide the cathode ray tube with some kind of circuitry for channeling or diverting the current resulting from the are so that circuitry supplying the necessary power and operating signals to the various tube electrodes will not be damaged. Unfortunately, however, the passage of unlimited current through various circuit wires and associated circuitry may, in some instances, give rise to certain additional difficulties or problems which can circumscribe, reduce, or adversely affect the successful utility of a particular cathode ray tube in a number of specific applications.

The need for limiting, as stated above, as well as channeling the arc produced current does not exist in most cathode ray tube applications and it is at most, usually sufficient, as aforesaid, to merely channel or divert currents produced by arcs into a path from the arcing electrodes around electronic components forming the circuitry, such as an intensity coupler, for providing and supplying suitable operating and biasing potentials to a ground or chassis circuit connection to thereby prevent any harming of the supply circuitry. One way to so confine or divert these currents is to connect capacitors to terminal pins of the tube so that transient surges of currents which reach the pins will be shunted or diverted through the capacitors to the ground or chassis connection.

This type of current channeling diversion, or shunting, is still inadequate in some cases and fails to provide for instances, as may occur in some cases, wherein extremely large currents andv current rates of change (di/dt) occur in various conductors that are nominally at ground potential (such as ground buss wires or lines) leading to potential drops along such conductors that, in given circuitry, are destructive of low power semiconductor transistors and other electronic components such as found and used in computer type logic circuits. Specifically, in certain practical cases involving computer driven cathode ray tube displays, the inventors have found the overload current handling or channeling technique of the prior art to be inadequate.

Cathode ray tubes provided with are suppression circuitry provided by the inventors find particular useage in certain rather sophisticated display console equipment having one or more cathode ray tubes for obtaining alpha numeric readout displays utilized in conjunction with a variety of digital logic and analogue microcircuitry wherein the various microcircuits are especially sensitive to and undesirably affected by arc induced voltage spikes, which may be characterized broadly as electrical disturbances, which may lead, for example, to the loss of memory by various memory flip-flops within the microcircuitry which may undergo a change of state when affected by the aforesaid voltage spikes. Thus, in a sense, the present invention finds unique application in those situations where it is especially important that to ensure that little, if any, of the electrical arcing energy during conditions of arcing in a cathode ray tube will be coupled to neighboring digital logic microcircuitry external of the cathode ray tube or to the feed circuitry of the cathode ray tube and which circuitry is susceptible of changes in the logic (and damage) if the electrical arcing energy is not suitable controlled, regulated or handled.

In a number of cathode ray tube applications, of the type of especial interest herein, an external electromagnetic shield is provided around the cathode ray tube. This shield, together with an electrostatic shield inside the cathode ray tube, forms a capacitor of appreciable value. When the electrostatic shield is, in use, maintained at the potential of the tubes anode and the electromagnetic shield is maintained at some other potential, for instance a reference or ground potential such as zero volts, or some low voltage, the capacitor formed by the two shields will charge up during normal tube operation absent arcing, to the potential difference existing 'therebetween. When an are ultimately occurs, the capacitor discharges, sending a high level, rapidly decaying current along a path within the tube from the tubes anode to the various terminal pins in the base of the tube and through circuitry connected to such pins.

Due to capacitive discharge of the aforementioned capacitor formed by the aforesaid shielding at the times arcing from the anode takes place, each are that occurs will be brief and rather intense discharging a lot of current from the capacitor in a relatively short time considering that the capacitor which is estimated to be from 100 to 200 picofarads in value is charged up prior to discharging to the anode potential which is typically 15,000 volts. If the invention were not used, the capacitor would be able to send a transient current of over 100 amperes or more at its peak through the intensity coupler and other circuitry shown herein to seriously overload or otherwise detrimentally affect circuitry sensitive to such rather large current transients.

When arcing occurs from the tubes anode, thereby effecting discharge of the stray capacitance connected thereto, a number of adverse events tend to take place, such as secondary arcing at other places inside and outside the tube. Those familiar with the operational characteristics of cathode ray tubes will immediately appreciate the undesirability of some of the attendant consequences such as the electrical shorting that may take place between the connection pins for the tubes electron gun when secondary arcing occurs therebetween.

The present invention thus, in a sense, assumes especial importance in the application discussed herein wherein an electromagnetic shield is disposed about a cathode ray tube for shielding purpose since a significant stray capacitance is thereby introduced, which, as explained herein, tends to produce, by virtue of capacitive discharge, rather intense arcing whenever arcing occurs from the tubes anode. Without an electromagnetic shield about the tube, therefore involving less stray capacitance, such arcing as does take place may, but not necessarily, become consequentially much less intense but may nevertheless still call for use of the present invention. In this regard, it is known that cathode ray tubes may employ either electrostatic or electromagnetic deflection means for deflecting the electron beam formed when in use. The arc suppression network of the present invention can be used with tubes employing either type of deflection means but finds its most important usage in conjunction with tubes employing electromagnetic deflection means and an external electromagnetic shield disposed about the tube.

In a cathode ray tube utilizing electromagnetic deflection means, the beam deflection is routinely accomplished by applying voltage deflection signals to the coils of an electromagnetic deflection yoke encircling the neck of the tube. Such magnetic yokes require less deflection voltage and signal power to produce a given amount of electron beam deflection when the yoke is of small rather than large diameter and as a consequence, the tubes electron gun and anode is preferably disposed in a tube neck of small diameter. The electron gun forming electrodes must therefore be of rather small size and be rather closely spaced and consequently arcing paths are readily established between the anode and various electrodes of the electron gun.

Any cathode ray tube with a narrow neck containing small size, closely spaced electron gun structure is, in general, rather prone to suffer adverse effects from repetitious arcing. It is an incident of the present invention that the arcs suffered, by being reduced in intensity, have lessened adverse effects upon the electron gun structure even when rather high potentials are applied to the tubes anode.

Display consoles incorporating cathode ray tubes and usable for various purposes may include within the console solid state components and microcircuitry. Such components and microcircuitry are, as in the console equipment with which the present invention is utilized, contained in a sizeable number of flat packs or packages mounted on various printed circuit cards arranged in stackwise fashion in cardboxes. Different ones of the terminals of various flat packs in a given card box are connected via printed circuit leads on the cards and wire connections to points on a common bus or line forming a part of the card box. A problem that may occur, in the operation of the console's cathode ray tube or tubes, is that tube arcing, if unsuppressed, may lead to destruction of various components and microcircuits when are induced fault currents flow through the bus line of the card box. In some instances, a number of logic gates formed using flip-flops and each connected by connection wires to spaced terminal pins on the same buss line may change state as the result of the arising of potential differences of a few volts between the various pins on the buss line when are induced fault current flows through the buss line. This possible changing of state by the flip-flop can occur because the bus line is electrically connected to the cathode ray tube circuitry. It leads to unreliable performance of the console and poses a serious drawback in practical applications.

When attempting, for example, to utilize the cathode ray tube exemplified in FIG. 1 for alphanumeric or radar display purposes or whatever a number of difficulties could, in practice, arise due to cathode ray tube arcing but these difficulties have been quite adequately overcome by the use of the invention schematically depicted in the accompanying Figures. The difficulties mentioned may occur in sophisticated cathode ray tube consoles which, for example, include panel condition indicator lights, alarm buzzers, circuit malfunction indicators and so forth controlled by and connected to related computer type digital and analogue microcircuitry. Experience had with usage of a number of such consoles proved unsatisfactory as several different types of malfunctioning and so forth happened repeatedly as the result of unsuppressed arcing. Such malfunctioning often resulted, for example, in repeated extended periods of display equipment down time taken for repair work calling for replacements of the intensity coupler card with spares.

The cathode ray tube of FIG. 1 operated without the herein described are suppression circuitry was found to be unsatisfactory and of unacceptable reliability in the use to which it was put, since system requirements dictated that unreliable functioning and malfunctioning of the display console such as already mentioned be virtually eliminated in order for the console to be used in practical applications.

It is an object of the present invention to provide arc suppression circuitry which both channels and limits the arcing current which flows in the circuitry coupled to various tube electrodes between which the arc occurs and especially when an arc occurs in the cathode ray tube from the final accelerating anode electrode which is operated at very high voltage potential to an adjacent control grid of an electron gun assembly and to the various other electrodes forming the electron gun assembly which are operated at much lower potentials than the potential applied to the final accelerating anode electrode.

It is another object of the present invention to provide arc suppression or overload current circuitry for cathode ray tubes able to both divert and limit overload currents produced when arcing occurs in a cathode ray tube environment and to allow for the dissipation of overload currents over an extended time period to reduce the level of consequent L di/dt voltage transients to within acceptable limits.

A further object of the present invention is to provide a current suppression network adapted for usage with cathode ray tubes incorporated in sophisticated display console equipment used for equipment test purposes or for displaying in visual form data obtained from aircraft tracking radar equipment or the like. Such console equipment usually incorporates, in addition to one or more cathode ray tubes, various forms of computer type digital micro-circuitry which is susceptible to malfunctioning. Exemplarily logic gates or the like in microcircuit memories formed of flip-flops may be affected by extraneous signal voltages resulting from the occurrence of are induced fault currents. The flip-flops may be subjected to loss of memory by false triggering by extraneous fault induced signals of a few volts.

The present invention has other objects and advantages which go far beyond the known prior art in ability to safeguard certain sensitive microcircuitry and insure reliable functioning thereof.

In the Figures,

FIG. 1 shows, in a schematic way, an electromagnetically shielded cathode ray tube, an arc suppression circuit, an intensity coupler, a video amplifier, and other related parts for the purpose of illustrating and explaining the present invention; and

FIG. 2 shows the details of a particular arc suppression circuit network constructed in accordance with the present invention.

In the following discussion, reference is made to the showings in FIGS. 1 and 2. Referring first to FIG. 1 in particular, there'is shown, in a diagrammatic way, a video signal amplifier 2, an intensity coupler 4 and other circuits such as 8 and 10, all contained in a cardbox 12 and all being connected to a grounded buss line 14. A cathode ray tube CRT, not drawn to scale, is also depicted showing parts thereof of special interest. Coupled between the intensity coupler 4 and the cathode ray tube is an arc suppression circuit 16 which will be later described in detail. It happens that overload currents, for the arc suppression circuit 16, flowing from the terminal pins in the base of the cathode ray tube CRT into the intensity coupler 4 can wreak havoc thereupon and upon the video amplifier 2 as well by destroying microcircuitry contained in the flatpacks on the respective circuit cards carrying these circuits.

Before the circuit 16 was provided, it was found that upon arcing in the tube environment the operation of the intensity coupler 4 which is composed of rather delicate microcircuitry and the operation of the related, also delicate, microcircuitry 8, 10 situated in the same card box 12 could be detrimentally affected as comparatively large resistive and inductive voltage drops were produced as unsuppressed overload current surged through the buss line 14 of the card box. This situation caused malfunctioning of the microcircuitry which necessitated repeated replacements of the intensity coupler circuit card or the cards for the other circuits.

The tube CRT has a glass envelope with a base at one end, a small diameter cylindrical neck 22, a conical section 24', shown partially cut away, and a transparent front face plate 26. Outside the tube is an electromagnetic deflecting yoke 28 encircling the neck 22 and an electromagnetic shield or sleeve 30. Inside the tube, disposed within the neck 22, is an electron gun and anode, and an electrostatic shield 32.

Disposed inside the neck 22 is an electron gun and an anode. The electron gun, in this instance, includes a heater H, a cathode K, a first grid G1, and a second grid G2, and a focus electrode F. The anode includes two separate anode cylinders Al and A2 connected together by a wire 34. The electrodes H, K, G1, G2, and F of the electron gun are connected by lead wires to terminal pins 36 projecting from the base 20 into a connector socket 38. The anode is connected by a snubber 40, shown as a wire, to the electrostatic shield 32. A connection pin (not shown) is provided in the conical section 32 of the envelope for making connection to the electrostatic shield 24 and hence to the anode. The electron gun construction is of no special interest and so precise details thereof will not be given.

One feature underlying the present invention which calls for particular mention is the way in which certain zener diodes are utilized to always allow different portions of the arc suppression circuit disclosed herein to rise at the same time to the anode potential when arcing could occur between various electron gun electrodes and could, for instance, lead to the destruction of the second grid G2 or the cathode K were secondary arcing to occur therebetween. The zener diodes are so arranged that secondary arcing can not occur. The number of zener diodes used to do this job is, in the FIG. 2 network circuit, desirably held to a minimum as zener diodes are relatively expensive and somewhat unreliable. Of course, other ways (not shown) may be readily devised for arranging and connecting zener diodes into the arc suppression network to do the same job. The circuit 16 is constructed in a way which, as should be considered in an optimum design, takes into account the circumstance that secondary arcing, when the tube is used without the circuit 16, tends to be a greater problem when it occurs between the cathode K, the first grid G1, and the second grid G2 than when it occurs between the focus electrode F and the cathode K.

The electrostatic shield 32 is composed of an electrically conductive colloidal graphite film (aquadag) on the inside wall of the conical section 24 of the tube's envelope. The shield 32 forms an annular conductive band inside the envelope covering the inside wall of the envelope between the anode and a fluorescent screen S inside the envelope adjacent the front face plate 26.

The shields 30 and 32 which are separated by the thickness of the envelope therebetween form the plates of a capacitor. This capacitor is estimated to have a fairly sizeable capacitance of about 100 to 200 picofarads. The electromagnetic shield 30 is bolted to the framework of a supporting chassis in a display console and thus grounded.

In the operation of the cathode ray tube CRT, the electron gun and anode provide an electron beam for writing information on the fluorescent screen S. In order to write information, video signals from the video signal amplifier 2 are coupled through the intensity coupler 4, are suppression circuit 16, and connector socket 38 to the first grid G1 to effect turn on or turn ofi of the electron beam and deflection voltage signals are applied to the deflection yoke 28 from a deflection circuit (not shown).

The electron gun may be operated in the following manner when the cathode ray tube is in operation. The heater is energized by a transformer T having a primary P and secondary S winding. The cathode K is shorted to the heater H. The secondary S supplies 6.2 volts r.m.s. at 400 cycles per second and the cathode K is maintained at a constant reference or ground potential, which in this instance is at zero volts. The first grid G1 is maintained at a potential below cathode potential and in this instance at a potential which is volts below cathode potential. The second grid G2 is maintained at a potential above cathode potential and in this instance, at a potential which is 400 volts above cathode potential. The focus electrode F is maintained at a potential in this instance which is 200 volts above the cathode potential. Finally, the anode is maintained at a constant potential well above the potentials at which the gun electrodes are maintained and in this instance, is typically maintained at a potential which exceeds the cathode potential by about 15,000 to 20,000 volts or more.

During the operation of the cathode ray tube CRT, the electron beam that is caused to issue from the electron gun and anode toward the screen S may be modulated as desired by impressing suitable video signal voltage potentials from the video amplifier 2 upon the first grid G1. The video signals can be made large enough to swing the first grid potential as much as 90 volts above the voltage existing on the first grid G1 in the absence of any video signal thereon without ever causing the first grid potential to become more positive than the cathode potential. The foregoing described operation is of a customary nature and need not be further discussed.

The intensity coupler 4 and video signal amplifier 2 and related circuits, such as 8 and 10, mentioned earlier, are each comprised of a printed circuit card carrying packaged microcircuits which are situated stackwise within a cardbox 12. As many as 30 cards are stacked in the cardbox 12 and each card is connected to a different point along the buss line 14 in a manner familiar to the art. The bus line 14 is grounded to the console's chassis at physically remote from the point at which the electromagnetic shield 30 is grounded to Prior to the use of the present invention, whenever the cathode ray tube arced the aforementioned harness wire conducted overload current to the buss line 14. As a result, potential differences were (and still are, but only to an acceptable extent) produced between the points along the buss line and this led to memory state changes of microcircuit flip-flops contained in circuits 8 and 10, for example. This and other drawbacks to the practical application of display consoles have been successfully overcome by using the present invention. It was, in fact, imperative that all unwanted adverse changes, such as noted herein, produced in the various circuits be successfully combatted and this purpose has been served by the present invention. Also prior to the use of the present invention, it was found that the buss line 14 which is nominally at the same potential as the electromagnetic shield mentioned herein, varied in potential whenever the cathode ray tube CRT arced. The aforementioned long harness wire did then (as it does today) sustain an inductive voltage drop, due to its inherent inductance, which was effective when rapidly changing, unsuppressed, transient overload current flowed through the harness wire to require the replacement of any one or more of the circuits contained in the cardbox 12. By using the present invention to limit the rapidity of change of overload current in the harness wire and buss line 14, the aforementioned inductive voltage drops that are now produced when the tube CRT arcs is held to a few volts between the points on the buss line 14 and the shifting of the level of buss line potential exclusive of voltage drops therealong is made inconsequential and acceptable.

Referring now to FIG. 2 in particular, wherein the arc suppression circuit 16 is shown in detail, it can be seen that the circuit 16 is a circuit network that includes resistors R1 R6, capacitors C1 C7, solid state zener diodes ZDl ZD3, and inductors L1 and L2, arranged between input terminals Tl T6, output terminals T1 T6, and network reference terminals TRl TR8. As will be explained in greater details hereinafter, the network 16 is designed to provide specified circuit paths therein through which overload currents can flow temporarily upon the happening of arcing from the anode of the tube CRT and the network thereby keeps most of the overload currents away from the intensity coupler 4, the video signal amplifier 2, and other circuits 8, 10, etc. The network circuit 16 thus keeps electrical energy provided by arcing from traveling in full force along certain other paths to tube related and non-related circuitry which should not be allowed to be seriously affected when arcing does occur.

The circuit 16 shown in FIG. 2 is able to handle or suppress overload currents and may therefore be called an overload current suppression circuit which in this instance serves as an arc suppression circuit.

The input terminals T1 T6 of the circuit 16 are connected to respective output terminals of the intensity coupler 4 via the connector socket 38 and a bunch of wires in the cable (shown in FIG. 1) and the circuit output terminals T1 T6 are connected to the respective terminal pins 36 and thus to the first grid G1, second grid G2, focus electrode F, cathode K and heater H.

A resistor R1 is connected between the terminals T1 and T1; resistors R and R2 are connected in series between terminals T2 and T2; resistors R6 and R3 are connected in series between terminals T3 and T3, a resistor .R4 is connected between terminals T4 and T4, an inductor L1 is connected between terminals T5 and T5, and an inductor L2 is connected between terminals T6 and T6. The capacitors Cl C7 are each connected in the circuit 16 as shown with each capacitor being connected to a respective reference terminal TR2 TR8, each of which is connected to a common ground connection point. A zener diode 2D] is connected between terminal T1 and reference terminal TRl and poled so that its cathode is connected to terminal T1 and its anode is connected to reference terminal TRl. Another zener diode ZD2 is connected between tenninals T1 and T4 and poled so that its anode is connected to terminal T1 and its cathode is connected to T4. Still another zener diode ZD3 is connected between terminals T2 and T4 and poled so that its cathode is connected to terminal T2 and its anode is connected to terminal T4. The terminal T4 is connected directly to the terminal T5 as shown, but the terminal T4 may in some applications be connected to the terminal T5 by still another zener diode suitably poled if a potential difference is to be allowed to exist between the side PM of the heater H and the cathode K. Each zener diode that is used, or may be used, in the circuit 16 is poled so that during normal operating conditions each zener diode is nonconductive yet can become conductive whenever arcing occurs.

In a typical or exemplary circuit 16, the capacitors Cl C5 are 0.01 microfarad capacitors, the capacitors C6 and C7 are 0.1-microfarad capacitors, the resistors R1, R5 and R6 are 1,000-ohm resistors, the resistors R2, R3 and R4 are 10,000- ohm resistors, the inductors L1 and L2 are 300-microhenry inductors, the zener diode ZDl is selected to have a reverse bias breakdown voltage of 1 10 volts, and the zener diodes ZD2 and ZD3 are each selected to have a reverse bias breakdown voltage of 600 volts. The reverse bias breakdown voltage rating of each selected zener diode is determined by taking into account the potentials mentioned hereinabove impressed upon the various electrodes of the electron gun so that in the absence of arcing each zener diode is reverse biased at less than its rated breakdown voltage and is therefore normally non-conductive. The zener diode ZDl is one which is further selected to exhibit a capacitance under normal reverse biasing, as used in the circuit, of less than 10 picofarads since its capacitance to some extent increases the rise time of the first grid circuit when responding to modulation signals applied to the first grid G1 and this increase should be kept slight. The zener diodes ZD2 and ZD3 also exhibit reverse bias capacitances, but the circuit design requirements do not require that any particular attention be paid thereto.

The value of each resistor in the circuit 16 was determined by trial and error to obtain maximum results. These values can, of course, be changed to suit other circuit applications. In selecting the value of the resistor R1 a compromise had to be made since the resistor R1, if of too large a value, unduly increases the signal response time of the first grid G1 to video signals and since the resistor R1, if of too small a value, will be inadequate to keep the level of overload current flowing therethrough as a result of arcing from the tubes anode down to the extent desired. Within the imposed video signal response time requirements, it is preferred to use a large value resistor for the resistor R1 since a larger valued resistor R1 increases, as wanted, the RC time constant which determines how long it will take for any arc between the anode and first grid G1 to dissipate. The RC time constant referred to is, of course, the product of the stray capacitance, introduced by the shields 30, 32 and so forth, times the resistance value of resistor R1. Since the second grid G2, the focus electrode F and the cathode K each operate at a constant potential, unlike the first grid G1, no response time requirement need be fulfilled by the resistors R2, R3 and R4 and therefore these resistors can be made much larger in value than the resistor R1. With this in mind, the resistors R2, R3 and R4 are given a much greater value than the resistor R1, in this case a value 10 times as great. Accordingly, overload current suppression purposes are to a measurable degree better served by the resistors R2, R3 and R4 than by the resistor R1.

In fact, experience with particular cathode ray tubes operated in the manner specified herein but not using the FIG. 2 circuitry has shown that in the worst cases temporary over load currents may flow for a time which can reach momentarily levels as high as amperes in the intensity coupler circuitry interconnected with the second grid G2 or the focus electrode F. Such currents will reach peak value rapidly, in about 100 nanoseconds, then decay and be dissipated in about 2 microseconds. The time in which this occurs in much too short in view of the levels of current that can flow temporarily and results in various difficulties discussed herein. Each resistor in the circuit 16 suffices to limit any overload current that flows therethrough so that at its peak it will not exceed an acceptable value. The resistor R1, for instance, holds peak current therein to less than 15 amperes and the resistors R2 and R5 and the resistors R3 and R6 respectively hold peak currents therein to less than 1.5 amperes. In the case of each circuit resistor, it is characteristic that overload current will peak in a relatively short time then decrease over a relatively longer period of time. Consequently, the greatest rates of current change occur timewise near the onset of overload current flow and the accompanying transient inductive voltages are largest as the current changes the most rapidly. Typically, the overload current through the resistor R1 will reach its peak in about 1 microsecond then take about 20 microseconds to be dissipated. The time involved is perhaps times as long as would otherwise be the case if the resistor R1, for example, was shorted out. Thus, the resistors limit overload current and prolong the time in which it is changing. By using the resistors to help overload currents down to lower amperage levels and to also extend the time in which overload currents are flowing, a one-hundred fold decrease in the rates of change of overload current is estimated to be accomplished thereby greatly benefiting circuitry, mentioned elsewhere, coupled in any way to the cathode ray tube CRT, adversely sensitive to higher rate of change of overload current.

The network 16 is physically embodied in a unit which is potted in a suitable dielectric material rated to withstand extremely high potentials with the input, output, and a ground terminal to which the reference terminals are commonly connected, being exposed so that the necessary circuit connections can be made thereto.

The inductors L1 and L2 are specially designed to withstand anode potential thereacross without current saturating. Each inductor is fonned of about 100 turns of wire wound in a 2- inch-long, single layer, helical coil about a ferrite bobbin and potted in a suitable plastic potting material. The inductors L1 and L2 resist, to an extent, changing of current flow therein which is brought about when arcing occurs from the tubes anode. These inductors are used rather than resistors to avoid unnecessary power loss in the supply of heater current to the heater filament since 600 milliamperes of current would consume a large part of the voltage supplied by the secondary S if resistors large enough to effect adequate current suppression therein during arcing were to be used.

Each capacitor C1 thru C7 is connected to a common ground as shown via terminals TR2 TR8 and in the physical embodiment each such connection is achieved by a short wire, a few inches long, connected to a single common terminal which in turn is secured to and thereby connected to the electromagnetic shield 30. Each such wire, however short, possesses a slight inductance of a few nanohenrys and therefore can develop therein an undesirable inductive voltage drop when arcing occurs in the cathode ray tube environment. Since, however, the rate of overload current change that may occur in the overload current flowing through these wires is greatly restricted, such inductive voltage drops are held to within only a few volts, which is quite acceptable and does not give rise to any problems. When the tube CRT arcs each capacitor C1 C7 can bypass resultant overload currents to ground via the terminals TR2 TR8 to keep such currents away from the intensity coupler 4. The zener diode ZDl, of course, also bypasses as needed resultant overload current to the terminal TRl. It is possible to use other suitable zener diodes in lieu of the various capacitors Cl C7 for overload current bypassing purposes but it is preferred not to do so, especially since zener diodes are more expensive and less reliable than capacitors.

The present invention has been so successful that even over an extended period of time, during which several hundred arcs were observed to occur, certain cathode ray tubes that were operated at anode potentials of 17,000 and 23,000 volts respectively while using the invention produced only a single logic microcircuit malfunction thereby leading to optimum usage of certain display console equipment into which the present invention has been incorporated.

The present invention, while finding particular utility and application in the technical context described herein, may furthermore ultimately find utility in other situations involving charged beam utilizing tubes to the extent that analogous considerations exist and such usage is foreseeably likely to involve electron beam utilizing tubes wherein certain tube electrodes are operated at high potentials and other tube electrodes operated at low potentials so that substantial voltage differences are developed between the potential levels applied to the various electrodes.

Any changes, modifications and the like which are within the purview of a skilled workman in the art following the principles of the present invention as set forth herein are intended to be protected if within the scope of the appended claims.

We claim:

1. A current suppression circuit network having input, output, and reference terminals and comprising:

first, second, third and fourth circuit branches each including at least one resistor and each respectively being connected between first, second, third and fourth pairs of input and output terminals;

fifth and sixth circuit branches each including an inductor and each respectively being connected between fifth and sixth pairs of input and output terminals;

first, second, and third zener diodes each having an anode and a cathode, said first zener diode having its anode connected to a reference terminal and its cathode connected to the input terminal of said first terminal pair, said second zener diode having its anode connected to the output terminal of said first terminal pair and its cathode connected to the output terminal of said fourth terminal pair, said third zener diode having its anode connected to the output terminal of said fourth terminal pair and its cathode connected to the output terminal of said second terminal pair; and

first, second, third, fourth, and fifth capacitors, said first capacitor being connected between a point on said second circuit branch and said reference terminal, said second capacitor being connected between a point on said third circuit branch and said reference terminal, said third capacitor being connected between a point on said fourth circuit branch and said reference terminal, said fourth capacitor being connected between a point on said fifth circuit branch and said reference terminal, and said fifth capacitor being connected between a point on said sixth circuit branch and said reference terminal.

2. A circuit network having six input terminals, a reference terminal, two circuit nodes, and further comprising:

a first resistor connected between a first input and a first output terminal, a first zener diode having its cathode connected to said first input terminal and its anode connected to said reference terminal; a fifth and a second resistor, said fifth and second resistors being connected together at a first circuit node, said fifth resistor being further connected to a second input terminal and said second resistor being further connected to a second output terminal so that said fifth and second resistors are connected in series between said second input terminal and said second output terminal, a first capacitor connected between said second input terminal and said reference terminal, a second capacitor connected between said first circuit node and said reference terminal; a sixth and a third resistor, said sixth and third resistors being connected together at a second circuit node, said sixth resistor being further connected to a third input terminal and said third resistor being further connected to a third output terminal so that said sixth and third resistors are connected in series between said third input terminal and said third output terminal, a third capacitor connected between said third input terminal and said reference terminal, a fourth capacitor connected between said second circuit node and said reference terminal; a fourth resistor connected between a fourth input and a fourth output terminal, a fifth capacitor connected between said fourth input terminal and said reference terminal; a first inductor connected between a fifth input and a fifth output terminal, a sixth capacitor connected between said fifth input terminal and said reference terminal; a second inductor connected between a sixth input and a sixth output terminal, a seventh capacitor connected between said sixth input terminal and said reference terminal; a second zener diode having its anode connected to said first output terminal and its cathode connected to said fourth output terminal; and a third zener diode having its anode connected to said fourth output terminal and its cathode connected to said second output terminal.

3. A current suppression circuit comprising:

first, second, third and fourth circuit branches each having an input terminal and an output terminal, the respective output terminals of said third and fourth branches being connected together;

first, second and third resistors respectively coupled between the input and output terminals of said first, second and third branches;

an inductor coupled between the input and output terminals of said fourth branch;

a first zener diode coupled between the input terminal of said first branch and a reference terminal;

a second zener diode coupled between the respective output terminals of said first and third branches;

a third zener diode coupled between the respective output terminals of said second and third branches;

a first capacitor coupled between the input terminal of said second branch and said reference terminal;

a second capacitor coupled between the input terminal of said third branch and said reference terminal; and

a third capacitor coupled between the input terminal of said fourth branch and said reference terminal.

4. A current suppression circuit according to claim 3 wherein:

said first zener diode has an anode connected to said reference terminal and has a cathode connected to the input terminal of said first branch;

said second zener diode has an anode connected to the output terminal of said first branch and has a cathode connected to the output terminal of said third branch; and

said third zener diode has an anode connected to the output terminal of said third branch and has a cathode connected to the output terminal of said second branch.

5. A current suppression circuit according to claim 3 and further comprising:

a fifth circuit branch having an input terminal and an output terminal, the output terminal of said fifth branch being coupled to the output terminal of said fourth branch;

a second inductor coupled between the input and output terminals of said fifth branch; and

a fourth capacitor coupled between the input terminal of said fifth branch and said reference terminal.

Claims (5)

1. A current suppression circuit network having input, output, and reference terminals and comprising: first, second, third and fourth circuit branches each including at least one resistor and each respectively being connected between first, second, third and fourth pairs of input and output terminals; fifth and sixth circuit branches each including an inductor and each respectively being connected between fifth and sixth pairs of input and output terminals; first, second, and third zener diodes each having an anode and a cathode, said first zener diode having its anode connected to a reference terminal and its cathode connected to the input terminal of said first terminal pair, said second zener diode having its anode connected to the output terminal of said first terminal pair and its cathode connected to the output terminal of said fourth terminal pair, said third zener diode having its anode connected to the output terminal of said fourth terminal pair and its cathode connected to the output terminal of said second terminal pair; and first, second, third, fourth, and fifth capacitors, said first capacitor being connected between a point on said second circuit branch and said reference terminal, said second capacitor being connected between a point on said third circuit branch and said reference terminal, said third capacitor being connected between a point on said fourth circuit branch and said reference terminal, said fourth capacitor being connected between a point on said fifth circuit branch and said reference terminal, and said fifth capacitor being connected between a point on said sixth circuit branch and said reference terminal.

2. A circuit network having six input terminals, a reference terminal, two circuit nodes, and further comprising: a first resistor connected between a first input and a first output terminal, a first zener diode having its cathode connected to said first input terminal and its anode connected to said reference terminal; a fifth and a second resistor, said fifth and second resistors being connected together at a first circuit node, said fifth resistor being further connected to a second input terminal and said second resistor being further connected to a second output terminal so that said fifth and second resistors are connected in seRies between said second input terminal and said second output terminal, a first capacitor connected between said second input terminal and said reference terminal, a second capacitor connected between said first circuit node and said reference terminal; a sixth and a third resistor, said sixth and third resistors being connected together at a second circuit node, said sixth resistor being further connected to a third input terminal and said third resistor being further connected to a third output terminal so that said sixth and third resistors are connected in series between said third input terminal and said third output terminal, a third capacitor connected between said third input terminal and said reference terminal, a fourth capacitor connected between said second circuit node and said reference terminal; a fourth resistor connected between a fourth input and a fourth output terminal, a fifth capacitor connected between said fourth input terminal and said reference terminal; a first inductor connected between a fifth input and a fifth output terminal, a sixth capacitor connected between said fifth input terminal and said reference terminal; a second inductor connected between a sixth input and a sixth output terminal, a seventh capacitor connected between said sixth input terminal and said reference terminal; a second zener diode having its anode connected to said first output terminal and its cathode connected to said fourth output terminal; and a third zener diode having its anode connected to said fourth output terminal and its cathode connected to said second output terminal.

3. A current suppression circuit comprising: first, second, third and fourth circuit branches each having an input terminal and an output terminal, the respective output terminals of said third and fourth branches being connected together; first, second and third resistors respectively coupled between the input and output terminals of said first, second and third branches; an inductor coupled between the input and output terminals of said fourth branch; a first zener diode coupled between the input terminal of said first branch and a reference terminal; a second zener diode coupled between the respective output terminals of said first and third branches; a third zener diode coupled between the respective output terminals of said second and third branches; a first capacitor coupled between the input terminal of said second branch and said reference terminal; a second capacitor coupled between the input terminal of said third branch and said reference terminal; and a third capacitor coupled between the input terminal of said fourth branch and said reference terminal.

4. A current suppression circuit according to claim 3 wherein: said first zener diode has an anode connected to said reference terminal and has a cathode connected to the input terminal of said first branch; said second zener diode has an anode connected to the output terminal of said first branch and has a cathode connected to the output terminal of said third branch; and said third zener diode has an anode connected to the output terminal of said third branch and has a cathode connected to the output terminal of said second branch.

5. A current suppression circuit according to claim 3 and further comprising: a fifth circuit branch having an input terminal and an output terminal, the output terminal of said fifth branch being coupled to the output terminal of said fourth branch; a second inductor coupled between the input and output terminals of said fifth branch; and a fourth capacitor coupled between the input terminal of said fifth branch and said reference terminal.

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