US3618133A - Symmetrical polyphase networks utilizing constant reactances - Google Patents

Symmetrical polyphase networks utilizing constant reactances Download PDF

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US3618133A
US3618133A US826149A US82614969A US3618133A US 3618133 A US3618133 A US 3618133A US 826149 A US826149 A US 826149A US 82614969 A US82614969 A US 82614969A US 3618133 A US3618133 A US 3618133A
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transistor
circuits
base
collector
phase
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Micahel John Gingell
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STC PLC
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International Standard Electric Corp
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/16Networks for phase shifting
    • H03H11/22Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output

Definitions

  • yphase network responds [50] Field of Search 333/1, 80, diff tl to input Signals Qfnegative and positive frequencies 30 1124, 324/107, 108; (a positive frequency is a counterclockwise sequence of vec- 336/5, 10, 12; 330/107 109 tors representing polyphase input signals and a negative frequency is a clockwise sequence of vectors representing [56] References cued polyphase input signals).
  • the polyphase network has a UNITE TAT PATENTS different insertion loss characteristic depending on the 2,418,643 4/1947 Huge 336/5 sequence ofthe polyphase input signals.
  • the invention relates to polyphase networks and more particularly to symmetrical polyphase networks.
  • constant reactance defined as a reactance whose value remains constant with changes in the frequency of the signal applied thereto.
  • positive frequency as employed herein is defined as a counterclockwise sequence of vectors representing polyphase input signals.
  • negative frequency as employed herein is defined as a clockwise sequence of vectors representing polyphase input signals.
  • An object of the present invention is to provide a symmetrical polyphase network including constant reactances.
  • Another object of the present invention is to provide a symmetrical polyphase network including constant reactances such that the symmetrical polyphase network responds differently to input signals of negative and positive frequencies.
  • a feature of the present invention is the provision of a symmetrical polyphase network comprising N single-phase networks, one for each phase of an N-phase input signal, where N is an integer greater than one; each of said single-phase networks including at least one constant reactance so that the symmetrical polyphase network responds differently to input signals of negative and positive frequencies.
  • FIG. 2 illustrates a positive sequence four-phase vector diagram
  • FIG. 3( A) illustrates the frequency response curve of a sim ple thirdorder elliptic low-pass filter
  • FIG. 3( B) illustrates the frequency response curve illustrated in the drawing according to FIG. 3( A) transformed into an asymmetric form
  • FIG. 4 shows the gyrator realization
  • FIG. 5 shows the controlled source tor
  • FIG. 6 shows a method of realizing constant reactances in a founphase system
  • FIG. 7 shows the circuit diagram of a single-phase asymmetric-about-zero frequency filter
  • FIG. 8 shows the circuit diagram of the polyphase realization of the circuit diagram of FIG. 7 for a two-phase system with quadrature inputs
  • FIGS. 9( A) and 9( B), respectively, show circuit diagrams of the theoretical and practical realizations of a two-phase 1 to j impedance transformer of the voltage shift type
  • FIGS. I0(A) and 10(B), respectively, show circuit diagrams of the theoretical and practical realizations of another twophase voltage shift type I to j impedance transformer;
  • FIGS. II(A) and 11(8) respectively, show circuit diagrams of the theoretical and practical realizations of a two-phase I to j impedance transformer of the current shift type
  • FIGS. 12(A) and I2(B),-r show circuit diagrams of the theoretical and practical realizations of another twophase current shift type 1 to j impedance transformer
  • FIG. I3 shows the circuit diagram of a single-phase network which utilizes a plurality of constant reactances
  • FIG. 14 shows the circuit diagram of the polyphase realization of the circuit diagram to FIG. 13 for a two-phase network with quadrature inputs
  • FIG. 15 shows part of the circuit diagram of FIG. I4 together with negative impedance converters
  • FIGS. 16, I7, 18 and 20, respectively, show the practical circuit diagrams of different forms of three-phase impedance transformers;
  • FIG. I9 shows the equivalent circuit diagram of one phase of the impedance transformer shown in FIG. 18;
  • FIG. 21 shows the circuit diagram of another single-phase network which utilizes a plurality of'constant reactances
  • FIG. 22 shows the circuit diagram of the polyphase realization of the circuit diagram of FIG. 2R for a three-phase network
  • FIGS. 23 and 24 show equivalent circuit diagrams of one phase of the circuit diagram shown in FIG. 22;
  • FIGS. 25 and 26 show the circuit diagrams of difierent forms of four-phase impedance transfonners
  • FIGS. 27(A) and 27(B) show frequency response curves
  • FIGS. 28(A) and 28(8) show circuit diagrams of a singlephase filter before and after transformation by image design techniques
  • FIGS. 29(A) and (B) show frequency response curves for an N-path frequency translation system having low-pass filters connected in each of the N-paths thereof;
  • FIGS. 30(A) and (B) show frequency response curves for an N-path frequency translation system which utilizes the symmetrical polyphase networks according to the invention
  • FIGS. 31(A) to (C) show vector diagrams; and quadrature inputs.
  • FIG. 32 shows the circuit diagram of a two-phase network with quadrature inputs.
  • gyrator G1 if gyrator G1 is connected between the two phases, the two single-phase networks, in a symmetrical way as shown in FIG. 4, for example, it will have a voltage of V across port and a voltage of 'V across port 6.
  • the gyrator must be symmetrical. V
  • gyrator G2 can be represented by two controlled sources, i.e., the constant current sources CCSl and CCS2.
  • FIG. 6 shows a way of realizing constant reactances in a four-phase system with what is virtually a fourport gyrator.
  • the single-phase version of this filter could take the form shown in FIG. 7 wherein coil Ll which is connected between one input and one output terminal is shunted by constant reactance X3 and capacitor C2, constant reactance X2 and capacitor C3 connected in series.
  • the input terminals of the filter are shunted by capacitor C1 connected in series with constant reactance X1 and the output terminals are shunted by capacitor C4 connected in series with constant reactance X4.
  • FIG. 8 The polyphase realization for a two-phase system with quadrature inputs is shown in FIG. 8 where it can be seen that four two-port gyrators G3 to G6 are utilized for the constant reactances of each one of the two phases.
  • One port of two-port gyrator G3 is used for one phase and is, therefore, connected in series between capacitors C2 and C3 across coil Ll, while the other port of this gyrator is used for the other phase and is, therefore, connected in series between capacitors C2 and C3 across coil L1
  • the two-port gyrators G4 to G6 each have each one of the two ports thereof utilized for one of the two input phases, i.e., two ports of gyrator G4 are utilized with capacitors Cl and C1 to shunt the inputs of the two phases, the two ports of gyrator G5 are used to shunt coils Ll and L1 and the two ports of gyrator G6 is utilized with capacitors C4 and C4 to shunt the outputs of the two phases.
  • the gyrators and N-port gyrators used to realize constant reactances may be called polyphase-constrained networks, since the N terminals thereof are forced to carry voltages and currents which are always in N phases.
  • a further class of polyphase-constrained networks are those which include I to j impedance transformers to provide the constant reactances, where j is he conventionally employed mathematical symbol equal toV 1(See page 479, The International Dictionary of Physics and Electronics," 1956).
  • FIG. 9(A) shows a two-phase (quadrature) I to j impedance transformer of the voltage shift type having a constant current source (CCS3 or CCS4) in each phase thereof and the voltages and currents associated with each phase are as indicated.
  • I to j impedance transformer means if impedances Z are placed on the output of each phase, in other words, looking into the inputs of the impedance transformer, impedances of 12 will be seen looking into either input from the output of the impedance transformer.
  • Each one of the two phases contains a transistor, i.e., transistors VTl and VT2, having their collector-emitter circuits connected in series between the input and output terminals of the network.
  • the V, voltage input to one of the two phases is also applied to the base of transistor VTl in the other of the two phases by means of transistor VT3 having its base connected to the jV, voltage source, its collector connected to the base of transistor VTI and to a negative electrical power supply via resistor R1 and its emitter connected to ground potential via resistor R2.
  • the input voltage V is applied directly to the base of transistor VTZ.
  • the two-phase voltage shift type I to j impedance transformers may take the form shown in FIGS. (A) and 10(3).
  • FIG. 10(A) shows the voltages and currents associated with each phase and the practical circuit diagram of FIG. 10(8) comprises a transistor in each one of the two phases, i.e., transistors VT4 and VT5 having their emitter-collector circuits connected in series between the input and output terminals of the network.
  • the V, voltage output of one of the two phases is applied directly to the base of transistor VT4 and the output voltage V, of the other of the two phases is applied to the base of transistor VT5 in said one of the two phases by means of transistor VT6 having its base connected to the collector of transistor VT4, its collector connected to a negative electrical power supply via resistor R11 and to the base of transistor VT5 and its emitter connected to ground potential via resistor R10.
  • FIGS. 11(A) and 11(8) Examples of two-phase (quadrature) current shift types of 1 to j impedance transformers are shown in FIGS. 11(A) and 11(8) and FIGS. 12(A) and 12(B).
  • FIGS. 11(A) and 12(A) show the theoretical circuit diagrams and indicate the voltages and currents associated with each phase and do not require any further explanation.
  • FIG. 11(8) shows the practical circuit diagram for the theoretical circuit of FIG. ll(A) and comprises a transistor in each one of the two phases, i.e., transistors VT7 and VT8 having their emitter-base circuits connected in series between the input and output terminals of the network.
  • the base of the transistor VT7 is directly connected to the collector of transistor VT8 and the base of transistor VT8 is connected to the collector of transistor VT7 via transistor VT9 having its emitter connected to earth potential via resistor R12, its collector connected to the base of transistor VT8 and its base connected to the collector of transistor VT7 and to a positive electrical power supply via resistor R13.
  • FIG. l2(B) shows the practical circuit diagram for the theoretical circuit of FIG. 12(A) and comprises a transistor in each one of the two phases, i.e., transistors VT10 and VTll having their base-emitter circuits connected in series between the input and output terminals of the network.
  • the base of transistor VTIO is connected to the collector of transistor VTll via transistor VT12 having its emitter connected to ground potential via resistor R15, its base connected to a positive electrical power supply via resistor R14 and to the collector of transistor VT] 1, and its collector directly con nected to the base of transistor VTltl.
  • the base of the transistor VTlll is directly connected to the collector of transistor VTlll.
  • FIG. 13 shows the circuit diagram of a single-phase network which utilizes a large number of constant reactances X5, X6, X7, X8, X9...XM.
  • the input to the network is shunted by capacitor C5
  • the output of the network is shunted by capacitor CN
  • constant reactances X6, X8...X(M-l) are respectively connected in series with capacitors C6, C7...C(N-l) between ground potential and the junction of the constant reactances X5 and X7, X7 and X9...X(M2) and XM.
  • FIG. 14 This is a two-phase (quadrature) network having input phases ,and I and input voltages V,, and jV,,,.
  • the input to the single-phase circuits for D, and I are, respectively, shunted by capacitors C5, and C5 while their outputs are respectively shunted by capacitors CN, and CN
  • the l to j impedance transformers can be utilized as circuit elements to transform resistances into constant reactances
  • the T-networks of resistors R5,, R7,, and R6,, and resistors R5 R7 and R6 are utilized in conjunction with the j to l impedance transformer 2 which is interposed between resistors R6,, R6 and capacitors C6,, C6, to provide the constant reactances X5, X6 and X7 of FIG. 13 in each phase of the two-phase network of FIG. 14.
  • the j to l impedance transformer 3 is utilized in conjunction with the T-networks of resistors R(M-2),, RM, and R(Ml), and resistors R(M2),, RM and R(Mll), to provide the constant reactances X(M2), XM and X(Mll) of FIG. 13 in each phase of the two-phase network of FIG. 14.
  • the l to j impedance transformer ll interposed between the inputs to the network and resistors R5, and R5 is utilized to phase shift the inputs by j before they pass through the network and the l to j impedance transformer 4 interposed between resistors RM, and RM, and the outputs from the network corrects this phase shift before the signals are passed to the outputs of the network.
  • M is shown therein and includes negative impedance converters 5 and 6 which are, respectively, interposed between resistors R6, and the junction of resistors R5, and R7, and resistor R6, and the junction of resistors R5 and R7 Due to the use of the negative impedance converters which would be included in each of the resistance T-networks, it is necessary to change the j to 1 impedance transformers to I to j impedance transformers, e.g., transformer 7 (FIG. 15) for transformer 2 (FIG. 14).
  • the circuit diagram shown in FIG. 14 without the capacitors can be considered as an N'port gyrator which is lossless and passive although it may have to contain active devices to enable it to be realized.
  • FIGS. I6, 17, I8 and 20 show examples of practical circuit arrangements for three-phase constrained networks.
  • the three-phase constrained network according to FIG. 16 comprises a transistor in each of the three phases, each of the single-phase networks, i.e., transistors VTI3 to VTlS having their collector-emitter circuits connected in series between the input and output terminals of the network.
  • the base of transistor VT13 is connected to the collector of transistor VTIIS
  • the base of transistor VTI4 is connected to the collector of transistor VTI3
  • the base of transistor VTlS is connected to the collector of transistor VT14.
  • This network which can be considered as a I to h impedance transformer has the chain matrix where Z, input impedance Z output impedance
  • the three-phase constrained network of FIG. 17 is basically the same as the network of HG. 16 except the bases of each of the transistors VT13 to VT are connected to the collector of the transistor in the subsequent instead of the preceding ad jacent phase to provide a I to l/h impedance transformer i.e., the base of transistor VT14 is connected to the collector of transistor VT15, the base of transistor VT15 is connected to the collector of transistor VT13 and the base of transistor VT13 is connected to the collector of transistor VT14.
  • FIG. 18 shows the practical circuit diagram of the threephase constrained network which includes a transistor in each of the three phases, i.e., transistors VT16 to VT18 having their collector-emitter circuits connected in series between the input and output terminals of the network.
  • the interconnections between the three phases in order to provide a I toj' ⁇ /5 impedance transformer is effected by three networks which each include a transistor, i.e., the transistors VT19 to VT21 having their collectors connected to a negative electrical supply and their emitters connected to ground potential, respectively, via bias resistors R17, R18 and R19.
  • the base of transistor VT19 is connected to the input voltage V of one of the phases, i.e., to the collector of transistor VT16, the base of transistor VT20 is connected to the input voltage hV of another one of the phases, i.e., to the collector of transistor VT17 and the base of transistor or VT21 is connected to the input voltage h V of the other of the phases, i.e., to the collector of transistor VT18.
  • the emitter of transistor VT19 is also connected to the emitter of transistor VT20 via resistor R16 connected in series with resistor R16/2 and to the emitter of transistor VT21 via resistor R21/2 connected in series with a resistor R21.
  • the junction of resistors R21 and R21/2 is connected to the base of transistor VT18 and the junction of resistors R16/2 and R16 is connected to the base of transistor VT16.
  • the emitter of transistor VT20 is also connected to the emitter of transistor VT21 via resistor R20 connected in series with resistor R20/2 and the junction of resistors R20 and R20/2 is connected to the base of transistor VT17.
  • the value of the resistances R16, R20 and R21 are arranged in conjunction with the transistors VT19 to VT21 such that a voltage of jV 3 is applied to the base of transistor VT16, a voltage of hjV, is applied to the base of transistor VT17 and a voltage hjV is applied to the base of transistor VT18.
  • This network has the chain matrix and I i-Rl (17) and From equations (17), (18) and (19) (V hV i R16 Vl From equations (10) and (20)
  • the three-phase constrained network of FIG. 20 is basically the same as the network of FIG.
  • This network has the chain matrix
  • the electrical supply arrangements for each of the phases (single-phase networks) of the circuit diagrams of FIGS. 16, 17, 18' and 20' are not shown, but in practice would be arranged such that a predetermined potential difference exists between the collector and emitter, and the emitter and base of each of the transistors which form part of each of the phases. An example of how this may be achieved in practice will be outlined in a subsequent paragraph.
  • FIG. 21 shows the circuit diagram of a single-phase network which utilizes constant reactances X10 to X12.
  • the input to the network is shunted by capacitor C8, the output is shunted by capacitor C9 and the constant reactance X12 is connected in series with capacitor C10 between ground potential and the junction of reactances X10 and X11. It is assumed that the constant reactance X12 is of opposite sign to the constant reactances X10 and X11.
  • constant reactance X10 is provided in each phase by the l to It impedance transformer enclosed by the chain dotted line 11A and resistors R10 and R10 for

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US826149A 1968-06-07 1969-05-20 Symmetrical polyphase networks utilizing constant reactances Expired - Lifetime US3618133A (en)

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GB27161/68A GB1174709A (en) 1968-06-07 1968-06-07 A Symmetrical Polyphase Network

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BE (1) BE733816A (pt)
BR (1) BR6909572D0 (pt)
CH (1) CH496364A (pt)
ES (1) ES368051A1 (pt)
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3778644A (en) * 1970-10-17 1973-12-11 Licentia Gmbh Filter circuit
FR2356313A1 (fr) * 1976-06-23 1978-01-20 Post Office Filtre actif pour electrocommunications et radiocommunications
US4123712A (en) * 1977-04-22 1978-10-31 Northern Telecom Limited Symmetrical polyphase network
US6025765A (en) * 1998-04-08 2000-02-15 Nortel Networks Corporation Gyrator with loop amplifiers connected to inductive elements
US6388543B1 (en) * 2000-09-18 2002-05-14 Conexant Systems, Inc. System for eight-phase 45° polyphase filter with amplitude matching
US6545569B1 (en) * 1998-12-08 2003-04-08 Koninklijke Philips Electronics N.V. Filtering device and method of eliminating a DC component by shifting the transfer function
US20040257152A1 (en) * 2003-06-23 2004-12-23 Magis Networks, Inc. Poly-phase network with resonant circuit bandpass shaping
CN111971898A (zh) * 2018-04-18 2020-11-20 三菱电机株式会社 多相滤波器
EP3767828A4 (en) * 2018-04-18 2021-01-20 Mitsubishi Electric Corporation MULTI-PHASE FILTER

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1204177A (en) * 1984-02-16 1986-05-06 Mumtaz B. Gawargy Symmetrical polyphase networks
GB2168868A (en) * 1984-12-19 1986-06-25 Philips Electronic Associated Polyphase filters

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2418643A (en) * 1944-06-05 1947-04-08 Closman P Stocker Magnetic frequency changer
US2984799A (en) * 1959-05-18 1961-05-16 Collins Radio Co Broadband-phase r.-c. network

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2418643A (en) * 1944-06-05 1947-04-08 Closman P Stocker Magnetic frequency changer
US2984799A (en) * 1959-05-18 1961-05-16 Collins Radio Co Broadband-phase r.-c. network

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3778644A (en) * 1970-10-17 1973-12-11 Licentia Gmbh Filter circuit
FR2356313A1 (fr) * 1976-06-23 1978-01-20 Post Office Filtre actif pour electrocommunications et radiocommunications
US4123712A (en) * 1977-04-22 1978-10-31 Northern Telecom Limited Symmetrical polyphase network
US6025765A (en) * 1998-04-08 2000-02-15 Nortel Networks Corporation Gyrator with loop amplifiers connected to inductive elements
US20030124981A1 (en) * 1998-12-08 2003-07-03 Nigel Greer Method of eliminating a DC component and filtering device obtained by this method
US6545569B1 (en) * 1998-12-08 2003-04-08 Koninklijke Philips Electronics N.V. Filtering device and method of eliminating a DC component by shifting the transfer function
US7058382B2 (en) * 1998-12-08 2006-06-06 Koninklijke Philips Electronics N.V. Method of eliminating a DC component and filtering device obtained by this method
US6388543B1 (en) * 2000-09-18 2002-05-14 Conexant Systems, Inc. System for eight-phase 45° polyphase filter with amplitude matching
US20040257152A1 (en) * 2003-06-23 2004-12-23 Magis Networks, Inc. Poly-phase network with resonant circuit bandpass shaping
US6836180B1 (en) 2003-06-23 2004-12-28 M2 Networks, Inc. Poly-phase network with resonant circuit bandpass shaping
CN111971898A (zh) * 2018-04-18 2020-11-20 三菱电机株式会社 多相滤波器
EP3761507A4 (en) * 2018-04-18 2021-01-06 Mitsubishi Electric Corporation POLYPHASE FILTER
EP3767828A4 (en) * 2018-04-18 2021-01-20 Mitsubishi Electric Corporation MULTI-PHASE FILTER
US11152915B2 (en) * 2018-04-18 2021-10-19 Mitsubishi Electric Corporation Polyphase filter
US11211919B2 (en) 2018-04-18 2021-12-28 Mitsubishi Electric Corporation Polyphase filter

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BR6909572D0 (pt) 1973-03-08
DE1928229B2 (de) 1972-10-12
BE733816A (pt) 1969-12-01
CH496364A (de) 1970-09-15
NL6908700A (pt) 1969-12-09
ES368051A1 (es) 1971-05-01
NO132295B (pt) 1975-07-07
NO132295C (pt) 1975-10-15
DE1928229A1 (de) 1970-01-29
GB1174709A (en) 1969-12-17

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