US3600646A - Power transistor - Google Patents

Power transistor Download PDF

Info

Publication number
US3600646A
US3600646A US886293A US3600646DA US3600646A US 3600646 A US3600646 A US 3600646A US 886293 A US886293 A US 886293A US 3600646D A US3600646D A US 3600646DA US 3600646 A US3600646 A US 3600646A
Authority
US
United States
Prior art keywords
emitter
finger
base
layer
web
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US886293A
Inventor
Norbert William Brackelmanns
Joel Ollendorf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Application granted granted Critical
Publication of US3600646A publication Critical patent/US3600646A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
    • H10D84/121—BJTs having built-in components
    • H10D84/125—BJTs having built-in components the built-in components being resistive elements, e.g. BJT having a built-in ballasting resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs

Definitions

  • a transistor with interdigitated emitter and base fingers in which the emitter has a web portion for feeding current to the fingers, and metal layers on both the web and the fingers;
  • the emitter finger metal layers are spaced from the web portion metal layers to introduce a ballasting resistance, with that portion of each finger metal layer proximate to the web portion being substantially wider than the remainder of the finger layer, and interspersed between the corresponding base finger and the emitter web portion to maintain a uniform distance between the base finger and the emitter finger metal layer.
  • the present invention relates to transistors required to handle relatively large amounts of power;
  • High power transistors usually include an emitter region having a relatively large area so that the power is distributed overthe device to keep the power per unit area within safe limits. It has previously been foundthat', in a power transistor having a relatively large area emitter, emitter-base injection occurs mainly around the periphery of the emitter. It has therefore become the practice to define the emitter region so that it has as large a periphery as possible in relation to area.
  • ' or similar shape which include a plurality of convolutions extending radially outwardly from a hub portion.
  • Another is a multiplicity of separate emitter sites connected .in parallel to function as a single emitter.
  • Still anotherconfiguration is one in which the base regionv and the emitter region are of generally comb shape with a web portion and interdigitated fingers. The emitter may be a double comb with the web portions back to back.
  • emitter ballasting resistors in that type of emitterwhich 'has a generally comb shape with fingers extending out from a central web portion which serves as a current feed path. Thishas been accomplished by leaving a space between the metal layer which covers the web portion of the emitter and the metal layer coveringeach fingerportion, since this forces current traveling to the fingers to travel a given distance through the more highly resistive semiconductor.
  • spacing the finger contact metal from the web portion contactmetal does not alone improve the second breakdown characteristics, because in prior art devices, that portion of the emitter base junction nearest the extremities of the base fingers had been formed too close to the emitter web portion.
  • the IR drop between this extremity and the emitter web was'less than'the IR drop in the spacing between the emitter web contact layer and the emitter finger metal, which, in essence obviatedthe benefits derived from :the ballast resistance spacing.
  • a power transistor of the present invention comprises emitter, base, and collector regions of alternate conductivity types. having a PN junction between the emitterand the base regions, and between the base and collector regions.
  • the emitter region has a central web portion, and fingers extending outwardly from the web portion, with a metal contact layer covering part of theemitter web portion.
  • the base region includes base fingers interdigitated with the emitter fingers.
  • FIGURE of the drawing is a plan view oft'h'e top surface of a transistor constructed in accordance 'with the present invention.
  • a transistor 10 constructed in accordance with the present invention comprises a collector region (not shown) and a base region 12 adjacentthe collector region, with a PN junction therebetween.
  • the base region 12 may either be an epitaxial layer grown on the collector region and of opposite conductivity type to the collector region, or it may be a pocket diffused into the collector region.
  • the transistor 10 also includes an emitter region 14 which may be formed by diffusing impurities into the base region 12 so that the emitter region 14 is of a conductivity type opposite to the base region.
  • the device may either be of NPN or PNP configuration.
  • the base region where it surrounds the emitter region, comprises a web portion 18 and a plurality of fingers 20 extending outwardly from the web portion 18 and perpendicular thereto.
  • the emitter region 14 also includes a web portion 22 and fingers 24 which are interdigitated with the base fingers 20.
  • the emitter web portion22 is partly covered with a metal contactlayer 26 which provides a low resistance feed-through for current entering the emitter region 14.
  • each emitter finger 24 is partially covered with a metal contact layer 28, which does not touch the junction 16.
  • the emitter finger contact layers 28 are separated from the emitter web portion metal layer 26 by a distance d."
  • a definite resistance value is introduced in the current path between the web portion metal layer 26 and the finger metal layer 28, the magnitude of which depends upon the distance of separation d" and the sheet resistance of the emitter region 14.
  • each contact layer 28 is spaced from the PN junction 16 by a distance s," which introduces a resistance between the layer 28 and the junction.
  • each contact layer has a proximal portion 30 which is substantially wider than the remainder of the contact layer, and is interspersed between the base finger 20 and the emitter web portion 22 to maintain a uniform distance s at all points.
  • the transistor 10 further includes a base region metal layer 32 having a web portion contact layer 34 and base finger contact layers 36.
  • each emitter finger contact layer 28 is shown in the drawing as generally triangular in shape, it will be understood that the proximal portion 30 may have any tapered, rounded, or chamfered shape; the important consideration being that the distance s" between the emitter finger contact layer 28 and the emitter-base junction 16 is uniform at all points.
  • the actual dimensions of the ballast resistance spacing d and the finger metal-to-junction distance S" is a design criteria; by way of example, the spacing d" may be 1.0 mil. and the distance 8" may be 2.0 mils.
  • the transistor 10 may be fabricated by methods well known in the art.
  • the emitter and base contact layers may comprise a malleable metal, such as a tin-lead alloy or aluminum, or a refractory metal, such as tungsten; however, the tin-lead alloy is preferred.
  • the dimensions of the emitter periphery may be designed independent of ballast resistance considerations.
  • transistors constructed as described above have improved resistance to second breakdown; the devices can be operated safely at considerably higher voltages than previously known transistors of this same general type.
  • a transistor comprising:
  • the emitter region comprising a central web portion and fingers extending outwardly from the web portion;
  • the base region including base fingers interdigitated with the emitter fingers
  • each contact layer having a proximal portion adjacent to, but separated from, the emitter web contact finger so as to introduce a ballasting resistance therebetween;
  • means for providing a substantially uniform resistance between the metal web contact layer and each of the base fingers comprising the proximal portion of each emitter finger contact layer being substantially wider than the remainder of the layer, so that the proximal portion is interspersed between the corresponding base finger and the web portion to maintain a uniform distance between the base finger and the emitter finger contact layer.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

A transistor with interdigitated emitter and base fingers, in which the emitter has a web portion for feeding current to the fingers, and metal layers on both the web and the fingers. The emitter finger metal layers are spaced from the web portion metal layers to introduce a ballasting resistance, with that portion of each finger metal layer proximate to the web portion being substantially wider than the remainder of the finger layer, and interspersed between the corresponding base finger and the emitter web portion to maintain a uniform distance between the base finger and the emitter finger metal layer.

Description

I United States Patent Norbert William Brackelmanns Ironia;
Joel Ollendorf, Springfield, both of, NJ. [21 Appl. No. 886,293
[22] Filed Dec. 18, 1969 [45] Patented Aug. 17, 1971 [73] Assignee RCA Corporation [72] Inventors [54] POWER TRANSISTOR 3 Claims, 1 Drawing Fig.
Assistant Examiner-E. Wojciechowiez Attorney-Glenn H. Bruestle ABSTRACT: A transistor with interdigitated emitter and base fingers, in which the emitter has a web portion for feeding current to the fingers, and metal layers on both the web and the fingers; The emitter finger metal layers are spaced from the web portion metal layers to introduce a ballasting resistance, with that portion of each finger metal layer proximate to the web portion being substantially wider than the remainder of the finger layer, and interspersed between the corresponding base finger and the emitter web portion to maintain a uniform distance between the base finger and the emitter finger metal layer.
Y l6 "lifllilllllmmllllllll POWER TRANSISTOR BACKGROUND OF THE INVENTION The present invention relates to transistors required to handle relatively large amounts of power; High power transistors usually include an emitter region having a relatively large area so that the power is distributed overthe device to keep the power per unit area within safe limits. It has previously been foundthat', in a power transistor having a relatively large area emitter, emitter-base injection occurs mainly around the periphery of the emitter. It has therefore become the practice to define the emitter region so that it has as large a periphery as possible in relation to area. I
A number of different configuration have been adopted to secure relatively large emitter periphei'y. One of these is a star,
' or similar shape, which include a plurality of convolutions extending radially outwardly from a hub portion. Another is a multiplicity of separate emitter sites connected .in parallel to function as a single emitter. Still anotherconfiguration is one in which the base regionv and the emitter region are of generally comb shape with a web portion and interdigitated fingers. The emitter may be a double comb with the web portions back to back.
The use of such configurations as described above has greatly improved current handlingcapability. Nevertheless, it has been found that, because of various triggering mechanisms, at present difficult to avoid, second breakdown occurs across the emitter-base junction because current is focused in one or more small spots. The focusingof current in small spots has previously been decreased by inserting ballasting resistors in series with the emitter in order to limit the maximum current that can flow between the emitter and base. In general, this-expedient has'been highly successful'in reducing the difficulty. Butit has proved to be more difficult to apply to some emitter configurations than to-others.
It has also previously been proposed to utilize emitter ballasting resistors in that type of emitterwhich 'has a generally comb shape with fingers extending out from a central web portion which serves as a current feed path. Thishas been accomplished by leaving a space between the metal layer which covers the web portion of the emitter and the metal layer coveringeach fingerportion, since this forces current traveling to the fingers to travel a given distance through the more highly resistive semiconductor. However, spacing the finger contact metal from the web portion contactmetal does not alone improve the second breakdown characteristics, because in prior art devices, that portion of the emitter base junction nearest the extremities of the base fingers had been formed too close to the emitter web portion. Thus, the IR drop between this extremity and the emitter web was'less than'the IR drop in the spacing between the emitter web contact layer and the emitter finger metal, which, in essence obviatedthe benefits derived from :the ballast resistance spacing.
In solvingthe aboveproblem, it was determined that if the length of the basefinger was controlled inrelationship to the ballasting resistancespacing, the two' IR drops may be made equal, and the benefits ofthe ballasting spacing maybe realized. However, a reduction in base finger length results in a commensurate reduction in emitter periphery, which is important in determining the current handling characteristics of the device. Thus, it would be desirable to :employ the ballasting resistance spacing between the emitter web and finger contact metals, and stillmaintain an optimum emitter periphery.
SUMMARY OF THE INVENTION A power transistor of the present invention comprises emitter, base, and collector regions of alternate conductivity types. having a PN junction between the emitterand the base regions, and between the base and collector regions. The emitter region has a central web portion, and fingers extending outwardly from the web portion, with a metal contact layer covering part of theemitter web portion. The base region includes base fingers interdigitated with the emitter fingers.
THE DRAWING The single FIGURE of the drawing is a plan view oft'h'e top surface of a transistor constructed in accordance 'with the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT A transistor 10 constructed in accordance with the present invention comprises a collector region (not shown) and a base region 12 adjacentthe collector region, with a PN junction therebetween. The base region 12 may either be an epitaxial layer grown on the collector region and of opposite conductivity type to the collector region, or it may be a pocket diffused into the collector region. The transistor 10 also includes an emitter region 14 which may be formed by diffusing impurities into the base region 12 so that the emitter region 14 is of a conductivity type opposite to the base region. The device may either be of NPN or PNP configuration.
Between the base region '12 and the emitter region 14 there is a PN junction 16 definingthe boundary between the two regions. The base region, where it surrounds the emitter region, comprises a web portion 18 and a plurality of fingers 20 extending outwardly from the web portion 18 and perpendicular thereto.
The emitter region 14 also includes a web portion 22 and fingers 24 which are interdigitated with the base fingers 20. The emitter web portion22 is partly covered with a metal contactlayer 26 which provides a low resistance feed-through for current entering the emitter region 14. Similarly, each emitter finger 24 is partially covered with a metal contact layer 28, which does not touch the junction 16.
The emitter finger contact layers 28 are separated from the emitter web portion metal layer 26 by a distance d." Thus, a definite resistance value is introduced in the current path between the web portion metal layer 26 and the finger metal layer 28, the magnitude of which depends upon the distance of separation d" and the sheet resistance of the emitter region 14.
Further, the emitter finger contact layer 28 is spaced from the PN junction 16 by a distance s," which introduces a resistance between the layer 28 and the junction. In order to maintain a uniform distance s between the junction 16 and each emitter finger contact layer 28, each contact layer has a proximal portion 30 which is substantially wider than the remainder of the contact layer, and is interspersed between the base finger 20 and the emitter web portion 22 to maintain a uniform distance s at all points.
The transistor 10 further includes a base region metal layer 32 having a web portion contact layer 34 and base finger contact layers 36.
While the proximal portion 30 of each emitter finger contact layer 28 is shown in the drawing as generally triangular in shape, it will be understood that the proximal portion 30 may have any tapered, rounded, or chamfered shape; the important consideration being that the distance s" between the emitter finger contact layer 28 and the emitter-base junction 16 is uniform at all points. The actual dimensions of the ballast resistance spacing d and the finger metal-to-junction distance S" is a design criteria; by way of example, the spacing d" may be 1.0 mil. and the distance 8" may be 2.0 mils.
The transistor 10 may be fabricated by methods well known in the art. The emitter and base contact layers may comprise a malleable metal, such as a tin-lead alloy or aluminum, or a refractory metal, such as tungsten; however, the tin-lead alloy is preferred.
By utilizing a portion of the emitter finger contact layer between the extremity of the base finger and the emitter web portion, the need for reducing the length of the base finger is avoided. Thus, the dimensions of the emitter periphery may be designed independent of ballast resistance considerations. Further, transistors constructed as described above have improved resistance to second breakdown; the devices can be operated safely at considerably higher voltages than previously known transistors of this same general type.
What we claim is:
1. A transistor comprising:
a. a semiconductor having a surface;
b. a first conductivity type collector region in the body;
c. a second conductivity type base region in the body adjacent the collector region with a base-collector junction therebetween, a portion of the base region extending to he surface;
d. an emitter region extending into the base region from the surface, with an emitter-base junction therebetween;
e. the emitter region comprising a central web portion and fingers extending outwardly from the web portion;
f. a metal web contact layer covering part of the emitter web portion;
g. the base region including base fingers interdigitated with the emitter fingers;
h. a metal contact layer on each emitter finger, each contact layer having a proximal portion adjacent to, but separated from, the emitter web contact finger so as to introduce a ballasting resistance therebetween; and
. means for providing a substantially uniform resistance between the metal web contact layer and each of the base fingers, the means comprising the proximal portion of each emitter finger contact layer being substantially wider than the remainder of the layer, so that the proximal portion is interspersed between the corresponding base finger and the web portion to maintain a uniform distance between the base finger and the emitter finger contact layer.
2. A transistor in accordance with claim 1, wherein the proximal portion of the emitter finger layer is substantially triangular in shape.
3. A transistor in accordance with claim 1, wherein the uniform distance between the base finger and the emitter finger layer is greater than the ballast resistance spacing between the proximal portion of the finger layer and the web portion metal layer.

Claims (3)

1. A transistor comprising: a. a semiconductor having a surface; b. a first conductivity type collector region in the body; c. a second conductivity type base region in the body adjacent the collector region with a base-collector junction therebetween, a portion of the base region extending to he surface; d. an emitter region extending into the base region from the surface, with an emitter-base junction therebetween; e. the emitter region comprising a central web portion and fingers extending outwardly from the web portion; f. a metal web contact layer covering part of the emitter web portion; g. the base region including base fingers interdigitated with the emitter fingers; h. a metal contact layer on each emitter finger, each contact layer having a proximal portion adjacent to, but separated from, the emitter web contact finger so as to introduce a ballasting resistance therebetween; and i. means for providing a substantially uniform resistance between the metal web contact layer and each of the base fingers, the means comprising the proximal portion of each emitter finger contact layer being substantially wider than the remainder of the layer, so that the proximal portion is interspersed between the corresponding base finger and the web portion to maintain a uniform distance between the base finger and the emitter finger contact layer.
2. A transistor in accordance with claim 1, wherein the proximal portion of the emitter finger layer is substantially triangular in shape.
3. A transistor in accordance with claim 1, wherein the uniform distance between the base finger and the emitter finger layer is greater than the ballast resistance spacing between the proximal portion of the finger layer and the web portion metal layer.
US886293A 1969-12-18 1969-12-18 Power transistor Expired - Lifetime US3600646A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88629369A 1969-12-18 1969-12-18

Publications (1)

Publication Number Publication Date
US3600646A true US3600646A (en) 1971-08-17

Family

ID=25388794

Family Applications (1)

Application Number Title Priority Date Filing Date
US886293A Expired - Lifetime US3600646A (en) 1969-12-18 1969-12-18 Power transistor

Country Status (6)

Country Link
US (1) US3600646A (en)
JP (1) JPS516510B1 (en)
BE (1) BE760420A (en)
DE (1) DE2062060C3 (en)
FR (1) FR2068825B1 (en)
GB (1) GB1283639A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893154A (en) * 1972-10-21 1975-07-01 Licentia Gmbh Semiconductor arrangement with current stabilizing resistance
US4586072A (en) * 1981-07-28 1986-04-29 Fujitsu Limited Bipolar transistor with meshed emitter
US5804867A (en) * 1996-10-02 1998-09-08 Ericsson Inc. Thermally balanced radio frequency power transistor
FR2831329A1 (en) * 2001-10-22 2003-04-25 Asb Inc BIPOLAR TRANSISTOR

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5929791A (en) * 1982-08-13 1984-02-17 Mitsubishi Electric Corp Scroll compressor
GB2175441B (en) * 1985-05-03 1989-05-10 Texas Instruments Ltd Power bipolar transistor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3358197A (en) * 1963-05-22 1967-12-12 Itt Semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3309585A (en) * 1963-11-29 1967-03-14 Westinghouse Electric Corp Junction transistor structure with interdigitated configuration having features to minimize localized heating
US3465214A (en) * 1967-03-23 1969-09-02 Mallory & Co Inc P R High-current integrated-circuit power transistor
US3609460A (en) * 1968-06-28 1971-09-28 Rca Corp Power transistor having ballasted emitter fingers interdigitated with base fingers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3358197A (en) * 1963-05-22 1967-12-12 Itt Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893154A (en) * 1972-10-21 1975-07-01 Licentia Gmbh Semiconductor arrangement with current stabilizing resistance
US4586072A (en) * 1981-07-28 1986-04-29 Fujitsu Limited Bipolar transistor with meshed emitter
US5804867A (en) * 1996-10-02 1998-09-08 Ericsson Inc. Thermally balanced radio frequency power transistor
FR2831329A1 (en) * 2001-10-22 2003-04-25 Asb Inc BIPOLAR TRANSISTOR
GB2385463A (en) * 2001-10-22 2003-08-20 Asb Inc Bipolar transistor

Also Published As

Publication number Publication date
DE2062060B2 (en) 1979-02-22
DE2062060C3 (en) 1979-10-25
DE2062060A1 (en) 1971-06-24
FR2068825A1 (en) 1971-09-03
JPS516510B1 (en) 1976-02-28
BE760420A (en) 1971-05-27
GB1283639A (en) 1972-08-02
FR2068825B1 (en) 1974-09-20

Similar Documents

Publication Publication Date Title
USRE26803E (en) Hioh frequency power transistor
US3358197A (en) Semiconductor device
US3740621A (en) Transistor employing variable resistance ballasting means dependent on the magnitude of the emitter current
US3609460A (en) Power transistor having ballasted emitter fingers interdigitated with base fingers
US3309585A (en) Junction transistor structure with interdigitated configuration having features to minimize localized heating
US3600646A (en) Power transistor
US3476992A (en) Geometry of shorted-cathode-emitter for low and high power thyristor
US3751726A (en) Semiconductor device employing darlington circuit
US3526815A (en) Controllable semi-conductor devices comprising main and auxiliary thyristors having all except one emitter-layer in common
JPS6362111B2 (en)
US3504239A (en) Transistor with distributed resistor between emitter lead and emitter region
US3325706A (en) Power transistor
GB1278442A (en) Semiconductor devices
US5073811A (en) Integratable power transistor with optimization of direct secondary breakdown phenomena
US4689655A (en) Semiconductor device having a bipolar transistor with emitter series resistances
US3755722A (en) Resistor isolation for double mesa transistors
JPH0738394B2 (en) Bipolar power transistor
US3337782A (en) Semiconductor controlled rectifier having a shorted emitter at a plurality of points
JPH0150115B2 (en)
US3510736A (en) Integrated circuit planar transistor
US3462656A (en) Semiconductor device with an emitter,base and collector region
GB1600638A (en) Semiconductor device
US3943548A (en) Semiconductor controlled rectifier
JP2622521B2 (en) Gate cut-off thyristor and manufacturing method thereof
US3736478A (en) Radio frequency transistor employing high and low-conductivity base grids