US3599163A - Circuit for performing multicharacter position advance - Google Patents

Abstract

A circuit for performing a multicharacter position advance at a remote terminal in response to the receipt of only two input characters. The detection of the first of the input characters sets a control device which is operative to store the following character in a buffer and to cause the following character to be counted down by one each time a character position at the remote terminal passes a write position. When the count in the buffer reaches a predetermined value, such as zero, the control device is reset, permitting the next character applied to the terminal to be written into the character position then being accessed.

Description

pnited States Patent [72] Inventor Stephen A.Grosky 3,286,237 11/1966 Kikuchi. 1 i 340/172 5 Monroe, Conn. 3,305,840 2/1967 Shih 140/1725 [211 App] NO 837,824 3,377,622 4/1968 Burch et a]. i i 340/1725 [22] Filed June 30, 1969 3,403,386 9/1968 Perkins et al. 340/1725 [45 Patented Aug. 10, 197] i n Primary ExammerPaul J. Henon {73] Assign :3 2 Assistant Examiner-Sydney R. Chirlin Allorney-Frederick M Arbuckle 154] CIRCUIT FOR PERFORMING MULTICH ARACTER POSITION ADVANCE 8 Chang, mud, n. A BSTRACT: A circuit for performing a multicharacterposition advance at a remote terminal in response to the receipt of I52] U.S.Cl 340/1715 only two input characters The detection of he first of the Cl 3/14 input characters sets a control device which is operative to 13/02 store the following character in a buffer and to cause the fol [50] Flldolsard' 340/1725? lowing character to be counted down by one each time a 235/157 character position at the remote terminal passes a write posi 56 R I (ed tion. When the count in the bufier reaches a predetermined I a "9" i value, such as zero, the control device is reset, permitting the UNITED STATES PATENTS next character applied to the terminal to be written into the 3,185,966 5/1965 Bennett et al 1 340/1725 character position then being accessed.

FIG. FIG. 2E? 60 so I 2A 29 (MR g 1 J CLOCK fi l4 no SUBTRACT ONE 42 CIRCUIT l CHAR I: CLOCRHALLWRITE CURSOR l hi so I Wm REG ISTER l w 28 36 26 v 722 1 l CHAR. j 46 CLOCK BUFFER zzno J 32 M DETECT AND SUB. CHARACTER GATE DETECT 34 AND I I 38 GATE 42 92 I .This invention relates to a circuit for performing a multicharacter position advance at a remote terminal and more particularly to a circuit which performs such a multicharacter position advance in response to the receipt of only two input characters. 7 I 1 One of-the major problems facingGovemment and Industry at this time is getting information to people who need. it. An increasingly popular way of solving this problem is to transmit desired infonnation from a central station to remote terminal devices where the information is either printed or displayed. There is generally a computer at the central station, which either transmits information directly to the remote terminal devices or supplies information to be manually transmitted. Frequently, the transmitted information is a form with information recorded in selected positionsandother positions left blank. The first transmission of sucha form may, for example, include tab information to assist in settingup hefor'mv at the remote terminal device for subsequently received information. I

Heretofore, when such form information has, been transmitted, it has been necessary totransmitacharacterrfor each character position of the printing or display device. Therefore, blank characters must be transmitted for positions'which are to be left blank. Where the rcceivedinformation isutilizeddirectly to control a printer or a displaydeviee such as a storage tube, these blank characters cause a carriage advance or character advance without any printingor display. In applications where the received information is stored, such as where the display device is a cathode-ray tube(CRT-.) which must be periodically refreshed, these. blank characters are stored in memory. However, particularlyin,suchzapplications as where a form isbeing set upand:theonlyinforrnation being transmitted is tab characters, muchof the transmission is the invention, the last means mentioned above is operative to write a cursor bit into the character position of a memory device. The next information character which is received at the tenninal device is then written into the character position of memory in which the cursor bit wasrecorded.

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.

In the drawings:

FIG. -1 is an illustration of a formof the type which may be displayed u ilizing this invention.

FlGS. 2A and 2B combine to form a block schematic diagram of a circuit utilizing the'teachings'of this invention.

FIG. 1 shows a display of the type which might be obtained with a system utilizing this invention. The display could, for example, be appearing on the screen of a CRT. in this instance, the display is of the inspection record of a particular part for a 4 month period. For purposes of illustration, assume that the inspection data startsin character position 3 of a line and endsin character position 8, thatinformation as to repairs starts in character position 30 ordinarily and runs through character position 80, and'that an 'O.K. inspection result is displayed, starting in character position 10. Therefore, on the firstinformation line of the display of FIG. 1, the character position between character position 7 and character position 70, or in other words 62 character positions are blank. On the third information line, no date is provided and the first 29 character positions ofthe line are blank. it is therefore apparent that substantial transmission 1 bandwidth would be wasted, in the fonnofFlG. 1, if blank characters had to be transmitted; The circuit of FIGS. 2A and 28 illustrates anotherwayin whichafor'm of this type may be set up. This circuitcouldbe utilized each time an inspection record is transmitted, or could be used onlyto set-up tab markers for blank characters. It is apparentuthatwthis procedureis extremely wasteful of transmissionzbandwidth. Therequired, transmission bandwidth, and therefore theline cost, couldbes'ubstanti ally reduced if, instead of transmittingblank-characters, only information characters are transmittedalong with'instructions. to the terminal device as to the number of characters to be skipped between information characters. Such. instructions should, of course, require the transmission of as few characters as possible.

It is, therefore, a primary object of thisinvention .l0'plOVld an improved circuit forperforming a multicharacter position advance at a remote terminal.

A more specific subject of Il'llSriIlVGlillOll is to provide a multiposition character advance circuit which is capable. of .performing the character .advance in-response to thereceipt of only two input characters at the remotetenninal.

In accordance with these-objects. th'u, invent'nn provides-a circuit for performing a multicharacter positiontadvance .in the writing of information characters .at .a terrninaldevice which is located remote from theinformation character source. A buffer-means is provided at theremote terminal device for receiving the character information.- A control means is set in response to'the detection of a predetermined .information character in the buffer means and the setting of the control means is utilized to enablea means for preventing the information character following the predetermined character from being read out of the bufler meat The setting of the control means also causes one to be subtracted from the value stored in-the buffer means each time .a character position of the terminal device passes the position in which it may be written into. when the valuein the buffer means is. reduced to apredetermined value, such as zero, the control means is reset and a means enabled for permitting the second information character following said predetermined character to be written into the character position of the terminal devke then in a position to be written into. In a preferred embodiment of the form in, for'example, characterpositions 3, 30 and 10 of each line.

Forpurposes of the following discussion it will be assumed that theinformationtransmitted is stored in a recirculating memory 10 (FIG. 2B) such'as a'delay line, disc, or drum, and that .the characters stored in memory device 10 are applied through line-l2 to control the display on a display device 14 such as a cathode-ray tube (CRT). With a CRT or similar display device, the contents of memory .10 are periodically applied torefresh the display. The Bunker-RamoSeries 2200 infonnations display system are systems'of this type using delay lines as the memory devices. I

New information is applied to the system through line 16 (FIG. 2A). Line 16 is the information input to gate 18', the conditioning input to whichis ZERO-side-output line 20 from Buffer-Full flip-flop-22. Assuming that this flip-flop is initially in its ZERO state, gate l8is conditioned to pass a received input ch'aracterthrough line 24,0R gate 26, and line 28 to be stored in chartersbuffer register 30. The contents of buffer register '30 are continuously monitored by buffer-*zero-detect AND gate 32,.and 8118" character detect AND gate 34. The "SUB" character is a special character the function of which will be described shortly. Theinputs to AND gates 32 and 34 are selected ones ofthe buffer register output lines 36. When a characterhas been loaded into buffer 30,gate 32 no longer generates an output on 'line 38. This permits inverter 40 to generate anoutput on line 42 which is applied as one input to AND gate 44. During the first bit time of each character read from memory 10, the memory generates a character clock on line .This clock signal is applied to fully condition AND gate 44 to generate an output on line 48 which is applied to set Buffer-Full flip-flop 22 to its ONE state.

The first bit position of each character in memory 10 is a cursor bit position. This bit position is marked if the cor-.

cursor-detect output line 50 from memory 10. This signal is applied to set cursor flip-flop 52 to its ONE state and is also applied as one input to AND gate 54. The other input to AND gate 54 is output line 56 from OR gate 58. The inputs to OR gate 58 are ONE-side input line 48 to Buffer-Full flip-flop 22 and ONE-side output line 60 from this flip-flop. Therefore, when a cursor is detected in memory and Buffer-Full flipflop 22 is' either set or being set, AND gate 54 is fully conditioned to generate an output signal on line 62 which signal is efl'ective to cause the erasure of the cursor bit.

ONE-side output line 64 from cursor flip-flop $2 is connected as one input to AND gate 66. ONE-side output line 60 from Buffer-Full flip-flop 52 is a second input to AND gate 66. The final two inputs to AND gate 66 are ZERO-side output line 68 from flip-flop 70 and ZERO-side output line 72 from flip-flop 74. The functions of flip- flops 70 and 74 will be described shortly. For the present it is sufi'icient to say that both of these flip-flops are in their ZEROstate for normally received characters. Therefore, if there is a character in buffer-register 30, causing Buffer-Full flip-flop 22 to be in its ONE state, the first time that a cursor bit is detected thereafter, this cursor bit is erased and AND gate 66 is fully conditioned to generate an .output signal on line 76 which is applied to condition gate 78 to pass the character in buffer 30 throughbuffer output line 80, conditioned gate 78, and line 82 to be stored in memory 10.

During the first bit time of the next character, a character clock again appears on line 46. This clock is applied as one input to AND gate 84. The signals on ONE-side output line 60 from Buffer-Full flip-flop 22 and ZERO-side output line 72 from flip-flop 74 fully condition this AND gate to generate an output on line 86 which output is applied to memory 10 to cause a cursor bit to be recorded in this next'character'position, and to the ZERO-side input of Buffer-Fullc8 flip-flop 22 to reset this flip-flop. The circuit is thus conditioned for the receipt of the next character.

When the form being transmitted over line 16 requires a multiposition' character advance, the transmitting source sends two characters over the line. The first character is a special character which will be called the 'SUB character. This character is followed by a binary coded numeric character which represents the number of character positions to be advanced. The presence of the SUBf character in buffer-register 30 is detected by SUB" characterrdetect AND gate 34. It should be noted that this gate is fully conditioned only when a character clock appears on line 46. Output line 92 from gate 34 is connected as the ONE-side input to flip-flop 70.

At the same character clock time that flip-flop 70 is being set to its ONE state, the signal on line 46 is also filly conditioning AND gate 84 to generate an output signal on line 86 which causes the cursor to be written in the next memory position, the memory position in which the character now stored in buffer 30 would normally be recorded. This signal also resets Bufier-Full flip-flop 22 to its ZERO state. Flip-flop 22 being in its ZERO state permits gate 18 to pass the numeric character now on line 16 into buffer 30. However, since flip-flop 70 is now in its ONE state, there is no signal on ZERO-side output line 68 and AND gate 66 is therefore deconditioned. This deconditions gate 78 preventing the special SUB" character from being stored in memory l0.

When the cursor bit on line 50 is again detected, a signal is g applied through line 50 to one input of ANDgate 94. The other input to this AND gate is ONE-side output line 96 from flip-flop 70. AND gate 94 is thus fully conditioned to generate an output on line 98 which is applied to set flip-flop 74 to its ONE state and to reset flip-flop 70 to its ZERO state. The signal on line 50 is also applied. to fully condition AND gate 54 to cause the erasure of the detected cursor.

Ordinarily, at the next clock time, AND gate 84 would be fully conditioned to write the cursor in the next character position of the memory. However, one input to AND gate 84 is ZERO-side output line 72 from flip-flop 74. Therefore, the setting of flip-flop 74 to its ONE state inhibits the writing of the cursor in memory 10. Likewise, the deconditioning of AND gate 84 also prevents Buffer-Full flip-flop 42 from being reset thus preventing new data from being read into buffer 30. Finally. the terminating of signal on line 72 deconditions AND a gate 66, preventing the contents of buffer 30 from being read into memory 10. The numeric value character is thus retained in buffer 30. I

ONE-side output line 100 from flip-flop 74 is connected as one input to AND gate 102. Bit clocks from memory 10 are the other inputs to this" AND gate. Thus, AND gate 102 generates an output eachbit time when flip-flop 74 is in its ONE state. These outputs on line 104 are applied to condition gate 106 to pass successive bits from register 30 on line through line 110 to subtract-one circuit 112. Output line 114 from circuit 112 is connected through OR gate 26 and line 28 to the input of buffer 30. Thus, when flip-flop 74 is in its ONE state, the quantity in bufier 30 is cycled through subtract-one circuit 1 12 once for each character time of memory device 10. Thus, the count in: buffer register 30 is decremented by one for each character time. If a parallel rather than a serial subtract circuit 112 is utilized, then gate 106 would be conditioned only at character clock time to cause the value in buffer 30 to be decremented by one. When, at the end of acharacter time, this count reaches ZERO, AND gate 32 is fully conditioned to generate an output on line 38 which is applied to reset flip-flop 74 to its ZERO state. At the beginning of the next character time, a signal again appears on line 72, fully conditioning AND gate 84 to generate an output on line 86 which writes the cursor bit into this next character position and also resets Bufi'er-Full flip-flop 22 to its ZERO state permitting the circuit to accept a new data input. I

The effect of the above-described operation is to erase the cursor from the character position following the last character position in which information was written and to rewrite the cursor in a character position which is advanced from this character position by an amount equal to the value originally read into buffer-register 30. The desired multiposition character advance is in this manner achieved The total number of character positions which may be skipped utilizing the technique of this invention is dependent on the number of bit positions in the characters utilized. For example, if six-bit characters are utilized, an advance of up to 64 characters may be achieved utilizing only two characters. Seven bit characterswill permit an advance of up to I28 positions. However, the invention results in significant sayings in required transmission bits even if the skip capacity of a single character is exceeded. For example, if it is desired, with six bit characters, to advance the cursor by character positions, this would require the transmitting of 90 blank characters using existing techniques. The same advance can be achieved using four characterswith the techniques of this invention. This is a reduction of better than 20 to l.

While the above discussion has been with reference to the generating of a display on a CRT or similar device, it is apparent that the output from memory 10 could also be used to control a printer or similar device. It is also apparent that, with a printer, if line and printer speeds are compatible, memory device 10 could be dispensed with and the output from buffer 30 applied directly to control the print operation. Other possible modifications and substitutions have been previously mentioned. Thus, while the invention has been particularly shown and described with reference to a preferred embodiment thereof, it will be understood by those skilled in the art that the foregoing and other changes in fonn and details may be made therein without departing from the spirit and scope of this invention.

What I claim is:

1. A circuit for performing a multicharacter position advance in the'writing of information characters at a terminal device which is located remote from the information character source comprising; a

buffer means at said terminal device for receiving said character information; a control means;

means responsive to the detection of a predetermined information character in said buffer means for setting said control means;

first means responsive to the setting of said control means for preventing the information character following said predetermined character from being read out of said buffer means;

. means for writing into successive character positions of said terminal device; second means responsive to the setting of said control means for subtracting one from the value in said butfer means as said writing means passes each successive character position; and

means responsive to the value in said buffer means being reduced to a predetermined value for resetting said control means and for permitting the second information character following said predetermined character to be written into the character position of said terminal device then being accessed by said writing means.

2. A circuit of the type described in claim 1 wherein said predetermined value is zero.

3. A circuit of the type described in claim 1 wherein said terminal device includes a memory means having a plurality of individually accessible character positions, said memory means having a cursor recorded in the next character position in which information is to be written; and including means for erasing said cursor when said control means is set; and

means, included as part of said means for permitting an information character to be written, for writing the cursor in the character position of said memory means then being accessed.

4. A circuit of the type described in claim 3 wherein said subtracting means is inhibited until the cursor is detected and erased.

5. A circuit for permitting the write cursor in a cyclically accessed memory device to be advanced a plurality of character positions in response to the receipt of only two input characters comprising:

bufier means for receiving said input characters;

a control means;

means responsive to the detection of a predetermined character in said bufler means for setting said control means;

first means responsive to the setting of said control means for preventing the input character following said predetermined character from being read out of said bufi'er means;

means for indicating the presence of said cursor in the position being accessed in said memory device;

second means responsive to the setting of said control means for subtracting one from the value in said buffer means for each character position of said memory device which is accessed following an output from said cursor presence indicating means; and

means responsive to the value in said buffer means going to a predetermined value for rewriting said cursor in said memory device.

6 A circuit of the type described in claim 5 wherein said predetermined value is zero.

7. A circuit of the type described in claim 5 including a display device; and

wherein the characters stored in said memory device are utilized to control the display on said display device.

8. A circuit of the type described in claim 5 including means operative when said control means is set for erasing said cursor and for preventing it from being rewritten.

Claims (8)

1. A circuit for performing a multicharacter position advance in the writing of information characters at a terminal device which is located remote from the information character source comprising; buffer means at said terminal device for receiving said character information; a control means; means responsive to the detection of a predetermined information character in said buffer means for setting said control means; first means responsive to the setting of said control means for preventing the information character following said predetermined character from being read out of said buffer means; means for writing into successive character positions of said terminal device; second means responsive to the setting of said control means for subtracting one from the value in said buffer means as said writing means passes each successive character position; and means responsive to the value in said buffer means being reduced to a predetermined value for resetting said control means and for permitting the second information character following said predetermined character to be written into the character position of said terminal device then being accessed by said writing means.

2. A circuit of the type described in claim 1 wherein said predetermined value is zero.

3. A circuit of the type described in claim 1 wherein said terminal device includes a memory means having a plurality of individually accessible character positions, said memory means having a cursor recorded in the next character position in which information is to be written; and including means for erasing said cursor when said control means is set; and means, included as part of said means for permitting an information character to be written, for writing the cursor in the character poSition of said memory means then being accessed.

4. A circuit of the type described in claim 3 wherein said subtracting means is inhibited until the cursor is detected and erased.

5. A circuit for permitting the write cursor in a cyclically accessed memory device to be advanced a plurality of character positions in response to the receipt of only two input characters comprising: buffer means for receiving said input characters; a control means; means responsive to the detection of a predetermined character in said buffer means for setting said control means; first means responsive to the setting of said control means for preventing the input character following said predetermined character from being read out of said buffer means; means for indicating the presence of said cursor in the position being accessed in said memory device; second means responsive to the setting of said control means for subtracting one from the value in said buffer means for each character position of said memory device which is accessed following an output from said cursor presence indicating means; and means responsive to the value in said buffer means going to a predetermined value for rewriting said cursor in said memory device.

6. A circuit of the type described in claim 5 wherein said predetermined value is zero.

7. A circuit of the type described in claim 5 including a display device; and wherein the characters stored in said memory device are utilized to control the display on said display device.

8. A circuit of the type described in claim 5 including means operative when said control means is set for erasing said cursor and for preventing it from being rewritten.

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