US3594561A - Decimal data-handling equipment - Google Patents

Decimal data-handling equipment Download PDF

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US3594561A
US3594561A US773089A US3594561DA US3594561A US 3594561 A US3594561 A US 3594561A US 773089 A US773089 A US 773089A US 3594561D A US3594561D A US 3594561DA US 3594561 A US3594561 A US 3594561A
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digit
input
decade
carry
signal
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US773089A
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Arthur L Whitwell
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4912—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/49195—Using pure decimal representation, e.g. 10-valued voltage signal, 1-out-of-10 code

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  • This invention relates to decimaL-data-handling equipment, and more particularly to arrangements for shifting the value of a decimal number, for example by adding to it another decimal number of fixed but arbitrary value.
  • this means may comprise an arrangement for adding together two decimal numbers.
  • an arrangement for addingtogether two n-digit decimal numbers comprises:
  • first-means to add one to the input digit to. the decade if a digit and a further series of planes wired so as to cooperate with associated logic elements to generate a carry signal when required.
  • the means of comparing positional information with information relating to a reference position may comprise an arrangement for subtracting one decimal number from another.
  • an arrangement for subtracting one n-digit decimal number from another comprises:
  • the second means to shift the input digit (after the addition of the carry if any) to a value equal to the least significant digit of the number obtained by summing the input digit (after the addition of the carry if any) and the digit to be added, the second means comprising IO-condition switch means, the t0 conditions corresponding respectively to digits in the range 0 to 9 to be added, 7
  • fourth means to generate a carry signal for the second succeeding decade when a carry signal is being generated for the immediately succeeding decade and the input digit to said immediately succeeding decade is 9.
  • said switch means is a multiplane switch having a first series of planes wired to perform said shift of the input BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a table referred to in explaining the operation of the first arrangement.
  • FIG. 2 shows schematically a logic arrangement forming .part of the first arrangement
  • FIGS. 3 and 4 show schematically logic arrangements referred to in explaining the operation of the first arrangement
  • FIG. 5 shows part of the first arrangement schematically
  • FIG. 6 is a simplified schematic version of FIG. 5.
  • FIG. 7 shows the first arrangement in simplified schematic form
  • FIG. 8 shows a modified version of part of the first arrangement and a series of truth tables
  • FIG. 9 shows a further modification of part of the arrangement
  • FIG. 10 is a table referred to in explaining the operation of the second arrangement
  • FIG. 11 shows schematically a logic arrangement forming part of the second arrangement
  • FIGS. 12 and 13 show schematically logic arrangements referred to in explaining the operation of the second arrangement
  • FIG. 14 shows part of the second arrangement schematically.
  • the first arrangement is particularly, but by no means exclusively, suitable for use in an absolute system of measurement for angular or linear displacement using decimal notation.
  • an absolute system of measurement for angular or linear displacement using decimal notation As mentioned above, in such systems it is frequently necessary to have some means of comparing present positional information with information relating to a reference position, and this is conveniently done by the arrangement to be described.
  • N may be represented by a set of 10 outputs of a register or decoder, the outputs being numbered to 9.
  • Decoder outputs I The approach to summing N, and N x is as follows.
  • the least significant digit (n OF N can have any value in the range 0 to 9 and as a result of the addition of the least significant digit of N, may be required to be reset to any other value in this range; all possible combinations being illustrated by the table of FIG. 1.
  • the least significant digit in the required output will vary through the sequence 0 to 9, the changeover 9 to 0 stepping back progressively as the number shift is increased.
  • a carry of l to the next higher decade, that is to the digit represented by N is necessary for all the resultants below the diagonal line in the table.
  • n, and n Let the individual digits of N, and N, be referred to generally as n, and n,. A carry is required for all n,+n, 9, which may be expressed:
  • the required summation may therefore be regarded as a shift (by a value equal to the appropriate digit of N in each of the digits of N, plus provision for making carries as necessary.
  • Three of the requirements for the arrangement are therefore:
  • a method of achieving stepwise rotation of the connections inputs this being achieved in the arrangement to be described by providing a lO-pole IO-condition digit shift (some combinations) l) bined in an OR-gate 20, the output of which is connected to a two-input AND-gate 21. Inputs corresponding to an added shift digit of 5, 6, 7, 8 or 9 are supplied to another AND-gate 22 the output of which is connected to the other input of the gate 21. It will be seen that any combination of input signals to the gates 20 and 22 will result in the gate 21 supplying a signal to the carry line 14 (FIG. 2) of the next decade as required by expression 2).
  • the arrangement comprises a four-input OR-gate 30, a three-input QR-gate 3l and a two-input OR-gate 32, the output of the gates'30to 32 being connected to one input of each of three two-input ANDgates 33 to 35 respectively.
  • the output of gates 33 to 35 together with the output of a further two-input AND-gate 36 are connected to the carry line 14 (FIG. 2).
  • a signal corresponding to an added shift digit 6 is supplied to the gate 30, signals corresponding to an added shift digit 7 are supplied to the gates 30 and 31, signals corresponding to an added shift digit 8 are supplied to the gates 30 to 32 and signals corresponding to an added shift digit 9 are supplied to the gates 30 to 32 and 36.
  • the other inputs of gates 33 to 36 are connected to the inputs of the digit shift switch corresponding to digits 1 to 4 respectively. This arrangement results in a signal to the carry line 14 (FIG. 2), whenever the required combination of input signals is present, for example, if 3 and 8 are present simultaneously, the gate 34 will supply the output.
  • FIG. 5 shows that part of the complete arrangement which deals with one decade. Provision for adding the carries is made in the way described above with reference to FIG. 2.
  • terminal 10 corresponding to input digit 0 is connected to AND-gates l1 and 12, the other inputs of which are connected to a no carry line 13 and a carry line 14 respectively.
  • Further similar pairs of AND-gates are provided for each of the other inputs from the decoder I corresponding to digits 1 to 9.
  • Logic for determining the need for and creating a carry signal to the next decade when required 3. Means for adding the carry 1 to the absolute digit represented by the input to any decade, except the decade corresponding to the least significant digit in N,
  • FIG. 2 shows the way in which the carry is added.
  • Each of the inputs for example the input tenninal 10 corresponding to digit 0, is connected to a pair of two-input AND-gates 11 and 12.
  • the other inputs of the gates 11 and 12 are connected to a no carry line 13 and a carry line 14 respectively, the lines 13 and 14 being connected in a manner to be described later to the preceding decade.
  • the output of the gage 11 is connected to a terminal 15 which forms the digit 0 input terminal for the lO-condition switch, and the output of the gate 12 is connected to the terminal 16 which forms the digit 1 input terminal for the IO-condition switch.
  • FIG. 3 shows a logic arrangement for providing a carry signal for the which forms the digit 1 input terminal for the switch 40.
  • the switch 40 has in fact got 15 planes, the first to 10th of which are used to perform the basic digit shift operation. Associated with these 10 planes are a group of 10 movable contacts 41 which are ganged together so that they can be positioned to contact the terminals corresponding to any one of the 10 digit input terminals. It will be seen that if the contacts 41 are brought to the position corresponding to the digit 1 input terminal 16, then the digits corresponding to the signals derived from the gates ll, 12 etc., will be shifted by 1 prior to being supplied to the output. Other shifts are achieved by appropriate settings of the contacts 41.
  • the method of deriving the carry signal to be supplied to the succeeding decade is similar in principle to that described above with reference to FlGS. 3 and 4, but is in fact achieved by the addition of a further 5 planes to the switch 40.
  • the l lth to 14th planes are wired such that connections extend from the outputs of the 16 AND-gates corresponding to digits 1 to 4 and 6 to 9 to terminals in these planes as shown.
  • Signals corresponding to digits 5 to 9 are also supplied to an OR-gate 42, the output of which is connected to terminals in the 15th plane as shown.
  • movable contacts 43 which are ganged to the movable contacts 41.
  • the contacts 43 will be moved to appropriate positions, and there are set up paths which correspond in function to the logic arrangements described above with reference to FIGS. 3 and 4, these paths operating so that when there is an appropriate combination of digits, such as to require a carry to the next decade, a signal is supplied to one input of the two-input OR-gate 44.
  • the paths from the con tacts 43 associated with the I 1th to 14th planes include diodes 45 so as to avoid short-circuiting the input lines.
  • the presence of an output from the gate 44 signifies the need for a carry to be supplied to the next decade.
  • the output of the gate 44 is therefore supplied, by way of a transistor inverting or buffer amplifier 46, 47, to the no carry or carry line 13 or 14 of the next decade.
  • FIG. 5 That part of the arrangement shown in FIG. 5 is shown in very much simplified schematic form in FIG. 6; incoming carry signals appearing at the right-hand side and outgoing carry signals to the next succeeding decade appearing at the left-hand side.
  • FIG. 7 This same schematic arrangement is used in FIG. 7 to which reference is now made and which shows the complete arrangement.
  • S S S and S are standard digit shift switches in accordance with FIG. 5, whilst S (for N the most significant digit) does not require the output circuits and S (for N the least significant digit) does not require the input carry circuits so the input AND-gates are omitted.
  • This signal is therefore derived externally by an AND-gate 50, which generates a carry to the decade corresponding to N, only when there is a carry out of the decade corresponding to N together with a signal on the zero input line to the shift switch in the decade corresponding to N (after the preceding carry).
  • FIG. 9, to which reference is now made, shows a suitable circuit.
  • the position of the five ganged switches 61 (which can conveniently be solid-state switches such as diode gates) is determined by whether or not there is a carry from the preceding decade. The positions shown correspond to the case where a carry is present.
  • the inverter 62 is provided, but it is to be noted that although this additional inverter 62 is required, the number of AND-gates required for implementing the carry is only 10, as compared with 20 in the previously described arrangement.
  • a similar method of deriving a carry signal may also be used when the digit shift is carried out on a decoded decimal output.
  • the multiplane switches may use reed relay contacts which are capable of being switched into the 10 required conditions, one advantage of this being the ease with which the switch arrangement can be controlled from a distance.
  • the second arrangement will now be described.
  • the main difference as compared with the first arrangement is that the second arrangement operates to subtract one number from another; the general principle of the operation is however the same.
  • the first arrangement it is particularly, but by no means exclusively, suitable for use in an absolute system of measurement for angular or linear displacement using decimal notation.
  • FIG. 10 which corresponds to FIG. 1.
  • a negative carry is required for all resultants below the diagonal line.
  • Each of the inputs for example the input terminal 70 corresponding to digit 1, is connected to a pair of two-input AND-gates 71 and 72.
  • the other inputs of the gates 71 and 72 are connected to a no carry line 73 and a carry line 74 respectively, the lines 73 and 74 being connected to the preceding decade.
  • the output of the gate 71 is connected to a tenninal 75 which forms the digit 0 input terminal for the IO-condition switch
  • the output of the gate 72 is connected to the terminal 76 which forms the digit 1 input terminal for the lO-condition switch.
  • FIGS. 12 and 13 show logic arrangements for providing carry signals for the cases covered by expressions (4) and (5) above. An arrangement similar to that shown in FIG. 13 is required for the cases covered by expression (6) above. All these arrangements are generally similar in form and operation to those described above with reference to F lGS. 3 and 4 and will not therefore be described further here.
  • FIG. 14 shows that part of the second arrangement which deals with one decade.
  • the form and operation is closely similar to the corresponding part of the first arrangement described above with reference to FIG. 5 and it will not therefore be described in detail except in one respect.
  • This relates to the means for implementing jump carries.
  • An arrangement for adding together two n-digit decimal numbers comprising:
  • the second means to shift the input digit (after the addition of the carry ifany) to a value equal to the least significant digit of the number obtained by summing the input digit (after the addition of the carry if any) and the digit to be added, the second means comprising a lO-condition multiplane switch means, the 10 conditions of the switch means corresponding respectively to digits in the range 0 to 9 to be added, and the switch means having a first plurality of planes wired to perform said shift of the input digit and a second plurality of planes wired so as to cooperate with associated logic means to generate a carry signal for the immediately succeeding decade when said addition or shift makes such a carry necessary, the wiring of said second plurality of planes and said cooperation with said logic means being such that the values of the input digit (after the addition of the carry if any) and of the digit to be added are tested to determine whether said values satisfy any one of a plurality of different conditions, which conditions, which conditions together define all of the combinations of said values for which
  • said first means comprises two two-input AND-gates for each input digit; and for each input digit, means to supply input signals to one of the inputs of each of the two gates appropriate to that input digit when the input digit is present, means to supply an input signal to the other input of one said gate when no carry signal is being supplied from the immediately preceding decade whereby said gate supplies an output signal corresponding to said input digit, and means to supply an input signal to the other input of the other said gate when a carry signal is being supplied from the immediately preceding decade whereby the other said gate supplies an output signal corresponding to the digit next above said input digit.
  • said switch means is a, 15-plane, mechanically operated switch, having one movable contact per plane these 15 contacts being ganged together.
  • each digit of said decimal number is represented by two signals out of a possible five being in one or other of two conditions.
  • said first means comprises five-way two-condition switch means, the condition of which is determined by the presence or absence of a carry signal from the preceding decade, and means to invert the condition of one of the input signals.
  • An arrangement for subtracting one n-digit decimal number from another comprising:
  • said first means comprises two two-input AND-gates for each input digit; and for each input digit, means to supply input signals to one of the inputs of each of the two gates appropriate to that input digit when that input digit is present, means to supply an input signal to the other input of one said gate when no borrow signal is being supplied from the immediately preceding decade whereby said gate supplies an output signal corresponding to said input digit, and means to supply an input signal to the other input of the other said gate when a borrow signal is being supplied from the immediately preceding decade whereby the other said gate supplies an output signal corresponding to the digit next below said input digit.
  • each digit of said decimal number is represented by two signals out I of a possible five being in one or other of two conditions.
  • said first means comprises five-way two-condition switch means, the condition of which is determined by the presence or absence of a carry signal from the preceding decade, and means to invert the condition of one of the input signals.

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US773089A 1967-11-07 1968-11-04 Decimal data-handling equipment Expired - Lifetime US3594561A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5181186A (en) * 1988-04-13 1993-01-19 Al Ofi Moatad S TPC computers

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3086707A (en) * 1961-05-05 1963-04-23 James W Harford Add-subtract counter
US3305673A (en) * 1963-01-15 1967-02-21 Gen Electric Optoelectronic computational devices
US3328567A (en) * 1964-04-15 1967-06-27 Hitachi Ltd Digital adding and subtracting device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3086707A (en) * 1961-05-05 1963-04-23 James W Harford Add-subtract counter
US3305673A (en) * 1963-01-15 1967-02-21 Gen Electric Optoelectronic computational devices
US3328567A (en) * 1964-04-15 1967-06-27 Hitachi Ltd Digital adding and subtracting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5181186A (en) * 1988-04-13 1993-01-19 Al Ofi Moatad S TPC computers

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