US3584928A - Solid state display device - Google Patents

Abstract

Light emitting p-n junctions are formed by depositing p-type Cu2S along a sample of n-type CdS, the latter having an anode and a cathode and a third terminal adjacent to the cathode. A DC bias voltage is connected in series with a digital-modulating signal and placed across the anode and the cathode of the CdS crystal. A positive trigger pulse, synchronized with the modulating signal, is applied to the third terminal and serves to nucleate an acoustic domain which propagates from cathode to anode. The voltage across the propagating domain is controlled by the digital-modulating signal applied to the device, and as the domain passes under a p-n junction light is emitted by the junction if at that instant the voltage across the domain exceeds a given threshold. Suitable light sensitive storage apparatus may be placed adjacent to each junction thereby permitting rapid storage of the digital signal.

Description

United States Patent [72] Inventor Richard B. Robrock, l1

Matawan Township, Monmouth County, NJ. [21] Appl. No. 838,179 [22] Filed July 1,1969 [45] Patented June 15, 1971 [73] Assignee Bell Telephone Laboratories, Incorporated Murray Hill, NJ.

[54] SOLID STATE DISPLAY DEVICE 2 Claims, 2 Drawing Figs.

[52] U.S.Cl. 315/169, 313/108, 317/234, 340/173 [51] Int. Cl 1105b 37/00 [50] Field ofSearch 313/108 D; v 3l5/169;317/234;331/107G [56] References Cited UNITED STATES PATENTS 3,447,044 5/1969 Sandbank et al. 313/108 X OTHER REFERENCES Solid-state Acoustoelectric Light Scanner by Basil W. l-lakki, Applied Physics Letters Vol. 11, No. 5, 1 September 1967,pp. 153- 155. Class3l3- 108 Primary ExaminerRaymond F. Hossfeld Attorneys-R. J. Guenther and E. W. Adams, Jr.

ABSTRACT: Light emitting p-n junctions are formed by depositing p-type Cu S along a sample of n-type CdS, the latter having an anode and a cathode and a third terminal adjacent to the cathode. A DC bias voltage is connected in series with a digital-modulating signal and placed across the anode and the cathode of the CdS crystal. A positive trigger pulse, synchronized with the modulating signal, is applied to the third terminal and serves to nucleate an acoustic domain which propagates from cathode to anode. The voltage across the propagating domain is controlled by the digital-modulating signal applied to the device, and as the domain passes under a p-n junction light is emitted by the junction if at that instant the voltage across the domain exceeds a given threshold. Suitable light sensitive storage apparatus may be placed adjacent to each junction thereby permitting rapid storage of the digital signal.

7 Q20 i le IM 'A iGIB L19 2 n-CdS PATENIED JUNI 51971 221 SOURCE TRIGGER PULSES SYNGH. CIRCUIT INFORMATION SIGNAL INVENTOR R. B. ROBROCK .ZZ'

A TTOPNF Y SOLID STATE DISPLAY DEVICE BACKGROUND OF THE INVENTION This invention relates to circuit arrangements which employ as the active device a bulk semiconductor body which exhibits the phenomenon of domain nucleation and propagation. The mechanism for this observed phenomenon is believed to result from the carriers in such materials exhibiting negative incremental mobility over a range of applied electric field. The source of this negative incremental mobility is vastly different from one material to the next. In gold-doped germanium it may be attributed to a field dependent trapping effect, in CdS to phononelectron interaction, while in GaAs, InP, CdTe, ZnSe and others, it is believed to be the result of an intervalley scattering mechanism. The basic theory of these devices is set forth in a series of papers in the Jan. 1969 IEEE Transactions on Electron Devices, Volume ED-l3, No. l, and Sept. 1967, IEEE Transactions on Electron Devices, Volume ED-l4, No. 9.

As set forth in the papers mentioned above, when an increasing voltage is applied to opposite ends ofa suitable sample of a bulk semiconductor, such as n-type gallium arsenide, the average current in the sample increases almost lincarly with voltage until a critical value is reached at which point the current drops sharply to a fraction of its maximum value. Above this critical voltage the average current in the sample remains essentially constant. In addition, in this range of reduced current the instantaneous waveform is found to contain coherent oscillations at a frequency related to the sample length. The critical voltage at which the drop in current in the sample takes place and at which oscillations are initiated is termed the threshold voltage, V

Present theory holds that these oscillations result from the nucleation of domains in a region near the negative electrode (cathode) and the propagation of these domains towards the positive electrode (anode). Following the nucleation phase, a domain grows to a stable shape and continues to drift towards the positive electrode even if the applied voltage is lowered; as long as this voltage remains above a minimum value which is termed the domain sustaining voltage, V,, If the applied voltage exceeds a value known as the oscillation sustaining voltage, V then the arrival of a domain at the anode results in the nucleation ofa new domain near the cathode, and the continued nucleation, propagation and dissolution of a domain produces coherent oscillations in the current waveform. On the other hand, if the applied voltage is less than V,, but greater that V,, then the dissolution of a domain at the anode returns the device to its original ohmic states.

It has been found that in addition to initiating domain nucleation by means ofa voltage applied across the anode and cathode of a'bulk device, it is also possible to cause domain nucleation through the application of a positive potential or trigger pulseto a third terminal of the device, physically located between the anode and the cathode. This third terminal may be a simple ohmic contact in which metal is physically bonded to the semiconductor structure or it may be a capacitive contact wherein the metallization is isolated from the semiconductor by an insulating layer. In this latter type of contact the signals applied to the third input terminal are inherently capacitively coupled to the semiconductor device. It has been found that, regardless of the type of bonding employed in the third terminal, relatively low voltages are required at such a terminal to initiate domain nucleation even where the voltage between the anode and the cathode is substantially below the threshold voltage, V The apparent reason for this phenomenon is that a voltage applied to the third terminal need only increase the electric field over threshold in the region between this terminal and the cathode.

One of the more interesting phenomenon relating to solid state devices is that certain p-n junctions will emit light during a period of reverse breakdown.

It is an object of this invention to combine the properties of bulk semiconductor devices with the light emitting properties of the p-n junction to provide a solid state display device.

One of the more important obstacles to increasing the speed of computer circuitry is the need for improved apparatus to store information within the computer. This problem of storage is essentially a two-part problem. The first aspect of the problem is the necessity for obtaining apparatus which is capable of storing information at a relatively rapid rate and from which information may be retrieved at a rapid rate. The second part of this problem is providing apparatus capable of taking bits of data information and applying it to the storage apparatus in a manner acceptable to the apparatus.

In recent years there have been developed various types of storage apparatus capable of operating at extremely high speeds and which receive bits of data information in optical or like form. This storage apparatus however has not found wide use in the art because of the difficulty of taking the data information to be stored and converting it into an optical signal which is capable of being received by the storage apparatus. Various techniques involving lasers have been experimented with in order to overcome the problem of converting the data signal into light signals. Heretofore, it has been found that the laser equipment requires expensive and extremely complicated optical aiming and alignment equipment in order to convert the digital signal into light form and to apply it to the high speed store.

It is therefore a further object of this invention to convert digital information into optical form such that it can be applied to a data store.

SUMMARY OF THE INVENTION In accordance with this invention light emitting p-n junctions are formed by depositing p-type Cu S along a sample of n-type CdS, the latter having an anode and a cathode and a third terminal adjacent to the cathode. A DC bias voltage is connected in series with a digital-modulating signal and placed across the anode and the cathode of the CdS sample. A positive trigger pulse, synchronized with the modulating signal, is applied to the third terminal and serves to nucleate an acoustic domain which propagates from cathode to anode. The voltage across this domain as it passes beneath each p-n junction is controlled by the amplitude of the digital modulating signal. As a result, the light emitted by each junction is a function of this digital waveform. Suitable light sensitive storage apparatus may be placed adjacent to each junction thereby permitting rapid storage of the digital signal. As a result apparatusv embodying this invention holds much promise for eliminating the lasers and associated mechanical aiming equipment heretofore employed in the prior art.

BRIEF DESCRIPTION OF THE DRAWING The invention will be more fully comprehended from the following detailed description taken in conjunction with the drawings in which:

FIG. 1 shows a solid state display device embodying the present invention; and

FIG. 2 shows the time relationship between the information signal to be optically displayed and a trigger pulse which causes a domain to be nucleated.

DETAILED DESCRIPTION A source of digital signals 10 is connected in series with a source of DC bias voltage 11 across the anode l2 and cathode 13 of a bulk semiconductor body 14 which is, in this illustrative embodiment, composed of n-type CdS. Light emitting p-n junctions l6, l7, l8 and 19 are formed by depositing p-type Cu S along the semiconductor body and an ohmic or capacitive trigger contact 20 is situated in the proximity of the cathode 13. The voltage provided by sources 10 and 11 is arranged to provide a voltage level across the semiconductor body which always exceeds the domain sustaining voltage,

V but during domain dissolution does not exceed the oscillation sustaining voltage, V Thus, when a short input trigger pulse from source 22 causes a domain to be nucleated-in device 14, that domain persists until it reaches the positive contact or anode 12, whereupon the device returns to the ohmic state.

Now it is well known that the mechanism of domain propagation in bulk semiconductor materials permits relatively instantaneous control of the excess voltage of a traveling domain merely by varying the external bias applied to the semiconductor body. Thus, an increment AV in the applied bias voltage results in an increment AV in the domain voltage which is greater than or equal to AV. In accordance with this invention this phenomenon is utilized in order to generate light in accordance with the digital voltage waveform of source 10.

The digital signals from source are synchronized with the source of trigger pulses 22 so that each bit of the digital waveform is received at a time when the domain is passing beneath one ofthe light emitting junctions 16, 17, 18 or 19.

A synchronizing circuit 25 which is usually contained in the digital apparatus encompassing source 10, causes source 22 to generate a trigger pulse as shown in line (a) of FIG. 2. Subsequently a digital waveform such as the 1101 pattern shown in line (b) of HO. 2 is applied to the device for optical display.

If during the passage of a domain under a p-n junction a positive pulse is present in the received digital signal from source 10 then the domain contains a sufficiently large voltage to cause local breakdown of the p-n junction resulting in the emission of a red light. On the other hand, if no pulse is present in the received signal from source 10 then the propagating domain does not contain a sufficiently large voltage and local breakdown does not occur so that no emission of red light occurs. When light emission does take place, the energy lost by the domain is automatically replenished by the external bias when the domain propagates between junctions. Thus, if a digital voltage waveform is supplied by source 10 which correlates with the position of the traveling domain, then only selected junctions are caused to emit light by adjusting the domain voltage above or below the junction breakdown voltage.

In order to achieve complete storage of the digital signal, it is only necessary to physically locate a light sensitive storage apparatus in proximity to the bulk semiconductor device 14 so that the H1 junctions 16, 17, 18 and 19 are each positioned near an element of the light sensitive device. Arrays of such semiconductor bodies 14, may be created to match the physical arrangement of the arrays of the storage elements in the storage device and storage of many words may be accomplished by a multiplicity of the storage apparatus shown in the figure. Numerous physical arrangements of the storage apparatus may be created by varying arrangements of arrays of the bulk semiconductor devices so that a variety of storage means can be accommodated.

Various embodiments and modifications other than those described herein may be made by those skilled in the art without departing from the spirit and scope of the invention.

1 claim:

1. A solid-state display circuit comprising, in combination, a bulk semiconductor device of n-type semiconductor material having an anode, a cathode, and a third electrode, layers of ptype semiconductor material deposited on a surface of said bulk semiconductor device to form p-n junctions, a source of bias voltage, a source digital modulating voltage, means connecting said source of bias voltage and said source of modulating voltage in series between said anode and cathode, a source of trigger pulses connected to said third electrode so that domains are nucleated in said device, and means to synchronize said modulating voltage to said trigger pulses such that the binary digits of the modulating voltage are associated with the passage of a domain under a p-n junction, whereby each p-n junction emits energy in accordance with the magnitude of the modulating voltage.

2. A solid-state display clrcuit comprising, in combination, a

bulk semiconductor device of n-type semiconductor material having an anode, a cathode, and a third electrode, layers of ptype semiconductor material deposited on said bulk semiconductor device to form light emitting p-n junctions, a source of bias voltage, a source of digital modulating signals, means connecting said bias source and said source ofdigital signals in series between said anode and cathode, a source of trigger pulses connected to said third electrode so that domains are nucleated in said device and means to synchronize said source of digital signals to said trigger pulses such that the binary digits of the modulating signal are associated with domain passage under the p-n junctions, whereby each junction emits energy when a positive pulse is present in the signal from said source of digital signals at the time that a domain passes beneath said p-n junction.

Claims (2)

1. A solid-state display circuit comprising, in combination, a bulk semiconductor device of n-type semiconductor material having an anode, a cathode, and a third electrode, layers of p-type semiconductor material deposited on a surface of said bulk semiconductor device to form p-n junctions, a source of bias voltage, a source digital modulating voltage, means connecting said source of bias voltage and said source of modulating voltage in series between said anode and cathode, a source of trigger pulses connected to said third electrode so that domains are nucleated in said device, and means to synchronize said modulating voltage to said trigger pulses such that the binary digits of the modulating voltage are associated with the passage of a domain under a p-n junction, whereby each p-n junction emits energy in accordance with the magnitude of the modulating voltage.

2. A solid-state display circuit comprising, in combination, a bulk semiconductor device of n-type semiconductor material having an anode, a cathode, and a third electrode, layers of p-type semiconductor material deposited on said bulk semiconductor device to form light emitting p-n junctions, a source of bias voltage, a source of digital modulating signals, means connecting said bias source and said source of digital signals in series between said anode and cathode, a source of trigger pulses connected to said third electrode so that domains are nucleated in said device and means to synchronize said source of digital signals to said trigger pulses such that the binary digits of the modulating signal are associated with domain passage under the p-n junctions, whereby each junction emits energy when a positive pulse is present in the signal from said source of digital signals at the time that a domain passes beneath said p-n junction.

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