US3581104A

US3581104A - Voltage splitter circuit

Info

Publication number: US3581104A
Application number: US16827A
Authority: US
Inventors: Donald G Thew
Original assignee: HORNISCHFEGER CORP
Current assignee: HORNISCHFEGER CORP
Priority date: 1970-03-05
Filing date: 1970-03-05
Publication date: 1971-05-25
Anticipated expiration: 1988-05-25

Abstract

A voltage splitter circuit provides a terminal voltage equal to half the voltage impressed across a pair of voltage busses. The voltage at the intermediate terminal may be used to provide two equal, but opposite, voltages between the intermediate terminal and each of the busses. The intermediate terminal is located between the output circuits of two complementary transistors connected across the busses. The transistors are operated by an amplifier driven by a voltage divider. A feedback circuit exists between the intermediate terminal and the input of the amplifier to stabilize the circuit.

Description

United States Patent Inventor Donald G. Thew Milwaukee, Wis. Appl. No. 16,827 Filed Mar. 5, 1970 Patented May 25, 1971 Assignee Homischfeger Corporation West Milwaukee, Wis.

VOLTAGE SPLITTER CIRCUIT Claims, 1 Drawing Fig.

US. Cl 307/15, 307/33, 307/36, 323/22 Int. Cl H02j 1/14, l-l02j 3/46 Field of Search 307/15,

3l36, 42, 53; 323/22 (T), 40, 75 (E) [56] References Cited UNITED STATES PATENTS 2,956,172 /1960 Torkildsen 307/31 3,431,429 3/1969 Phillips 307/31 3,458,711 7/1969 Calkin et al 307/(X) Primary ExaminerGerald Goldberg Att0rneyJames E. Nilles ABSTRACT: A voltage splitter circuit provides a terminal voltage equal to half the voltage impressed across a pair of voltage busses. The voltage at the intermediate terminal may be used to provide two equal, but opposite, voltages between the intermediate terminal and each of the busses. The intermediate terminal is located between the output circuits of two complementary transistors connected across the busses. The transistors are operated by an amplifier driven by a voltage divider. A feedback circuit exists between the intermediate terminal and the input of the amplifier to stabilize the circuit.

44 f M J46 {52 44 M 22 a2 24 3 2a PATENTED H YZ IBYI 3581.104

Irma/1y 1 VOLTAGE SPLITTER CIRCUIT BACKGROUND OF THE INVENTION -l. Field of the Invention The present invention relates to voltage splitting devices for providing two equal partial voltages from a single applied voltage.

2. Description of the Prior Art In many applications of power supplies, it is desirable to provide twoterminal voltages which are equal but opposite with respect to a third voltage level provided at an intermediate terminal and termed signal ground. For example, the circuitry driven by the power supply may be such as to require the latter to provide one voltage which is +10 volts with respect to the signal ground and another voltage which is l volts with respect to signal ground. The power supply may be provided with a 20-volt input for this purpose and since the power supply divides or splits" the 20-volt input into two volt outputs, the circuit is often termed a voltage splitter.

While a simple voltage divider comprised of one or more resistive elements strung between the, input voltage busses may be used for this purpose, the voltage provided at an intermediate terminal in such voltage device will vary with the currents drawn at the intermediate terminal and with other operating phenomena. This causes an undesirable variation in the intermediate tenninal voltage level and the two output voltages based thereon. This may affect the operation of the load apparatus energized by the power supply.

SUMMARY OF THE PRESENT INVENTION It is, therefore, the object of the present invention to provide a voltage splitter power supply circuit which does not sufier such voltage variations during operation but rather splits the input voltage into two equal but opposite voltages irrespective of the load current drawn from the circuit. It is a further object of the present invention to provide a voltage splitter power supply circuit which is simple and economical in construction and reliable in operation.

The voltage splitter circuit of the present invention accomplishes these and other objects by utilizing a feedback controlled operational amplifier in conjunction with the voltage divider to ensure that any tendency in the voltage at the intermediate terminal to drift from its predetermined signal ground level is immediately corrected in a manner to restore the voltage to its predetermined level. In providing such operation, the voltage splitter circuit of the present invention utilizes a voltage divider connected between voltage input busses for providing a voltage corresponding to the intermediate terminal voltage. The voltage from the voltage divider is used to drive a high gain operational amplifier which determines the operation of a pair of complementary transistors, also connected between the input busses. The intermediate terminal is located in series between the transistors and a feedback path is provided from the terminal to the input of the operational amplifier. Any variations in the voltage established at the intermediate terminal is immediately corrected in a restorative manner through the operation of the transistors by the operational amplifier.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a schematic diagram of the voltage splitter circuit of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT between bus 12 and intermediate terminal 16 and a lO-volt signal existing between bus 14 and intermediate terminal 16 in a manner hereinafter described, by the operation of voltage splitter circuit 10.

A voltage divider, comprised of series connected resistors 18 and 20 and potentiometer 22, is connected across busses l2 and 14. Wiper 24 of potentiometer 22 is adjusted until the voltage on the wiper is equal to one-half the voltage across the busses l2 and 14, in this case, 10 volts.

The voltage at wiper 24 is supplied to a differential input amplifier 26, commonly termed an operational amplifier. Operational amplifier 26 has a pair of input terminals 28 and 30 and a single output terminal 32. lnput terminal 28 is termed the noninverting or positive input terminal in that a signal of a given sign applied to that terminal provides an output signal at output terminal 32 of the same sign. lnput terminal 30 is termed the inverted or negative input terminal as an input at output terminal 32.

Wiper 24 is connected to noninverting terminal 28 of operational amplifier 26 through input resistor 34. The relative magnitude of resistor 34 and a feedback resistor, hereinafter described, determines the gain of the operational amplifier in the well-known manner of these amplifiers.

A pair of complementary current control devices have their output circuits connected in series across busses 12 and 14. The current control devices may comprise NPN transistor 36 and PNP transistor 38 having similar but complementary operating characteristics. The collector terminals of

transistors

36 and 38 are connected to busses 12 and 14, respectively, and the emitter terminals of the transistors are connected together. Intermediate terminal 16 is located at the common connection of the emitters of

transistors

36 and 38. The bases of

transistors

36 and 38 are connected in parallel to output terminal 32 of operational amplifier 26 through bias resistors 40 and 42.

Intermediate terminal 16 is connected through a feedback conductor 44 to the inverting input terminal 30 of operational amplifier 26. A feedback resistor 46 is interposed in conductor 44 for limiting the input current to operational amplifier 26 and for establishing the voltage of intermediate terminal 16 at the same level as the voltage on wiper 24, thereby establishing a total loop gain of approximately unity within voltage splitter circuit 10.

' Filter capacitor 48 is connected between bus 12 and intermediate terminal l6 while filter capacitor 50 is connected between bus 14 and intermediate terminal 16. The loads 52 and 54 for voltage splitter circuit 10 may be connected between bus 12 and intermediate terminal 16 and bus 14 and intermediate terminal 16, respectively, and in parallel with the emitter-collector circuits of

transistors

36 and 38, respectively.

The operation of voltage splitter circuit 10 may be initially analyzed under conditions in which loads 52 and 54 may be assumed to be of equal impedance of 10 ohms. Wiper 24 provides an input voltage to voltage splitter circuit 10 of half of the potential difi'erence between bus 12 and bus 14 or 10 volts to operational amplifier 26. The signal at the output terminal 32 of operational amplifier 26 provides a base current bias or drive to

transistors

36 and 38, placing them in the conductive state.

In the present exemplary instance, the potential of 20 volts across busses I2 and 14 will cause a l-ampere current to flow through load 52 and 54 and generate a l0-volt voltage drop across each of the loads. This will place intermediate terminal 16 at a potential of 10 volts. The current flow through each of the emitter-collector circuits of

transistors

36 and 38 will also be equal, although not necessarily equal to the load current.

In analyzing the output voltage of voltage splitter circuit I0, it will be seen that bus 12 is at a potential of 20 volts, intermediate terminal 16 at a potential of 10 volts and bus 14 at zero-volts potential. By taking the voltage at intermediate terminal 16 to be the reference voltage, or in other words, signal ground, the plus ZO-volt voltage on bus 12 represents a relative plus 10 volts with respect to the voltage level at intermediate terminal 16. In a similar manner, the zero-volt potential on bus 14 represents a relative minus 10 volts with respect to the voltage level on the intermediate terminal. Thus, with respect to the voltage on intermediate terminal 16, the voltage on bus 12 is plus 10 volts and the voltage on bus 14 is minus 10 volts so that, again with respect to the voltage at intermediate terminal 16, the input voltage of 20 volts has been split into equal, but opposite, 'voltages.

Under moretypical operating conditions, however, the impedances of loads 52 and 54 are not equal so that the voltage on intermediate terminal 16 would tend to drift to a level determined by the voltage drops across loads 52 and 54, thereby destroying the voltage splitting operation of circuit 10.

Taking the instance in which the impedance of load 54 is ohms greater than that of load 52, or 15 ohms, the total resistance of 25 ohms now impressed across the 20 volt potential of busses 12 and 14 would produce a current of 0.8 amps through the loads and the voltage drop of 8 volts across load 52 and l2 volts across load 54. This would tend to cause the voltage at intermediate terminal 16 to move from volts to l2 volts. However, as the voltage of intermediate terminal 16 starts to increase, the feedback signal in conductor 44 to operational amplifier 26 also increases, As the signal is applied to the inverted input terminal 30 of the operational amplifier, the output signal of operational amplifier 26 at output terminal 32 is decreased by the amount of the increase in the feedback signal times the gain of high gain operational amplifier 26'. This reduces the base bias to

transistors

36 and 38.

The reduced base bias to PNP transistor 38 increases the emitter-collector current of that transistor. As the emitter-collector circuit of transistor 38 forms a parallel path for the current throughload 54, the current flow through the latter is reduced. Specifically, the current fiow through load 54 is reduced to 0.67 amperes and the current flow through the emitter-collector circuit of transistor 38 is increased by 0.33 amperes. The 0.67-ampere current flow through the lS-ohm impedance of load 54 causes a lO-volt voltage drop across the load, restoring the voltage at intermediate terminal 16 to the lO-volt level. I

In a similar manner, the reduced base bias to NPN transistor 36 decreases the current flow through the emitter-collector circuit of that transistor, forcing more current to flow in the parallel current path through load 52. Specifically, the current flow through theemitte'r-collector circuit of transistor 36 is decreased by 0.2 amperes while the current flow through load $2 is increased by 0.2 amperes from 0.8 amperes to l ampere, thereby restoring the voltage drop across that load to 10 volts and establishing the potential atintermediate terminal 16 at the lO-volt level.

In the foregoing manner, the operation of voltage splitter circuit 10 forces the voltage level at intermediate terminal 16 to remain at exactly half the voltage potential between buses 12 and'l4. lf the voltage potential between busses 12 and 14 changes, the voltage at intermediate terminal 16 will also change so that it remains a level equal to one-half of the voltage potential between the busses.

lclaim:

1. A circuit for providing a terminal voltage intermediate that impressed between two input voltage bus terminals and comprising:

a voltage divider connected between said busses for providing a voltage corresponding to said intermediate terminal voltage;

a differential input amplifier having an inverting input and noninverting input, said voltage divider being coupled to said noninverting input; and

a pair of complementary current control devices having their output circuits connected in series across said busses and their input circuits connected to said amplifier, said current control devices having said intermediate terminal connected between their output circults for providing said intermediate voltage, said intermediate terminal being connected to the inverting input of said amplifier for providing a feedback signal thereto for stabilizing said intermediate voltage.

2. The circuit according to claim 1 wherein said voltage divider comprises resistive elements extending between said busses having an intermediate tap for providing a voltage corresponding to said intermediate terminal voltage.

3. A circuit according to claim 2 wherein said amplifier is a high gain operational amplifier having a resistor in its noninverting input and'wherein the connection between said intermediate terminal and said inverting input of said operational amplifier includes a resistor for providing a loop gain of approximately unity.

4. A circuit according to claim 3 wherein said complementary current control devices comprise complementary NPN and PNP transistors having their emitter-collector circuits connected in series'across said busses and their base circuits connected to said amplifier.

5. A circuit according to claim 1 including a capacitive means in the output thereof for stabilizing said terminal voltages.

Claims

1. A circuit for providing a terminal voltage intermediate that impressed between two input voltage bus terminals and comprising: a voltage divider connected between said busses for providing a voltage corresponding to said intermediate terminal voltage; a differential input amplifier having an inverting input and noninverting input, said voltage divider being coupled to said noninverting input; and a pair of complementary current control devices having their output circuits connected in series across said busses and their input circuits connected to said amplifier, said current control devices having said intermediate terminal connected between their output circuits for providing said intermediate voltage, said intermediate terminal being connected to the inverting input of said amplifier for providing a feedback signal thereto for stabilizing said intermediate voltage.

3. A circuit according to claim 2 wherein said amplifier is a high gain operational amplifier having a resistor in its noninverting input and wherein the connection between said intermediate terminal and said inverting input of said operational amplifier includes a resistor for providing a loop gain of approximately unity.

4. A circuit according to claim 3 wherein said complementary current control devices comprise complementary NPN and PNP transistors having their emitter-collector circuits connected in series across said busses and their base circuits connected to said amplifier.