US3573562A - Magnet driver circuit - Google Patents

Magnet driver circuit Download PDF

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US3573562A
US3573562A US666401A US3573562DA US3573562A US 3573562 A US3573562 A US 3573562A US 666401 A US666401 A US 666401A US 3573562D A US3573562D A US 3573562DA US 3573562 A US3573562 A US 3573562A
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transistor
potential
electromagnet
current
magnet
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Charles C Hanson
Blayne E Maring
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International Business Machines Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F7/00Magnets
    • H01F7/06Electromagnets; Actuators including electromagnets
    • H01F7/08Electromagnets; Actuators including electromagnets with armatures
    • H01F7/18Circuit arrangements for obtaining desired operating characteristics, e.g. for slow operation, for sequential energisation of windings, for high-speed energisation of windings
    • H01F7/1877Circuit arrangements for obtaining desired operating characteristics, e.g. for slow operation, for sequential energisation of windings, for high-speed energisation of windings controlling a plurality of loads
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K1/00Methods or arrangements for marking the record carrier in digital fashion
    • G06K1/02Methods or arrangements for marking the record carrier in digital fashion by punching

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  • ABSTRACT An emitter controls the setting and resetting of a latch.
  • the amplified set output of the latch turns on a current switch.
  • the current switch conditions the anodes of silicon controlled rectifiers.
  • the silicon controlled rectifiers are selectively turned on through logic circuitry.
  • the magnets are connected in the anode circuit of the silicon controlled rectifiers.
  • the magnets are deenergized by tuning the silicon controlled rectifiers off. This is done by reverse biasing the silicon controlled rectifiers, anode to cathode, by turning the current switch off. When the current switch is turned OFF, current continues to flow through the silicon controlled rectifiers for a short time. A back e.m.f. is generated when the current in the magnet coil is decreasing. This back e.m.f. is used to turn on a transistor referenced to a particular negative potential. This transistor then provides base current for another transistor which provides a path for collapsing the fields of the magnet coils.
  • MAGNET DRIVER CIRCUIT BACKGROUND OF THE INVENTION 1.
  • This invention relates to magnet driver circuits and more particularly to magnet driver circuits having the facility for quickly collapsing the fields of the magnets after they have been turned ofi.
  • the principal object of the invention is to provide an improved magnet driver circuit which: (a) includes a circuit for collapsing the magnet field very quickly; (b) is relatively inexpensive; (c) includes a single current switch for a plurality of magnets; and (d) is selectively operable with high reliability.
  • FIG. I is a schematic view illustrating the invention as embodied in a card punch, including a schematic circuit diagram of the magnet driver circuit;
  • FIG. 2 is a diagram illustrating the wave forms for the circuit of FIG. 1.
  • the invention is shown by way of example as being incorporated in a machine for punching holes in record cards.
  • Machines of this type are well known in the art.
  • the record cards contained in hopper 11 are fed therefrom in seriatim by picker knife 12 so that a row of index positions on the card will be presented to punch station 13.
  • the punch station 13 will include a row of 80 punches 36 which are selectively operated under the control of 80 control magnets 35.
  • the record cards 10 are incremented through the punch station 13 row by row by incrementally driven cooperating feed rollers 15. After a card 10 leaves the punch station 13, it enters stacker 20.
  • An emitter 25 is driven in synchronism with the cam shaft 16 carrying the cams for operating the interposer setup bail l7 and the punch bail 18.
  • the emitter 25 provides pulses to the magnet driver circuit 30 which also receives data and magnet address signals from control unit 50.
  • the magnet driver circuit 30 controls the energization of punch magnets 35.
  • the punch 36 will be operated only if its associated punch magnet 35 has been energized.
  • the punch magnet 35 controls the movement of an interposer 19 which must come between the punch bail l8 and the punch 36 in order to cause punching of the cards.
  • Emitter 25 includes a rotating disc 26 with permanent magnet 24 and magnetic pickup heads 27, 28 and 29.
  • the output signal from magnetic pickup head 27 is amplified by amplifier 40 and applied to the set input of latch 50.
  • the reset input of latch 50 is connected to the output of amplifier 41.
  • Amplifier 41 is connected to amplify the signal from pickup head 29.
  • the signal from pickup head 28 is amplified by amplifier 42.
  • the amplified signal is then applied to control unit 50 to signal it that the driver circuit 30 is ready for data and magnet ad dress signals.
  • the set output of latch 50 is connected to cur rent amplifier 51 which has its output connected to the base of transistor TI via resistor R1.
  • Transistor T1 is a high current switch. Its collector is connected to -20-volts via resistor R7. Also one side of each magnet is connected to conductor 52 which connects to the collector of transistor T1 at point A.
  • the emitter of transistor T1 is connected to a +20-volts source via diode D1.
  • Resistor R2 is connected between the anode of diode D1 and the base of transistor T1. Diode D1 provides forward drop to ensure turn off of T1 when latch 50 is reset.
  • Resistor R2 is a leakage shunt resistor.
  • each magnet is connected between conductor 52 and the anode of an associated silicon controlled rectifier (SCR) 53.
  • SCR silicon controlled rectifier
  • the cathodes of the SCRs 53 are connected to ground.
  • the gate of each SCR 53 is connected to a logical AND circuit 54 via a diode D6.
  • the AND circuit 54 has a data input on conductor 55 and address inputs on conductors 56 and 57.
  • Conductor 56 is the units address and conductor 57 is the tens address. All inputs to the AND circuit 54 must be satisfied in order that the AND circuit will have an output for providing gate current to the associated SCR 53.
  • Diode D6 limits the reverse gate current to prevent starvation turn off of the associated SCR 53.
  • Resistor R13 which is connected between the anode of 53 and conductor 52 shunts the magnet 35 to insure the flow of sufficient anode current before gate current is terminated.
  • the duration of gate current is relatively short.
  • Resistor R12 which is connected between the cathode and gate of the SCR 53 functions to shunt interelectrode capacitive feedback current.
  • latch 50 is repeatedly set and reset. More particularly, in this example, the latch 50 is set for approximately 10 milliseconds, and then is reset and remains reset for approximately 2.5 milliseconds. During the time that the latch 50 is reset, the card is incremented relative to the punch so as to bring a new row of index positions into punching position, Of course, whenever latch 50 is set, switching transistor T1 is turned on. With switching transistor T1 on, the anodes of SCRs 53 are conditioned. Whether or not a particular SCR 53 will be turned on is dependent uponthe output condition of the associated AND circuit 54. If the inputs to the AND circuit 54 are satisfied, then the AND circuit provides gate current to the associated SCR 53. When the SCR 53 turns on, the magnet 35 in the anode circuit thereof is energized.
  • the collector of transistor T3 is connected to the base of a transistor T2 via resistor R5.
  • the base of transistor T2 is also connected to a +20-volt supply through resistor R4.
  • Resistors R4 and R5 form a voltage divider network.
  • the emitter of transistor T2 is connected to ground and its collector is connected via energy dissipating resistor R3 in parallel with the collector of transistor T1 to point A.
  • T3 turns on. With T3 turned on, base current is provided for transistor T2 and it turns on.
  • Transistor T2 when turned on, allows the fields of magnet 35 to collapse through T2. The current path is from the magnet 35 through the SCR 53 to ground and from ground through transistor T2.
  • the l-ohm resistor R3 connected in the collector circuit of transistor T2 functions to dissipate some of the energy from the magnets. The coil current in the magnets is dissipated in less than 1 millisecond.
  • the reference voltage for the base of transistor T3 is a factor in determining how quickly the coil current will be dissipated. The greater the magnitude of the minus reference voltage (the more negative the voltage on the point A is with respect to ground), the more quickly the coil current will be dissipated. The 20-volts provides for coil current dissipation in less than 1 millisecond. Of course, the reference voltage could not be of such a magnitude to cause break down of transistor T1.
  • magnet coil current dissipating means connected to said reference potential and connected with said magnets and responsive to the back e.m.f., generated in said magnets upon said switching means deconditioning said current conducting devices, exceeding said reference potential in magnitude to provide a dissipating path for the coil current of said magnets when the back e.m.f. exceeds said reference potential in magnitude, said magnet coil current dissipating means comprising:
  • first transistor having three electrodes with one electrode connected to said reference potential and a second electrode connected in common with said switching means and said magnets; and a second transistor having three electrodes with one electrode connected to a third electrode of said first transistor, a second electrode connected in common with said switching means and said magnets and a third electrode connected to said dissipating path.
  • a magnet driver circuit comprising:
  • switch means for making and breaking a circuit including said electromagnet and said first source of potential for energizing and deenergizing the electromagnet;
  • magnet coil current dissipating circuitry connected to said second source of potential and to said magnet, said circuitry being constructed to be responsive to the back e.m.f. in said electromagnet so as to provide a current dissipating path for said electromagnet which is open when the back e.m.f. exceeds said second potential in magnitude, said circuitry including a switching device which is connected to said second source of potential and which is actuated by said back e.m.f., said magnet driver circuit including a second switching device under the control of said first-named switching device for substantially shorting said electromagnet when said back e.m.f. exceeds said second potential as aforesaid.
  • said firstnamed switching device including a transistor which is rendered to be conductive when said back e.m.f. exceeds said second potential and said second switching device including another transistor which is under the control of said firstnamed transistor and which is rendered conductive when said first-named transistor is conducting.
  • a magnet driver circuit comprising:
  • switch means for making and breaking a circuit including said electromagnet and said first source of potential for energizing and deenergizing the electromagnet;
  • magnet coil current dissipating circuitry connected to said second source of potential and to said magnet, said circuitry being constructed to be responsive to the back e.m.f. in said electromagnet so as to provide a current dissipating path for said electromagnet which is open when the back e.m.f. exceeds said second potential in magnitude
  • said switch means including a first transistor connected between said first source of potential and one side of said electromagnet and said switch means including also a silicon-controlled rectifier connected to the other side of said electromagnet
  • said circuitry including a second transistor connected to said second source of potential and also to a point between said first transistor and said electromagnet so that said second transistor is rendered conductive when said back e.m.f.
  • said second potentiaL-said circuitry including also a third transistor connected to a point between said first transistor and said electromagnet and controlled by said second transistor so that said third transistor is rendered conductive to provide said current dissipating path when said second transistor is in conduction.

Abstract

An emitter controls the setting and resetting of a latch. The amplified set output of the latch turns on a current switch. The current switch conditions the anodes of silicon controlled rectifiers. The silicon controlled rectifiers are selectively turned on through logic circuitry. The magnets are connected in the anode circuit of the silicon controlled rectifiers. The magnets are deenergized by tuning the silicon controlled rectifiers off. This is done by reverse biasing the silicon controlled rectifiers, anode to cathode, by turning the current switch off. When the current switch is turned OFF, current continues to flow through the silicon controlled rectifiers for a short time. A back e.m.f. is generated when the current in the magnet coil is decreasing. This back e.m.f. is used to turn on a transistor referenced to a particular negative potential. This transistor then provides base current for another transistor which provides a path for collapsing the fields of the magnet coils.

Description

United States Patent [72] Inventors CharlesC.1Ianson;
Blayne E. Maring, Rochester, Minn. [21] AppLNo. 666,401 [22] Filed Sept. 8, 1967 [45] Patented Apr. 6, 1971 [73] Assignee International Business Machines Corporation Armonk,N.Y.
[54] MAGNET DRIVER CIRCUIT 4 Claims, 2 Drawing Figs.
[52] U.S.Cl 317/123, 317/137,3l7/148.5,307/104 [51] Int. Cl ....I-l01h47/32 [50] Field ofSearch 317/123 (RM), 123 (CD), 148.5; 307/104 [5 6] References Cited UNITED STATES PATENTS 3,340,407 9/1967 Sinclair 307/101 2,863,549 12/1958 Kelly 197/133 3,078,393 2/1963 Winston 317/123(RM) 3,141,152 7/1964 Greene etal. 340/1725 C(JNTROL UNIT 3,185,080 5/1965 Spitsbergenetal 3I'/ 'l23(CD) 3,243,665 3/1966 Fayeretal.
ABSTRACT: An emitter controls the setting and resetting of a latch. The amplified set output of the latch turns on a current switch. The current switch conditions the anodes of silicon controlled rectifiers. The silicon controlled rectifiers are selectively turned on through logic circuitry. The magnets are connected in the anode circuit of the silicon controlled rectifiers.
The magnets are deenergized by tuning the silicon controlled rectifiers off. This is done by reverse biasing the silicon controlled rectifiers, anode to cathode, by turning the current switch off. When the current switch is turned OFF, current continues to flow through the silicon controlled rectifiers for a short time. A back e.m.f. is generated when the current in the magnet coil is decreasing. This back e.m.f. is used to turn on a transistor referenced to a particular negative potential. This transistor then provides base current for another transistor which provides a path for collapsing the fields of the magnet coils.
MAGNET DRIVER CIRCUIT BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to magnet driver circuits and more particularly to magnet driver circuits having the facility for quickly collapsing the fields of the magnets after they have been turned ofi.
2. Description of the Prior Art It has been a practice in the prior art to utilize a separate reset circuit for turning off the magnets. A separate reset circuit is not only more expensive, it is also less efficient. Since the number of magnets which might be on at any one time is indeterminate, then by utilizing the back e.m.f. for operating the magnetic field collapsing circuit as in the present invention, the circuit is self-regulating. Further, the time required for collapsing the magnetic fields can be controlled through the selection of the reference voltage for the magnetic field collapsing circuit. The time required to collapse the magnet fields can be very critical with respect to reliable selection of the magnets to be turned on. For example, if the current in the magnet coil doesnt decay prior to turning on the high current switch, then its associated silicon controlled rectifier doesn't turn off and the magnet becomes fully energized even though it may not have been selected for energization.
Further, in the past it has been the practice to first set up or select the desired current conducting devices, such as silicon controlled rectifiers, and then apply the power signal. This approach is not as desirable as in the present invention where the power signal is applied first. In a longitudinal array of magnets, the center section magnets of the array require more time to become energized. This is because of interacting flux paths at the center section. Hence, if the power signal is immediately available, the magnets in the center of the array will start to become energized as soon as their associated current conducting devices are selected. Therefore, if selection takes place serially, the central magnets are energized sooner and there is an overall speed advantage. Also, in the present invention, there is less high transient switching.
SUMMARY OF THE INVENTION The principal object of the invention is to provide an improved magnet driver circuit which: (a) includes a circuit for collapsing the magnet field very quickly; (b) is relatively inexpensive; (c) includes a single current switch for a plurality of magnets; and (d) is selectively operable with high reliability.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a schematic view illustrating the invention as embodied in a card punch, including a schematic circuit diagram of the magnet driver circuit; and
FIG. 2 is a diagram illustrating the wave forms for the circuit of FIG. 1.
DESCRIPTION With reference to the drawing and particularly with respect to FIG. 1, the invention is shown by way of example as being incorporated in a machine for punching holes in record cards. Machines of this type are well known in the art. In this particular example, the record cards contained in hopper 11 are fed therefrom in seriatim by picker knife 12 so that a row of index positions on the card will be presented to punch station 13. Thus, the punch station 13 will include a row of 80 punches 36 which are selectively operated under the control of 80 control magnets 35. The record cards 10 are incremented through the punch station 13 row by row by incrementally driven cooperating feed rollers 15. After a card 10 leaves the punch station 13, it enters stacker 20. An emitter 25 is driven in synchronism with the cam shaft 16 carrying the cams for operating the interposer setup bail l7 and the punch bail 18. The emitter 25 provides pulses to the magnet driver circuit 30 which also receives data and magnet address signals from control unit 50.
The magnet driver circuit 30 controls the energization of punch magnets 35. The punch 36 will be operated only if its associated punch magnet 35 has been energized. The punch magnet 35 controls the movement of an interposer 19 which must come between the punch bail l8 and the punch 36 in order to cause punching of the cards.
Emitter 25 includes a rotating disc 26 with permanent magnet 24 and magnetic pickup heads 27, 28 and 29. The output signal from magnetic pickup head 27 is amplified by amplifier 40 and applied to the set input of latch 50. The reset input of latch 50 is connected to the output of amplifier 41. Amplifier 41 is connected to amplify the signal from pickup head 29.
The signal from pickup head 28 is amplified by amplifier 42. The amplified signal is then applied to control unit 50 to signal it that the driver circuit 30 is ready for data and magnet ad dress signals. The set output of latch 50 is connected to cur rent amplifier 51 which has its output connected to the base of transistor TI via resistor R1. Transistor T1 is a high current switch. Its collector is connected to -20-volts via resistor R7. Also one side of each magnet is connected to conductor 52 which connects to the collector of transistor T1 at point A. The emitter of transistor T1 is connected to a +20-volts source via diode D1. Resistor R2 is connected between the anode of diode D1 and the base of transistor T1. Diode D1 provides forward drop to ensure turn off of T1 when latch 50 is reset. Resistor R2 is a leakage shunt resistor.
In this particular example, there are magnets, magnets l and 80 being shown, and each magnet is connected between conductor 52 and the anode of an associated silicon controlled rectifier (SCR) 53. The cathodes of the SCRs 53 are connected to ground. The gate of each SCR 53 is connected to a logical AND circuit 54 via a diode D6. The AND circuit 54 has a data input on conductor 55 and address inputs on conductors 56 and 57. Conductor 56 is the units address and conductor 57 is the tens address. All inputs to the AND circuit 54 must be satisfied in order that the AND circuit will have an output for providing gate current to the associated SCR 53. Diode D6 limits the reverse gate current to prevent starvation turn off of the associated SCR 53. Resistor R13 which is connected between the anode of 53 and conductor 52 shunts the magnet 35 to insure the flow of sufficient anode current before gate current is terminated. The duration of gate current is relatively short. Resistor R12 which is connected between the cathode and gate of the SCR 53 functions to shunt interelectrode capacitive feedback current.
From the foregoing, it is seen that latch 50 is repeatedly set and reset. More particularly, in this example, the latch 50 is set for approximately 10 milliseconds, and then is reset and remains reset for approximately 2.5 milliseconds. During the time that the latch 50 is reset, the card is incremented relative to the punch so as to bring a new row of index positions into punching position, Of course, whenever latch 50 is set, switching transistor T1 is turned on. With switching transistor T1 on, the anodes of SCRs 53 are conditioned. Whether or not a particular SCR 53 will be turned on is dependent uponthe output condition of the associated AND circuit 54. If the inputs to the AND circuit 54 are satisfied, then the AND circuit provides gate current to the associated SCR 53. When the SCR 53 turns on, the magnet 35 in the anode circuit thereof is energized.
When switching transistor T1 is turned off, i.e., when latch 50 is reset, the anodes of the SCRs 53 are reverse biased. However, current continues to flow through the SCRs 53 that were on after transistor T1 switches off. In essence, the magnets 35 become a source of current and a back e.m.f. is generated to reverse the polarity of point A. Point A is connected to the emitter of transistor T3 via diode D2 and to the resistor R7 which is connected between point A and the 20- volt supply. Diode D2 provides base emitter protection for transistor T3 and resistor R7 is a load resistor to shunt leakage of transistor T1. The base of transistor T3 is connectedto the -20-volt supply via resistor R6. The collector of transistor T3 is connected to the base of a transistor T2 via resistor R5. The base of transistor T2 is also connected to a +20-volt supply through resistor R4. Resistors R4 and R5 form a voltage divider network. The emitter of transistor T2 is connected to ground and its collector is connected via energy dissipating resistor R3 in parallel with the collector of transistor T1 to point A.
The back e.m.f. pulls point A to a more negative level than -volts (to about 2l-volts) and since the base of T3 is referenced to -20-volts, T3 turns on. With T3 turned on, base current is provided for transistor T2 and it turns on. Transistor T2, when turned on, allows the fields of magnet 35 to collapse through T2. The current path is from the magnet 35 through the SCR 53 to ground and from ground through transistor T2. The l-ohm resistor R3 connected in the collector circuit of transistor T2 functions to dissipate some of the energy from the magnets. The coil current in the magnets is dissipated in less than 1 millisecond. If the coil current were not dissipated prior to turning transistor T1 on again, the associated SCR 53 would not turn off and the magnet would be energized again, even though the inputs to the AND circuit 54 were not satisfied. Of course, this would cause an erroneous punch operation. However, this does not occur in the present invention because, as seen in FIG. 2, the coil current is dissipated well before the transistor T1 is turned on again, i.e., 2.5 milliseconds are available and the coil current is dissipated in less than 1 millisecond.
The reference voltage for the base of transistor T3 is a factor in determining how quickly the coil current will be dissipated. The greater the magnitude of the minus reference voltage (the more negative the voltage on the point A is with respect to ground), the more quickly the coil current will be dissipated. The 20-volts provides for coil current dissipation in less than 1 millisecond. Of course, the reference voltage could not be of such a magnitude to cause break down of transistor T1.
While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.
We claim:
1. In a magnet driver circuit for selectively energizing a plurality of magnets:
a plurality of selectively operable current conducting devices connected to control the energization of said plurality of magnets;
current switching means connected to control the conditioning and deconditioning of said current conducting devices;
means for operating said current switching means to cause the same to condition and decondition said current conducting devices for predetermined periods of time;
means for selectively energizing said current conducting devices after the same have been conditioned by said switching means;
means providing a substantially fixed reference potential;
and
magnet coil current dissipating means connected to said reference potential and connected with said magnets and responsive to the back e.m.f., generated in said magnets upon said switching means deconditioning said current conducting devices, exceeding said reference potential in magnitude to provide a dissipating path for the coil current of said magnets when the back e.m.f. exceeds said reference potential in magnitude, said magnet coil current dissipating means comprising:
a first transistor having three electrodes with one electrode connected to said reference potential and a second electrode connected in common with said switching means and said magnets; and a second transistor having three electrodes with one electrode connected to a third electrode of said first transistor, a second electrode connected in common with said switching means and said magnets and a third electrode connected to said dissipating path.
2. A magnet driver circuit comprising:
an electromagnet;
a first source of electric potential and a second source of electric potential of opposite polarity; switch means for making and breaking a circuit including said electromagnet and said first source of potential for energizing and deenergizing the electromagnet; and
magnet coil current dissipating circuitry connected to said second source of potential and to said magnet, said circuitry being constructed to be responsive to the back e.m.f. in said electromagnet so as to provide a current dissipating path for said electromagnet which is open when the back e.m.f. exceeds said second potential in magnitude, said circuitry including a switching device which is connected to said second source of potential and which is actuated by said back e.m.f., said magnet driver circuit including a second switching device under the control of said first-named switching device for substantially shorting said electromagnet when said back e.m.f. exceeds said second potential as aforesaid.
3. The magnet driver circuit as set forth in claim 2, said firstnamed switching device including a transistor which is rendered to be conductive when said back e.m.f. exceeds said second potential and said second switching device including another transistor which is under the control of said firstnamed transistor and which is rendered conductive when said first-named transistor is conducting.
4. A magnet driver circuit comprising:
an electromagnet;
a first source of electric potential and a second source of electric potential of opposite polarity; switch means for making and breaking a circuit including said electromagnet and said first source of potential for energizing and deenergizing the electromagnet; and
magnet coil current dissipating circuitry connected to said second source of potential and to said magnet, said circuitry being constructed to be responsive to the back e.m.f. in said electromagnet so as to provide a current dissipating path for said electromagnet which is open when the back e.m.f. exceeds said second potential in magnitude, said switch means including a first transistor connected between said first source of potential and one side of said electromagnet and said switch means including also a silicon-controlled rectifier connected to the other side of said electromagnet, said circuitry including a second transistor connected to said second source of potential and also to a point between said first transistor and said electromagnet so that said second transistor is rendered conductive when said back e.m.f. exceeds said second potentiaL-said circuitry including also a third transistor connected to a point between said first transistor and said electromagnet and controlled by said second transistor so that said third transistor is rendered conductive to provide said current dissipating path when said second transistor is in conduction.

Claims (4)

1. In a magnet driver circuit for selectively energizing a plurality of magnets: a plurality of selectively operable current conducting devices connected to control the energization of said plurality of magnets; current switching means connected to control the conditioning and deconditioning of said current conducting devices; means for operating said current switching means to cause the same to condition and decondition said current conducting devices for predetermined periods of time; means for selectively energizing said current conducting devices after the same have been conditioned by said switching means; means providing a substantially fixed reference potential; and magnet coil current dissipating means connected to said reference potential and connected with said magnets and responsive to the back e.m.f., generated in said magnets upon said switching means deconditioning said current conducting devices, exceeding said reference potential in magnitude to provide a dissipating path for the coil current of said magnets when the back e.m.f. exceeds said reference potential in magnitude, said magnet coil current dissipating means comprising: a first transistor having three electrodes with one electrode connected to said reference potential and a second electrode connected in common with said switching means and said magnets; and a second transistor having three electrodes with one electrode connected to a third electrode of said first transistor, a second electrode connected in common with said switching means and said magnets and a third electrode connected to said dissipating path.
2. A magnet driver circuit comprising: an electromagnet; a first source of electric potential and a second source of electric potential of opposite polarity; switch means for making and breaking a circuit including said electromagnet and said first source of potential for energizing and deenergizing the electromagnet; and magnet coil current dissipating circuitry connected to said second source of potential and to said magnet, said circuitry being constructed to be responsive to the back e.m.f. in said electromagnet so as to provide a current dissipating path for said electromagnet which is open when the back e.m.f. exceeds said second potential in magnitude, said circuitry including a switching device which is connected to said second source of potential and which is actuated by said back e.m.f., said magnet driver circuit including a second switching device under the control of said first-named switching device for substantially shorting said electromagnet when said back e.m.f. exceeds said second potential as aforesaid.
3. The magnet driver circuit as set forth in claim 2, said first-named switching device including a transistor which is rendered to be conductive when said back e.m.f. exceeds said second potential and said second switching device including another transistor which is under the control of said first-named transistor and which is rendered conductive when said first-named transistor is conducting.
4. A magnet driver circuit comprising: an electromagnet; a first source of electric potential and a second source of electric potential of opposite polarity; switch means for making and breaking a circuit including said electromagnet and said first source of potential for energizing and deenergizing the electromagnet; and magnet coil current dissipating circuitry connected to said second source of potential and to said magnet, said circuitry being constructed to be responsive to the back e.m.f. in said electromagnet so as to provide a current dissipating path for said electromagnet which is open when the back e.m.f. exceeds said second potential in magnitude, said switch means including a first transistor connected between said first source of potential and one side of said electromagnet and said switch means including also a silicon-controlled rectifier connected to the other side of said electromagnet, said circuitry including a second transistor connected to said second source of potential and also to a point between said first transistor and said electromagnet so that said second transistor is rendered conductive when said back e.m.f. exceeds said second potential, said circuitry including also a third transistor connected to a point between said first transistor and said electromagnet and controlled by said second transistor so that said third transistor is rendered conductive to provide said current dissipating path when said second transistor is in conduction.
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US3141152A (en) * 1959-12-21 1964-07-14 Ibm Control apparatus
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US3185080A (en) * 1961-09-25 1965-05-25 Control Data Corp Hammer magnet gate system in high speed printers using transistor circuits
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US5992401A (en) * 1997-09-10 1999-11-30 Outboard Marine Corporation Capacitive discharge ignition for an internal combustion engine

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