US3568826A

US3568826A - Automatic saw control assembly for a linecasting machine

Info

Publication number: US3568826A
Application number: US717328A
Authority: US
Inventors: Eugene A Mychalowych; Gerald A Fasse
Original assignee: Booth Newspapers Inc
Current assignee: Booth Newspapers Inc
Priority date: 1968-03-29
Filing date: 1968-03-29
Publication date: 1971-03-09
Anticipated expiration: 1988-03-09

Abstract

The subject matter of this invention is a saw control assembly of the type for use with a linecasting machine having a saw movable between various cutting positions by a hand operated means. The assembly includes a motorized drive for moving the saw while retaining the hand operated means, the drive includes a clutch for transmitting driving forces to the saw for slipping in response to a predetermined resistance to prevent injury to the motorized drive. An electronic closed servo loop is utilized for activating and deactivating the motorized means to control the cutting position of the saw. The servo loop includes a decoder utilizing NAND logic for developing a saw signal and 8-4-2-1 BCD signals from alphanumeric input signals, the signals from the decoder set a set of four registers, one for storing the pica tens digit, one for storing the pica units digit, one for storing the point tens digit, and one for storing the point units digit. The registers are adapted to be set by manually operated switches as well as by signals received from the decoder. The desired command position stored in the registers is compared with signals developed by an angular shaft encoder whose signals in 8-4-2-1 BCD form indicate the actual position of the saw by a parallel comparator. The parallel comparator employs NAND logic and develops various signals including drive-up and drive-down signals. The latter two signals control the direction of the motor by controlling first and second power transistor means, each of which in turn controls a pair of switching transistors.

Description

United States Patent Eugene A. Mychalowych; Gerald A. Fasse, Warren, Mich. [21] Appl. No. 717,328

[72] Inventors [54] AUTOMATIC SAW CONTROL ASSEMBLY FOR A Primary Examiner-Edgar S. Burr Att0rneyBarnard, McGlynn and Reising ABSTRACT: The subject matter of this invention is a saw control assembly of the type for use with a linecasting machine having a saw movable between various cutting positions by a hand operated means. The assembly includes a motorized drive for moving the saw while retaining the hand operated means, the drive includes a clutch for transmitting driving forces to the saw for slipping in response to a predetermined resistance to prevent injury to the motorized drive. An electronic closed servo loop is utilized for activating and deactivating the motorized means to control the cutting position of the saw. The servo loop includes a decoder utilizing NAND logic for developing a saw signal and 8-4-2-] BCD signals from alphanumeric input signals, the signals from the decoder set a set of four registers, one for storing the pica tens digit, one for storing the pica units digit, one for storing the point tens digit, and one for storing the point units digit. The registers are adapted to be set by manually operated switches as well as by signals received from the decoder. The desired command position stored in the registers is compared with signals developed by an angular shaft encoder whose signals in 8-4-2- 1 BCD form indicate the actual position of the saw by a parallel comparator. The parallel comparator employs NAND logic and develops various signals including drive-up and drivedown signals. The latter two signals control the direction of the motor by controlling first and second power transistor means, each of which in turn controls a pair of switching transistors.

LINECASTING MACHINE 6 Claims, 11 Drawing Figs.

[52] U.S.Cl 199/59, 199/18, 199/61, 199/81 [51] Int.Cl ..B4lbl1/72 [50] FieldofSearch ..199/59,54, 13, 18, 50; 192/56, 150, 53,55; 199/61, 81

[56] References Cited UNITED STATES PATENTS 1,287,900 12/1918 Curle 199/59 1,355,241 10/1920 Mohr 199/59 3,291,292 12/1966 Netzniketal 199/59 3,291,293 12/1966 Netznik 199/59 3,300,034 1/1967 Kleboeetal... 199/18X 3,429,407 2/1969 Orwinetal. 192/56 3,454,144 7/1969 Haller 192/56 3,232,404 2/1966 Jones,Jr 101/93X 3,414,103 12/1968 Knudsenetal. 197/20 3,285,396 1l/1966 Debus 199/11 3,156,136 11/1964 Sogabe.... 74/802 3,488,664 1/1970 Winston 346/75 SAW CONTROL PACKAGE AUXlLlARY FUNCTIONS CONTROL UNIT PATENTEDHAR szsn SHEET 1 BF 9 38 /15 fie w SAW CONTROL PACKAGE AUXILIARY FUNCTIONS CONTROL UNIT INVENTORS Eugene fl. flzycha (on/ya Gerald .14. 92mm PATE'NTEDHAR slew 3.568526 I SHEETS 0F 9 NULL OUTPUT UPPER LIMIT LOWER LIMIT I RESET LINE T TOR/VEKS' PATENTEUMAR sum 7 3568.826 SHEEI 7 [1F 9 28/ PICA TENS 2 POINTS UNITS 329 POIN TS TENS A T TOP/VEY PATENITEEIIIAR 91911, 3.568.826

SHEET 8 BF 9 IVE DOWN ALL NULL REDUCE VOLTAGE YPICA TENS-\..[: 2 PICA UNlTS\/--l:

POINTS UNITS\|:

Z PICA TENS\-'/{ POINTS TENSwE I7 POINTS UNITS LOWER UM IT 5 5a ,5 AIZ I Z ZZ/ch I Z u ezze a a ATTORNEYS AUTOMATIC SAW CONOL ASSEMBLY FOR A LINECASTING MAC This invention relates to the automatic control of saws adapted for use with linecasting machines and more particularly to an improved method and means for automatically positioning the saw in response to command information developed from an information bearing means such as a paper tape reader.

For many years, saw attachments have been employed with linecasting machines to cut the cast slug to a predetermined length. Such attachments manufactured by the Mohr Lino- Saw Co. are shown, for example, in U.S. Pat. Nos. 1,246,541, 2,563,147 and 2,929,492. Further, a system controlled by a paper tape reader using conventional point to point digital positioning techniques is known and is disclosed in U.S. Pat. No. 3,291,292. In this system, a standard mechanical Fairchild teletype tape reader is modified so as to be able to read a sequentially coded six level paper tape having a tape code for operating the keyboard of the machine and a second tape code for operating auxiliary functions such as the saw, knife block, mold disc, and magazines. When the tape reader senses a signal indicating that the saw is to be repositioned, the next two tape positions carry the pica level of the new command position. The next tape position represents what is referred to as a signal for steering the information coded on the next two tape positions, which information represents the desired point level of the command position, to the points storage unit. When the new command position in picas and points is stored in a first storage register, the saw begins to move toward the command position with its actual position developed digitally from information supplied by a complex two disc optical encoder being stored in a second storage register. The signals from the two registers are applied to circuitry whose output controls a set of relays for stopping and starting a saw control motor that is mechanically coupled to the saw in a manner that makes it extremely difficult to manually adjust the position of the saw.

Various other deficiencies are inherent in this system. First, the circuitry for controlling the relays is unable to operate if both digits of the desired points position are zeros. Hence, it is necessary that if the desired position is, for example, 13 pica, points, it must be fed into the system as 12 pica, 12 points creating complexities in input coding. Further, although four digits are sufficient for inserting all the information into the command register, the system utilizes five input signals since one signal is needed between picas and points information. Hence, the information needed may not be received sequentially. Further, the use of relays in the motor control circuit creates considerable complexity in the system and slows down its reaction time. In addition, the system is elaborate and costly to manufacture and use, utilizing as it does discrete solid state and electromechanical components.

Therefore, there is considerable need in the linecasting art for a system for automating the saw which has the following features: the manual setting capability of the conventional saw; means enabling the command information to be received from four sequential signals; means eliminating the necessity of borrowing from the number of picas and inserting 12 as the number of points when the command position has zero points; semiautomatic machine capability enabling command information to be placed into the command register directly by manual switching means; a system that eliminates relays in the motor control circuitry; and finally a system wherein the logic design may be readily adapted for implementation by integrated circuit means.

It is therefore an object of this invention to create an automatic saw control system which retains the manual capability of the conventional saw.

It is a further object of this invention to create a system which codes the command position as conventionally written.

It is another object of this invention to create a saw control system having semiautomatic input capabilities.

It is an other object of this invention to create a saw control system whose registers can be set by four sequential input signals.

It is another object of this inventionto eliminate all relays in the motor control circuit to increase the response time of the system.

It is another object of this invention to utilize logic circuitry readily adapted for implementation by integrated circuit means.

It is a further object of this invention to provide an improved and less costly system.

Other objects and attendant advantages of the present invention will be readily appreciated as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings wherein:

FIG. I is a fragmentary elevational view partly in schematic and showing a preferred embodiment of a saw assembly constructed in accordance with the instant invention;

FIG. 2 is an elevational view of the saw control assembly;

FIG. 3 is a view taken substantially along line 3-3 of FIG. 2;

FIG. 4 is a view taken substantially along line 4-4 of HG. 2;

FIG. 5 is a cross-sectional view taken substantially along line 5-5 of FIG. 4;

FIG. 6 is a schematic of the decoder constructed in accordance with the instant invention;

FIGS. 7 and 7a are schematics of the command position register constructed in accordance with the instant invention and its gating and control circuitry;

FIGS. 3 and 8a are schematics of the parallel comparator and associated circuitry constructed in accordance with the instant invention; and

FIG. 9 is a schematic of the motor control circuitry constructed in accordance with the instant invention.

Referring now to the drawings wherein like numerals indicate like or corresponding parts throughout the several views, a saw assembly constructed in accordance with the instant invention is generally shown at 10 in FIG. 1. The saw assembly 10 is of the type for use in a linecasting machine.

The assembly 10 includes a saw means generally indicated at 12 and movable between various cutting positions for cutting slugs. The assembly 10. also includes a first drive means generally indicated at 14 for moving the saw means 12. The assembly 10 further includes a control means, which is illustrated in FIGS. 6 through 9, for activating and deactivating the first drive means 14. The saw assembly 10 also includes a manually operable drive means generally indicated at 16 for moving the saw means 12 independently of the first drive means 14.

As will be appreciated by those skilled in the art, the assembly 10, as shown in FIG. 1, is a linecasting machine saw of the type manufactured by the Mohr Lino-Saw Co. The saw means 12 includes a support l8 having an elongated slot 20 therein and a mount 22 slidably supported on the support 118 and threadedly coacting with a lead screw 24. Upon rotation of the lead screw 24, the mount moves vertically along the support 22. The mount 22 supports a housing or shield 26 within which is rotatably disposed a saw 28. The shaft 30 rotates the saw 28 and is driven by a pulley 32 which is secured thereto. A fly wheel 34 is also secured to the shaft 30. A belt (not shown) coacts with he pulley 32 to rotate the shaft 30.

A first bevel gear 36 is secured to the upper end of the lead screw 24 for rotating the lead screw 34.

Tile manually operable drive means 16 includes a second bevel gear 33 which is in meshing engagement with the first bevel gear 36 for rotating the latter. The second bevel gear 33 is secured to a shaft 50 and the shaft 46) is rotated by a member 42 having a manually graspable handle 44 extending therefrom. A dial and/or index (not shown) is associated with the member 42 to provide a visual representation of the vertical position of the saw 28.

The first drive means 14 includes a third bevel gear 46 in meshing engagement with material first bevel gear 36 for rotating the latter. The first drive means 14 also includes a motor 43. Also included is a first gear train including a clutch means 50 for drivingly interconnecting the motor 48 and the third bevel gear 46. The clutch means 50 transmits driving forces from the motor 48 to the lead screw 24 of the saw means and slips in response to a predetermined resistance thereby preventing injury to the drive means 14. As an example, a slug or some other piece of material may be lodged in the apparatus to prevent the saw 28 from physically moving vertically and such could ruin the gears of the gear train or ruin the motor 48, however, the clutch will slip when this force reaches a predetermined value thus preventing such injury to the drive means 14.

The component 52 is a sensing means for determining the position of the saw, the operation of which will become more clear hereinafter. The sensing means also includes a second gear train driven with the first-mentioned gear train and which will be described after describing the first-mentioned gear train. The first-mentioned gear train includes a first gear 61 rotated by the motor 48. A second gear 62 is rotated by the first gear 61. A third gear 63 is rotated with second gear 62. A fourth gear 64 is rotated by the third gear 63. A fifth gear 65 is rotated with the fourth gear 64. A sixth gear 66 is rotated by the fifth gear 65. The third bevel gear 46 is rotated with the sixth gear 66. It will be noted that the second gear 62 is larger in diameter than the first gear 61, the fourth gear 64 is larger in diameter than the third gear 63, and the sixth gear 66 is larger in diameter than the fifth gear 65. The second and third gears 62 and 63 are coaxially supported on a first shaft 67. The fourth and

fifth gears

64 and 65 are coaxially supported on a second shaft 68. The sixth gear 66 and the third bevel gear 46 are coaxial and rotate in unison by being secured to a shaft 69 which has different diameters therealong.

The clutch means 50 is associated with the fourth gear 64 and transmits forces between the fourth gear 64 and the fifth gear 65.

The second gear train includes a seventh gear 77 which is coaxial with and rotated with the sixth gear 66, i.e., the gear 77 is secured to the shaft 69. An eighth gear 78 is rotated by the seventh gear 77. A ninth gear 79 is rotated with the eighth gear 78. A tenth gear 80 is rotated by the ninth gear 79. An eleventh gear 81 is rotated by the tenth gear 80. As seen in the drawings, the eighth gear 78 is larger in diameter than the seventh gear 77, and the tenth gear 80 is larger in diameter than the ninth and

eleventh gears

79 and 81 respectively. The eighth and

ninth gears

78 and 79 are supported by the shaft 82. The tenth gear is supported by the shaft 84.

As is apparent, any movement of lead screw 24 is reflected in angular movement of gear 81. The movement of gear 81 controls the output of component 52 which is an angular position encoder calibrated to develop digital signals in the 8-4-2 -1 BCD code representative of the actual position of the saw in picas and points. Thus, two digital signals are developed to represent the pica tens digit, four digital signals represent the pica units digit, one represents the point tens digit and four represents the point units digit. As is apparent to those skilled in the art, various types of encoders including optical and mechanical encoders may be employed to develop digital signals representative of the actual position of a member. However, it is preferred that encoder 52 be an angular shaft encoder of the type commercially available whose output is responsive to the position of gear 81.

As illustrated, the whole assembly is supported between two

plates

34 and 86 which are secured together by the crossmembers 88 which have screws or bolts 90 extending thereinto, and clearly enables the saw position to be altered both manually and by drive means 14.

Turning now to the electronic control unit for controlling drive means 14, there is shown with particular reference to FIG. 6 a decoder implemented with a NAND logic. The six input lines of the decoder may be taken from any of various types of information bearing means (not shown) designed to develop a set of six signals. One method of supplying the input signals is by modifying a standard Fairchild mechanical paper tape reader in a known manner. Another method is by modifying a standard optical tape reader such as a Star-Autosetter so that it can directly develop a set of six signals on the input lines corresponding to the state of the levels on a six level paper tape when an auxiliary function signal is developed in the well known manner. ln addition, magnetic tape and a magnetic tape reader may be used, or the control signals can be supplied directly by a computer.

The decoder of FIG. 6 is designed to convert the standard six level teletype code into the 8-4-2-! BCD code and to develop special auxiliary function signals. This is carried out in the following manner. Six input lines are shown and labeled as

lines

0, 1, 2,3, 4 and 5 which generally represent whether or not a hole is sensed by a tape reader (not shown) at a particular tape level. If a hole is sensed, a positive potential appears on its corresponding line and if not, the line is at ground. The inverse of each input line is also developed. These inputs are applied to a set of

NAND gates

101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121,123 and 1 25 in the following manner. The inputs of gate 1 01 are

lines

1, 2, 3, 4, 5. The inputs of gate 103 are

lines

1, 2, 3, 4, 5. The inputsgf gate 105 are 1,2, 3, Control 5. The input of gate 107 are 1, 2, 3, 4, 5. The inputs of gate 109 are 1 2, 3,4, 5. The inputs of gate 111 are 1,2, 3, 4 5. The inputs ofgate 113 are 1, 2, 3,4, 5. The inputsgf gate 115 are T, 2, 3,4,5. The inputs of gate 117 are 1, 2, 3, 4,5. These inputs are designed to decode numbers 1 through nine fron 1 the teletype alphanumeric code. The inputs of gate 11 9 are 0,1, 2, 3,4, 5. The inputs of gate 12 1 are 0, 1, 2, 3, 4,5. The inputs of gate 123 are 0, 1,2,3, 4, '5. The inputs of gate are 0, 1', 2', 3, 4, 5. The output of gate 119 represents the inverse of the saw control signal, shown as S. The output of gate 121 represents the inverse of the knife control signal, shown as K. The output of gate 123 repr esents the inverse of the knife block control signal, shown as D. Finally, the output of gate 125 repre s ents the inverse of the magazine control signal, shown as M. As is apparent the decoder of H6. 6 develops signals for controlling other auxiliary linecasting machine functions automatically in addition to the saw, but this invention relates generally to controlling the saw. This decoder is designed to be used in conjunction with the systems disclosed in applications P-302 and P-303 entitled Automatic Mold Disc Control System for a Linecasting Machine and Automatic Knife Block Control Assembly for a Linecasting Machine and assigned to the assignee of this application.

To develop digit signals in the 8-4-2-1 BCD code, a second set of

NAND gates

127, 129, 131 and 133 are employed. The inputs of gate 127 are the outputs of

gates

101, 105, 109, 113 and 117. The inputs of gate 129 are the outputs of

gates

103, 105, 111 and 113. The inputs of gate 131 are the outputs of

gates

107, 109, 111 and 113. Finally the inputs of gate 133 are the outputs of gates 115 and 117.

The output of gat e 127 is then applied to NAND gate 137 whose output is the 1 line of the 8-4-2-1 BCD code. The output of gate 129 is applied to NAND gate 139 whose output is the 2 line. The output of gate 131 is then applied to NAND gate 141 whose output is theTline, and the output of gate 133 E applied to the input of NAND gate 143 whose output is the 8 line. Finally a0 output line is developed from NAND gate whose inputs are the 0, 1, 2, 3,4, 5 lines from the information bearing means. The flline is used to differentiate the digit zero from the absence of a signal. The signals developed in the 1, 2, 4 and 8 lines of the decoder of FIG. 6 are sequentially stored in the storage registers shown generally at 200, 202, 204 and 208 in H6. 70. Register 200 is designed to store the pica tens digit and consists of two flip-

flops

203 and 205 with 203 storing the ones digit and 205 the twos digit. Register 202 is designed to store the pica units digit and consists of four

flipflops

211, 215, 219 and 223 with 211 storing the ones digit, 215 storing the twos digit, 219 storing the fours digit and 223 storing the eights digit. Register 204 is designed to store the points tens digit and consists of one flip-flop 227. Register 208 is designed to store the points units digit and consists to four flip-

flops

231, 235, 239 and 243 with 231 storing the ones digit, 235 storing the twos digit, 239 storing the fours digit and 243 storing the eights digit. As shown each of the flip-flops consists of a pair of NAND gates connected together in the well-known manner. Each flip-flop has a zero and one output. As is conventionally understood, the zero output is in the one state and the one output is in the zero state when the flip-flop is in the reset state. Further, positive logic is employed throughout the system.

The set line of each of the flip-flops is directly connected to an associated line for semiautomatic operation enabling the registers to be set by manual switching. These semiautomatic input lines are shown at 192, 196, 210, 214, 218, 222, 226, 230, 234, 236, 242. Each line is generally maintained positive in the absence of a signal. The semiautomatic lines are controlled by manual switching means (not shown) and they permit the registers to be set manually from a control panel (not shown). For setting the flip-flops automatically from information developed by the decoder, means are provided for sequentially permitting the signals from the decoder to set the registers as follows. Each flip-flop has an associated NAND gate shown at 201, 205, 209, 213, 217, 221, 225, 229, 233, 237 and 241. One input of each of

gates

201, 209, 225, 229 is the ones line from the decoder. One input of each of gates 205,213 and 233 is the twos line from the decoder. One input of each of

gates

217 and 237 is the fours line from the decoder. One input of each of gates 221 and 241 is the eights line from the decoder. in order to sequentially set registers 200, 202, 204 and 206, four enable lines are provided 245, 247, 249 and 251 referred to as the pica tens, pica units, points tens, points units lines respectively. One input of each of gates 201 is line 245. One input of each of

gates

209, 213, 217 and 221 is line 247. One input of gate 225 is line 249 and one input of

gates

229, 233, 237 and 241 is line 251. Since

lines

245, 247, 249 and 251 are generally at ground, information appearing on

decoder lines

1, 2, 4 and 8 cannot pass to the

registers

200, 202, 204 and 206. The state of

lines

245, 247, 249 and 251 is controlled by counter 253 shown in FIG. 7. Counter 253 has three stages 255, 257 and 259 formed by flip-flops wired together in the conventional matter for a binary up counter. Counter 253 is cleared by applying a ground potential to normally positive clear line 461. The outputs of the various stages of counter 453 are wired to

gates

263, 265, 267 and 269 in the conventional manner so that

lines

245, 247, 249 and 251 are in the zero state except when the

counter stores numbers

1, 2, 3, 4 in 8-4-2-1 BCD form at which

time lines

245, 247, 249 and 251 are in one state respectively as the counter goes from 1 to 4. The count pulses are applied to the counter 253 through NAND gate 271. NAND gate 271 has three inputs, all of which must be in the one state before a count pulse is applied to counter 253. One input is taken from the 1 output of flip-flop 472. The second input is the output of NAND gate 275.

NAND gate 275 has as its inputs the 0, 1, 2, 4 and 8 lines from the decoder as well as the inverted output from NAND gate 277 whose inputs are the K, and Ni lines from the decoder. In the absence of a signal appearing on the input lines of the decoder, the decoder outputs are in the zero state and their inverses in the one state so that the output of gate 275 is at ground blocking signals to counter 253. However, any signal received on the input lines of the decoder will drive the output of gate 275 positive.

The second input to gate 271 is the one output of control flip-flop 273 which is at ground blocking pulses to counter 253 until flip-flop is set by the receipt of a pulse on its set line from saw signal S. The third input to gate 271 is the output of gate 279 whose inputs are the ones output of stages 255 and 259. Hence, the output of gate 279 is positive until counter 253 stores the number fiveat which time gate 271 blocks further pulses to counter 253. In addition to being applied to the set line of flip-flop 273, the S line from the decoder is applied to reset line 279 which is coupled to the reset inputs of each of the flip-flops of

registers

200, 202, 204 and 206. Hence, registers 200, 202, 204 and 206 remain set storing the desired S 3W position until the next saw reset signal is received on line The means connecting and disconnecting power to the drive means as shown in FIG. 9 and hereinafter described is as follows. Inverter 250 has its input connected to the 0 output of stage 259 and its output coupled through resistor 252 to a 5- volt source and to the base of NPN transistor 262. Transistor 262 has its emitter grounded and its collector connected to a 24-volt source through the energizing circuit of relay 248. Hence, transistor 262 conducts only if counter 253 stores a number greater than three. NAND gate 244 has one input coupled to a 5-volt source through relay 248 and to ground through resistor 258. Its other input is the null output of the comparator hereinafter described in connection with FIG. 0. Its output is coupled to clear line 261-and is positive except when relay 248 si closed and a null signal is sensed. When the output of gate 244 is driven to ground, counter 253 is reset.

A system is also shown in FIG. 7 for turning off the drive means when the system is malfunctioning. The upper limit line and lower limit lines from the comparator of FIG. 0 are applied in parallel through

inverters

254 and 256 to the set line of flip-flop 260. The reset line of flip-flop 260 is coupled through to a 5-volt source and to reset line 279 from a control console (not shown). The 0 output line of flip-flop 260 is coupled through inverter 264 to the base of NPN transistor 268 which has its emitter grounded and its collector coupled to a system cutout switch (not shown). Hence, when an upper limit or lower limit signal is received, flip-flop 260 is set cutting out the system. The reset line from the control console is used to reset this flip-flop when the trouble in the system is resolved.

Continuing with the description of the means for connecting and disconnecting power, with reference to FIG. 7a, the energizing coil of power switch relay 174 is coupled from ground to a 24-volt source through relay 248 and has coupled across it delay means consisting of capacitor 270 and resistor 272. Hence, when relay 240 is closed the energizing coil of relay 274 is energized a predetermined time thereafter owing to the delay means 270 and 272 which results in power being connected to the drive means as more particularly shown with reference to FIG. 9. As soon as a null signal is received counter 253 is cleared opening up relay 248 and a predetermined time later energizing coil 274 is deenergized opening relay 274 thus disconnecting the power from the drive means.

Turning now to further information manual switching or semiautomatic mode control, there is shown a pair of switches on the

control panel

276 and 278. The energizing coil of relay 280 is connected from a 24-volt source to ground through

switches

276 and 270, and also has a delay be noted capacitor 282, coupled across it. One terminal of the energizing coil of relay 280 is coupled through normally closed relay 200 to line 299 and through switch 276 and normally open relay 230 to line 282 which is adapted to set the third stage 259 of counter 253. Hence, when semiautomatic operation is desired, both

switches

276 and 278 are closed clearing registers 200, 204, 206 and 208 and if it is not already cleared, counter 253.

Shortly thereafter, owing to the delay resulting form capacitor 282, normally closed relay 280 is opened and reset line 279 returns to 5-volts However, a ground potential is applied to through line 282 to clear line 261 owing to the closing of normally open relay 200 and stage 259 is set. Thus counter 253 is set at four and as

registers

200, 202, 204, and 206 are set from the control panel by manual switching means, the system operates as if it had been set by signals from the decoder. Tl'lliS, in operation, when a signal is received on saw control line S, flip-flop 472 is set resetting all

registers

200, 202, 204 and 206 and the next four hits of information received on

lines

2, 3, 4 and 5 from the decoder are sequentially stored in

registers

200, 202, 204 and 206 respectively as counter 253 is pulsed by the output of gate 271 four times. As soon as the counter stores a number greater than three the previously described operation of

relays

248 and 274 begins. If another auxiliary function is to be set, counter 253 will be driven to five and gate 271 will close eliminating the possibility of any further information on

lines

1, 2, 4 and 8 being placed in the registers. The saw will then be driven to the command position and counter 523 will be cleaned by a null signal and the drive means turned off as has been previously described. it should be noted that the information from the decoder to set

registers

200, 202, 204 and 206 is received sequentially and is not interrupted by a steering pulse.

Each flip-flop of the

registers

200, 202, 204 and 206 has two outputs conventionally labeled and 1. The outputs of such registers are applied to a parallel comparator more particularly sown in FIGS. 7 and 7a. The 1 output of each flip-flop is shown in FIGS. 7 and 7a with reference to the digit stored in the flip-flop and the 0 output is shown as its inverse. Thus the 0 output of flip-flop 207 is applied to NAND gate 301 and the 1 output to NAND gate 303. The 0 output of flip-flop 203 is applied to NAND gate 305 and the 1 output to NAND gate 307. The 0 output of flip-flop 223 is applied to NAND gate 309 and the 1 output to NAND gate 311. The same pattern is followed with respect to the outputs of flip-

flops

219, 215, 211, 227, 243, 239, 235 and 231 with respect to NAND gate pairs 313 and 315,317 and 319,321 and 323, 325 and 327, 329 and 331, 333 and 335, 337 and 339, 341 and 343 respectively. The other inputs to these gates are developed from the position shaft encoder 52 previously described in connection with FIGS. 1 through 5 and shown in FIGS. 7 and 7a with the symbol (EN) to differentiate the inputs from the registers shown as (IN) in the following manner. The pica tens encoder 2 line is applied to gate 301 and its inverse developed through inverter 345 is applied to gate 303. Similarly the pica tens encoder 1 line, the pica units encoder 8 line, the pica units encoder 4 line, the pica units encoder 2 line, the pica units encoder 1 line, the points tens encoder 1 line, the point units encoder 8 line, the point units encoder 4 line, the point units encoder 2 line, and the point units encoder 1 line are applied to

gates

305, 309, 313, 317, 321, 325, 329, 333, 337, 341 respectively and the respective inverted signals are applied through

inverters

347, 349, 351, 353, 355, 357, 359, 361, 363 am 365 to gates 307, 311,315, 319, 323, 327, 331, 335, 339 and 343 respectively.

Since

gates

301, 305, 309, 313, 317, 321, 325, 329, 333, 337 and 341 operate in connection with developing a down signal they may be referred to as down gates with gate 301 being the down pica tens 2 gate, gate 305 being the down pica tens 1 gate, etc. Similarly

gates

303, 307, 311, 315, 319, 323, 327, 331, 335, 339 and 343 may be referred to as up gates since they are employed in the development of the up signal with gate 303 being the up pica tens 2 gate, etc.

The parallel comparator of FIGS. 7 and 7a is designed to recognize the most significant digit from

registers

200, 202, 204 and 206 which does not coincide with that from the encoder and block out any lower order deviations within each section of the comparator. The comparator is constructed from digital logic means and, as shown, form NAND logic. Therefore, the output of gate 301 is applied to the input of gate 307 the output of gate 303 is applied to the input of gate 305 in the pica tens section. In the pica units section the output of gate 309 is applied to

gates

315, 319, 323 and the output of gate 311 is applied to

gates

313, 317 and 321. Finally, the output of gate 317 is applied to gate 323 and the output of gate 319 is applied to gate 321. Similarly, the gates of the point units section are coupled together as described for the pica units section. The purpose being to cut off any lower order noncoincidence in the other set of gates so that as soon as a noncoincidence is detected to drive either the up or down outputs, all opposite lower order gates are disabled in that section of the comparator.

Each section of the comparator shown generally at 281, 283, 285 and 287 has a down gate and an up gate. The pica tens section has a down gate 367 whose inputs are the outputs of

gates

303 and 307. The pica units section has a down gate 371 whose inputs are the outputs of

gates

309, 313, 317 and 321 and an up gate 373 whose inputs are the outputs of

gates

311, 315, 319 and 323. The points tens section has a down gate 375 whose input is the output of gate 325 and an up gate 377 whose input is the output of gate 327. The point units section has a down gate 379 whose inputs are the outputs of

gates

329, 333, 337 and 341 and an up gate 381 whose inputs are the outputs of

gates

331, 335, 339 and 343.

The results of the parallel comparison operation at the digit level, that is the pica tens digit, the pica units digit, etc. taken from

gates

367 and 369, and 371 and 373 are combined to develop the three signals, referred to as first and second drive means control signals hereinafter referred to as the drive up signal and the drive down signal as well as a null signal in the following manner. The outputs from

gates

367 and 269 are fed to

inverters

383 and 385 respectively. The outputs of

gates

371 and 373 are fed to

NAND gates

387 and 389 respectively with the other input of gate 387 being the output of 383 and that of gate 389 being 385. The output of

gates

375 and 377 are fed to

NAND gates

391 and 393 respectively with the other inputs of gate 391 being the outputs of

gates

385 and 389 and the other inputs of gate 393 being the outputs of

gates

383 and 387. The output of

gates

379 and 381 are fed to

NAND gates

395 and 397 respectively with the other inputs of gate 395 being the outputs of

gates

385, 389 and 393 and the other inputs of gate 397 being the outputs of

gates

383, 387 and 391. The outputs from

gates

383, 387, 391 and 395 are placed at the inputs to down NAND gate 300 whose output is the down signal voltage and the outputs from

gates

385, 389, 393, and 397 are placed at the input of up NAND gate 302 whose output is the up voltage signal. The null signal is developed by inverting the up signal and the down signal through

inverters

304 and 306 respectively and applying the inverted signals to NAND gate 308 and then inverting the output of gate 308 by inverter 310. The null signal is taken from inverter 510. It is applied to gate 244 as shown in FIG. 6. Thus, the position stored in the

registers

200, 202, 204 and 206 is at all times being compared by the parallel comparator with the actual position of the saw and signals are constantly being developed indicating whether these signals are in coincidence or whether to achieve coincidence the saw must travel up wards or downwards, i.e., whether the number stored in the registers is greater or less than the number received from the encoder.

In addition to comparing the signals from the encoder with those in the register the comparator also is designed to develop a third signal, a reduce voltage signal, when the saw is moving upward and is near the command position. This signal is developed in the following manner and is taken from the output of NAND gate 312 whose inputs are the outputs of

NAND gates

314, 316, 318, 320. One input of gate 314 is the output of NAND gate 322 inverted through inverter 324 and another is the output of NAND gate 326 inverted through inverter 328. The inputs of NAND gate 322 are the outputs of

gates

309, 313 and 317 and the inputs of NAND gate 326 are the outputs of

NAND gates

311, 315 and 319. A third input of NAND gate 314 is the output of inverter 383, a fourth is the output of inverter 385, and the fifth is the output of inverter 304. NAND gate 316 has the output of inverter 304, the output of NAND gate 330, and the output of inverter 332 as inputs. Inverter 332 inverts the output of NAND gate 334 whose inputs are

inverters

383 and 385.

NAND gate 318 has five inputs one being the output of gate 301, and a second being the output of gate 303. The third input is the output of inverter 336 whose input is the output of NAND gate 338. I' he pica units8line from the encoder, the pica units register line, the pica units register 2 line, and the pica units register 1 line are inputs of gate 338. Another input to gate 318 is taken from inverter 340 whose input is the output of NAND gate 341. The two inputs of gate 342 are the

pica units encoder

8 and 1 lines. Finally the last input of gate 318 is the output of inverter 304.

Gate 320 has five inputs, one being the output of inverter 30 4, another being the output of inverter 340. A third is the output of inverter 344 whose input is the output of NAND gate 346 and NAND gate 346 has the pica tens register linesT and 2 as inputs. The other input of gate 320 is the output of inverter 320 whose input is the output of NAND gate 350 both of whose inputs are from the pica tens encoder 1 line.

NAND gate 330 has as its inputs the outputs of

NAND gates

352, 354, 356 and 350. NAND gate 352 has as one input the output of inverter 360 whose input is the output of NAND gate 376. NAND gate 376 has the pica units register 8 line and the Time as inputs. The other input of NAND gate 352 is the output of inverter 362 whose input is the output of NAND gate 373. NAND ate 370 has as its inputs the

pica units encoder

1, 2, 4 and lines.

NAND gate 354 has two inputs, one being the output of inverter 364 and the other being the output of inverter 366. The input of inverter 364 is the output of NAND gate 380 whose inputs are the pica units register 2, 4 andzlines. The inputs of inverter 366 is the output of NAND gate 382 whose inputs are the pica units encoder 1, 2and 4 lines.

The inputs of NAND gate 356 are the outputs of

inverters

363 and 370. Inverter 368 has as its input the outpu t o NAND gate 304 whose inputs are the pica units register 1, 2 and 4 lines. inverter 370 has as its input the output of NAND gate 330 whose inputs are the

pica units encoder

1, 2 and 4lines.

NAND gate 350 has as its inputs the outputs of

inverters

372 and 374. The input of inverter 372 is the output of NAND gate 303 whose inputs are the pica units register T, 2 and 4 lines. The input of inverter 374 is the output of NAN P gate 390 whose inputs are the

pica units encoder

1,2, 4 and lines. As is apparent, the reduce voltage signal only appears when the saw is being driven upward and appears when the saw is on the order of one pica or less from the command position.

in addition to developing a reduce voltage signal, the comparator also develops upper limit and lower limit signals for indicating that the saw is being driven outside its correct limits of travel owing to error either in the system or in the command position information. These signals are developed in the following manner.

The upper limit signal is taken from the output of inverter 400 whose input is the output of NAND gate 404 and the lower limit signal is taken from the output of inverter 402 whose input is the output o f NAND gate 406. NAND gate 404 has the points ten encoder 1 line as one input and the outputs of

NAND gates

414, 416 and 410 as the others. NAND gate 414 has the

pica tens encoder

1 and 2 lipes as in uts. NAND gate 416 has the

pica units encoder

1, 2, 4 and lipes'as in; puts. NAND gate 418 has the

points units encoder

1, 2 and 4 lines as inputs. NAND gate 406 has the points tens encoder 1 line and the outputs of

inverters

420, 422. and 424 as inputs. lnverter 420 has as its input the output of NAND gate 426 whose inputs are pica

tens encoder

1 and 2 lines. Inverter 422 has as its input the output of NAAJD gate 428 whose inputs are the

pica units encoder

1, 2 and 4 lines. Inverter 424 has as its input the output of NAND gate 420 whose inputs are the

points units encoder

1 and 3 lines. As is apparent, the upper limit signal is developed when the position of the saw reaches or exceeds 30 pica, 2 point and the lower limit signal is developed when the position of the saw is 3 pica, 9 point or below.

The-up drive, down drive, and reduce voltage line are used to control the drive means of the system shown more clearly in FIG. 9. The motor 40 is a permanent magnetic DC motor and its operationin connection with the system is shown in FIGS. 1 through 5. The magnitude of the voltage across terminals A and 19 which appears across the armature of motor 48 determines the speed of the motor while the polarity determines its direction. The system as shown applies a 28-volt potential across the armatureto drive the motor rapidly and a potential on the order of l4-volts to drive motor-48 slowly in response to a reduce voltage signal.

The polarity of the potential across terminals A and B is determined by the state of

PNP switching transistors

401, 403, 405 and 407. When

transistors

403 and 407 are conducting with

transistors

401 and 405 not conducting, there is a potential drop across the armature from terminal A to terminal B. Similarly, when

transistors

401 and 405 are conducting with

transistors

403 and 407 not conducting, there is a potential drop across the armature from terminal B to terminal A.

The emitters of

transistors

401 and 407 are tied to a 28-volt source through resistor 409 and the emitter collector path of PNP transistor 411 and relay 274. The respective collectors of

transistors

407 and 401 are tied to terminals A and B respectively.

Transistors

405 and 403 have their respective collectors grounded and their emitters coupled to terminals A and B respectively.

isolation diodes

415 and 413 are coupled from ground to terminals A and B respectivelyhaving their anodes grounded.

The bases of both

transistors

401 and 405 are coupled to a transistor power switch means which includes the collector of NPN power transistor 413 and the bases of

transistors

403 and 407 are coupled to the collector of NPN power transistor 419. Transistor 419 has its emitter grounded and its collector is coupled through resistor 421 to a 28-volt source. The base of transistor 419 is coupled through

resistors

423 and 425 to ground and through resistor 423 and the collector emitter path of PNP transistor 427 to a 28-volt source. The emitter of transistor 427 is tied to a 28-volt source and also coupled to its base through

resistors

429 and 431. The base of transistor 427 is also coupled to ground through resistor 431 and NPN transistor 433 whose emitter is grounded. The base of transistor 433 is coupled to ground through resistor 435 and to a 5-volt volt source through

resistors

436 and 437. The drive down signal is applied to the base of transistor 433 through isolation diode 439 and resistor 436. This drive down power switch means as described,

controls switching transistors

401 and 405.

A second power switch means for controlling the potential applied to the base of transistor 413 is employed that is identical to that for controlling the potential applied to the base of transistor 419.

Resistors

441, 443, 445, 449, 451, 455, 456, 457,

transistors

447 and 453 and diode 459 are connected together in the same manner as above-described for

resistors

421, 426, 425, 429, 431, 435, 436, 437, transistors 427 and 433 and diode 439 respectively. Thus, a drive up power switch means

controls switching transistors

401 and 405.

Turning now to the control of transistor 411, the base of transistor 411 is coupled to a 28-volt source through

resistors

461 and 463. The base of transistor 411' is also coupled to ground through resistor 461 and the collector emitter path of NPN transistor 465. Transistor 465 has its emitter grounded and its base is coupled to ground through

resistors

467 and 469. The base of transistor 465 is also coupled to a 5 volt source through PNP transistor 471. The base of transistor 471 is coupled to a 5-volt source through

resistors

473 and 475 and the reduce voltage signal is applied to the base of transistor 471 through isolation diode 472 and resistor 473.

As is apparent the voltage applied to the emitters of

transistors

401 and 407 is approximately 28-volts when transistor 411 is conducting and substantially less, on the order of l4-volts, when transistor 411 is not conducting owing to the voltage drop across resistor 409, when relay 274 is closed. Resistor 409 is chosen so that the voltage at the emitters of

transistors

401 and 407 when transistor 411 is not conducting is l4-volts. In operation, in the absence of a positive pulse at the cathode of diode 472, the base of transistor 471 is substantially at ground and transistor 471 conducts. This results in approximately 5-volts applied to the base of transistor 465 causing it to conduct. Therefore, transistor 411 conducts and the full 28-volts is applied at the emitters of

transistors

401 and 407. However, when a reduce voltage signal is applied to the cathode of diode 472, transistor 471 is turned off and consequently so are transistors 465 and 411. Thus there is on the order of a 14-volt drop across resistor 409.

ill

Turning now to the control of transistor 419, in the absence of a drive down signal, the potential at the base of transistor 433 is substantially at ground and transistor 433 is thus not conducting. Consequently, transistor 427 is also not conducting with the result that the base of transistor 419 is substantially at ground. Thus, transistor 419 will not conduct. However, when a drive down potential is applied to the base of transistor 433, this transistor conducts placing transistor 427 in the conductive state and therefore also transistor 419 which thus renders

transistors

403 and 407 conductive.

The drive means thus is connected to a 28-volt source when relay 274 is closed as has been previously described. If a drive down signal is received, motor 48 will drive the saw downward through the command position. At this time a reduce voltage signal is applied as is a drive up signal and the saw is driven upward to the command position and relay 274 is opened disconnecting the 28-volt source from the drive means.

Alternatively, if after relay 274 is closed a drive up signal is received, the saw will be driven upward until it is on the order of 1 pica from the command position at which time a reduce voltage signal will appear. Then the saw will proceed more slowly toward the command position and stop when it reaches the command position. Relay 274 will then open.

We claim:

1. A saw assembly of the type for use in a linecasting machine, said assembly comprising; saw means movable between various cutting positions for cutting slugs, first drive means for moving said saw means, control means for activating and deactivating said first drive means, manually operable drive means for moving said saw means independently of said first drive means, said means including a support, a mount slidably supported on said support, a saw rotatably disposed on said mount, a lead screw threadedly coacting with said mount for moving said mount along said support upon rotation thereof, a first bevel gear connected to said lead screw for rotating the latter, and wherein said manually operable drive means includes a second bevel gear in meshing engagement with said first bevel gear for rotating the latter, and wherein said first drive means includes a third bevel gear in meshing engagement with said first bevel gear for rotating the latter, a gear train including said clutch means and drivingly interconnecting said motor and said third bevel gear, said gear train including a first gear rotated by said motor, a second gear rotated by said first gear, a third gear rotated with said second gear, a fourth gear rotated by said third gear, a fifth gear rotated with said fourth gear, a sixth gear rotated by said fifth gear, and said third bevel gear being rotated with said sixth gear, said second gear being larger in diameter than said first gear, said fourth gear being larger in diameter than said third gear, said sixth gear being larger in diameter than said fifth gear, said second and third gears being coaxially supported on a first shaft, said fourth and fifth gears being coaxially supported on a second shaft, said sixth gear and said third bevel gear being coaxial, and wherein said clutch means transmit forces between said fourth and fifth gears, and said control means having a second gear train driven with said first-mentioned gear train for determining the position of said saw.

2. An assembly as set forth in claim 1 wherein said second gear train includes a seventh gear coaxial and rotated with said sixth gear, an eighth gear rotated by said seventh gear, a ninth gear rotated with said eighth gear, a tenth gear rotated by said ninth gear, and an eleventh gear rotated by said tenth gear, said eighth gear being larger in diameter than said seventh gear, said tenth gear being larger in diameter than said ninth and eleventh gears respectively.

3. A saw assembly control system for use in connection with a linecasting machine having saw means movable between various cutting positions for cutting slugs comprising a drive means for moving the saw means and control means for activating and deactivating said drive means including a decoder means for developing digital output signals; register means for storing the signals from said decoder means representative of a command cutting position of said saw; encoder means for devel o ing digital si nals representative of the actual position of sai saw, paralle comparator digital logic means adapted for developing first and second drive means control signals; means for controlling said drive means to drive said saw in a first direction in response to said first signal and in a second direction in response to said second signal, and wherein said output signals of said decoder means are in BCD form and said register means is adapted for storing signals in BCD form and includes four registers, a pica tens register for storing the pica tens digit, a pica units register for storing the pica units digit, a point tens register for storing the point tens digit, and a point units register for storing the point units digit of a command cutting position, and further wherein said encoder means develops at least a pair of signals in BCD form representative of the actual pica tens position, at least four signals in BCD form representative of the pica units position, at least one signal representative of the actual point tens digit, and at least four signals in BCD form for indicating the actual point units position; and wherein said parallel comparator means includes at least four gates adapted for receiving the pica tens signals from said pica tens register and said encoder, at least eight gates for receiving the pica units signals from said pica units register and said encoder, at least two gates for receiving the point tens signals from said point units register and said encoder, and at least eight gates for receiving the point units signals from said point units register and said encoder.

4. A saw assembly control system as defined in claim 3 wherein said comparator means includes means for providing a third signal and wherein said drive means reduces the speed of said saw in response to said third signal.

5. A saw assembly control system for use in connection with a linecasting machine having saw means movable between various cutting positions for cutting slugs comprising a drive means for moving the saw means and control means for ac tivating and deactivating said drive means including a decoder means for developing digital output signals representative of a command position of said saw; register means for storing the digital signals from said decoder means representative of the command position of said saw; encoder means for developing digital signals representative of the actual position of said saw, comparator means for comparing said signals in said register with said encoder signals for developing first and second output signals for controlling said drive means, said drive means including first and second solid state power amplifier means,

said first amplifier being responsive to said first output signal and said second amplifier being responsive to said second output signal of said comparator and wherein said drive means includes a motor having at least two terminals whose speed and direction is determined by the polarity and magnitude of the potential applied across said terminals, one of said terminals being coupled to ground through a first switching transistor and being coupled to a source of potential through a second switching transistor, the other of said terminals being coupled to ground through a third switching transistor and coupled to a source of potential through a fourth switching transistor, wherein said first amplifier means controls the state of said first and third switching transistors and wherein said second power amplifier means controls the state of said second and fourth transistors for determining the polarity of the potential applied across said terminals.

6. A saw control assembly of the type defined by claim 5 wherein said comparator means includes means for providing a third signal, and wherein said second and fourth transistors are coupled to said source of potential through a fifth switching transistor and a resistor arranged in parallel; and additionally including a third power transistor means controlled by said third signal adapted to control said fifth switching transistor.

Claims

1. A saw assembly of the type for use in a linecasting machine, said assembly comprising; saw means movable between various cutting positions for cutting slugs, first drive means for moving said saw means, control means for activating and deactivating said first drive means, manually operable drive means for moving said saw means independently of said first drive means, said means including a support, a mount slidably supported on said support, a saw rotatably disposed on said mount, a lead screw threadedly coacting with said mount for moving said mount along said support upon rotation thereof, a first bevel gear connected to said lead screw for rotating the latter, and wherein said manually operable drive means includes a second bevel gear in meshing engagement with said first bevel geaR for rotating the latter, and wherein said first drive means includes a third bevel gear in meshing engagement with said first bevel gear for rotating the latter, a gear train including said clutch means and drivingly interconnecting said motor and said third bevel gear, said gear train including a first gear rotated by said motor, a second gear rotated by said first gear, a third gear rotated with said second gear, a fourth gear rotated by said third gear, a fifth gear rotated with said fourth gear, a sixth gear rotated by said fifth gear, and said third bevel gear being rotated with said sixth gear, said second gear being larger in diameter than said first gear, said fourth gear being larger in diameter than said third gear, said sixth gear being larger in diameter than said fifth gear, said second and third gears being coaxially supported on a first shaft, said fourth and fifth gears being coaxially supported on a second shaft, said sixth gear and said third bevel gear being coaxial, and wherein said clutch means transmit forces between said fourth and fifth gears, and said control means having a second gear train driven with said firstmentioned gear train for determining the position of said saw.

3. A saw assembly control system for use in connection with a linecasting machine having saw means movable between various cutting positions for cutting slugs comprising a drive means for moving the saw means and control means for activating and deactivating said drive means including a decoder means for developing digital output signals; register means for storing the signals from said decoder means representative of a command cutting position of said saw; encoder means for developing digital signals representative of the actual position of said saw, parallel comparator digital logic means adapted for developing first and second drive means control signals; means for controlling said drive means to drive said saw in a first direction in response to said first signal and in a second direction in response to said second signal, and wherein said output signals of said decoder means are in BCD form and said register means is adapted for storing signals in BCD form and includes four registers, a pica tens register for storing the pica tens digit, a pica units register for storing the pica units digit, a point tens register for storing the point tens digit, and a point units register for storing the point units digit of a command cutting position, and further wherein said encoder means develops at least a pair of signals in BCD form representative of the actual pica tens position, at least four signals in BCD form representative of the pica units position, at least one signal representative of the actual point tens digit, and at least four signals in BCD form for indicating the actual point units position; and wherein said parallel comparator means includes at least four gates adapted for receiving the pica tens signals from said pica tens register and said encoder, at least eight gates for receiving the pica units signals from said pica units register and said encoder, at least two gates for receiving the point tens signals from said point units register and said encoder, and at least eight gates for receiving the point units signals from said point units register and said encoder.

5. A saw assembly control system for use in connection with a linecasting machine having saw means movable between various cutting positions for cutting slugs comprising a drive means for moving the saw means and control means for activating and deactivating said drive means including a decoder means for developing digital output signals representative of a command position of said saw; register means for storing the digital signals from said decoder means representative of the command position of said saw; encoder means for developing digital signals representative of the actual position of said saw, comparator means for comparing said signals in said register with said encoder signals for developing first and second output signals for controlling said drive means, said drive means including first and second solid state power amplifier means, said first amplifier being responsive to said first output signal and said second amplifier being responsive to said second output signal of said comparator and wherein said drive means includes a motor having at least two terminals whose speed and direction is determined by the polarity and magnitude of the potential applied across said terminals, one of said terminals being coupled to ground through a first switching transistor and being coupled to a source of potential through a second switching transistor, the other of said terminals being coupled to ground through a third switching transistor and coupled to a source of potential through a fourth switching transistor, wherein said first amplifier means controls the state of said first and third switching transistors and wherein said second power amplifier means controls the state of said second and fourth transistors for determining the polarity of the potential applied across said terminals.