US3548402A

US3548402A - Adaptive timing technique

Info

Publication number: US3548402A
Application number: US585621A
Authority: US
Inventors: Arnold Schumacher
Original assignee: Sanders Associates Inc
Current assignee: Lockheed Corp
Priority date: 1966-10-10
Filing date: 1966-10-10
Publication date: 1970-12-15
Anticipated expiration: 1987-12-15
Also published as: NL6713749A; CH491457A; FR1551958A; DE1549878B2; DE1549878A1; NL166556B; GB1198834A; NL166556C

Description

2 Sheets-Shoot 1 Filed Oct. 10. 1966 FIG. 1.

I l i I ISOLATING l AMPS I 82 SC HMlTT TRIGGER posmnw DONE SIGNAL FIGS.

r/vvmworz ARNOLD SCHUMACH E R ATTORNEY Dec. 15, 1970 A. SCHUMACHER 3,543,402

ADAPTIVE TIMING TECHNIQUE Filed Oct. 10, 1966 2 Sheets-Sheet 2 SUBTRACTER 3e 34 :48 3s 53 so DATA R52 ADDRESS A'B LE /l0 I OR I CORE Y I L MEMOR J y v-- l I I8 I l COUNTER I l BUFFER REGISTER A zo CLOCK CONTROL ALPHA X Y POSIT. POSIT.

W J DECODER CHARACTER oRIINE I l DATA REQ. I I 3? LINE s2 23 I I I BUFFER REGISTER CONTROL AIFHA x Y I POSiT. POSIT. 42 BYTE BYTE. BYTE BYTE l L'ENGTH AxaAY NE COMPLETE REGISTER R msTglR REGISTER REGISTER r p C E 7g HARACIER QI x Y L 75 POSITION- DONE im 50ml? ARNOLD SCHUMACH ER 4 TTORIVE Y United States Patent Office 3,548,402 Patented Dec. 15, 1970 3,548,402 ADAPTIVE TIMING TECHNIQUE Arnold Schumacher, Milford, N.H., assignor to Sanders Associates, Inc., Nashua, N.H., a corporation of Delaware Filed Oct. 10, 1966, Ser. No. 585,621 Int. Cl. I-I01j 1/60 U.S. Cl. 340-324 Claims ABSTRACT OF THE DISCLOSURE to compensate fully for the different time requirements of the various instruction types. Each type of instruction uses only the time required to execute that instruction so that considerable time is saved in tracing all the information on the display.

This invention relates to an electronic display system. It relates more specifically to a method and means for optimizing display time.

The electronic display with which we are concerned here is used to display data in the form of characters, lines and other symbols on a cathode ray screen. For example, it may display aircraft course and speed to a radar controller, or it may show the current status of aircraft passenger reservations. In such a display, the data must be repeated or refreshed at a rate such that the. display appears continuous to the observer. This is usually accomplished by storing the data in a memory and continuously retrieving it therefrom for repetitive presentation on the screen.

The electronic display of a given Symbol (where the term symbol is used to indicate, for example, mark, line or line segment, character), is usually accomplished in two steps. First, the electron beam in the display tube is positioned on the screen at the point where the particular symbol is to be displayed, During this positioning time, the beam is blanked. Next, the system traces the symbol at that location. During this tracing period, the electron beam is unblanked so that the observer sees the symbol. Finally, the beam is again blanked and moved to another location on the tube where the next symbol is to be displayed.

The usual display system must be able to trace the symbols making up a frame of data in a sequential fashion, i.e. character-by-character, line-by-line, much like a typewriter. In some cases the system should also be able to draw them in a random fashion so that any symbol in the frame can be displayed after another symbol regardless of their relative position in the display.

The technique employed up to now in such display systems has been to allocate fixed time intervals for the beam positioning and symbol generation steps. Since in the random display situation, the positioning instruction for any symbol can call for full screen deflection, the positioning instructions for all symbols must be allowed sufiicient time for full screen deflection. Also, it takes more time to trace a complex symbol than a simple one. Therefore, the

tracing instructions for all symbols must allow suflicient time for the writing of the most complex symbol in the display.

It is apparent, therefore, that these prior display systems which allocate fixed times for the various plotting functions make very poor utilization of the available time because the positioning and/or tracing of a given symbol may actually require far less time than that allocated. This extra or dwell time, is, of course, wasted. More importantly, it seriously limits the amount of data that can be displayed in a given frame time. In systems calling for the continuous display of even relatively large amounts of information, the fixed time approach forces the employment of high speed data processing and deflection systems if the sum of all of the data is to be contained within a frame time and to yield a flicker-free display. Only in this way can these prior systems move the electronic beam quickly enough while still meeting the stringent positional accuracy requirements of the systems.

Accordingly, this invention aims to provide an electronic display system using conventional circuit components which is capable of a nonflickering presentation of a large amount of data within a given display frame time.

Another object of this invention is to provide an electronic display system which minimizes the time required to trace each symbol in the display.

Another object of this invention is to provide a method for optimizing the time required for electronically displaying data.

Other objects of the invention will in part be obvious and will in part appear hereinafter.

The invention accordingly comprises the several steps and the relation of one or more of such steps with respect to each of the others, and the apparatus embodying the features of construction, combination of elements and arrangement of parts which are adapted to effect such steps, all as exemplified in the following detailed disclosure, and the scope of the invention will be indicated in the claims.

For a fuller understanding of the nature and objects of the invention, reference should be had to the following detailed description taken in connection with the accompanying drawings, in which:

FIG. 1 depicts a cathode ray tube display made in accordance with this invention;

FIG. 2 is a block diagram of an electronic display system embodying the principles of my invention, and

FIG. 3 is a more detailed schematic diagram of a portion of the system illustrated in FIG. 2.

Briefly, my electronic display system employs a memory which stores the instructions for tracing the symbols comprising the frame of data to be displayed. Each instruction is in the form of a digital word which includes control information, the particular symbol and its location in the display. Provision is made for updating the data in the memory to keep the display current.

Each instruction is read out of the memory into a butler logic section which identifies the particular instruction and routes the parts thereof to the appropriate subunits in the system, such as position registers, line and character generators. The outputs of the position registers, line and character generators are voltages which are fed to vertical and horizontal deflection amplifiers to drive the cathode ray tube and thereby form the particular presentation. The memory is continuously scanned so that it refreshes or renews the data in the display at a rate suflicient to yield a nonflickering presentation.

The various symbols making up the display may be traced in the conventional two-step fashion, described above, involving positioning of the beam and then generation of the symbol.

3 Sensing circuitry is incorporated into the system to sense when beam positioning and symbol generation are completed. The sensing circuitry thus indicates that the electron beam is ready to follow the next instruction and the latter is then performed without waiting for a fixed time interval to elapse. Double buffering is employed so that a particular instruction is read out of the memory before it is actually needed. Therefore, it is immediately available for processing and directing the drawing of the next symbol in the display. While the next instruction is being processed, a request is also sent to the memory for the following instruction. Thus, this technique adapts the memory readout to the demands of the display circuitry.

My adaptive timing technique allows the display system to compensate fully for the different time requirements of the various instruction types. Each type of instruction uses only the time required to execute that instruction so that considerable time is saved in tracing all the information in a given display frame. This timesaving enables the system to present more information within one display frame time and also in a more flicker-free manner than is possible with conventional fixed time display systems.

Referring now to the drawings, FIG. 1 depicts a frame of data displayed on the screen of a cathode ray tube 9 in accordance with my adaptive timing technique. The display frame comprises an array of lines and characters showing the instantaneous courses and speeds of aircraft being tracked by radar. Ordinarily, such a display frame will consist of many separate symbols. However, here, for clarity and ease of illustration, we have shown only a few representative ones.

With reference to FIG. 2, my electronic display system comprises a memory 10 which stores in digital word form the instructions for tracing all of the symbols making up the display frame. Each instruction is read out of memory 10 into a buffer logic section 12 which stores it and routes it to the proper subunits in a dis play section 14. The display section 14 converts the digital data into analog voltages which trace the symbols in the display frame at the proper location on the screen of tube 9 (FIG. 1).

The system carries out each instruction only after a specific request to do so. More particularly, the display section 14 senses when the electron beam is properly positioned for tracing a line or character and sends a position done signal (trace request signal) to the buffer logic section 12 to immediately initiate the generation of the symbol. As soon as the symbol is traced, the system senses this also and a line or character complete signal is sent to the buffer logic section 12 to start the processing of the next instruction stored in the buffer logic section and to read another word out of memory 10. Thus, the electron beam is immediately repositioned to the correct location for drawing the next symbol.

In this way, memory 10 is adapted to the capabilities of display section 14. A shorter time is used for small beam deflection than larger beam deflection. Less time is used for tracing short lines and simple characters than for longer lines and more complex characters. My display system thus optimizes the time for drawing all the characters and lines making up the display frame.

Preferably, the memory 10 is a random access type such as a magnetic core memory. It includes the usual address and buffer registers. Also, it is connected to an input device (not shown) such as a radar receiver and associated computer in this example and is continuously updated to keep the data in the display current. Memory 10 is also continually cycled in the usual way by the readout circuits so as to continuously index through the various addresses therein and thereby refresh the display periodically so that it does not flicker. In practice, a refresh rate of 40 to 60 c.p.s. is found to produce a display which appears continuous to the observer when the cath- 4 ode ray tube employs medium or short persistence type phosphors.

The memory 10 may store several types of instructions, depending upon the particular application and the variety of information to be included in a given display frame. For ease of illustration, we will describe a system using only two types of thirty-two bit instructions, namely, a character instruction and a line instruction. The former has a structure which includes a control byte identifying the symbol as a character. This byte may additionally contain information to perform control functions which are not a part of the present invention. The character instruction also includes an X (horizontal) position byte and a Y (vertical) position byte which determine the lo cation on the tube 9 screen at which the particular character is to be traced. An alpha byte in its structure determines which character out of a repertoire of characters is to be traced at the given location. The character instruction includes also three other bits which pertain to parity, brightness and blink, in common with most display systems and with which we are not concerned here.

The character instruction thus causes the electron beam in the tube 9 to move in a blanked fashion to the X and Y coordinates of the character in the display and to draw the character identified by the alpha byte therein. If the particular character is a null or space character, the electron beam remains blanked at the X and Y position coordinates awaiting further instructions from the memory 10.

The line instruction also consists of three control bits as well as an X position byte and a Y position byte which define the coordinates to which the line is to be drawn. That is, they determine the end point of the line. There is also an alpha byte in its structure which indicates the length of the line. The line instruction contains, in addition, three bytes which relate to brightness, parity and blink.

The line instruction causes the electron beam to trace a line from the X and Y coordinates obtained from the previous instruction to the new X and Y coordinates. After the line is drawn, the electron beam remains at the new X and Y coordinates until the next instruction.

Data in memory 10 is read out only in response to a specific request. More specifically, the stages of memory 10 are coupled via a set of gates 18 to a buffer register 20 in buffer logic section 12. When memory 10 receives a data, request signal, it energizes the data lines to register 20 and sends a data ready pulse to enable gates 18 and load a character or line instruction into register 20.

Normally, the data request signal initiating readout from memory 10 signifies that the display section has completed tracing a particular symbol and is ready to receive the instruction for tracing the next symbol. However, a counter 21 which counts pulses from a clock 22 is included in the buffer logic section 12 to provide an artificial data request signal to memory 10 when the system is started up initially or in the event that for one reason or another the memory 10 does not receive a data request signal from buffer logic section 12 within a reasonable time. This prevents the system from stopping through failure to generate a data request signal. The counter 21 initiates a data request signal after a given number of pulses from clock 22 during which time symbol generation would have had to occur. Also, counter 21 is reset by each data request signal to memory 10.

All stages of register 20 are coupled via gates 23 to a second buffer register 24. Also, a decoder 32 decodes the control byte of the instruction contained in register 20.

Assume that the display system has just started. Counter 21 initiates a data request signal which causes an instruction to be transferred from memory 10 into buffer register 20. When the instruction is contained in register 20, decoder 32 applies a character or line signal to the gates 23.

Since the first item in the display frame has yet to be traced, counter 21 initiates another data request signal, which is also coupled to gates 23. In addition, gates 23 receive timing pulses (T.P.) from clock 22. The entire contents of register 20 are loaded into register 24 when the gates 23 are enabled by the coincidence of a data request signal, the timing pulse from clock 22, and the decoder 32 output. Except as otherwise noted, all of the other gates to be described in this system, with two exceptions, receive pulses from clock '22 and transfer data in this fashion. Gate 18 is one of the exceptions. It receives its pulses from memory as aforesaid. The same data request signal is also applied to memory 10 to transfer another word out of memory 10 into the new empty buffer register 20.

For ease of illustration, the timing pulses coupled from clock 22 to the various sets of gates are indicated by arrows, while the data lines leading to the gates terminate in diamonds.

It should also be mentioned at this point that suitable delays are built into the various gates and registers so that data can be read out of each register before the next instruction is loaded into it, eliminating the race problem.

Each character plotting function is accomplished by initially positioning the electron beam at the desired location on the screen of tube 9. Positioning of the beam is accomplished by first shifting the X and Y position bytes of the character instruction from register 24 to an X and Y position register 36 via gates 34. The gates 34 are enabled by a character signal from a decoder 42 connected to decode the control byte in register 24. Display section 14 converts the digitally expressed X and Y position data in the register 36 to analog voltages which drive the deflection elements in the tube 9, thereby positioning the beam at the location on the tube 9 screen at which the character is to be traced.

When the beam has reached the proper location, this is sensed by display section 14 in a manner to be described later. Display section 14 then sends a position done signal to gates 38 in buffer logic section 12. The character signal from decoder 42 is also fed to gates 38. The coincidence of these two signals enables gates 38 to transfer the alpha byte frorn register 24 into a character regis ter 40. This data is then used by display section 14 to trace the character at the given location on the tube 9 screen.

Simultaneously, decoder 42 decodes the timing control bits contained in the instruction stored in register 24 and sends a timing control signal to enable a gate 43. The same position done signal which initiates transfer of the alpha byte into character register 40 also enables gate 43 so that the next pulse from clock 22 initiates generation of the selected character as will be described.

After the character has been traced, display section 14 sends a character complete signal to an OR circuit 44 .i

in the buffer logic section 12. This becomes a data request signal to memory 10 and to gates 23 signaling that display section 14 has finished tracing the particular character and is ready for the next instruction.

The character instruction in register 24 may be a null or space character. This means that after the initial positioning of the electron beam, the beam remains blanked and nothing is written at that location. Rather, the display section waits for the next instruction from the buffer logic section 12. In this event, the character complete signal cannot come from section 14. Rather, when decoder 42 detects a null or space character in register 24, it enables a gate 45. Gate 45 does not receive pulses from clock 22. Instead, as soon as the electron beam has been positioned at the proper location on tube 9 as aforesaid, the position done signal from display section 14 is passed by gate 45 to OR circuit 44. This becomes a data request signal initiating further word readout from memory 10 and word transfer from register to register 24.

The utilization of two

buffer registers

20 and 24 in- 6 sures that the next instruction to be processed (located in buffer register 20) will be available immediately despite any delays in reading data out of the memory 10 into the buffer logic section 12. Such delays may be due, for example, to the physical distance between the two sections.

If the next instruction loaded into register 20 is a character instruction, it is processed exactly as described above. In this way, a series or array of symbols can be traced in any order on the screen of tube 9.

Assume now that a line instruction is loaded into buffer register 20. It is processed somewhat differently from a character instruction. As mentioned previously, the line is drawn from the location of the previous character or the location of the end of a previous line. A line can also be traced from the location of a previous null or space character. In fact, this is the usual practice for generating the first of a series of continuous lines.

A line instruction contained in register 20 is transferred to register 24 in the same fashion as a character instruction. Also, however, the stages of register 20 containing the X and Y position bytes of the line instruction (which represent the end point of the line to be traced) are coupled directly to a conventional subtracter 46 in buffer logic section 12. In addition, the stages of register 24 containing the X and Y position bytes of the previous instruction (corresponding to the beginning point of the line) are coupled directly to the subtracter 46, which is enabled by a line signal from decoder 32. The subtracter 46 forms AX and AY, i.e. the components of the line along the X and Y axes. The output of the subtracter is coupled via gates 48 to a register 50 which stores in digital form AX and AY. The register 20 stages containing the alpha byte approximating the length of the line to be drawn are coupled via gates 52 to a length register 53.

Gates 48 are enabled by a data request signal from OR circuit 44, and gates 52 are enabled by the coincidence of a line signal from decoder 32 and a data request signal as will be seen presently.

Thus, as soon as the line instruction is loaded into register 20, decoder 32 emits an enabling signal to subtracter 46 which then immediately forms AX and AY. This occurs while the previous character is being drawn in accordance with the instructions contained in register 24. Accordingly, AX and AY are available an appreciable time before the line is actually to be drawn, thereby minimizing delays in the system.

Immediately following the completion of the previous character trace, a data request signal enables

gates

48 and 52 and thus transfers AX and AY to register 50 and the digitally expressed line length from register 20 to register 53. AX, AY and the line length data are used in display section 14 to develop time-varying deflection voltages which then trace the line on the face of tube 9.

As mentioned above, the line instruction in register 20 also has control bits for controlling the timing of the line trace. These are decoded by decoder 32 and coupled to a gate 54. The aforesaid data request signal is also applied simultaneously to gate 54 which is then enabled and passes a timing pulse to section 14.

The same data request signal which initiated the line generation also transfers the line instruction to register 24 and initiates readout of the next memory instruction into register 20. Therefore, the delays built into the various gates and registers should be such that the line data contained in

registers

20 and 24 is loaded into

registers

50 and 53 before the new data is loaded into

registers

20 and 24.

If the next instruction transferred from memory 10 into register 20 at the commencement of the previous line trace happens to be another line instruction, it will be processed in the fashion just described. The new line is traced from the end of the previous line upon the occurrence of the next data request signal which follow the completion of the previous line. The

gates

48, 52 and 54 insure that the new line data is not routed to display section 14 until the completion of the previous line.

If that next instruction happens to be a character instruction, upon the completion of the previous line, the character instruction will be loaded into register 24. It is then routed to

registers

36 and 40 and the new character is traced on the screen of tube 9 as described previously.

Still referring to FIG. 2, the display section 14 is conventional for the most part. Data stored in the

various registers

36, 40, 50 and 53 in buffer logic section 12 is transferred directly to the appropriate subunits in display section 14. More specifically, the X and Y position data contained in register 36 is transferred to separate X and Y digital-to-

analog converters

60 and 62, respectively, which develop analog gross beam positioning voltages. These X and Y position voltages are fed via X and

Y summing amplifiers

64 and 66, and X and

Y deflection amplifiers

68 and 70, to the appropriate deflection windings on cathode ray tube 9.

A sensor 71 is connected to sense the outputs of

deflection amplifiers

68 and 70. Sensor 71 detects when the electron beam in tube 9 is positioned at the proper location for drawing a particular symbol and then issues the position done signal to buffer logic section 12 to initiate the next plotting function. Sensor 71 will be described later in more detail.

Display section 14 also includes a character generator 72 which responds to the contents of character register 40 by developing the appropriate time-varying X and Y microdeflection voltages to trace the particular character. These micro-deflection voltages are coupled to summing

amplifiers

64 and 66, respectively, and applied to the deflection coils in tube 9. Character generator 72 may have any one of a number of conventional designs whose control logic commences tracing a character upon receiving a timing pulse via gate 43 and emits a character complete signal to OR circuit 44 upon completion of the character trace. Character generator '72 supplies the usual unblanking signals to tube 9 via Z summing amplifier 74 and unblanking amplifier 76 to unblank the tube only during the actual generation of a character.

Display section 14 also includes a line generator 78 which responds to the contents of

registers

50 and 53 by producing time-varying deflection voltages. These are applied to the deflection coils of tube 9 via summing

amplifiers

64 and 66 to trace the particular line. Line generator 78 may be any one of a number of types. The one illustrated here traces lines at a constant velocity to achieve uniform line intensity regardless of line length. This means that the time required to trace a particular line depends upon its length. Therefore, the inputs to the generator '78 include, in addition to AX and AY from register 50, an approximation of line length from register 53.

The control logic of generator 78 commences tracing a line after receiving a timing pulse via gate 54 and emits a line complete signal to OR circuit 44 when the line trace is completed. Line generator 78 also supplies unblanking signals to tube 9 via summing amplifier 74 so that the tube is unblanked only during the actual line trace.

The sensor 71, which samples the voltages across the X and Y deflection coils of the cathode ray tube 9 to develop the position done signal, is illustrated in detail in FIG. 3. In the illustrated embodiment, the sensor comprises an isolating amplifier 82 connected to receive the output of deflection amplifier 68 and an isolating amplifier 85 connected to receive the output of amplifier 70. The outputs of the two

amplifiers

82 and 85 are coupled to a conventional Schmitt trigger 86. The output of the trigger 86 is a two-level signal which switches between its two D.C. levels in response to changes in the voltage across the deflection co ls.

The voltage across each of the deflection coils of tube 9 includes a very small component due to the internal resistance of the coil and a substantial induced component due to the changes in the deflection current, i.e.

dt' a As long as the electron beam in tube 9 is moving, the current through one or both deflection coils is changing. so that at least one of the induced voltage components has a finite value which maintains trigger 86 in one state. However, when the beam reaches its proper location on the tube 9 screen, the current through the deflection coils no longer changes. The voltage across both coils drops essentially to zero, switching trigger 86 to its other state and thereby sending a position done signal to

gates

38, 43 and 45 as described above.

The isolating amplifiers 82 and prevent feedthrough from one deflection coil to the other.

While I have shown specifically an analog circuit for generating the position done signal, digital methods can also be used for this purpose. For example, a conventional triangle solver can be provided in the buffer logic section 12 to determine how far the electron beam must travel between consecutive symbols, and indirectly the elapsed time to the new location. This information can then be used to initiate the tracing of the symbol at just the right time so that there is no appreciable delay between beam positioning and symbol generation.

It will be seen from the foregoing, then, that my system optimizes the time for displaying information. Each plotting function is initiated immediately after the completion of the previous one and thus there is no wasted dwell time. Since the time required for the positioning and tracing of a given symbol varies greatly as a function of its complexity or length and relative position in the display, the invention provides a substantial overall time saving in the display of a frame of information. My technique places no restriction on the manner of character or line generation. Rather, it is useful in any display system where optimal utilization of time is desirable to enable the system to display a large amount of data in a given time.

It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in carrying out the above method and in the construction set forth without departing from the scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.

Having described my invention, what I claim as new and desire to secure by Letters Patent is:

1. The combination comprising display apparatus including a cathode ray tube having deflection coil means operatively associated therewith, means for generating an electron beam and a display surface; means for applying symbol tracing signals to said coil means for deflecting said beam to trace symbols at selected locations on said surface in response to a trace request signal; I

means for applying positioning signals to said coil means for deflecting said beam from one to another of said locations; means for detecting the equivalence of the rate of change voltage across said coil means with a predetermined value for each positional deflection; and

means for generating said trace request signal in response to said detected equivalence.

2. The invention set forth in claim 1 wherein said coil means includes a horizontal and a vertical deflection coil. 3. The invention as set forth in claim 2 and further including cluding means for providing a position request signal to said positioning means upon completion of the tracing of a symbol;

means for providing trace and position instructions to said tracing and positioning means, respectively.

5. The invention as set forth in claim 4 wherein said means for applying symbol tracing signals include first means responsive to some of said trace instructions for tracing lines on said surface and second means responsive to others of said trace instructions for tracing characters on said surface.

6. The invention as set forth in claim 5 wherein said position request signal means includes means in said character tracing means for generating an end of line signal upon the completion of each line; and

means in said charactertracing means for generating an end of character signal upon the completion of each character.

7. The invention set forth in claim 6 wherein said instruction providing means includes an addressable memory for storing said instructions;

a buffer register connected to receive and temporarily store said instructions from said memory prior to their transfer to said tracing and positioning means; and

means responsive to said position request signal for transferring said instructions from said memory to said register so that said position instructions are available for immediate transfer to said positioning means upon the generation of said position request signal and said trace instructions are available for immediate transfer to said means for positioning upon the generation of said trace request signal.

8. In the method of tracing symbols at selected locations on the surface of a cathode ray tube having deflection coil means and a means for producing an electron beam, said method including the steps of applying to said coil symbol tracing signals for deflecting said beam to trace said symbols and applying positioning signals to said coil for deflecting said beam from one to another of said locations; wherein the improvement comprises the steps of:

detecting the equivalence of the rate of change of voltage across said coil means with a predetermined value for each positional deflection; and

initiating the tracing of a symbol in response to said detected equivalence.

9. The method as set forth in claim 8 wherein said initiating step includes the step of generating a trace request signal in response to said detected equivalence; and

wherein said step of applying symbol tracing signals occurs in response to said trace request signal.

10. The method as set forth in claim 9 and further including the additional step of generating a symbol complete signal as soon as the tracing of a selected symbol is finished, said step of applying positioning signals to said coil means occurring in response to said symbol complete signal.

References Cited UNITED STATES PATENTS 2,709,768 5/1955 King 31520 3,090,041 5/1963 Dell 340-324 3,325,802 6/1967 Bacon 340-324 3,329,948 7/1967 Halsted 340324 3,408,458 10/1968 Hennis 17815 OTHER REFERENCES Houldin, R., IBM Graphic Display System Information Display, September/ October 1966, pp. 34-40.

DONALD I. YUSKO, Primary Examiner M. M. CURTIS, Assistant Examiner US. Cl. X.R.