US3538804A

US3538804A - Electronic solo instrument having high-note guard circuit

Info

Publication number: US3538804A
Application number: US735095A
Authority: US
Inventors: Thomas J George
Original assignee: Hammond Organ Co
Current assignee: Marmon Co
Priority date: 1968-06-06
Filing date: 1968-06-06
Publication date: 1970-11-10
Anticipated expiration: 1987-11-10

Description

Inventor Thomas J. George Burbank, California Appl. No. 735,095

Filed June 6, 1968 Patented Nov. 10, 1970 Assignee Hammon Organ Company a corporation of Delaware ELECTRONIC SOLO INSTRUMENT HAVING HIGH-NOTE GUARD CIRCUIT 19 Claims, 9 Drawing Figs.

[56] References Cited UNITED STATES PATENTS 3,288,904 11/1966 George 84/1 .01 3,476,864 11/1969 Munch et al 84/1.03 3,480,719 11/1969 Schwartz et al 84/1.26

Primary Examiner-Warren E. Ray Attorney Fraser and Bogucki ABSTRACT: An electronic solo instrument is provided in which an electrical signal corresponding to the highest played key is selectively passed to audio circuitry to provide the desired sound. The electrical signal, which may comprise a DC signal of selected magnitude or an AC signal of selected frequency, is applied to the audio circuitry via a gate circuit, the operation of which is determined by a pulse polarity sensitive latch. The latch operates in accordance with the polarity U.S.Cl 84/1.0l, of generated pulses, such polarity being determined by the 84/1. 14, 84/1.24 playing or release ofone or more keys. 1n the event the highest Int Cl Gl(lh 1/02 key of the played chord is inadvertently released by the player, Field otSearch 84/1.01, the gate circuit opens to prevent undesired high-note dropl.ll4.l.03l.08,l.19.1.24 down.

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INVENTOR. THOMAS J. GEORGE BY 2? WW ATTORNEYS Patented Nov. 10, 1970 Sheet 4 of6 w dl 225d a a: will 552:: 2E5 522 5E2. Esme z: :2: e: E

INVENTOR. THOMAS J. GEORGE ATTORNEYS ELECTRONIC SOLO INSTRUMENT HAVING IIIGI'I- NOTE GUARD CIRCUIT BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to electronic musical instruments, and more particularly to arrangements which provide a solo tone in accordance with the highest played key on a keyboard.

. 2. Description of the Prior Art Presently known electronic musical instruments, such as electronic organs by way of example, are capable of providing a number of different musical effects to simulate with reasonable accuracy the characteristic sounds of particular musical instruments. One pleasing effect is that obtained when the instrument permits the playing of a polyphonic chord in which the highest or melody note is an accented solo note. This note is accented by being of different amplitude, different tone color, or different pitch from the other notes in the chord. In a polyphonic keyboard instrument of this type the highest note of any chord played is always the accented solo note. The successful playing of such instruments however typically requires the player to always depress first the'highest key of any chord played and, likewise, to release the highestkey last when the chord is released. If the highest key is inadvertently released too soon, the accented note will drop to the next lower note in the chord, producing an unmusical and disturbing effect which may be termed high-note drop-down. Since even a skillful player will at times fail in the required keying technique,

' arrangements based thereon have proved unsuitable for accenting the melody note.

One successful system for accenting the melody note without the need for absolutekeying accuracyon the part of the player is disclosed in U.S. Pat. No. 3,288,904 of Thomas J. George which issued Nov. 29, 1966. That system'employs a friction switch arrangement which is mechanically linked to the playing keys to block the passage of a frequency control signal to a tone producing variable frequency oscillator and associated memory circuit when'the highest one of a number of depressed keys is released, thus insuring that the frequency of oscillation of the oscillator will not be changeduntil a new 'note or notes are subsequently played. Such a mechanical friction switch arrangement performs its function accurately and efficiently. However, it may be desirable in some instances to perform the same function electronically for reasons such as keyboard design, space limitations, or economy.

BRIEF SUMMARY OF THE INVENTION In brief, the present invention provides an electronic solo instrument which selectively applies an electrical signal .corresponding to the highest played key to audio circuitry to provide the desired sound. The application of the electrical signal is controlled in accordance with a high-note guard circuit corresponding to the next lowest key played until a new chord or key is subsequently played by depression of one or more keys.

The high-note guard circuit of the invention includes a pulse polarity generator circuit which operates in association with .key operated contact closures to generate-a pulse of one polarity each time a key is depressed and to generate a pulse of opposite polarity each time a key is released, regardless of whether other keysmay already be depressed. An associated pulse polarity sensitive latch responds to the generated pulses to alternately assume opposite states, the latch assuming one state so long as pulses of the one'polarity are received and assuming the opposite state upon receipt'of one or more pulses of the opposite polarity. A gate circuit which is sensitive to the ing of one or more new keys, the gate circuit is again opened to apply the electrical signal corresponding to the highest played key to the audio circuitry.

In accordance with one particular aspect of the invention, the high-note guard circuit can be used with electrical signals which are eitherDC or AC. In those instances where a voltage controlled oscillator is included within the audio circuitry on the speaker sideof the gate-circuit, a frequency control circuit is operative to provide a DC signal corresponding to the highest played key, and the gate circuit may comprise a conventional relay for selectively passing the DC signal to the audio circuitry. In those arrangements where an AC signal is provided by a polyphonic tone generator or other appropriate means on the opposite side of the gate circuit from the speaker, the gate'circuit may comprise an appropriate electronic gate arrangement for suitably passing the AC signal to the audio circuitry. The electronic gate may comprise, by way of example, a transistor amplifier, the operation of which is controlled in accordance'with the state of the pulse polarity sensitive latch.

In one preferred embodiment of the invention the frequency control circuit includes the separate inductances of a solo oscillator circuit, and the key operated contact closures are coupled in 'shunt across the inductances to provide a total inductance corresponding to'the highest played key. The pulse polarity sensitive latch is coupled to one of the transistors of the solo oscillator to prevent oscillation at a lower frequency in the event the highest played key is inadvertently released.

In accordance with an alternative embodiment of the invention, the frequency control circuit and the pulse polarity generator circuit are.combined into a single circuitarrangement which responds to three-terminal switches operated .by the various keys. Upon depression or release of each key, the three terminals of the associated switch make and break contact with one another in predetermined order to open or close the gate circuit prior to generating a new electrical signal. In the event the highest played key of a chord is inadvertently released, this feature insures that the gate circuit will close before an electrical signal corresponding to the next lower key can be generated and passed to the audio circuitry.

In accordancewith further aspects of the invention, the circuitry for generating the electrical signals and the pulse polarity generator circuitry may assume independent forms, each of ferent'forms. Conventional S'chniitt trigger circuits may be utilized to provide the-bistable operation of the latch with a relay coil coupled into oneof the'alternately. conductive paths of the trigger to provide the gating function. Alternatively,'a Schmitt trigger or other bistable trigger may be used in combination with an amplifierto provide an electronic gate where AC electrical signalsare used. Where a conventional relay is employed as the gating circ'uit,.a neon tube arrangement may be used as the bistable trigger, the relay. coil being alternately energized and deenergized as the neontube fires and extinguishes in response to the pulses of selected polarity. Alternatively, the-Schmitt trigger or neon tube circuit'and the conventional relay may be replaced by a single circuit having a polarized relay which responds to the pulses of different polarity to open and close the contacts thereof in bistable fashion.

BRIEF DESCRIPTION OF THE DRAWINGS The novel features of this invention, as well as the invention itself, both as to its organization and method of operation, may bestb understood when considered in the light of the following description, when taken in connection with the accompanying drawings, in which:

FIG. 1 is a' generalized block diagram of an electronic solo instrument with high-note guard circuit in accordance with the invention in which a solo oscillator is employed;

FIG. 2 is a schematic diagram of one preferred arrangement of a' high-note guard circuit in accordance with the invention which may be employed in the arrangement of FIG. 1;

FIG. 3 is a schematic diagram of an alternative arrangement of a high-note guard circuit in accordance with the invention which may be employed in the arrangement ofFlG. 1;

I FIG. 4 is aschematic diagram of an alternative arrangement of a pulse polarity generator circuit in accordance with the invention;

FIG. 5 is a schematic diagram of an alternative arrangement of a pulse polarity sensitive latch and relay gate in accordance with the invention;

FIG. 6 is a diagram useful in explaining the operation of the FIG. 5 arrangement;

FIG. 7 is a schematic diagram of a further alternative arrangement of a pulse polarity sensitive latch and relay gate in accordance with the invention;

FIG.- 8 is a generalized block diagram of an electronic solo instrument with high-note guard circuit in accordance with the invention in which a polyphonic tone generator is em ployed; and,

FIG. 9 is a schematic diagram of one preferred arrangement of a high-note guard circuit in accordance with the invention which may be employed in the arrangement of FIG. 8.

DETAILED DESCRIPTION FIG. 1 illustrates one general arrangement of electronic solo instruments in accordance with the presentinvention, wherein DC electrical signals are used. While the various advantageous features of the present invention are hereafter described in connection with their application to an electronic organ, it should be understood that such features apply to other musical instruments as well. A conventional keyboard 10, including keys which correspond to the notes of a musical scale, is mechanically coupled to a plurality of key operated contact closures 12. A separate key operated contact closure is associated with each one of the keys, and may comprise any appropriate switch arrangement having a plurality of contacts which make or break with one another as the associated key is depressed and released by the player of the instrument. When one or moreof the keys on the keyboard 10 are depressed, the associated contact closures close, causing a frequency control circuit 14 to generate a DC signal, the voltage magnitude of which corresponds to the highest played key. The instrument thus accents the melody note and is accordingly termed an electronic solo instrument. Application of the DC signal to a voltage controlled variable frequency solo oscillator 16 results in oscillation at a frequency corresponding to the voltage magnitude of the DC signal. The tone signal from the oscillator 16 is amplified by an amplifier 18 and passed to a conventional loudspeaker 20, wherein it is converted into acoustical wave energy in conventional fashion/One example of the audio circuitry comprising the oscillator 16, the amplifier 18 and the loudspeaker 20 is described in detail in US. Pat. No. 3,288,904 referred to previously.

A high-note guard circuit 22,controls the application of the electrical signals from the control circuit 14 to the oscillator 16 by means ofa relay gate 24. When a number of keys on the keyboard 10 are depressed, the oscillator 16 oscillates at a frequency corresponding to the highest played key. If the highest played key is inadvertently released, the frequency control circuit 14 responds by providing a DC signal the voltage magnitude of which corresponds to the next lower played key. In the absence of the high-note guard circuit 22,;the change in the DC signal would result in oscillation at a lower frequency, the previously referred to high-note drop-down effect. The high-note guard circuit 22 prevents high-note drop down by rapidly closing the relay gate 24 to disconnect the control circuit 14 from the oscillator, when one or more played keys on the keyboard 10 are released. A pulse polarity generator circuit 26 provides a pulse of one polarity to a pulse polarity sensitive latch 28 each time one of the keys on the keyboard 10 is depressed. Such pulses cause the pulse polarity sensitive latch 28 to assume a first state, in which the associated relay gate 24 is opened to transmit the DC control signal which corresponds to the highest key of the chord being played. When one or more depressed keys are released, whether inadvertently or intentionally, the pulse polarity generator circuit 26 provides a pulse of opposite polarity, causing the latch 28 to change to a second state and closing the relay gate 24.

The polarity or sense of the pulses generated by the pulse polarity generator circuit 26 thus indicates the sense of operation of the playing keys, a pulse of one polarity indicating that a key has been depressed and a pulse of opposite polarity indicating that a key has been released. The pulse polarity sensitive latch 28 assumes one state or position until a pulse of opposite polarity is received, whereupon it changes state. Since upon the release of a key the high-note guard circuit 22 must respond quickly enough to prevent a new DC signal from reaching the oscillator 16, it is necessary that some type of delay in the generation of a new DC signal be provided. Such delay may be provided by any appropriate type of arrangement, one example being given in the description of FIG. 3 to follow, wherein, upon the release of a playing key, the key operated contact closures are designed to actuate pulse polarity generator circuit 26 prior to changing the voltage magnitude of the DC control signal in the frequency control circuit 14.

The pulse polarity sensitive latch 28 must latch or lock into a control position by responding to pulses ofthe same polarity. Only when a pulse of opposite polarity is received does the latch then lock into an alternative control position. Thus the usual bistable trigger or flip-flop cannot be employed as it is normally used since it will flip to either position upon receipt of pulses of the same polarity.

One preferred arrangement in accordance with the invention wherein the frequency control circuit 14, the gate 24 and the solo oscillator 16 are combined into a single circuit is illustrated schematically in FIG. 2. Each of the key operated contact closures 12 includes a single-pole, single-throw switch 40 coupled in the pulse polarity generator circuit 26. The pulse polarity generator circuit 26 further includes a pair of

resistors

42 and 44 serially coupled between a power supply terminal 46 and the ground terminal of a source of power, and a plurality of resistors'48 which are preferably of equal value. Serial combinations of each of the resistors 48 and a respective one of the switches 40 are coupled in parallel with the resistor 44, l j

the closure of each of the switches 40 lowering the voltage at a terminal 50 between the

resistors

42 and 44 to provide a negative pulse 52 to the input of the pulse polarity sensitive latch 28 by means of a differentiating capacitor 54. In similar fashion the opening of any one of the switches 40 raises the voltage at the terminal 50 to provide a positive pulse 56 to the latch 28 via the capacitor 54.

The pulse polarity sensitive latch 28 shown in the arrangement of FIG. 2 comprises a conventional bistable trigger 60 having a pair of alternately conductive transistors 62 and 64 the collector and base terminals of which are cross-coupled through parallel resistor and capacitor circuits 66. The base terminal of the first transistor 62 is coupled to the differentiating capacitor 54. The bistable trigger 60 is unlike the usual bistable flip-flop in that the triggering

pulses

52 and 56 are applied to one transistor only instead of to both transistors simultaneously. Thus no frequency dividing action is obtained. The

trigger. 60 switches to a particular state upon receipt of a first pulse of given polarity and remains in that state until a pulse of opposite polarity is received.

A solo oscillator 70 performs the functions of the frequency control circuit 14, the gate 24 and the voltage controlled variable frequency solo oscillator 16. The oscillator 70 includes a pair of transistors 72 and 74 coupled in conventional fashion and a plurality of individual inductors 76 serially coupled between the base terminal of the left-hand transistor 72 and ground. The junctions between adjacent pairs of the individual inductors 76 are coupled to be shunted to ground by the closure of associated single-pole, single-throw switches 78. Each of the switches 78 is mechanically coupled to a different one of the keys on the keyboard and comprises a key operated contact closure 12 when combined with an associated one of the switches 40 in the pulse polarity generator circuit 26. The closure of the particular switch '78 corresponding to the highest played key on the keyboard 10 completes a circuit between the base terminal of the left-hand transistor 72 and ground so as to bypass all of'the inductors 76 associated with lower keys. Accordingly the inductance which will cause the oscillator to oscillate at a frequency corresponding to the highest played key is always selected.

The left-hand transistor 72 of the oscillator 70 additionally functions as the gate 24 to prevent oscillation of the oscillator at a lower frequency if the highest played key on the keyboard 10 is inadvertently released. The collector terminal of the lefthand transistor 62 in the pulse polarity sensitive latch 28 is coupled through a biasing resistor 80 to the base terminal of the left-hand oscillator transistor 72. When one or more of the keys on the keyboard 10 are played, the generation of one or more negative pulses 52 renders the transistor 62 nonconductive. This biases oscillator transistor 72 into the operating region. When one or more of the played keys are released however, the resulting positive pulses 56 render the transistor 62 conductive biasing the left-hand oscillator transistor 72 into nonconduction to prevent oscillation. Since the oscillator transistors 72 and 74 are mutually regenerative, the right-hand transistor 74 can be used as the gate to stop oscillation instead of the left hand transistor 72 if desired. lfa Hartley oscillator having a single transistor is used as the solo oscillator 70, the single transistor will also function as the gate if appropriately coupled to the pulse polarity sensitive latch 28.

An alternative arrangement wherein the frequency control circuit 14 and the pulse polarity generator circuit 26 are controlled by means of multiple-contact switches is illustrated schematically in FIG. 3. The key operated contact closures 12 comprises a plurality of three-terminal switches individually coupled by appropriate mechanical linkages to separate ones of the keys on the keyboard 10.

Switches

82 and 84 are cou pled to the highest and the next to the highest keys on the keyboard respectively, and switches 86 and 88 are coupled to the next to the lowest and the lowest keys on the keyboard respectively, the remaining switches and associated circuitry being eliminated for the sake of simplicity. Each of the switches includes three terminals a, b and c, the mechanical linkage between each switch and its corresponding key causing the terminals to make and break contact with one another in predetermined order upon depression or release ofthe key. Depression of a key causes terminal a to make contact with terminal b before terminal b makes contact with terminal c. Release of a depressed key allows terminal 0 to break contact with terminal b before terminal b breaks contact with terminal The frequency control circuit 14 is fed by a source of positive voltage which is applied to a power supply terminal 94. A portion of the resulting current flows along a lead 96 and through a resistor 98 to ground by way of a plurality of

adjustable tuning resistors

100, 102, 104 and 106. The adjustaing resistors are relatively low in value, and a relatively large current flows through these resistors to ground. A second plurality of

resistors

108, and 112 of relatively large value are respectively coupled between the [2 terminals of adjacent switches to form a second voltage divider. The resistor 112 is coupled to the b terminal of the switch 82 corresponding to the highest key on the keyboard 10, such terminal also being coupled to a lead 114. The voltage of the resulting DC control signal on the lead 114 always corresponds to the highest played key on the keyboard, and is provided by closure of the switch corresponding to such highest played key. Since the

adjustable tuning resistors

100, 102, 104 and 106 are substantially lower in value than the corresponding

resistors

108, 110 and 112 in the second voltage divider, current flowing through the adjustable tuning resistors substantially determines the tuning voltages appearing at successive a terminals of the switches. Thus the voltage at the a terminal of the highest closed switch is supplied to the lead 114 to form the DC control signal. The tuning

resistors

100, 102, 104 and 106 are made adjustable so that the voltage of, each of the tuning points therebetween may be adjusted to cause oscillation of the oscillator 16 at a frequency which corresponds to the associated key and closure.

The pulse polarity sensitive latch 28 is illustrated in FIG. 3 as comprising a vacuum tube Schmitt trigger having a pair of alternately conducting triode vacuum tubes and 122. The Schmitt trigger operates in well-known fashion, the left-hand tube 120 normally being biased into conduction and the righthand tube 122 being in a state of nonconduction. The relay gate 24 in this instance comprises a relay, the contact 124 of which is operated by the selective energization and deenergization of a coil 126. The coil 126 is coupled into the conductive path of the right-hand tube 122, and remains deenergized to hold the contact 124 open so long as the tube 122 does not conduct. If a negative pulse is applied to the grid of the lefthand tube 120, this tube is rendered nonconductive switching the trigger into an alternate state and causing conduction of the right-hand tube 122 and consequent energization of the coil 126 to close the relay contact 124. Subsequent negative pulses will have no effect on the state of the triggerJThe application of a positive pulse to the grid of the left-hand tube 120 causes conduction of such tube thereby switching the trigger into its original state wherein the right-hand tube 122 does not conduct and the relay contacts 124 are held open. Subsequent positive pulses will have no effect on the state of the trigger.

The positive and negative pulses required to change the state of the Schmitt trigger are derived from a differentiating capacitor 128 which is coupled to a common terminal 130 within the pulse polarity generator circuit 26. The common terminal 130 is coupled to ground through a resistor 132 and to the power supply terminal 94 through a resistor 134. The common terminal 130 may also be coupled to ground through one or more of a plurality of parallel shunting paths which include the 0 terminals of the

switches

82, 84, 86 and 88, a respective one of a plurality of

resistors

136, 138, and 142, and one or more of the

adjustable tuning resistors

100, 102, 104 and 106. When none of the keys on the keyboard 10 are played and all of the

switches

82, 84, 86 and 88 remain open, the flow of current from the power supply terminal 94 through the resistors 134 and 132 to ground establishes a given voltage at the common terminal 130. When one or more of the switches are closed by the playing of one or more keys, however, current flows through one or more of the parallel paths to lower the voltage at the common terminal 130, which lowered voltage is passed to the grid of the left-hand trigger tube 120 by the differentiating capacitor 128 in the form of a negative pulse 144 as shown in the waveform adjacent the capacitor 128. This switches the state of the trigger in the manner previously described to hold the relay contact 124 closed. The capacitor 128 in addition to differentiating voltage decreases and increases at the terminal 130 also serves to isolate the DC voltage at the terminal from the latch 28. The trigger changes state only on the first such negative pulse,

further negative pulses produced by the closure of additional switches having no effect on the trigger. When one or more played keys are released, the voltage at the common terminal 130 increases, and such increase is applied to the grid of the left-hand tube 120 by the differentiating capacitor 128 in the form of a positive pulse 146 as shown in the waveform adjacent the capacitor 128. This causes the trigger to again change state deenergizing the relay coil 126 and opening the contact 124.

It will therefore be seen that the pulse polarity generator circuit 26 functions in combination with the pulse polarity sensitive latch 28 to close the relay contact 124 each time a key is depressed and to open the contact 124 each time a played key is released. The latch 28 responds only to the first negative or positive pulse received to change state, all subsequent pulses of the same polarity'having no effect on the latch. Since upon the release of a played key the corresponding switch terminal b breaks contact with the terminal c before a breaks from b, the voltage at the common terminal 130 is increased to switch the Schmitt trigger and open the relay contact 124 before the tuning voltage of the DC control signal changes to correspond to the next lower played key. This delay which is provided by the mechanical operation of the three-terminal switches thus prevents the frequency of the solo oscillator 16 from dropping down to the next lower played key.

The three-terminal switches shown in the arrangement of FIG. 3 provide the necessary delay of a change in value of the highest note DC control signal upon the release of the highest played key by making and breaking contact in a predetermined order. Alternatively, each of the key operated contact closures 12 may comprise a pair of two-terminal switches in the manner of the FIG. 2 arrangement, one of such switches being coupled into the frequency control circuit 14 and the other of such switches being coupled into the pulse polarity generator circuit 26. Both switches in each pair are coupled by appropriate mechanical linkage to an appropriate one of the keys such that both are closed and opened by depression and release of the key. The necessary delay in the operation of the frequency control circuit 14 in such an arrangement as well as in the FIG. 2 arrangement may be provided by designing the two-terminal switches so that upon release of the associated key, the switch coupled into the pulse polarity generator circuit 26 opens before the switch which is coupled in the frequency control circuit 14. Alternatively, electronic delay means or other appropriate arrangements may be used.

An alternative arrangement of a pulse polarity generator circuit 26 which differs somewhat from those shown in FIGS. 2 and 3 is illustrated schematically in FIG. 4. A plurality of resistors 1 60, 162, 164, 166 and 168, which are preferably of equal value, are serially coupled between a terminal 170 and ground. The terminal 170 is also coupled to a source of positive potential 172 via a resistor 174 of substantially larger size than the

resistors

160, 162, 164, 166 and 168 and to the pulse polarity sensitive latch 28 via a differentiating capacitor 176. Parallel shunting paths including respective ones of a plurality of two-terminal switches 178 are coupled across the

resistors

160, 162, 164 and 166. Each of the two-terminal switches 178 is coupled along with another two-terminal switch in the frequency control circuit 14 (not shown) to a respective one of the keys. With all of the switches 178 opened, current flows from the power supply terminal 172 to ground through the serial resistors establishing a given voltage at the terminal 170. If one of the switches 178 is closed by depression of the associated key, the associated one of the parallel resistors 160, I62, 164 and 166 is shunted lowering the voltage at the terminal 170. The decrease in voltage at the terminal 170 is passed as a negative pulse 180 by the differentiating capacitor 176, the waveform of such pulse being shown in diagrammatic form adjacent the capacitor 176. This switches the latch 28 into the appropriate state to pass the high note DC control signal through the relay gate 24 to the oscillator 16. Closure of additional ones of the switches 178 provides additional decreases of the voltage at the terminal 170 and negative pulses 180 which of course have no effect on the state of the latch 28. When one or more of the closed switches 178 are opened, the voltage at the terminal 170 increases and one or more positive pulses 182 are passed by the capacitor 176 to the latch 28, the waveform of such pulses being illustrated in diagrammatic form adjacent'the capacitor 176. This of course switches the state of the latch 28 to block the passage of a new DC control signal to the oscillator 16. To provide the necessary delay in the operation of the frequency control circuit 14, the mechanical linkages to the switches 178 can be designed so that such switches are opened prior to the opening of the associated two-terminal switch in the frequency control circuit 14 upon release of the associated key.

FIG. schematically illustrates an arrangement which combines the pulse polarity sensitive latch 28 and the relay gate 24 into a single circuit. The pulse polarity generator circuit 26 may assume any appropriate form such as that shown in FIG.

- 2, and the voltage changes provided by the opening and closing of switches 40 are amplified by a vacuum tube and differentiated by a capacitor 192 to provide pulses of selected polarity at an input terminal 194 of the combined latch and gate circuit. A voltage divider 196 having an adjustable tap 198 is connected between a B+ supply terminal 200 and ground. The input terminal 194 is connected to ground through a neon tube 202 and to the wiper arm 198 of the voltage divider 196 through the coil 204 of a relay 206.

The operation of the arrangement of FIG. 5 wherein the neon tube 202 serves as the latch and the relay 206 serves as the gate is illustrated by FIG. 6, which is a diagrammatic plot of the potential difference between the terminal 194 and ground for different settings of the wiper arm 198 and as pulses are received from the generator circuit 26. In the absence of pulses from the generator circuit 26, the wiper arm 198 may be positioned at ground and moved along the length of the resistor toward the power supply terminal 200, providing the substantially uniform slope shown in the left-hand portion of FIG. 6. Eventually, a point 210 is reached, at which the neon tube 202 fires, energizing the relay coil 204 and closing the relay contact. If the wiper arm 198 is now moved in a direction away from the power supply terminal 200, a point 212 is reached, at whichthe neon lamp 202 extinguishes, deenergizing the relay coil 204 and opening the relay contact. The wiper arm 198 is preferably set in a position to provide a voltage at the terminal 194 which is halfway between the voltages corresponding to the

points

210 and 212. With the wiper arm 198 so set, a positive pulse from the generator circuit 26 momentarily raises the voltage at terminal 194 to a peak 214, firing the neon tube 202 and closing the relay contact. When the positive pulse has ceased, the neon lamp remains ionized, thus holding the relay contact closed and providing the required latch function. Similarly, a negative pulse from the generator circuit 26 drops the terminal 194 voltage to a negative peak 216 thereby extinguishing the lamp 202 and opening the relay contact.

An alternative arrangement in which a polarized relay 230 serves both as the latch 28 and the relay gate 24 is illustrated schematically in FIG. 7.-Pulses from the generator circuit 26 are amplified by a transistor amplifier 232 and passed through an isolating capacitor 234 to the winding 236 of the polarized relay 230. Due to the permanent magnet used in the structure of a polarized relay, the soft iron armature remains held in either the operated or released position, after the energizing current is removed. A voltage pulse of one polarity will move the armature to the operative position, while a pulse of opposite polarity releases the relay.

FIG. 8 illustrates a further general arrangement of an electronic solo instrument in accordance with the invention. Suc'h arrangement is similar to that of .FIG. 1 except that the frequency control circuit 14 and the solo oscillator 16 are replaced by a polyphonic tone generator 250. The tone generator 250 includes a plurality of individual tone generators, each of which is associated with a respective one of the keys on the keyboard 10. When a plurality of keys on the keyboard are played, AC signals from the corresponding tone generators are passed via a lead 252to the amplifier l8 and then to the loudspeaker to provide the sound of the chord played. The solo portion of the instrument accents the highest note of the chord played by passing the AC tone signal from the corresponding tone generator through an electronic gate 254 to the amplifier 18. The electronic gate 254 corresponds to the relay gate 24 of the FIG. 1 arrangement, and operates under the control of a pulse polarity sensitive latch 28. The electronic gage 254 may assume any appropriate form including that of a conventional relay previously shown. However, the use of electronic circuits such as transistor amplifiers for the gate 254 may be preferred in some instances to effectively gate the AC signal from the tone generator 250.

FIG. 9 is a schematic illustration of one preferred arrangement in accordance with the general arrangement shown in FIG. 8. Since the portion of the FIG. 8 arrangement dealing with the solo tone is of interest, the manner inwhich the tone generator 250 generates the polyphonic chord tone signals has been eliminated for the sake of simplicity. The polyphonic tone generator 250 includes a plurality of

individual tone generators

260, 262, 264 and 266, each of which generates an AC signal the frequency of which corresponds to a particular key on the keyboard 10. The

tone generators

260 and 262 correspond to the highest and the next to the highest keys on the keyboard 10 respectively, while the

generators

264 and 266 correspond to the next to the lowest and the lowest keys respectively, on the keyboard 10. Again, tone generators and associated circuitry corresponding to the other keys have been eliminated for the sake of simplicity. The individual tone generators may assume any appropriate form and, for example, may be of the tone wheel type. Each of the key operated contact closures 12 in this instance comprises a single-pole,

double-throw switch 268 coupled in the polyphonic tone generator 250 and a single-pole, single-throw switch coupled in the pulse polarity generator circuit 26. A high-note sequence is provided by the switches 268, each of which is arranged to couple the switch 268 of the next lower note to a common lead 270 when the associated key is played. In this way the tone generator 260 corresponding to the highest played key is always coupled to the lead 270 to the exclusion of the remaining generators, and an AC signal the frequency of which corresponds to the highest played key is passed via the lead 270 to the electronic gate 254.

The pulse polarity generator circuit 26 is identical to that shown in FIG. 2, and operates in the same manner to provide a negative pulse 52 each time one of the switches 40 is closed and a positive pulse 56 each time one of the switches 40 is opened.

The pulse polarity sensitive latch 28, in this instance is illustrated as a conventional transistor Schmitt trigger comprising a pair of alternately

conductive transistors

280 and 282. The left-hand transistor 280 is normally conducting, while the right-hand transistor 282 is normally cut off. A negative pulse 52 at the base lead of the lefbhand transistor 280 cuts the transistor off thereby rendering the right-hand transistor 282 conductive. This biases a transistor amplifier 284 in the electronic gate 254 into conduction via a lead 286, and the gate is thereby opened to pass the highest note AC tone signal on the lead 270 to a limiter circuit 288. A positive pulse 56 at the base of the left-hand transistor 280 biases the transistor into conduction removing the base bias from the transistor amplifier 284 and closing the gate to block the AC signals on the lead 270. Upon release of any one of the keys on the keyboard 10, the associated switch 40 within the pulse polarity generator circuit 26 is arranged to open before the corresponding switch 268 within the polyphonic tone generator 250 changes position. This closes the gate 254 to prevent the AC signal corresponding to the next lower played key from reaching the limiter circuit 288. The high solo note ceases to sound, but the other notes of the chord continue to sound as the corresponding AC signals from the tone generators 260 are passed to the amplifier 18 via the lead 252 shown in FIG. 8. To make the solo sound again, another key must be played.

Since in some instances it may be desirable to have the solo pitch an octave or-more below the accompaniment pitch, the limiter circuit 288 and a frequency divider 290 are coupled between the output of the gate 254 and the amplifier 18. The limiter 288 prevents differences in signal amplitude from the polyphonic tone generator 250 from reaching the frequency divider 290, thereby assuring operation of the frequency divider with reliability.

It should be understood that appropriate means other than those previously described can be used to function as the pulse polarity sensitive latch 28. For example, various solid state devices such as a silicon unilateral switch can be used. it should also be understood that whereas the arrangements previously described provide the highest note of any chord played, they can also be used to provide the lowest note of any chord played by appropriate reversal of the circuit interconnections. The latter arrangements are sometimes desirable to provide a single accented base note in the accompaniment chord.

Although there have been described specific arrangements of an electronic soloinstrument with high-note guard circuit in accordance with the invention for the purpose of illustrating the manner in which the invention may be used to advantage, it will be appreciated that the invention is not limited thereto. Accordingly, any and all modifications, variations or equivalent arrangements falling within the scope of the annexed claims should be considered to be a part of the invention.

lclaim:

1. ln an electronic solo instrument inwhich various musical notes are provided by application of an electrical signal to tone producing means, the electrical signal having a characteristic corresponding to the highest played key on a keyboard, a high note guard circuit comprising the combination of pulse generating means for providing pulses of one sense when one or more of the keys on the keyboard are depressed and of opposite sense when one or more of the keys are released, latching means responsive to the pulses for assuming a first state when one or more pulses of said one'sense are received and a second state when one or more pulses of said opposite sense are received, and gating means responsive to the state of the latching means for applying the electrical signal to the tone producing means when the latching means assumes said first state and for preventing the application of the electrical signal to the tone producing means when the latching means assumes said second state.

2. The invention defined in claim 1 above, wherein the latching means and the gating means include a polarized relay coupled to pass the electrical signal to the tone producing means in response to pulses of said one sense and to prevent application of the electrical signal to the tone producing means in response to pulses of said opposite sense.

3. The invention defined in claim 1 above, wherein the gating means comprises a transistor amplifier having a transistor coupled to be biased into conduction when the latching means assumes said first stateand to be biased into nonconduction when the latching means assumes said second state.

4. The inventionv defined in claim 3 above, wherein the latching means comprises a Schmitt trigger.

5. The invention defined in claim 1 above, wherein the tone producing means and the gating means together comprise an oscillator which is coupled to the latching means, said oscillator being responsive to the electrical signal to oscillate at a frequency determined by the characteristic of the signal when the latching means assumes said first state, and said oscillator being rendered inoperative when the latching means assumes said second state.

6. The invention defined in claim 5 above, wherein the oscillator comprises at least one transistor which is coupled to be biased into nonconduction when the latching means assumes said second state.

7. The invention defined in claim 1 above, wherein the gating means comprises a relay having a coil coupled to be energized when the latching means assumes said first state and to be deenergized when the latching means assumes said second state.

8. The invention defined in claim 7 above, wherein the latching means comprises a Schmitt trigger having a pair of alternately conductive paths, one of which includes the relay coil.

9. The invention defined in claim 7 above, wherein the latching means comprises a neon tube coupled in series with the relay coil, pulses of said one sense firing the tube into conduction to energize the relay coil, and pulses of said opposite sense extinguishing the tube to deenergize the relay coil.

10. In an electronic solo instrument, the combination com prising a plurality of normally open, key operated contact closures coupled to be closed by depression of associated keys, means responsive tothe operation of the closures for generating a pulse of one polarity each time one of the closures is closed and a pulse of opposite polarity each time a closed closure is opened, means responsive to the operation of the closures for generating an electrical signal having a characteristic corresponding to the highest key played, means responsive to the electrical signal for providing acoustic wave energy, the frequency of which corresponds to said signal characteristic, and means responsive to the pulse generating means for applying the electrical signal to the acoustic wave energy means when one or more pulses of said one polarity are received and for blocking the application of the electrical signal to the acoustic wave energy means when one or more pulses of said opposite polarity are received.

11. The invention defined in claim 10 above, wherein the means responsive-to the operation of the closures for generating an electrical signal having a characteristic corresponding to the highest played key comprises an oscillator circuit having a plurality of individual inductors coupled in a serial path to ground, means serially coupling each of the key operated contact closures between the junction of a different adjacent pair of the inductors and ground, the closing of that closure corresponding to the highest played key completing a direct shunt path to ground to provide an inductance which results in oscillation of the oscillator circuit at a frequency corresponding to the highest played key, and wherein the means responsive to the pulse generating means for applying the electrical signal to the acoustic wave energy means when one or more pulses of said one polarity are received and for blocking the application of the electrical signal to the acoustic wave energy means when one or more pulses of said opposite polarity are received comprises a bistable circuit coupled to the pulse generating means, said bistable circuit assuming a first state when one or more pulses of said one polarity are received and assuming a second state when one or more pulses of said opposite polarity are received, and means coupling the bistable circuit to the oscillator circuit to prevent oscillation of the oscillator circuit whenever the bistable circuit assumes the second state.

'12. The invention defined in claim 10 above, wherein the means responsive to the pulse generating means for applying the electrical signal comprises a relay having a coil and coupled to pass the electrical signal to the acoustic wave energy means when closed, a power source, a voltage divider having a tap, the voltage divider being connected across the power source, a terminal coupled to receive pulses from the pulse generating means, means coupling the relay coil between the terminal and the voltage divider tap, and a neon tube coupled between the terminal and one end of the voltage divider.

13. The invention defined in claim l'above, wherein the means responsive to the pulse generating means for applying the electrical signal comprises a polarized relay coupled to pass the electrical signal to the acoustic wave energy means when closed, and having a coil coupled in a given sense to receive pulses from the pulse generating means.

14. The invention defined in claim above, wherein the means responsive to the pulse generating means for applying the electrical signal comprises a transistor amplifier and a latching circuit, said latching circuit responding to pulses of said one polarity to bias the amplifier into conduction to pass the electrical signal to the acoustic wave energy means and responding to pulses of said opposite polarity to bias the amplifier into nonconduction to block the application of the electrical signal to the acoustic wave energy means, wherein each of the key operated contact closures includes a switch which assumes a first position when the associated key is depressed and a second position when the associated key is released, and wherein said electrical signal generating means comprises a plurality of AC signal generating means, each being associated with and having a frequency corresponding to a particular one of the keys, means coupling the switch associated with the highest key to the input of said transistor amplifier, means coupling each of said switches to the associated AC signal generating means when the switch assumes the first position, and means coupling each of said switches to the adjacent switch corresponding to the next lower key when the switch assumes the second position.

15. The invention defined in claim 10 above, wherein the means responsive to the pulse generating means for applying the electrical signal comprises a relay coupled to pass the electrical signal to the acoustic wave energy means when energized, 'and a latching circuit responsive to the pulse generating means to maintain the relay energized when pulses of said one polarity are received and to maintain the relay deenergized when pulses of said opposite polarity are received.

16. The invention defined in claim 15, above, wherein each of said key operated contact closures includes a two-terminal switch which closes upon depression of the associated key, and wherein said pulse generating means comprises a source of power having a pair of terminals, at least one resistor serially coupled between the pair of terminals of the source of power, a plurality of resistors, serial combinations of each of the plurality of resistors and a respective one of the two-terminal switches being coupled in parallel with said at least one resistor, and a capacitor coupled between one end of said at least one resistor and said latching circuit.

17. The invention defined in claim 15 above, wherein each of said key operated contact closures includes a two-terminal switch which closes upon depression of the associated key, and wherein said pulse generating means comprises a source of power, a plurality of resistors serially coupled across said source, means coupling each of the two-terminal switches across a respective one of the plurality of resistors, and a capacitor coupled between the power supply and said latching circuit.

18. The invention defined in claim 15 above, further including a source of power, and wherein the electrical signal generating means comprises a first voltage divider coupled across the source of power and having a plurality of terminals coupled to respective ones of the key operated contact closures, and a second voltage divider coupled to the relay and having a plurality of terminals coupled to respective ones of the key operated contact closures, and wherein the pulse generating means comprises at least one resistor coupled across the source of power and having one end thereof coupled to the latching circuit, and means coupling a separate parallel shunting patch across said at least one resistor each time one of the key operated contact closures is closed.

19. The invention defined in claim 18 above, wherein each of the key operated contact closures comprises a three-terminal switch, the first two terminals of which make contact with one another upon partial depression of the associated key and the third terminal of which makes contact with the first two terminals upon complete depression of the associated key, the first voltage divider comprises a plurality of adjustable resistors, each of which is coupled between the first terminals of a different adjacent pair of the three-terminal switches, the second voltage divider comprises a plurality of resistors of substantially greater value than the resistors in the first voltage divider, each of the resistors in the second voltage divider being coupled between the second terminals of a different adjacent pair of the three-terminal switches, and the second terone resistor comprises a separate resistor coupled between said one end of the at least one resistor and the third terminal of each of the three-terminal switches