US3521253A - Magnetic control device - Google Patents

Description

July 21, 1970 c F. STRAWN I I 3,52

MAGNETIC CONTROL DEVICE Filed Dec. 28, 1966 2 Sheets-Sheet l r- 7 I l 4 L i 7 4 [M2, 1 ii}; 7 9 c j POWER AMPLITUDE INVENTOR CHARLES E 5TRAw/v Afforn eys y 21, 1970 c. F. STRAWN 7 3,521,253

MAGNETIC CONTROL DEVICE Filed Dec. 28, 1966 2 sheets sheet 2 A C 9 POWER "9 [Z 2; FL 0 n W /l7 6 1% d -INVENTOR CHARLEJ' E Sm/1w Aflarggys United States Patent ()1 3,521,253 Patented July 21, 1970 3,521,253 MAGNETIC CO TROL DEVICE Charles F. Strawn, Arlington, Tex., assignor to Johnson Service Company, Milwaukee, Wis., a corporation of Wisconsin Filed Dec. 28, 1966, Ser. No. 605,445 Int. Cl. H03k 17/64; G11c 11/08 US. Cl. 340-174 7 Claims ABSTRACT OF THE DISCLOSURE The present disclosure includes a square loop core having a pair of apertures defining three legs and including a main memory magnetic path including all three legs and a secondary gating path including only two legs. A 1

This invention relates to a magnetic control device wherein an electrical signal represents a quantity of value to be remembered.

In control systems and other electrical control and telemetry applications, an output may be desirably controlled in connection with preselected information fed into the system in the form of an electrical pulse signal. In many such applications, it is highly desirable that the information be retained for relatively long periods of time, and further that they maintain the set level accurately. Such devices should also be readily changed from one level to another and automatically resume the same output level in the event of a restoration of power after a power failure.

A magnetic control or memory unit known as a transfluxor has been suggested in the computer art for providing memory by storage or conditioning of a multiple apertured magnetic core having a set winding and a saturable reactor or transformer output means. In the transfluxor, a magnetic core material is employed having a substantially rectangular hysteresis loop and having a main aperture and a coupling aperture which defines three legs. The first magnetic path includes all three legs and a second magnetic path surrounding the second aperture includes only the two legs. The two legs of the latter path are selected and arranged such that they will become magnetically saturated prior to saturation of the main circuit including all three legs. A control signal is applied to the main path to establish a preselected saturation level after which the signal on the applied winding in the second aperture or control aperture provides for a selective transfer of flux between thetwo small legs such that the output is controlled in accordance with the saturation of the main path without affecting that saturation level. Thus, the device in essence provides a memory in accordance with the input signal.

The present invention is particularly directed to the use of such a core structure connected in a novel manner to provide high level power circuits and controls, Generally, in accordance with the present invention, the core structure is formed with at least a pair of apertures defining at least three legs and including a main memory magnetic path including all three legs and a secondary gating path including only two legs. A control winding is coupled to the main path and a separate gate winding is coupled to each of the gate legs. The gate windings are connected to an AC. power supply through suitable rectifying means to establish a saturating magnetic amplifying device. The gate windings carry the alternate half cycles of each full cycle of the alternating current input power and are so wound that they establish oppositely directed fluxes about the two gate legs and the bridging portion of the core.

In operation, the half cycle current flowing through the associated gate winding is determined by the selfinductance of that gate winding. If there is no presaturation or set point saturation, the flux will flow through the minor path of the core structure increasingand decreasing in the respective legs. The minor path never however reaches saturation and consequently the self-inductance of the winding is high and only a very minimal current, corresponding to a small exciting or magnetizing current, flows to the load. This provides a minimum output corresponding to a zero fiux level in the remainder of the core. If a voltage is applied to the control winding, it establishes a flux level in the core structure including the gate legs and generally, in the same direction as that established by current flow in the corresponding gate winding. Consequently, when power is applied to the gate windings, the fiux thereof adds to that established by the control winding. The gate leg associated with the conducting gate Winding saturates some time prior to the end of the corresponding half cycle depending on the level of the set point saturation and the self-inductance of the winding switches rapidly to a minimal level. Thereafter, a large current flows in the gate winding and the load.

When the control or preset saturation level is increased or decreased in amplitude, the saturation point is reached in an earlier or later part of the half cycle and similarly increases or decreases the power current level. A feedback circuit is interconnected between the load circuit and the set source for the control winding. The control winding is energized in accordance with the difference in the input signal and the voltage in the output voltage signal. The negative feedback establishes a precise control or set point and permits raising and lowering of the set point without reversal of the phase or polarity of the set source.

The control unit of the present invention can be readily interconnected to control an alternating or direct current load. Further, an isolation transformer may be inserted to couple the load to the memory circuit. As the memory unit provides a rapid or step change in the load or output, it is readily adapted to the controlling of triggered devices such a silicon controlled rectifiers, Triacs and the like.

The present invention thus provides a simple, reliable and relatively inexpensive analog signal control with a very rapid response and an essentially indestructible memory. The invention provides a memory device wherein the gate winding may be connected directly in the load circuit and is therefore particularly adapted to a servo type control.

The drawings furnished herewith illustrate preferred constructions of the present invention in which the above advantages and features are clearly disclosed as well as others which will be clear from the following description.

In the drawings:

FIG. 1 is a schematic circuit diagram employing an analog memory unit constructed in accordance with the present invention; 7

FIG. 2 is a graphical view showing the output voltage and current with varying set points;

FIG. 3 is a pictorial view of the memory unit constructed in accordance with the present invention; 7

FIG. 4 is an exploded view of a pair of laminations employed in the construction of the magnetic core shown in FIG. 3;

FIG. is a schematic circuit diagram similar to FIG. 1 showing the unit interconnected to provide a direct current output;

FIG. 6 is a similar schematic circuit diagram with the device connected to provide an isolated alternating current output;

FIG. 7 is a schematic circuit diagram showing the memory unit interconnected in a control circuit for a bi-directional triggered solid state switch such as a Triac; and

FIG. 8 is a view similar to FIG. 7 showing the device applied to control the firing of a pair of silicon controlled rectifiers.

Referring to the drawings and particularly to FIG. 1, the analog memory unit of the present invention is shown including a generally rectangular magnetic core 1 having a pair of apertures defining a control winding leg 2 and a pair of similar load or gate winding legs 3 and 4. In the illustrated embodiment of the invention, the control winding leg 2 is shown to the left side of the core structure and the gate legs 3 and 4 are shown to the right side. The gate legs 3 and 4 are similarly constructed and are of a substantially smaller cross section than that of the control winding leg. The two legs 3- and 4 as shown are each one-half the width of the leg 2 and provide a corresponding magnetic path. A control winding 5 is wound on the control winding leg 2 and connected to a suitable direct current signal source. A pair of gate windings 7 and 8 is wound one each on the respective legs 3 and 4. Windings 7 and 8 are connected in parallel circuit to A.C. power supply lines 9 in series with a load 10, shown as a resistor. The paralleled paths defined by windings 7 and 8 each includes a diode 11 and 12, respectively, polarized in opposite directions with respect to the load 10. The A.C. power supply lines 9 may be connected to any suitable source such as the conventional 60 cycle alternating current, 110 volt power distribution system of this country. The windings 7 and 8 in the illustrated embodiment of the invention are wound to establish oppositely directed fluxes with respect to a path including the two legs 3 and 4 and the immediately adjacent bridging portion, as shown by the solid line 13 for winding 7 and by the dotted line 14 for the winding 8.

The magnetic path including the legs 3 and 4 in combination with the polarized connection of the gate Windings 7 and 8 by the rectifiers 11 and 12 to the A.C. power supply defines a saturating magnetic amplifier means having the high gain characteristic of a self-saturating magnetic amplifier, the output of which is responsive to a premagnetization level of the core 1 as a result of energization of the control winding 2.

The magnetic core 1 is formed of a material having an essentially rectangular magnetic hysteresis loop;- for example, nickel-iron, ferrite or similar material. As is known, if a direct current flows through winding 5, the core 1 is magnetized to a related level and maintains such level independently of the continuance of the DC. signal. The set magnetic state, with proper core material, will in fact remain essentially static for an unlimited period of time. Further, because of the rectangular characteristic, the impedance of a winding associated with such a core may be made to change rapidly at the corners of the characteristic.

In the operation of the analog memory unit, the alternate half cycles of the A.C. power supply are impressed upon the load 10 in series with the respective windings 7 and 8. Thus, during the half cycle when the top power supply line 9 in the drawing is positive, the diode 11 is biased in a forward direction and current flows through the diode 11, the associated winding 7 and the load 10. During the alternate half cycle, the power supply reverse biases the diode 11 and forward biases diode 12 whereupon A.C. power flows through the resistor or load 10 in the opposite direction in series with the alternate gate winding 8 and the diode 12. The level of current or power to the load is directly controlled by setting the level of magnetization of the core 1 by momentary energization of the winding 5.

The operation of the memory unit is described in connection with the graphical illustration of FIG. 2 wherein three succeeding full cycles of the alternating current power supply are shown by the dotted line curve 15 and the output current shown for three different levels of magnetization of core 1 by the full line curve 16. The first full cycle is shown with the core at essentially a zero magnetization level; that is, the control winding 5 has not been energized and the core 1 is in a neutral state. During the first half cycle during which voltage is applied to load 10 in series with the rectifier 11, and winding 7, the flux flows in the counterclockwise direction as shown by line 13. The A.C. power supply is selected with a maximum amplitude which is insufiicient to estab lish saturation of the path including the two legs 3 and 4 and the adjacent bridging portion. As the core is at a zero flux level and the applied voltage is such that the core legs 3 and 4 never reach the saturation level, the impedance of the winding 7 is high and consequently only a minimal current flow is established. This is shown by the corresponding portion of line 16. During the alternate half cycle, the current flows in the Opposite winding 8 which is wound to establish a clockwise or oppositely directed flux as shown by the dotted flux line. As it is in the direction opposite to the magnetization established during the previous cycle, the impedance of the Winding 8 remains high and only a similar minimal magnetizing current flows through the load 10.

It was noted previously that the flux paths for the magnetic amplifying portion of core 1 are essentially restricted to that of the core immediately adjacent to the gate legs 3 and 4. This is true because the alternate path through the control winding 2 provides a substantially longer path and consequently of a substantially greater reluctance. As a result of this condition, the flux in the two legs 3 and 4 alternately increase and decrease Without ever reaching saturation and the impedance of the gate windings 7 and 8 remains high. Only the very small excitation or magnetizing current flows through the load 10. This corresponds to a minimum output and a Zero flux level in the remainder of the core.

Although illustrated with the gate arms or legs of a smaller cross section, a similar result may be obtained by forming the gate legs of a material which saturates at a lower flux density than the balance of the core.

A DC. control signal is now momentarily applied to the control winding 5 of a polarity establishing a flux downwardly through the legs 3 and 4 such as to be additive in each leg with the flux established by the associated winding. The level selected is such as to saturate the core 1 including legs 3 and 4. The load current immediately rises to a maximum as shown in connection with the second full cycle of the applied voltage wave line 15. The flux produced by the gate windings 7 and 8 is in the same direction as that established by the control winding 5. When winding 7 is energized, the gate leg 3 is in a magnetically saturated condition and consequently the impedance is low such that the current follows the impressed signal. Since gate leg 3 is saturated no change in flux level is produced in either gate leg by the current through winding 7. During the next half cycle when winding 8 conducts, the impedance of the winding 8 remains at a correspondingly minimum level and the current follows the applied voltage. During the illustrated second complete alternating current half cycle in FIG. 2, a maximum output current is established to load 10. This condition is maintained indefinitely even after the D.C. signal is removed from the winding as a result of the generally rectangular hysteresis characteristic of the core 1.

Now, if the core 1 is saturated to some intermediate flux level by suitable momentary energization of the control winding 5, the corresponding gate legs 3 and 4 are below saturation during the initial portion of the applied voltage. As a result, the corresponding windings 7 and 8 present a high impedance during the initial portion of the applied wave and the current is at a minimum or exciting current level. Referring to FIG. 2, at a point determined by the premagnetization level and the applied voltage of the first half of the cycle, the corresponding leg 3 rapidly switches from the unsaturated to the saturated state as a result of the rectangular hysteretic characteristic of the material of the core 1 at which time the impedance of the corresponding winding 7 rapidly decreases to a minimal value and the current correspondingly increases essentially as a step function. During the balance of the first half of the cycle, the current wave 16 follows the input voltage wave 15. When the cycle reverses, the second winding 8 conducts. The leg 4 is in an unsaturated state and consequently the winding 8 presents a high impedance. At a point essentially corresponding to that in the first half of the cycle, the additive flux of the preset magnetization and that of winding 8 establishes a saturated condition in the leg 4, whereupon the impedance rapidly drops and the current wave 16 again increases to follow the applied voltage Wave 15. Thus, a pulsating current is supplied to the load 10 with the conducting period being directly controlled by and proportional to the premagnetization level established by the control winding 5. The average power supplied to the load 10 is maintained at the selected level.

The average power is varied by changing the premagnetization level through appropriate energization of control winding 5 between the minimal exciting current level to a maximum level. As the load voltage and current may be of a much higher value than that required to control them, there is considerable amount of power gain in the device.

Although the core structure may be formed in any desired manner, a highly satisfactory core structure is shown in FIGS. 3 and 4. As disclosed therein, the core 1 is formed of a plurality of E-shaped laminations 17 which are stacked with the base portion of the alternate individual laminations to the opposite sides of the rectangular core and with the arms in superimposed relation. Each of the core laminations 17 includes a control leg and a base portion of a similar Width and the two gate legs generally of one-half the Wdith of the control leg. The laminations are preferably formed of a nickel steel such as that sold under the trademark Orthonol by Magnetics, Inc. (Butler, Pa.) or other suitable material which has been annealed to provide maximum squareness of the hysteresis loop. Each lamination 17 is provided with bolt or clamping holes 18 in the respective four corners and all edges are preferably formed completely burr free and the laminations are extremely flat. The edges should not be rolled or deformed for an optimum core unit. The winding 5, 7 and 8 may be wound on suitable bobbins 19 and the core laminations 17 interleaved therewith to form the core unit, as shown pictorially in FIG. 3. After assembly of the core laminations, they are interconnected by suitable nut and bolt units 20.

Referring particularly to FIG. 5, the analog memory device of the present invention is shown connected in a circuit to provide a direct current energization of a load 10 from AC. power supply lines 9.

In the illustrated embodiment of FIG. 5, a filtering capacitor 21 is connected in parallel with the load resistor 10 and in series with the analog memory device to the AC. power supply lines 9. The connection to the AC. power supply lines includes a transformer 22 having a primary connected in the power supply lines 9. A center tapped secondary winding 23 is provided having a center tap 24 connected as a common return lead to the one side of the paralleled resistor 10 and capacitor 21. The opposite ends of the center tapped secondary winding 23 are connected to the anodes of the respective diodes 11 and 12 forming a part of the saturating magnetic amplifying portion of the analog memory unit. In FIG. 5, the diodes 11 and 12 are polarized in the same direction with respect to the load 10 as a result of the use of the center tapped secondary winding 23. During the first half cycle, assuming the polarity shown by the conventional dot, the diode 11 conducts and current flows from the secondary winding 23 through the diode 11 and associated gate winding 7, the load 10 and returns to the center tap 24 of the transformer winding 23. The circuit path of the opposite gate winding 8 is reverse biased by the polarity of the opposite half of the secondary winding'23 connected between the diode 12 and the center tap 24. During the next half cycle, the polarity reverses to forward bias the second diode 12 and reverse bias the previously conducting diode 11. Power is then supplied to the load 10 from winding 23 between tap 24 and diode 12 in series with the second gate winding 8. The windings 7 and 8 conduct the alternate half cycles as in the previous embodiment. The gate windings 7 and 8 are again wound on legs 3 and 4 to establish a flux path as a result of current fiow through the windings as in FIG. 1.

The control winding 5 is connected to the signal voltage to be remembered shown for purposes of illustration and simplicity of explanation in this and the following figures by a battery 25 connected across a potentiometer 26. A tap 27 on the potentiometer 26 is connected in series with a momentary set switch 28 to one side of an input resistor 29 and a D.C. amplifier 30. The opposite side of the resistor 29 and the amplifier 30 are connected by leads 31 and 32 in series with the paralleled load resistor 10 and filter capacitor 21 to the common or return side of the battery 25 and potentiometer 26.

The output of D.C. amplifier 30 is connected directly across the control winding 5.

In the operation of the circuit of FIG. 5, the current flow through the load 10 is a direct current as a result of the center tapped secondary winding 23 and the diodes 11 and 12. Current alternately flows through the gate windings 7 and 8 which are wound in the same direction in series with the load resistor 10. The capacitor 21 provides a filtering action to smooth or average the pulses of D.C. current and consequently establish a relatively pure D.C. current flow in the load 10. The change in the impedance level of the effective winding 7 or 8 and the beginning of the point in each half cycle of appreciable conduction is responsiveto the preset magnetization of the core 1 in the same manner as described with respect to :FIG. 1.

The signal source provides a variable D.C. voltage connected in series with the load voltage and of an opposite polarity across the input resistor 29 in series with the switch 28.

When the switch 28 is closed, the voltage across the input resistor 29 and therefore the signal to the amplifier 30 is determined by the relative level of the signal voltage and the average voltage appearing across the load 10.

If the input control voltage at the signal source is higher than the load voltage, the D.C. amplifier 30 establishes a signal on control winding 5 to increase the output voltage level. This increases the premagnetization level of core 1 including legs 3 and 4 in the direction of the flux of the active gate winding 7 or 8. As a result, the impedance of windings 7 and 8 drops at an earlier point in each half cycle and increases the output voltage in a manner similar to that previously discussed.

It the output or load voltage is higher than the control signal voltage, a reverse signal occurs at the input to amplifier 30 and a reverse current is established through the control winding 5. This reduces the premagnetization of the core and increases the gate winding magnetic flux required to cause saturation of the path including the legs 3 and 4. The impedance of the effective windings 7 and 8 remains high for a longer period and establishes a reduced output or load voltage. The output voltage will thus always approach the control voltage and drive the control current to a zero setting level.

The maximum error in output level set point is controlled by the voltage required in the control Winding or applied to the control winding to establish a change in the flux level in the large portion of the core.

Although the DC. amplifier is not required or essential in the broadest aspects of this invention, it increases the voltage gain within the feedback loop and therefore will improve the accuracy. Further, the DC. amplifier may provide an impedance match between a high impedance control voltage source and the low impedance of the control winding 5. As a result, it can improve the speed of response.

Thus, the analog memory device of the present invention permits highly accurate control of a direct current output with a highly desirable memory feature. The saturating magnetic amplifier portion provides the control with the reset magnetomotive force supplied from the control coil 5. The negative feedback illustrated in FIG. provides a highly satisfactory means for establishing a very precise control point. The control point will be maintained over long periods of time and will remain set in the event of power failure and its reestablishment.

The analog memory device can also be employed with a suitable negative feedback to energize an alternating current load; for example, as shown in FIG. 6'.

In the embodiment of FIG. 6, the analog memory device is constructed as shown in FIG. 1 with the A.C. power supply line 9 connected in series with an isolating transformer 33 to the output of the analog memory device. The transformer 33 includes a primary winding 34 connected in series with the A.C. power supply lines 9 and the paralleled gate windings 7 and 8, with the associated diodes 11 and 12 connected in the paralleled circuits as in FIG. 1. A first or load secondary winding 35 of the transformer 33 is connected across and supplies power to a load resistor A second or feedback secondary Winding 36 is center tapped as at 37 and connected in a full wave rectifying circuit including a pair of diodes 38 and 39 having their anodes connected to form a common terminal. The cathodes of the diodes 38 and 39 are connected to the opposite ends of the secondary winding 36 and similarly polarized with respect to the opposite ends to provide a full wave DC. output between the center tap 37 and the common terminal ends of the diodes 38 and 39. An integrating resistor 40 and capacitor 41 are connected across the tap 37 and the diodes to provide a DC. feedback signal. A suitable bleed-off resistor 42 is connected in parallel with the capacitor 41 to control the time constant of the feedback circuit. A variable control voltage signal is represented by a battery 43 and potentiometer 44 connected in circuit with the feedback signal and a momentary control switch 45 directly to winding 5.

In the circuit of FIG. 6, alternate half cycles of the power current-flow alternately through the gate windings 7 and 8 in the same manner as in FIG. 1 with the level of the current controlled directly by the preset magnetization of the main path of the core 1. In this case, the feedback signal however is not taken directly from the load 10 but rather is taken from the center tapped winding 36, rectified, integrated and filtered to provide an average DC. voltage proportional to the average alternating current voltage applied to the load 10.

In the illustrated embodiments of the invention of FIGS. l6, the analog memory device is shown connected in series with the load and thus carries full load current and voltage. The invention provides a simple and reliable analog memory device permitting operation directly at the available power line frequency and power level.

Further, as the device operates directly at the line frequency, it produces an output wave signal which is particularly adapted for phase controlling of silicon controlled rectifiers, Triacs and similar devices.

A circuit showing the analog memory unit applied to phase control of a Triac 46 is shown in FIG. 7. As is well known, the Triac is a solid state bilateral switch which is normally in an open or blocking state. The Triac includes a trigger or gate element 47 to receive a signal for firing of the device into conductive state. A signal of either polarity applied to the gate of the Triac while voltage is applied to the main elements will trigger the device and it will conduct for the balance of the corresponding half cycle.

In FIG. 7, the load resistor 10 is connected in series with the Triac 46 directly across the A.C. power supply lines 9. In the illustrated embodiment of the invention, the gate 47 is connected in series with a current limiting resistor 48 and a gate control resistor 49 across the gate input circuit of the Triac.

The analog memory unit is constructed as shown in FIG. 1 and connected in series with resistor 49 across the A.C. power supply lines 9. In the illustrated embodiment of the invention, a separate feedback transformer 50 has a primary winding 51 connected directly across the load 10 and a center tapped secondary 52 connected in a feedback network 53 corresponding to that shown in FIG. 6. The network 53 provides an average direct current signal which is algebraically added to the input from a variable signal source represented by batterypotentiometer network 54 whenever a momentary switch 55 is closed, as in FIG. 6.

In the operation of the embodiment of the invention shown in FIG. 7, the Triac 46 normally opens the power circuit to the load 10 and also to the paralleled feedback transformer 50. In the absence of any premagnetization set point of the control core 1, the small exciting current flows through the gate windings 7 and 8 and the series gate control resistor 49. The drop across the resistor 49 is insufficient to develop a triggering voltage.

However, by premagnetization of the analog memory unit core 1, the impedance of the windings 7 and 8 can be reduced at any selected point in the half cycle such that the load current rises and develops a firing voltage across the resistor 49, thereby firing or triggering the Triac 46. Once triggered, the Triac conducts over the balance of the half cycle.

The control unit operates at the power line frequency and thus provides a properly phased control signal for triggering the Triac in a manner which permits varying the control signal over the full 180 degrees of each half cycle.

Triacs and similar bilateral switches at the present state of development are relatively low power devices and consequently if higher power levels must be controlled silicon controlled rectifiers may be employed; for example, as shown in FIG. 8.

In FIG. 8, a pair of silicon controlled rectifiers 56 and 57 is connected in parallel with each other and in series with the load resistor 58 across the A.C. power supply lines 9. The rectifiers 56 and 57 are oppositely polarized to conduct the alternate half cycles of the A.C. power supply and to thereby supply alternating current power to the load resistor 58. The silicon controlled rectifiers 56 and 57 are connected to be controlled from the analog memory device through a transformer 59 having a primary winding 60 connected in series with the analog memory unit and particularly the paralleled windings 7 and 8 directly across the A.C. power supply lines 9 and thus in parallel with the circuit of load 10 and rectifiers 56 and 57 as described above. The transformer 59 includes a pair of secondaries 61 and 62 connected respectively across the gate to cathode circuit of the silicon 9 controlled rectifiers 56 and 57. A feedback network 63 supplies a feedback voltage proportional to the voltage across the load resistor 58 to the input circuit 64, in the same manner as shown in FIG. 7.

In operation of the device, in the absence of paramagnetization of the core 1 of the analog memory unit, the output is minimal and consequently the current through the primary 60 of transformer 59 is insufficient to trigger the silicon controlled rectifiers 56 and 57. It a set point magnetization of the analog memory core 1 is established, the impedance of the windings 7 and 8 drops at a related point in the half cycle and the current through the transformer winding 60 rises to a level to trigger the proper silicon controlled rectifier 56 or 57 during each half cycle.

The circuit of FIG. 8 operates essentially in the same manner as that described with respect to FIG. 7 with the exception that the coupling transformer 59 provides alternately eltective signals to the two silicon controlled rectifiers 56 and 57 to alternately trigger them in the appropriate half cycles.

The present invention has been described in a plurality of different highly useful circuits but its application may be extended to any application wherein the output energization of a load is to be established in accordance with a low level power signal and which is desired to retain over long periods of time. It can be advantageously applied in servo systems for operation of hydraulic or pneumatic controls such as employed in temperature control systems. It can provide control of any load adapted to be phase controlled; for example, heating, lighting, motor drive speeds for fans, pumps, machine tools and the like.

The control device can also be viewed as a latching relay means which can be locally or remotely controlled and connected to provide preselected load operation.

The present invention thus provides a highly improved analog memory device based on the concept of a saturating magnetic amplifier forming an integral part of the analog control core in such a manner that the device operates at power line frequency and voltage level. An analog memory device of the present invention employing feedback does not require any change in the polarity of the input control signal to change the output level of the system. Thus, the output is directly related to the increase and decrease in the control signal. The gain associated with the device also permits establishment of precision control of the output from the input.

The present invention thus provides a very simple and inexpensive analog memory device having Wide application in control circuitry and particularly enclosed loop systems as a result of the high gain of the system permitting a feedback system.

Various modes of carrying out the invention are contemplated as being within the scope of the following claims particularly pointing out and distinctly claiming the subject matter which is regarded as the invention.

I claim:

1. A magnetic control unit, comprising a multiple apertured magnetic core defining a magnetic control path, said core is a generally rectangular laminated member including a plurality of generally E-shaped laminations stacked with superimposed arms and with the base portion of adjacent laminations to opposite sides of the core, the middle arm and one end arm defining a pair of gate legs and the second end arm defining a control leg, the gate legs and the immediately adjacent bridging portion of the control path defining a magnetic saturating path, said core having an essentially square hysteresis loop characteristic and said gate legs being adapted to be saturated while said control legs and the remainder of said control path is essentially below saturation,

at least one pair of gate windings provided, one winding on each of said gate legs,

a load circuit means connecting said gate windings in circuit to alternating current input means having a varying current amplitude within each half cycle of the current input, an output connection means and including selection means connecting said gate windings to conduct the alternate half cycle of the alternating current input, said gate windings being con structed and connected to establish oppositely directed flux loop including said gate leg and the immediately adjacent portion of the core bridging and two gate legs to define a saturating magnetic amplifier means,

at least one control winding wound on said core for magnetizing of said core with said gate legs being similarly magnetized in the same direction as the magnetization established by current in the corresponding gate winding, and

a feedback circuit connected to said load circuit means and to said control winding and energizing said control winding in accordance with the polarity and level of a control voltage and of the output voltage to establish an output amplitude in direct proportion to the input signal.

2. The control unit of claim 1 wherein the middle arm and one end arm defining said gate legs having one-half the cross section area of the opposite end arm to saturate prior to the opposite end arm.

3. A magnetic control unit, comprising a multiple apertured magnetic core defining a magnetic control path, a part of which comprises a pair of adjacent parallel gate legs and a magnetic saturating path including the gate legs and the immediately adjacent bridging portion of the control path, said core having an essentially square hysteresis loop characteristic and said legs being adapted to be saturated while the remainder of said control path is essentially below saturation,

at least one pair of gate windings provided, one winding on each of said gate legs,

a load circuit means connecting said gate windings in circuit to alternating current input means having a varying current amplitude within each half cycle of the current input, an output connection means and including selection means connecting said gate windings to conduct the alternate half cycle of the alternating current input, said gate windings being constructed and connected to establish oppositely directed flux loop including said gate leg and the immediately adjacent portion of the core bridging said two gate legs to define a saturating magnetic amplifier means,

at least one control winding wound on said core for magnetizing of said core with said gate legs being similarly magnetized in the same direction as the magnetization established by current in the corresponding gate winding, and

a feedback circuit connected to said load circuit means and to said control winding and energizing said control winding in accordance with the polarity and level of a control voltage and of the output voltage to establish an output amplitude in direct proportion to the input signal,

said gate windings are connected in circuit branches which are paralleled with each other and in series with alternating current input means and the output connection means, said selection means including unidirectional conductive means series connected one each in each of said circuit branches, load connection means connected in series with a triggered switch means across the paralleled connection of said branches, a trigger signal means connected across the output connection means, and means connecting the triggered switch means to the signal means to trigger said switch during each half cycle in accordance with the level of magnetization of said control path.

4. The control unit of claim 3- wherein said triggered switch means is a bilateral semiconductor switch means a 1 1 having a gate element, said signal means being impedance means connected to the gate element to trigger the switch means in response to the alternating current established by saturation of said gate legs.

5. The control unit of claim 3 wherein said triggered switch means include a pair of paralleled unidirectional semiconductor controlled rectifier means each having a gate element, and a coupling transformer having a primary winding connected across the output connection means and a pair of secondary windings connected one each to the gate elements to trigger the switch means in response to the alternating current established by saturation of said gate legs.

6. A magnetic control unit, comprising a multiple apertured magnetic core defining a magnetic control path, a part of which comprises a pair of adjacent parallel gate legs and a magnetic saturating path including the gate legs and the immediately adjacent bridging portion of the control path, said core having an essentially square hysteresis loop characteristic and said gate legs being adapted to be saturated while the remainder of said control path is essentially below saturation,

at least one pair of gate windings provided, one winding on each of said gate legs,

a line frequency power input means connecting said gate windings in circuit to alternating current power of essentially sixty cycles per second and essentially a sine wave, and including output connection means having selection means connecting said gate windings to conduct the alternate half cycle of the alternating current input, said output connection means including a gated switch means having an input means connected to the gate "windings for selectively turning on said gated switch means in accordance with the conduction through said windings, said gate windings establishing oppositely directed flux loops including said gate legs and the immediately adjacent portion of the core bridging said two gate legs to define a saturating magnetic amplifier means,

at least one control winding wound on said core for magnetizing of said core with said gate legsbeing similarly magnetized in the same direction as the magnetization established by current in the corresponding gate winding and the level of magnetization being selectively set to control the period of each half cycle of the sine wave conducted by said gate windings and thereby the time of turning on of the gated switch means, and

a feedback circuit connected to said load circuit means and to said control winding and energizing said control winding in accordance with the polarity and level of a control voltage and of the output voltage to establish an output amplitude in direct proportion to the input signal.

7. The magnetic control unit of claim 6 wherein said gated switch means is a controlled rectifier having an input gate means connected to said gate windings.

References Cited UNITED STATES PATENTS TERRELL W. FEARS, Primary Examiner GARY M. HOFFMAN, Assistant Examiner US. Cl. X.R. 307-88 Patent No.

Dated July 2].,

InventorOI) Column 9,

Claim 1 Column 10,

Claim 3 Column 10,

( Atteat:

EdwudlLFletchegIr.

CHARLES F. STRAWN It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

cancel "It" and substitute cancel "and" and substitute ---said---;

after "said" insert --gate--.

SIGNED ANu QEALEP WILLIAM R- sown-m. Jae Gomissioner of ram FORM PO-105O (10-69) USCOMM-DC 5O376-F'59 U.S. GOVERNMENT PRINTING OFFICE: Ill, 0-35.!!!

Images