US3521171A - Random time interval generator - Google Patents

Description

United States Patent O f 3,521,171 RANDOM TIME INTERVAL GENERATOR Michael S. Pinkert, 8811 Colesville Road, Silver Spring, Md. 20910 Filed Apr. 7, 1967, Ser. No. 629,180 Int. Cl. H03k 5/00 US. Cl. 328-129 3 Claims ABSTRACT OF THE DISCLOSURE A random time interval signaling device is presented which operates by driving an electronic counter until a signal is generated. When the signal is generated a secondary driving means begins pulsing the counter and continues until the signal is turned off leaving the counter in a random state. The source of the random time interval being the reaction time of the operator of the device.

BRIEF SUMMARY OF INVENTION The present invention relates to an electronic device for generating signals at random time intervals.

According to the invention, an electronic counter is continuously pulsed by a low frequency input until the counter overflows at which time a high frequency input begins pulsing the counter and a signal is generated. The high frequency input continues pulsing the counter until the signal is turned off. When the signal is turned off, a random number is left in the counter by the high frequency input and the low frequency input then takes over to pulse the counter again to the overflow condition. By making the high frequency input substantially greater than the low frequency input, and, because the time taken to turn off the signal will be diflerent at each overflow point, the number left in the counter when the signal is turned off will vary giving the device the desired randomness. The number of high frequency pulses generated is proportional to the time the signal is on which is a direct function of the reaction time required to turn off 'the signal. Hence, in the preferred embodiment, where the operator is a human being, the variation in the human reaction time is effectively the source of the random time interval signal generation.

The device of the present invention provides an apparatus having few elements and of relatively simple design to produce the desired signal at unpredictable random intervals. The apparatus requires a minimum of maintenance and calibration because of its lack of elaborate and expensive high speed switching circuitry. A prototype model now being tested, is no larger than a pocket sized transistor radio to facilitate the handling and utility of the device.

If desired, rather than relying on the human reaction time to leave a random number in the counter each time the signal is generated, it is within the scope of the present invention to provide a mechanical means, such as a heated metallic element, to cut oif the high frequency input pulses and thereby maintain the random time interval operation.

There are many potential applications for this device including work sampling and quality control evaluation. For example, there is a practical need to signal observers, randomly and automatically, when to make an observation or to take a sample. This would, in effect, eliminate the need for full-time observers who customarily use random time tables and consequently constantly watch the clock.

The manufacturer needs to know and keep a check on the quality of the items he is producing, and, this quality check is most accurate when samples are taken at random time intervals. The device of the present invention could be associated with an assembly line to take a sample,

3,521,171 Patented July 21, 1970 either manually or automatically, each time a random signal was generated. When samples are taken according to a definite sequential pattern, if there is any error present, it would most likely be cumulative. The present invention provides a low cost, simple, convenient device to eliminate this potential error.

Even self work sampling is possible with the device of the present invention. For example, executives and other professionals can randomly sample how their time is used. Another obvious application is in psychological testing.

BRIEF DESCRIPTION OF DRAWING FIG. 1 shows a functional block diagram of the components of the present invention; and, I

FIG. 2 shows a series of waveforms produced by the various components of the present invention.

DETAILED DESCRIPTION Referring to FIG. 1, there is shown a reset switch 1 having an output 20 coupled to the C input of an enabling flip-flop or switch 10. The enabling flip-flop or switch 10 is a binary storage element having two states with the capacity to remember the last state into which it was forced even after the input signal has been removed. Clearing the enabling flip-flop 10 corresponds to forcing it to the 0 state, and, setting implies forcing it to the I state. The C input forces the enabling flip-flop to the 0 state as stated above. Therefore the reset switch 1 is a momentary switch which is pushed to make contact and clear the enabling flip-flop to the 0 state when the random signal or audible tone is generated. The test/operate switch 2 has two outputs 21, 22 corresponding respectively to test condition and operate condition. The test output 21 is coupled to an AND gate 4 and the operate output 22 is connected to an AND gate 5. Gates are used to operate electronic switch circuits, actuate counters and in numerous other applications where an on-off type of signal is desired. The AND gate requires that both inputs be present in order to generate an output signal. The AND gate 4 has connected at its second input 23 a signal produced by the low frequency pulse generator 13. In the preferred embodiment the low frequency pulse generator would be capable of producing a continuous pulse at any one of several different frequencies. Hence, with the test/ operate switch 2 in the test position a test input and input pulse from the low frequency pulse generator 13 would each arrive at the AND gate 4 to induce an output in line 24 coupled to the T input of enabling flip-flop 10. The T input corresponds to a toggle condition which forces the enabling flip-flop 10 to change its state from whatever position it might be in. That is, whenever toggle input T is actuated the enabling flip-flop is changed from either 0 to I or I to 0. Since more than one input will not be present for any significant time there is no question as to what state the enabling flip-flop will be in.

The AND gate 5 has connected at its second input 25 the overflow pulse from the electronic counter 11. The

output 26 from AND gate 5 is coupled to the S input of enabling flip-flop 10. The S input forces the enabling flipflop 10 to the I state in the same way that the output 20 of reset switch 1 forces the enabling flip-flop 10 to the 0 state as hereinbefore set out. The electronic pulse counter 11 is a five (5) flip-flop register which counts the pulses received from either the low frequency pulse generator 13, or, the high frequency pulse generator 12 which pass through the OR gate 14. The OR gate 14, unlike the AND gates 4, 5, will produce an output whenever it receives an input from either the low frequency pulse generator 13 or high frequency pulse generator 12, or, both. Since the low frequency pulse generator 13 operates continuously after power switch 3 is turned on, the OR gate 14 will always receive at least one input.

The low frequency pulse generator 13 has an output 28 connected to the OR gate 14. Similarly, high frequency pulse generator 12 has an input 29 from enabling flip-flop and an output 30 to the OR gate 14. The OR gate 14 has a single output 32 to the electronic counter 11. As stated before, the low frequency pulse generator 13 produces pulses at a frequency which can be preset by the operator at all times after switch 3 is turned on. This generator is normally set several orders of magnitude lower than the frequency of the high frequency generator in the order of from 1 c.p.s. to 1 c.p.m. The high frequency pulse generator 12 pulses at a fixed frequency when enabled by enabling flip-flop 10. This frequency is approximately -30 kc. Variations of up to in these frequencies have no critical effect on the operation of the device except for changing the tone frequency of the audible signal.

The electronic counter 11 generates two outputs. When the counter fills up and overflows a counter overflow pulse is generated at output 33 which is connected to input 25 of AND gate 5. As set out hereinbefore, when AND gate 5 is triggered by receiving an output from both the operator switch 2 and counter overflow pulse, an output through line 26 is directed to the S input of enabling flipflop 10 to force the enabling flip-flop to the I state. This output, of course, turns on the high frequency pulse generator 12 also, and at the same time, an arbitrarily chosen output 34 at stage X of the electronic counter 11 is directed to AND gate 6. The arbitrary stage of the counter is used to drive the speaker input and serves as an audio oscillator. The stage picked is an output which depends on the desired tone and is not critical to the operation of the device. This arbitrary pulse, taken with the output generated by enabling flip-flop 10 at output 35 in the I state, is joined at AND gate 6 to produce an output 36 to the speaker driver 7 and speaker 9. This latter output reproduces the audible signal reminding the operator of the device that the high frequency pulse generator is now pulsing the electronic counter 11, and, that the reset switch 1 should be actuated to turn off the signal and start the cycle of operation again. Of course, at the sound of the signal the necessary sample or reading should be taken based on the function required of the operator. The volume control knob 8 simply adjusts the intensity of the audible signal produced when the counter 11 overflows.

In order to better understand the circuit above described, the general operation of the device will not be explained. The operator would initially turn the power switch 3 to the on position. With the test/operate switch 2 in the test position, the operator would then preset the mean time interval. In this state the Random Time Interval Generator, hereinafter called RADIK, will produce alternating intervals of signals and no signals as a result of the T input of enabling flip-flop 10 switching back and forth from the O to the I state to turn the high frequency pulse generator 12 on and off. FIG. 2 shows diagrammatically the result of the different signals in waveform relationship. FIG. 2(a) represents the power switch waveform when it is switched from the off position to the on position. Of course, it remains on as long as the device is being used. FIG. 2(b) shows the test/operate switch 2 which also produces a continuous signal in either of its selected positions. Similarly, FIG. 2(6) shows arbitrarily the low frequency signal which operates continuously after the power switch 3 is turned on. Since the horizontal axis of the FIG. 2 diagram is a time axis, the timing relationship of the signals generated by the different elements is clearly illustrated first by the enabling flip-flop switch waveform of FIG. 2(d).

As pointed out above, when the test/operate switch is moved to the test position, the T input of the enabling switch becomes actuated by an input from line 24 to begin alternately shifting the enabling switch between the O and I states. Of course, during the time the enabling switch is in the I state, an input is generated in line 35 which combines with the pulses from the arbitrary stage 34 of counter 11 to produce an input at 36 to the speaker 7 as represented by the speaker waveform of FIG. 2(f). Accordingly, the input 36 would produce an audible signal each time the enabling switch moved to the I state. By measuring the length of the no signal intervals with a stop watch and multiplying this time by 16 the mean time interval can be determined. The mean time interval is then determined by multiplying by /z the maximum number of pulses required to overflow the counter. Since the preferred counter is a five (5) flip-flop register, the determination would be based on the following formula:

Mean time interval= X (interval of no signal) 5 Mean time interval= X (interval of no signal) Mean time interval= 2 X (interval of no signal) Mean time interval=16 X (interval of no signal) Next the operator would move the test/operate switch 2 to the operate position to begin producing random time interval signals. With the test/operate switch 2 in operate position, and the enable switch in the 0 state, the low frequency pulse generator 13 would direct pulses to the OR gate 14 and through output 32 to the electronic pulse counter 11. When the counter overflowed an output would be generated at line 33 which would go to AND gate 5 where it would be joined with an operate input 22 to produce an output at line 26. This output is connected to input S of enabling flip-flop 10 which forces the flipflop to the I state and produces an input at 29 to start high frequency pulse generator 12. The high frequency pulse generator then begins pulsing the electronic counter and continues to do so until the reset switch 1 is pushed to direct an output 20 to C input of enabling flip-flop 10 to clear the circuit. This step would generate a signal at C to shift the enabling switch back to the 0 state and turn-off the high frequency pulse generator 12. Further, since the low frequency pulse generator 13 runs continuously once the power switch is on, it would still be driving the counter from the state the counter was left in when the high frequency pulse generator was turned off. Of course, this is the origin and source for the randomness of the signals produced when the counter overflows. The electronic pulse counter 11, of course, has the arbitrarily chosen output 34 at stage X of the counter which directs an input to the AND gate 6. When the enabling flip-flop 10 is triggered to the I state as a result of overflow pulse 33, an output 35 is directed to the AND gate 6 which combines with the output 34 from counter 11 to induce the signal (audible) at 9 to indicate to the operator that he should perform the task assigned him and then operate the reset switch 1. Since the AND gate 6 requires both of the signals 34 and 35 to produce an output at 36, the output produced will depend upon the state of the two inputs 34 and 35,. Of course, as long as the enable switch 10 remains in the I state, a constant signal is supplied at 35. Similarly, since the pulse generator 12 operates at a relatively high frequency (20-30 kc.) with the enable switch in the I state, the input 32 to counter 11 under these conditions would constitute high frequency pulses, and the output 34 from the high frequency pulses being fed to counter 11 would be substantially steady. Accordingly, the audible signal produced by speaker 9 being responsive to the outputs at 34 and 35 would also be nearly constant as long as the enable switch 10' remained in the I state.

During the time the signal is on, a large number of pulses are fed into the counter. Several counter overflow pulses will be generated before the reset switch is pushed, however, since the enabling flip-flop remains in the Istate until cleared, the additional overflow pulses have no effect. The number of high frequency pulses generated is directly proportional to the time the signal is on which corresponds to the reaction time of the operator.

When the operator pushes the reset switch 1 to clear the enabling flip-flop 10, the high frequency pulse generator 12 is cut off and the signal, or audible sound from speaker 9, is turned oh. This allows the low frequency pulse generator 13, which runs continuously, to again 'begin pulsing the electronic pulse counter 11 from whatever state the high frequency generator 12 has left it in, to start a new cycle.

As stated hereinbefore, because the reaction time of the operator varies, the number left in the counter 11 when the high frequency pulse generator 12 is turned off after each cycle will be different to provide the random time interval signal desired.

FIG. 2 shows the different waveforms produced when various components of the device are actuated. FIG. 2(a) shows simply the on and off state, with FIG. 2(1)) showing the difference between test condition and operate condition. FIG. 2(0) shows the low frequency generator pulses and FIG. 2(d) shows the state of the waveform when the enabling flip-flop 10 is alternately actuated and cleared. FIG. 2(e) shows the high frequency input pulses which are constant in the order of from 20-30 kc. FIG. 2(f) showing the signal generation waveform of speaker 9, is the same as the enable flip-flop waveform. FIG. 2(g) shows the position and relationship of the counter overflow pulse and the reset switch waveform as illustrated in FIG. 2(h).

It should be pointed out that that arbitrary output at stage X of the electronic counter is chosen to produce a tone of the frequency at which it is taken off. This particular frequency will be different depending upon the conditions under which the operator is working.

Obviously many modifications and variations of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described.

What is claimed is:

1. An electronic timing circuit for producing a random time signal comprising, a low frequency pulse generator and a high frequency pulse generator, each having an output connected to an electronic counter, said high frequency pulse generator being responsive to the state of an enabling switch, wherein, with the said enabling switch in a first state, only said low frequency generator pulses said counter until said counter produces an overflow pulse, said counter overflow pulse producing a first input to said enabling switch for shifting the enabling switch to a second state wherein said high frequency generator output supplies pulses to said counter while simultaneously said random signal is produced, and means for impressing a second input on said enabling switch to shift the enabling switch back to said first state leaving the counter in a random state and permitting only the low frequency generator to pulse the counter.

2. The circuit of claim 1 wherein said random signal is produced by the combined signal from said enabling switch in its second state and an arbitrarily chosen output from said counter.

3. The circuit of claim 2 wherein said first input comprises the combincd overflow pulse from said counter and the signal from an operate switch, and the second input comprises the output from a reset switch.

References Cited UNITED STATES PATENTS 2,589,270 3/1952 Mayle 328129 XR 2,832,044 4/ 1958 Bliss 328129 XR 2,941,152 6/1960 Gosslau 328l29 XR 3,002,151 9/1961 Broderick et al. 32848 XR DONALD D. FORRER, Primary Examiner J. ZAZWORSKY, Assistant Examiner U.S. Cl. X.R.

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