US3517880A - Analog multiplier including a time average integrating unit - Google Patents

Description

United States Patent 3,517,880 ANALOG MULTIPLIER INCLUDING A TIME AVERAGE INTEGRATING UNIT Thomas J. Hutton, Swissvale, Pa., assignor to Westinghouse Air Brake Company, Swissvale, Pa., a corporation of Pennsylvania Filed Aug. 1, 1968, Ser. No. 749,407 Int. Cl. G06g 7/16 US. Cl. 235-194 10 Claims ABSTRACT OF THE DISCLOSURE This invention relates to an improved analog multiplier for multiplying at least first and second variables and ineludes in combination an amplifier, a gate, a time average integrating means, and a comparator. The amplifier has an input which is the first variable, as well as an output. The time average integrating means is electrically connected to the amplifier by way of the above-noted gate. The comparator has first and second inputs. The first input is a reference signal and the second input is equal to the second variable. The comparator also has an output which controls the aforementioned gate, the output from the comparator appearing only when the absolute value of the second variable is greater than the absolute value of the reference signal. Accordingly, the time average integrating means integrates the amplifiers output to provide multiplication of the first and second variables.

My invention relates to an improved analog multiplier.

More specifically, my invention relates to an improved analog multiplier for multiplying at least first and second variables and including in combination an amplifier, a gate, a time average integrating unit and a comparator. The above-noted amplifier has an input which is the first variable to be multiplied, as well as an output.

The time average integrating unit is electrically connected to the amplifier output by way of the above-noted gate.

The comparator has first and second inputs. The first input is a reference signal and the second input is equal to the second variable. The comparator also has an output which controls the aforementioned gate, the output from the comparator appearing only when the absolute value of the second variable is greater than the absolute value of the reference signal. Accordingly, the time average integrating unit integrates the amplifiers output to provide the multiplication of the first and second variables.

In railroad classification yards, there are many parameters that must be ascertained such as, curved-track rolling resistance, straight track rolling resistance, train velocity, etc. For example, an equation such as the following must be solved in order to determine train velocity at the foot of the classification yard hump:

el-c2 el-c2] (V02) 2 01) +29-9D 1- 2 m where,

3,517,880 Patented June 30, 1970 ice In large classification yards, a digital computer which may cost on the order of $100,000 is usually used to make such calculations for the values of e cl) cl-c2 and and thus solve the equation. However, for relative small classification yards the use of such elaborate, costly equipment to compute the products which result from the multiplication of each of the terms of the equation would be totally out of the question for this would be a solution to a problem that would be much like killing a fly with a Sledgehammer. It would therefore be much less costly to use an inexpensive analog multiplier which possesses reasonable accuracy to calculate products such as those above noted in the smaller classification yards.

In the past small classification yards employed a servomechanism of the potentiometer type where the two variables to be multiplied are respectively represented by a potentiometer winding which bears a direct relation to one of the variables and the arm of which is moved as a function of the second variable by a servo-motor. Since this arrangement is electromechanical in nature, this prior art approach is susceptible to mechanical failure as well as inaccuracy due to inherent hysteresis error in the servo and mechanical components. Also, there may be difficulty in multiplying a third variable by the first two. Thus, while the dimension of the problem has been reduced, the solution to the problem of accurate multiplication still leaves vast room for improvement.

It is therefore an object of this invention to provide an analog multiplier which will accurately multiply two or more variables by the employment of an amplifier which has one of the variables as its input in combination with a gate, and a comparator having two inputs, the first being a reference signal input, the second being the second variable, as well as a time average integrating means.

Another object of this invention is to provide an analog multiplier which can be completely eletcronic in nature.

Yet another object of this invention is to provide a virtually instantaneous multiplication of two variables by the employment of solid state electronic components.

Still another object of this invention is to provide an analog multiplier which is compact and inexpensive.

In the attainment of the foregoing objects an analog multipler has been invented for multiplying at least a first and second variable which includes in combination therewith an amplifier, a gate which may be electronic in nature, or even a relay, a time average integrating unit, and a comparator. The amplifier has an input which is the first variable to be multiplied as well as an output.

The time average integrating unit is electrically connected to the amplifier by way of the electronic gate or a relay gate contact, which contact is actuated by the relay gate armature which in turn is electrically connected to the output of the amplifier. In the case of an electronic gate the time average integrating unit is electrically coupled to the output of the gate while the output from the amplifier is also electrically coupled to the gate as an input.

The comparator has first and second inputs: the first input is a reference signal which is an even valued periodic triangular function, and the second input is equal to the second variable.

In the case of an electronic gate the output from the comparator is electrically coupled to the gate to thereby control delivery of the input from the amplifier to the time average integrating unit.

In the case of a relay used as a gate the comparator has an output which is electrically connected to the relay gate coil, which when energized causes the relay gate armature to close the relay gate contact. This energization occurs only when the absolute value of the second variable is greater than the absolute value of the reference signal, thus producing a signal on the comparator output. Accordingly, in either the electronic gate embodiment or in the electro-mechanica1 relay situation, the time average integrating unit integrates the amplifier output to provide the multiplication of the first and second variables.

The inventive concept can be extended to the multiplication of three or more variable by use of a cascaded network technique which will be explained more fully hereafter. Further, it should be noted that although the foregoing description has been directed to a classification yard environment, the present invention has a much wider scope inasmuch as it can be used wherever two or more variable must be multiplied.

Other objects and advantages of the present invention will become apparent from the ensuing description of illustration embodiments thereof, in the course of which reference is had to the accompanying drawings in which:

FIG. 1 illustrates an analog multiplier of the prior art.

FIG. 2 illustrates the analog multiplier of the present invention in block diagram form.

FIG. 2a depicts a diode bridge arrangement for deriving absolute values of incoming signals to the comparator of FIG. 2.

FIG. 3 depicts the analog multiplier of the present invention in partial block diagram and circuit form. 7

FIG. 3a represents a signal from the output of the amplifier depicted in FIG. 2.

FIG. 3b represents a preferred waveform of the reference signal set forth in FIG. 2.

FIG. 30 sets forth the superimposed waveforms of the two inputs to the comparator of FIG. 2.

FIG. 3d depicts a gate energization waveform over one cycle.

FIG. 3e represents the input signal to the time average integrating unit of FIG. 2.

FIG. 4 illustrates another embodiment of the present invention.

FIG. 5 illustrates an embodiment of the invention where the multiplication of three or more variables is accomplished by the use of cascaded networks.

A description of the above embodiments will follow and then the novel features of the invention will be presented in the appended claims.

Reference is now made to FIG. 1 in which is shown an analog multiplier of the prior art. A voltage X analogous to the first variable X which is to be multiplied is sent into a servo-motor 12 over lead 11. The senvo-motor 12 drives a shaft 13, the end of which carries a pinion 14 which in turn drivingly engages a rack 14a. A rack and pinion arm 15 secured to rack 14a, in this exemplary embodiment is electrically coupled to a resilient lead 25, and may be in any of four positions 16, 17, 18 or 19 (shown as broken lined arrows) depending upon the voltage level of the X voltage input. In FIG. 1, four discrete possible levels are set forth for purposes of explanation only. The four voltage levels are X =V =0; X =V X =V X =V =Y max., or the maximum voltage of the second variable Y. It should be noted that, while there are only four levels of the X input shown and four discrete positions of the rack and pinion arm 15 associated with the above-noted four voltage levels, there may indeed be many more or less discrete voltage levels than that shown in FIG. 1.

As has been noted, the discrete voltage level of the X variable directly controls the rack and pinion 15 via servo-motor 21 such as to position it along a potentiometer 20 which has a total resistance designated as R and may be broken down into smaller resistances designated as r. The voltage between terminals A and B is the total voltage drop across potentiometer 20 and is analogous to the second variable Y, i.e., Y lvolts is impressed on terminals A and B. For example, if

X: V =0 volts and X: V =2.5 volts and X=V :5.0 Volts and X: V =7.5 volts then the total voltage drop across the potentiometer 20 when the rack and pinion arm 15 is at position 19 would be Y volts, or the voltage impressed on terminals A and B. If X is at the 5.0 voltage level, then the rack and pinion arm 15 would be positioned at position 18 representative of a voltage drop of /3 Y volts. If the X voltage level is at the 2.5 voltage level, then the rack and pinion arm 15 would beat a voltage level indication which is shown by position 17 representative of a voltage drop of /3 Y volts. If the X voltage level is at a zero level, then the rack and pinion arm 15 would be at position 16.

The potentiometer 20 is electrically connected to leads 21 and 22 via leads 26 and 27, respectively. The lead 21 is electrically connected to an amplifier 23 whose gain is equal to Y max., the voltage analogous to the maximum value of the second variable to be multiplied. Hence, if the range of X is from 0 to 7.5 volts and for the range for Y, 0 to 7.5 volts, and X 2.5 volts while Y=3 volts, then the rack and pinion arm 15 is at position 17 and the voltage carried on leads 21 and 25 to amplifier 23 is equal to /3 Y or 1 volt. The output of the amplifier 23 is designated by the reference numeral 24 and is equal to 1 volt times Y max., or 7.5 volts. As one experienced in the art can readily see, the output is indeed XY.

The maximum voltage drop across the potentiometer 20 cannot exceed the maximum voltage level presented by the X variable. In fact, Y max. must equal the maximum voltage level presented by the variable X in volts. For if, using a similar example to that noted directly above, Y max. were set equal to 10 volts, while X max. remains 7.5 volts, X remains 2.5 volts, and Y remains 3 volts, then the voltage carried on leads 21 and 25 to amplifier 23 is equal to 1 volt, but the output of amplifier 23, designated by the reference numeral 24 is equal to 1 volt times Y max. or 10 volts, rather than 7.5 volts, which is the correct product.

As has been previously stated, the analog multiplier of the prior art has disadvantages due to the mechanical movement of the rack and pinion arm 15 and also to the mechanical movement of the servo-motor 12. In both these mechanical movements, there is always present the possibility of lost motion in the mechanism which inherently decreases the accuracy of the multiplier. Another disadvantage that is present in the analog multiplier of the prior art is that it must contain limits on the two variables to be multiplied. For example, the X variable can never exceed the maximum value of the Y variable. To the problems noted above, the invention to be described hereafter provides a solution which is new and different.

Reference is now made to FIG. 2 which shows a block diagram of the present invention. An input X analogous to the first variable X to be multiplied is sent into an amplifier 31 over lead 29. The amplifier 31 is selected such that it has an output lead 32 on which appears the product XY max. and which it fed into gate 38. A reference voltage Ref. Y, which shall be described more fully hereinafter, is sent into a comparator 36, which has the ability to take absolute values of input signals and shall be described more fully hereafter, over lead 33, and a Y voltage analogous to the second variable Y to be multiplied is sent into the comparator 36 over lead 34. The output of the comparator is present on lead 37 and is sent into gate 38. The output of gate 38 is sent into a time average integrating means 41 over lead 39. The time average integrating means has an output 42 which would be the product of X times Y.

The above-noted comparator 36 will be further described at this time. The comparator 36 only presents an output at lead 37 when the absolute value of the voltage Y is greater than the value of the reference signal voltage Ref. Y. The reference signal voltage Ref. Y is an even functioned periodic triangular signal and is normally positive. In practice this reference signal has the appearance of a sawtooth signal.

The comparator 36 has the ability, as forementioned, to take absolute values of incoming signals by use of a diode bridge arrangement which is included in comparator 36 and illustrated in FIG. 2a. In FIG. 2a a signal representative of the second variable Y is incoming on lead 34. If this signal is of the polarity plus to minus it will traverse a circuit from lead 102, to lead 103, through diode 104, lead 105, voltmeter 106, lead 105a, lead 107, diode 108, to lead 109 thereby causing voltmeter indicator 110 to deflect positively.

If an incoming signal is of the polarity, minus to plus, it will traverse a circuit from lead 109 to lead 113, through diode 114, lead 105, voltmeter 106, lead 105a, lead 111, diode 112, to lead 102, thereby causing voltmeter indicator 110 to once again deflect positively.

As is easily seen, the voltmeter indicator 110 always deflects positively, i.e., the value of voltage visible on the voltmeter face and present on lead 115 is the absolute value of the incoming signal and the signal on lead 115 delivers this absolute value to the conventional circuitry (not shown) of the comparator. It should be noted that while there is in FIG. 2a a diode bridge shown to take absolute values of incoming signals, there may, indeed, be other ways of doing so, and this specific way is meant, by no means, to limit the present invention. It should also be noted that while the incoming signal of FIG. 2a is shown as the second variable Y, the diode bridge of the type shown in FIG. 2a could just as well be employed to handle the reference signal Y. Accordingly, a second diode bridge could be employed so that the absolute values of both Y and Ref. Y may be derived and utilized in the comparator 36. It should of course be recognized that the diode bridge of FIG. 2a provides the multiplier of this invention with the ability to cope with the multiplication of minus numbers and in the absence of such a requirement the diode bridge need not be included in the comparator 36.

Reference is now made to FIG. 3 which depicts an analog multiplier of the present invention in which the gate 38 of FIG. 2 is in this embodiment a relay 54. A voltage X analogous to the variable X which is the first variable to be multiplied is sent over lead 46 into an amplifier 47. The waveform of the voltage X is shown by curve 77 positioned immediately above the lead 46. As one can see, the voltage X is a DC. voltage. For purposes of explanation only, X is shown as a discrete steady state voltage. It is of course to be understood that X may vary. The amplifier is selected such that the output of the amplifier 47 is the product of X times Y max. which is present on lead 48. The curve 78, depicted above the output lead 48, shows XY max. to be a DC. voltage, but at a higher value than the voltage X of curve 77.

A reference signal voltage Ref. Y is sent into a comparator 52 over lead 49. The waveform of the reference 1 of the voltage Y is greater than the absolute value of the reference voltage signal Ref. Y. When the relay 54 is energized it closes a front contact a which thus completes a circuit from the lead 46 through amplifier 47, over lead 48, front contact a of relay 54, to a DArsonval voltmeter 56 which is a time average integrating voltmeter. The output of the DArsonval voltmeter 56 will be present on lead 57 and is the product employed of X times Y. It should be noted that while a DArsonval voltmeter is shown as a time-average integrating means there may indeed be other conventional time-average integrating circuits.

A mathematical explanation of the attainmnet of the XY product present on lead 57 will now be set forth by use of FIGS. 3a, 3b, 3c, 3d and 3e.

FIG. 3a once again depicts the voltage level at which XY max. is present and which appears, for example, on lead 48 from amplifier 47 in FIG. 3. FIG. 3b depicts the waveform of the reference voltage signal Ref. Y which is present on lead 49 of FIG. 3. It can be seen that the maximum value of this voltage signal is selected to be Y max. FIG. 3c shows the waveform of the variable voltage Y, which signal Y is superimposed on the Waveform of the reference voltage signal Ref. Y. As one can easily see, the absolute value of the voltage signal Y is greater than the absolute value of the reference voltage signal Ref. Y from the origin, corresponding to time i=0 to point 43 on the triangular reference signal curve corresponding to a time t The absolute value of the voltage signal Y is less than the absolute value of the reference voltage signal Ref. Y from point 43 corresponding to a time t to point 44 on the triangular reference signal curve corresponding to a time t and the absolute value of signal Y once again is greater than the absolute value of the reference voltage signal Ref. Y from point 44 corresponding to a time t to point 50 on the triangular reference signal curve corresponding to a time t However, since only one time period will be necessary for the integration of the input to the time average integrating means 56 of FIG. 3, we will only consider the period of time from point 44 corresponding to a time t to a point 45 corresponding to a time t at which the absolute value of the voltage Y is greater than the absolute value of the reference Y voltage signal. This time period is designated by the reference letter T in FIG. 30.

FIG. 3d shows a pulse train, the pulses indicative of the amount of time that the relay 54 of FIG. 3 would be energized. For the period from 0 to t which is directly below the point 43 on curve of FIG. 3c, the relay 54 will be energized since the absolute value of the voltage Y is indeed greater than the absolute value of the reference signal voltage Ref. Y. For the time periods t to t the pulse will have died out and the voltage level will be at 0, since the absolute value of the reference voltage signal Y is greater than the absolute value of the Y voltage signal. And from time periods t to t the pulse will again appear since the absolute value of the reference Y voltage signal is less than the absolute value of the Y voltage signal. Accordingly, observing FIG. 3e, one can see that the output on the lead 48 of FIG. 3 will be gated to the DArsonval voltmeter 56 only at the times that the pulses in FIG. 3d are present.

A mathematical derivation of the time average integration of the wave from depicted in FIG. 3e will now be shown.

By use of similar triangles in FIG. 3c, specifically the smaller triangle bounded by the origin, point 43, and point 40 or time t and the larger triangle bounded by the origin, point 60 and the point 58 or time T/2, which is exactly equal to one-half of the period T, it is seen that:

TY 2Y max.

and by use of similar triangles bounded by the origin, point 60, and point T 2, and point t point 44, and point i it is seen that:

Looking now at FIG. 3e, and taking a time-average integration over the period T it is seen that:

+f dt+f XY max. dz]

where {XY max.}(t) represents the product XY max. as a function of time. Making the proper substitutions, it is seen that T 2Y max.

T 2Y max. 2Y max. XY max. Y+2Y max.-2Y max.+Y T 2Y max.

=XY=integrated output on lead 57 of FIG. 3

2Y max.

Reference is now made to FIG. 4 in which is shown another embodiment of the present invention. A voltage X analogous to the variable X which is the first variable to be multiplied is sent into an amplifier 62 over the lead 61. The amplifier 62 has an output 63 on which is the product XY max. and which is electrically coupled to the source terminal 64 of a field effect transistor 70. A reference signal Ref. Y of the same type discussed with reference to FIG. 3 is sent into comparator 68 over lead 66 and a voltage Y analogous to the Y variable, which is the second variable to be multiplied is sent into comparator 68 over lead 67. The comparator 68 has an output 69 which is electrically coupled to the gate terminal 71 of the field effect transistor 70. The drain terminal 72 of the field effect transistor is electrically coupled to the lead 73 which is input to the DArsonval voltmeter 74 which has an output 76 which is equivalent to the product XY. The field effect transistor 70 may be an n-channel junctional field elfect transistor such that whenever there is a positive voltage fed into the gate terminal 71 of the field effect transistor 70, then an output will appear on the drain terminal 72 of the field effect transistor 70. It is therefore evident that the mathematical interpretation of the embodiment presented in FIG. 4 would be the same as o the mathematical interpretation presented by use of FIGS. 3a, 3b, 3c, 3d and 3e above.

It should be noted that if either X or Y is negative then the amplifier shown in the general form as amplifier 31 in FIG. 2 would have an output of XY max. and the mathematical derivation set forth heretofore would be the same except that, now, XY max. would be substituted for XY max.

Reference is now made to FIG. 5 which is an embodiment of the invention which is set forth should it be desired that three or more numbers be multiplied. A voltage X analogous to the variable X which is the first number to be multiplied is sent over lead 81 into an amplifier 82. The output of the amplifier 82 is present on lead 83 and is XY max. The reference signal voltage Ref. Y' is sent into a comparator 86 over lead 84 and a Y signal voltage which is analogous to the second variable Y to be multiplied is sent into the comparator 86 over lead 85. The output of the comparator is present on lead 87 and is present only when the absolute value of the Y voltage is greater than the absolute value of the reference signal voltage Ref. Y as described above. Whenever there is a voltage present on lead 87 from the comparator 86, a circuit is completed over lead 87 to a relay 88 to ground, thereby energizing relay 88. When the relay 88 is energized it closes a front contact a which completes a circuit from the lead 81 through amplifier 82 over lead 83, over front contact a of relay 88 to a DArsonval voltmeter 89 which has an output 91 which is equivalent to the product XY.

This output product XY on lead 91 is fed into an amplifier 92. In this embodiment Z is the third variable to be multiplied and Z max. is the maximum value the variable will attain. The output of the amplifier 92 which is XYZ max. is present on lead 93. A reference Z voltage having a maximum value of Z max. is sent into a comparator 97 over lead 94 and a Z voltage which is analogous to the third variable Z to be multiplied is sent into the comparator 97 over lead 96. The output of the comparator is present on lead 98 only when the absolute value of the Z voltage is greater than the absolute value of the reference voltage Ref. Z. When this occurs a relay 99 is energized by the completion of a circuit from the comparator 97 through lead 98, through relay 99, to ground. When relay 99 is energized a front contact a is closed, completing a circuit from lead 91 through amplifier 92, over front contact a of relay 99 to a DArsonval voltmeter 101 which has an output now of XYZ as shown by reference numeral 102 which may in turn be sent into another multiplying circuit similar to that of the one in FIG. 3 but not illustrated here.

While the invention has been shown and described with reference to a series of preferred embodiments thereof, it will be understood by those skilled in the art that other modifications may be made therein without departing from the spirit and scope of the invention as is now set forth in the claims.

Having thus described my invention, what I claim is:

1. An improved analog multiplier for multiplying at least a first and second variable, said multiplier including in combination,

(a) amplifier means having an input which is said first variable as well as an output, wherein said output of said amplifier means is equal to the product of said first variable and a preselected gain of said amplifier means, said preselected gain of said amplifier means having a value at least equal to the maximum value of a reference signal,

(b) a gate,

(c) a time average integrating means, said amplifier means output electrically coupled to said time average integrating means by way of said gate,

(d) comparator means having first and second inputs, said first input being said reference signal and said second input being said second variable, said comparator means having an output which controls said gate whenever a signal appears on said comparator output to allow said time average integrating means to integrate said output from said amplifying means to provide multiplication of said first and said second variables independent of said reference signal, said comparator output signal appearing only when the absolute value of said second variable is greater than the absolute value of said reference signal.

2. The analog multiplier of claim 1 wherein said comparator includes means to determine the absolute value of both said reference signal and said second variable.

3. The analog multiplier of claim 1 wherein said gate is a field effect transistor which has its gate terminal electrically connected to said output of said comparator means and its source terminal electrically connected to said output of said amplifying means and its drain terminal electrically connected to said time average integrating means.

4. The analog multiplier of claim 1 wherein said gate is a relay which has its coil electrically connected to said output of said comparator means and its armature electrically connected to said output of said amplifying means and a contact electrically connected to said time average integrating means.

5. The analog multiplier of claim 1 wherein said reference signal is a periodic signal being an even valued linear function.

6. The analog multiplier of claim 5 wherein said reference signal has an absolute maximum value equal to at least the maximum absolute value of said second variable.

7. The analog multiplier of claim 1 wherein said time average integrating means is a DArsonval voltmeter.

8. An improved analog multiplier for multiplying at least a first and second variable and third variable, said multiplier including in combination,

(a) a first amplifier means having an input which is said first variable as well as an output, wherein said output of said first amplifier means is equal tothe product of said first variable and a preselected gain of said first amplifier means, said preselected gain of said first amplifier means having a value equal to at least the maximum value of a first reference signal,

(b) a first gate,

(0) a first time average integrating means, said first ampliying means output electrically coupled to said first time average integrating means by way of said first gate,

(d) first comparator means having first and second inputs, said first input being said first reference signal and said second input being said second variable, said first comparator means having an output which controls said first gate whenever a signal appears on said first comparator output to allow said first time average integrating means to integrate said output from said first amplifying means to provide multiplication of said first and said second variables independent of said first reference signal, said first comparator output signal appearing only when the absolute value of said second variable is greater than the absolute value of said reference signal,

(e) said first time average integrating means having an output which is the product of said first and said second variable,

said output from said first time average integrating means coupled to third variable multiplying means.

9.-The analog multiplier of claim 8 wherein said third variable multiplying means includes (a) a second amplifier means having an input which is said product of said first and second variables as well as an output, whereinsaid output of said second amplifier means is equal to the product of said first variable, said second variable, and a preselected gain of said second amplifier means, said preselected gain of said second amplifier means having a value equal to at least the maximum value of a second reference signal,

(b) a second gate,

(c) a second time average integrating means, said second amplifying means output electrically coupled to said second time average integrating means by way of said second gate,

(d) a second comparator means having first and second inputs, said first input being said second reference signal and said second input being said third variable, said second comparator means having an output which controls said second gate whenever a signal appears on said second comparator output to allow said second time average integrating means to integrate said output from said second amplifying means to provide multiplication of said first and said second variables and third variable independent of said first and second reference signals, said second comparator output appearing only when the absolute value of said third variable is greater than the absolute value of said second reference signal.

10. The analog multiplier of claim 9 wherein said first and said second reference signals respectively have absolute maximum values equal to at least the maximum absolute values of said second variable and said third variable.

References Cited UNITED STATES PATENTS EUGENE G. BOTZ, Primary Examiner J. F. RUGGIERO, Assistant Examiner US. Cl. X.R. 235-l83

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