US3376553A - Dial controlled auxiliary plugboard panel - Google Patents

Description

April 2, 1968 n. o. NEDDENRIEP 3,376,553

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DIAL CONTROLLED AUXILIARY PLUGBOARD PANEL Filed April 5. 1965 5 Sheets-Sheet 3 FIG. 2b

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DIAL CONTROLLED AUXILIARY PLUGBOARD PANEL Filed April 1965 5 Sheets-'Sheet 4 2l II SECONDARY 2l 2 5 2i l il l PRIMARY INPIII INPIII s 2 R 5 4 o F l G 30 sI s2 sa c P3 P2 PI F G 3 b 91 Y P 2152 51 *P P I 4 o SECONDARY 2 7 2 5 2 5 PRIMARY INPIII INPIII 9 Y s a e 4 5 2 I o April 2, 1968 D. o. NEDDENRIEP 3,376,553

DIAL CONTHOLLED AUXILIARY PLUGBOARD PANEL Filed April D, 1965 6 sheets-Sheer I [40| f4025 f405 /404 f402 CARD CARD sELEcToRs cARD R R CARD CARD INPUT D D INPUT E E R I I I I I R D cEIvING c uT s 406 cAR RE H E GATE cIRcuITs DATA coMPARAToR 403 coNTRoL BACK SIGNALS PLUGBOARD SOURCE REMovAaLE PLUGBDARD United States Patent O 3,376,553 DIAL CONTROLLED AUXILIARY PLUGBOARD PANEL Donald 0. Neddenriep, Maple Glen, Pa., assigner to Sperry Rand Corporation, New York, N.Y., a corporation of Delaware Filed Apr. 5, 1965, Ser. No. 445,626 3 Claims. (Cl. S40-172.5)

ABSTRACT F THE DISCLOSURE The present device provides a removable plugboard for controlling a data processing system which has plug holes therein disposed to enable plug hub wires with jack plugs to be inserted therethrough to mesh with protruding prongs on the back plugboard of the data processing ma-chine. In addition there is a second level control panel on said removable plugboard which includes rotary switches and toggle switches whose contacts are wired by jack plugs through certain of said plug hole positions in order that the mere setting of the dial effectively relocates a plug hub wire so as to permit the selection of a memory address location without physically relocating the wires.

This invention relates to plugboard type control panels to be used with card-handling, data processing equipment, and, more particularly, to a second level control means which employs dial switches to alter the controls of the data processing equipment in conjunction with a rst level or principal plugboard device.

In certain plugboard-controlled, data processing systems, the addresses of information words, which can be held in the memory means of the data processing system, are designated on the `plugboard control panel. In such data processing systems when the data storage locations of the memory are arranged according to rows and columns, the address designations on the plugboard device accordingly are -designated as the most significant row and column positions and the least significant row `and column positions. In such card-handling, data processing systems, the information is read directly into the memory and the handling of the cards is accomplished by processing the information from memory and accordingly generating controls. When such a system is used to accomplish a card sorting operation, it becomes necessary to continually change the memory addresses since the card columns, upon which the sorts are made, have different memory addresses. Obviously, if the plugboard is wired to read multiple fields as most plugboards are, the necessity to continually change the wires of the address plug hubs is cumbersome, ineicient and very often leads to error.

Accordingly, the present invention provides a scheme to enable the operator of a card-handling, plugboardcontrolled, data processing system, which can be used for a sorting operation, to readily select the address in the memory that corresponds to the card column upon which the sort is desired. In addition, there is provided a means for accomplishing a sequence check and a further means to readily select a particular card or cards from a deck of cards when such cards are matched against a particular multiple digit reference number.

It is an object of the present invention to provide an improved plugboard control panel arrangement.

It is a further object of the present invention to provide an improved plugobard control panel arrangement which will enable the operator to selectively choose memory addresses upon which a card sorting operation can be accomplished.

3,376,553 Patented Apr. 2, 1968 It is a further object of the present invention to provide an improved plugboard control panel arrangement which will enable the operator to readily select the memory address of a card column, upon which a sequence check operation can be read.

It is a further object of the present invention to provide an improved plugboard control panel arrangement which will enable the operator to select a paritcular data character against which decks of cards may be matched to select only those cards which have the character.

In accordance with a feature of the present invention there is provided a secondary level control means which includes a plurality of dial switches, the terminals of which are connected ultimately to the address plug hubs on the principal plugboard.

In accordance with another feature of the `present invention there is provided a plurality of single throw switches one each of which represents a different bit of the digits which are normally handled by the system.

The above mentioned and other features and objects of this invention will become apparent by reference to the following description taken in conjunction with the accompanying drawings wherein:

FIGURE l is a top view of the secondary control device, upon which the dials are mounted, including a cutaway to show the relationship between the address plug hubs of the principal plug board and one of the dial devices;

FIGURES 2a and 2b together are schematics of the primary level plugboard;

FIGURES 3a and 3b are two schematic diagrams respectively showing the arrangement of the cards first and second sort passes.

FIGURE 4 shows a schematic pictorial of a plugboardcontrolled card-handling data processor.

The present dial control plugboard arrangement finds great use with the Univac Card Controller Device which is a device that handles cards both in a collating and a sorting fashion, as well as data processing both the information from said cards (which may be transmitted to some auxiliary data processor) and information recieved from some auxiliary data processor. The Univac Card Controller Device is described in U.S. Patent Application 404,758, which application is assigned to the assignee of the present application. In a normal sorting operation, the cards are sorted in each pass through the machine according to information in one particular column, although field sorts can be accomplished by the Univac Card Controller. It is well know that when a deck of cards is sorted on one column the operator ultimately wants the cards to be separated according to nine's, eights, sevens, etc. through zeros, as well as rejects.

A single sorting operation is accomplished with the Univac Card Controller Device in two passes, i.e., by transporting the cards through the sorter operation twice for one breakdown into nine's, through zeros and rejects. This mode of operation can be best understood by examining FIGURES 3a, 3b and 4.

FIGURE 4 is a schematic pictorial of a plugboardcontrolled cardhandling, data processor similar to the `Univac Card Controller Device mentioned above. For the purposes of the present invention it suiices to say that the operation of the device shown in FIGURE 4 is such that cards are inserted into the card input positions 401 and 402. At these card input positions there are card hoppers which hold the cards and card feeders which move the cards physically out of the input position past the respective card reader stations 403 and 404. The cards are then transported through a number of chute selector devices 405. When one of these selectors is energized a card in that location is shunted into an assigned Card receiving chute such as the chutes 406.

Now if a card sorting operation is to take place information in the memory is compared aginst information in the cards. The manner in which this is effected is to wire certain memory location positions in the removable plugboard device 407 which in effect acts to energize through the back plugboard 408 certain of the locations in the memory 409. Thereafter the information from the memory is transmitted back through the back plugboard 408 through the removable plugboard 407 to the data comparator 410. As the cards pass under the card reader stations, the information on the card is read therefrom and transmitted through the back plugboard, through the removable plugboard into the card comparator 410. At the time that there is a proper comparison, a signal is transmitted from the data comparator back through the back plugboard 408 and removable plugboard 407 to the proper chute selectors to select the correct chute to cause the card to fall into the proper position. This operation is explained in detail in the U.S. Patent Application Ser. No. 404,758, mentioned earlier.

The deck of cards are initially put into the primary hopper 11 shown as Input Primary. The mechanism on the primary side transports the cards to the common pocket and the three primary pockets. The cards are sorted so that the zeros, ones, twos, and threes, fall into the primary one pocket 13, while the fours, sixs, and eights fall into the primary two pocket 15, and the tives, sevens, and nines fall into the primary three pocket 17. The rejects fall into the common pocket 19. Although other schemes of operation can be set up, the mode of operation just described constitutes the first pass. Thereafter the cards are processed as can be seen in FIGURE 3b. The zeros, ones, twos, and threes are placed into the primary input 11, while the fours, sixs, and eights are loaded into the secondary input 21 first, and the fves, sevens, and nines are loaded into the secondary input secondly. The rejects are removed from the machine. Both feeds of the card controller then become effective and the zeros are procesed to fall into the primary one pocket 13, the ones are processed to fall into the primary two pocket 15, the twos are processed to fall into the primary three pocket 17, the threes are processed to fall into the common pocket 19. On the secondary side, the fours and fives are processed to fall into the secondary three pocket 23, the sixs and sevens are processed to fall into the secondary two pocket 25, and finally the eights and the nines are processed to fall into the secondary one pocket 27. It should be noted that since the fours were loaded into the secondary input ahead of the ves, they fall into the secondary three pocket 23 ahead of the fives. And, in a similar fashion, the sixs fall into the secondary two pocket 25 ahead of the sevens and the eights fall into the secondary one pocket 27 ahead of the nnes. This lastdescribed operation constitutes the second pass.

After the second pass has been completed, the operator simply lifts the cards from the pockets 13, 1S, 17, 19, 23, 25 and 27 in that order and the deck has been properly sorted zero through nine.

Examine now FIGURES 2a and 2b which `represent the schematic of the plugboard used in the Univac Card Controller Device. It will be noted that along the bottom two rows of the plug hubs there are plug hubs designated R and C, and these plug hubs are further designated 2 through 16. The memory used with the Card Controller is a sixteen by sixteen array and hence there are sixteen row and sixteen column address positions. These plug hubs are designated operand address, most significant location," and least signicant location." When plug wires are inserted into these plug hubs the memory positions energized by these plug hubs either receive or transmit information depending upon the particular operation which is in effect. As mentioned above, insofar as the sorting operation goes, the information is read into the memory directly from the cards and the sorting operation is accomplished by comparing the information from the memory against standard digits which are either stored in memory or by using information as directly generated by the bit emitter (absent and present) 51.

Although the plugboard of FIGURE 2 could be wired in many different ways the following, in general, would be a way to accomplish the sorting operation. In Step 1 a transfer of the information to the D register could be wired (plug hub 34) and at the same time Clear l and Clear 2 plug hubs 35 and 36 would be wired to clear the memory. Also during Step l the Read Primary" and Execute plug hubs 38 and 39 would be wired in order to process a card through the reading station on the primary side.

Assuming for the moment that we are only doing the first pass and therefore the primary side is reading the cards, the Step 1 change would be wired to a selector which would be further wired to automatically advance the control to Step 3, when Step 1 has been completed, As will become apparent, hereinafter, Step 2 is used to read the cards in the Secondary. During Step 3 the information which was read from the card would be transferred into a working storage position by once again wiring the transfer D plug hub 34. The location of the memory of the information read from the card (designated operand l) is selected by choosing an operand 1 location through the dials of the secondary level control. The operand 2 location (the working storage) to which the information is transfered is selected by permanently wired positions on the plugboard. It is at this point that the dial on the plugboard cornes into play.

For instance, examining FIGURE l We find that if we were sorting on column 30 of the card we would look at the memory locater 41, and we would find that column 30 is located in memory row 2, memory column 14. Therefore, we would set the dial 42 at row 2 and the dial 43, which represents the column, at location 14. The terminals of these dials are wired from the outputs of certain collectors, such as collectors 44, in FIGURE 2a, to the proper row and column positions 29. For instance, the wire from the terminal 2 of dial 42 would be wired through the output of a collector, for instance, plug hub 4S to the row 2 plug hub 47. Another plug hub of that same collector, such as plug hub 48, would be wired to the least significant plug hub positions 49. This is necessary because the most significant and least sig-nicant positions, when the system is only dealing with one column, are the same positions. The operand l plug hub, as connected for the third step, would be wired to the common of the dial so that there would be a circuit from operand l through the number 2 terminal of the dial to the row positions 47 and 49. The column positions operate in the same fashion, through a collector, and the description thereof does not appear to be necessary. In this way, the row and the column positions are readily chosen by the operator Vand during Step 3 the information from that row and column position, in memory, which has been read from the 30th column of the card, will be transferred into a working position of the memory.

Thereafter on Step 4 the read primary and execute plug hubs will be wired once again to transfer a second card through the read station. The particular device with which this plug board is used, has a waiting station which holds two cards before it transfers either of them into the stacker positions. Therefore as the second card is being transported through the read station a decision can be made as to where the first card should be stacked.

Initially, in Step 5 the primary and secondary common stackers are selected so that in the event there is no further selection made all the cards will be transported into the common stacker and in the case when the secondary is being operated the cards will pass from both the primary and the secondary feeds into the common stacker. In Step 6 the information from the working storage is read out to select the proper stacker position. It will be noted in FIGURE 2b that there is a set of plug hubs 51, labeled Bit Emitter Absent and Bit Emitter Present. These plug hubs emit signals indicating the presence or the absence of a bit for each of the memory positions as each memory position is scanned. The location of the particular memory position which is being scanned can be recognized by sampling the pulses from the address emitter plug hubs 53.

Accordingly, the working storage address (assume for instance that it is Row 7, Column 1 and therefore identified yas Plug Hubs S4 and 55), is wired to some ten combines. Now it should be understood that the combines act as coincident gates. These combines are wired from the proper combination of absent and present bit emitter plug hubs which represent the particular digits to be sampled. For instance, in an Excess-3 code, the bit emitter present plug hub l, 2, Y and X would be wired to the combine, while the bit emitter absent plug hubs 4 and 8 would be wired to the combine. Accordingly, if there were a zero (110011) present, that particular combine, during the address time for Row 7, Column l, would provide an output from the combine plug hubs 56. During the first pass, the combines representing the zero, one, two and three would be wired through a selector to the primary one stacker select plug hub 57. In a similar fashion, the combines representing the digits 4, 6, and 8 would be wired to the primary 2 stacker selector plug hub 58, while the combine representing the digits 5, 7, and 9 would be wired to the primary 3 stacker selector 59. If the cards were not selected at all they would pass on into the primary common and would be identified as rejects.

The cards would be processed for the second pass by transferring the switch 60 shown in FIGURE l to Number Second, which stands for second pass. This Type Sort switch 60 would energize the proper selectors so that cards in the secondary would read as well as the cards in the primary. Information from the cards in the secondary would be transferred to another Working storage area of memory, and the combine outputs would be rerouted through selectors to energize the stacker selector plug hubs S1, S2, and S3 as well as the P1, P2 and P3 plug hubs. In the foregoing manner, the first and second passes of the sort can be made by simply setting the dial 42 and the dial 43 in accordance with the selected chart 41 and then altering the dials as the sort passes continue to be made for columns along the card. It should be remembered that the switch 16 has to be transferred from Number First to Number Second, to accomplish the first and second passes.

In another mode of operation, if the operator wants to accomplish a sequence check, i.e., find out if the cards which are passing through the system are in proper sequence in any particular column, normally on the column last sorted, he first sets switch 63 to ON. Thereafter, he sets the dial 61 to the row position and dial 62 to the column position which represents the card column to be sequence checked as found on the identilication chart 41. In FIGURE l dial 61 is shown on row 3 and dial 62 on column 10, which would mean that the operator is doing a sequence check on card column 42. Switches 61 and 62 can be readily wired to read the fields that have been sorted to date starting at the setting of the switches 61 and 62.

As mentioned above in order to accomplish the sequence check, the sequence check switch 63 must be thrown to the ON side which chooses certain selectors and enables the information from the second card to be transferred to a working storage so that it can be compared with the information from the first card. The compare plug hub 66 is wired to effect a comparison and the compare results are also wired with only the less-than plug hub 65 being effective to halt the machine.

When the system is going to examine a deck of cards for a particular data character, the dial 60 is turned to character and the select character switches 64 are set titl with the proper code identification of the character being sought. As the information from the cards is read and transferred to a Working storage once again the bit-absent emitter and the bit-present emitter are wired to combines along with the address emitter for a particular column such as the column selected on dials 42 and 43. When a combine is fully conditioned the output thereof selects a corresponding stacker select location into which the cards bearing the character are to be directed.

It becomes apparent from the foregoing description that the dial control and the switch control arrangement of the present invention as depicted in FIGURE 1 enables the operator to readily control the column upon which information is to be considered to accomplish either a sort, a sequence check, or a character examination.

While I have described above the principles of my invention in connection with specific apparatus, it is to be clearly understood that this description is made only by way of example and not as a limitation to the scope of my invention as set forth in the objects thereof and the accompanying claims.

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A control panel to be used with a card-handling, data processor which has a memory means whose memoryr locations are arranged according to rows and columns and whose memory locations are electrically connected to a back plugboard which has protruding prongs from each location thereof, said processor further having a source of control signals connected to said back plugboard with protruding prongs assigned to specific locations therefor comprising in combination:

(a) principal plugboard means having a plurality of apertures therein to receive jack-like connectors of plugboard wires;

(b) said principal plugboard means constructed to tit with matching ones of said protruding prongs on said card-handling, data processor;

(c) certain of said apertures being designated as row position memory address apertures and column position memory address apertures, said apertures disposed to position the jack-like connectors they receive to engage said protruding prongs assigned to the row and column positions of said memory, and being used to select information words which are stored in said memory locations;

(d) certain others of said apertures being designated as control signal apertures and disposed in said principal plugboard to position said jack-like connectors they receive to engage said protruding prongs assigned to said control signal positions to provide output signals respectively in response to input signals applied thereto;

(e) second level signal control means having at least tirst and second dial means respectively connected to said row and column address apertures through said control signal apertures, one of said dial means connected to individually select said row position apertures and said second dial means connected to individually select said column position apertures.

2. A control panel to be used with a card-handling, data processor which has a memory means whose memory locations are arranged according to rows and columns and whose memory locations are electrically connected to a back plugboard which has a protruding prong for each location thereof, said processor further having a source of control signals connected to said hack plugboard which has a protruding prong for each of said control signal locations, comprising in combination:

(a) principal plugboard means having a plurality of apertures therein to receive jack-like connectors of plugboard wires;

(b) said principal plugboard means constructed to fit with matching ones of said protruding prongs on said card-handling, data processor;

(c) certain of said apertures being designated as row position memory address apertures and column position memory address apertures and disposed in said principal plugboard to position said jack-like connectors which they receive to engage said protruding prongs assigned to said row and column positions of said memory, and being used to route signals to select information words which are stored in said memory locations; each of said information words in memory capable of being addressed according to its most significant column position address aperture, most significant row position address aperture, least significant column position address aperture and least significant row position address aperture;

(d) certain others of said apertures being grouped as collector apertures and disposed in said principal plugboard to position said jack-like connectors which they receive to engage said protruding prongs assigned to said collector aperture positions and being further designated as input and output collector apertures, means connected to said last-mentioned apertures to enable an address selection signal to enter said input collector aperture and then be transmitted from at least one of said output collector apertures;

(e) second level signal control means having at least rst and second dial means respectively connected to said row and column address apertures through said collector apertures, one of said dial means connect through an associated group of said collector apertures to individually select the row position apertures and said second dial means connected through an associated group of said collectors to individually select the column position apertures.

3. A plugboard device to control a cardhandling, data processor which has a memory means whose memory locations are arranged according to rows and columns, and which has first and second card transport means with circuitry therein to read information from said first card transport means into particular locations in said memory and from said second card transport means into other locations in said memory, comprising in combination:

(a) principal plugboard means having a plurality of apertures therein to receive jack-like connectors of plugboard wires;

(b) said principal plugboard means constructed to t with matching connectors on said card-handling data processor;

(c) certain of said apertures being designated as row position memory address apertures and column position memory address apertures and being used to route signals to select information words which are stored in said memory locations, each of said information Words in memory capable of being addressed through said principal plugboard means by a four point address designation as follows, most significant column position aperture, most significant row position aperture, least significant column position aperture, and least significant row position aperture;

(d) others of said apertures being grouped as collector apertures and disposed in said principal plugboard to position said jack-like connectors which they receive to engage said matching connectors assigned to said collector aperture positions and being further designated as input and output collector apertures to enable with the use of additional circuitry means an address selection signal to enter said input collector aperture and then be transmitted from at least one of said output collector apertures;

(e) yet others of said apertures being designated as selector apertures to provide with the use of additional circuitry means alternatively at least first and second output signals in response to an input signal;

(f) second level signal control means having at least first and second dial means respectively connected to said address apertures through said selector apertures and through said control apertures, one of said dial means connected through said selector apertures and said collector apertures to the row position apertures which represent the row positions read from cards in both the second card transport and the first card transport, and second dial means wired through said selector apertures and said collector apertures to the column position apertures respectively representing the column positions of cards read in both said first and second card transport means.

References Cited UNITED STATES PATENTS 2/1964 Eckert et al. 23S-160 ROBERT C. BAILEY, Primary Examiner.

R. M. RICKERT, Assistant Examiner.

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