US3374439A

US3374439A - Positive ramp voltage generator

Info

Publication number: US3374439A
Application number: US544630A
Authority: US
Inventors: John J Hickey
Original assignee: TRW Inc
Current assignee: Northrop Grumman Space and Mission Systems Corp
Priority date: 1963-10-17
Filing date: 1966-04-22
Publication date: 1968-03-19
Anticipated expiration: 1985-03-19

Description

J. J. HICKEY 3,374,439

POSITIVE RAMP VOLTAGE GENERATOR March 19, 1968 Original Filed Oct. 17, 1963 STEP 6 EN ERATOR TO UT\ UZATKDN DEVI CE Q0 woov UMP-:7

NEGATIVE 92 STEP GENERATOR TOOV UT\L\ZAT\ON DEVlCE JOHN J. H/c/(EY INVENTOR.

BY M

duly bulky and the United States Patent PGSITIVE RAMP VOLTAGE GENERATOR John J. Hickey, Hawthorne, Califi, assignor to TRW Inc., a corporation of Ohio Continuation of application Ser. No. 316,909, Oct. 17, 1963. This application Apr. 22, 1966, Ser. No. 544,630

8 Claims. ('Cl. 328-183). v

The instant case is a continuation of filed Oct. 17, 1963, now abandoned.

This invention relates to ramp voltage generators and more particularly to a simplified circuit for producing positive ramp voltages in the range of 1500 to 2000 volts inamplitude and having a duration of from 50 nanoseconds to 200 microseconds.

Prior art methods of generating positive ramp voltages ofover 500 volts in amplitude utilize rather large vacuum tubes which draw a substantial amount of current inthe quiescent state. Consequently, the equipment becomes unpower supply requirements are rather Ser. No. 316,909,

high.

It is therefore an object of this invention to provide a simplified, economical, positive ramp voltage generator capable of producing ramp voltages of over 1500 volts in amplitude.

It is another'object to reduce the space and power supply requirements of positive ramp voltage generators.

, The foregoing and other objects are achieved according to the invention in a ramp generator wherein a capacitor in the cathode circuit of a vacuum tube is charged at a constant rate, the charging current being maintained constant through the tube by virtue of its constant plate current versus plate voltage characteristics.

In the quiescent state, the tube is biased to draw a very low level of current. To generate the ramp voltage, means are' provided for reducing the bias by driving the control grid voltage in a positive direction so as to draw a large tubecurrent that charges the cathode capacitor. Means are also included in the cathode-control grid circuit to maintain a constant voltage therebetween, thereby maintaining the tube current constant and the ramp voltage linear for its duration.

In the drawing:

FIG. 1 is a schematic circuit of one embodiment of the positive ramp voltage generator according to the invention; and j FIG. 2 is a schematic circuit of another embodiment of the positive ramp voltage generator according to the invention.

Referring to FIG. 1, there is shown a vacuum tube 10, preferably a pentode, havinga cathode 12, control grid 14, screen grid 16, suppressor grid 18, and anode 20. The tube 10 is initially self biased through a cathode bias resistor 24. A resistor 22, which is connected in series between cathode 12 and cathode bias resistor 24, provides ice form therewith a voltage divider network across a positive screen voltage supply of 800 volts. A capacitor 40 is connected between the screen grid 16 and cathode 12 to maintain a fixed potential diiference therebetween.

The suppressor grid 18 is connected to the junction between resistor 22 and cathode bias resistor 24. The anode 20 is connected to a positive anode voltage supply 42 of 1700 volts.

Provision is made for varying the capacitance connected in series with the cathode circuit of the tube 10. To this end, a capacitor 45 is connected across the cathode bias resistor 24; and the cathode bias resistor 24 is connected to the movable arm 46 of another gang of the rotary switch 32 which selectively connects additional capacitance in the cathode circuit. The switch arm 46 may be rotated to engage any one of five contacts I, g, h, i, j. Contact is open so that no additional capacitance is connected across the cathode bias resistor 24. Contacts g, h, i, and i connect

additional capacitors

48, 50, 52, 54 across the cathode bias resistor 24.

Means are provided between the control grid and cathode circuits for maintaining the control grid at a fixed potential relative to the cathode during the generation of ramp voltage in the cathode circuit. Such means include a p-n-p transistor 56 having an emitter 58 connected to the cathode bias resistor 24, a base 60 connected to one side of a variable capacitor 62, the other side of which is grounded and collector 64 connected to the control grid 14. A resistor 66 is connected between the base 60 and the emitter 58.

The base 60 of the transistor 56 is connected to receive a negative current pulse 67 of approximately 5 nanoseconds rise time through a coupling capacitor 68. The cur- .rent pulse 67 is formed by passing a negative step voltage 69 through an RC differentiating network consisting of a capacitor 70 and resistor 71. For a circuit which will produce the negative step voltage 69, reference is made to US. Patent 3,100,872, issued Aug. 13, 1963, to John J.

Hickey and George L. Clark. In that patent, there was disclosed a circuit for generating a high voltage rectangular pulse, the output pulse being taken from the cathode A .of a 2D21 thyratron. The same circuit produces a 500 degenerative feedback. The control grid is grounded rotary switch 32. The switch arm 30 may be rotated to engage any one of five contacts a, b, c, a, and e. Each of the contacts a-e is connected to the movable arm of one of five

otentiometers

34a, 34b, 34c, 34d, 34e. The potentiometers 34a-34e are connected in parallel with each other and in series between resistors 36 and 38 to v volt negative step voltage at the anode of the thyratron, which can be fed through the RC differentiating network to produce the desired negative current pulse 67. The circuit for producing the negative step voltage will be identified in block form as a negative step generator 72.

The operation of the ramp generator will now be described. Prior to the application of the current pulse 67 to the base 60 of the transistor 56, the control grid 14 is at ground potential, and a steady DC current of relatively low value, such as 50 microamperes flows through the tube to develop a self bias of about 50 volts at point 74 which is the junction of

resistors

22 and 24. Since resistor 22 is appreciably smaller than resistor 24, the cathode 12 will also be at a potential of about 50 volts.

Capacitors

45, 62, and 68 will be charged to 50 volts positive, thereby placing the emitter 58 and base 60 of the transistor 56 at 50 volts positive. The collector 64 of the transistor 56, which is connected to the control grid 14, will be at zero or ground potential. The transistor 56 will thus be nonconducting.

, A negative current pulse 67 applied to the base 60 of the transistor through coupling capacitor 68 causes the about 50 volts positive. Since the control grid 14 of the tube 10 is connected to the collector, it too will be raised to approximately 50 volts, or close to the potential on the cathode 12 and the current through the tube will increase from its original low value of 50 microamperes to a high value of about 100 milliamperes. This high current flows in part through capacitor 45. Another part flows through the emitter-base circuit of transistor 56 and through capacitor 62. Still another part fiows through the emitterbase circuit of transistor 56 and through capacitor 68 and resistor 71. Since the emitter-base circuit is of low impedance during conduction and since resistor 71 is also of low impedance,

capacitors

45, 62, and 68 are effectively in parallel and will charge at the same rate.

The portion of the current flowing through capacitor 45 will charge the latter at a rate determined by the current and the capacitance. Since the current flow through the tube will be constant over a wide range of anode to cathode voltage, the current through capacitor 45 will also be constant and the voltage thereacross will rise linearly. Similarly, that portion of the current through

capacitors

62 and 68 will be constant, and since this constant current flows through the emitter-base circuit of the transistor 56, the latter will be held on so long as current flows through it, so as to produce a constant voltage drop across the emitter 58 and collector 64. Consequently, as the potential at pont 74 and the emitter 58 rises at linear rate, the potentials of the base 60 and collector 64, which are slightly lower than that of the emitter 58, will also rise along with the emitter 58 voltage. Thus the control grid 14, which is connected to the collector 64 will remain at a fixed potential relative to the cathode during the linear rise in potential of point 74. The linear rise in potential at point 74 constitutes the positive output ramp voltage 75, which may be connected through a resistor 76 to a utilization circuit, such as an electrostatic deflection plate of an image converter camera tube.

The transistor is operated such that the emitter base current is more than sufiicient to keep the transistor saturated. For this purpose, capacitor 62 is used to adjust the base-emitter current to saturate the transistor for the period of the ramp voltage. Under these conditions, the gain of the transistor is considerably below unity, and in conjunction with the tube the transistor forms a closed loop circuit with a gain less than unity.

Therefore, even though the tube current should decrease slightly during the period of the ramp voltage, such drop in current through the emitter-base will not appreciably affect the emitter-collector voltage as long as the loop gain remains less than unity. Consequently, a slight decrease in tube current, due to tube characteristics for example, will not be regeneratively amplified. Resistor 22 which is connected degeneratively in the cathode circuit tends to reduce variations in cathode current, thereby making the cathode current more nearly constant.

The ramp voltage continues its linear rise until the screen grid 16 potential, which follows that of the cathode 12 due to screen-cathode coupling through capacitor 40, exceeds the anode potential. When this occurs, the screen current increases while the plate current decreases. Since only the plate current contributes to the charging current of

capacitors

45, 62, and 68, this charging current also decreases, due to the fact that capacitor 40 provides essentially all of the screen current during the generation of the ramp voltage. When the plate current drops off to such an extent that the emitter base current in transistor 56 is below the saturation level of the transistor, the gain of the transistor will increase to make the closed loop circuit gain greater than unity. Any further decrease in plate current will be regeneratively amplified so as to ultimately cut off the transistor 56 and restore the original self-bias on the tube and the relatively low tube current.

The slope of the ramp voltage may be controlled by adding more capacitance in parallel with capacitor 45. For example,

capacitors

48, 50, 52 and 54 of progressively larger capacitance are connected in the circuit by moving the switch arm into engagement with switch contacts g,

h, i, and j. The slope of the ramp voltage is thereby progressively increased. In each of the sweep positions, finer adjustments in ramp voltage slope are effected by adjusting the screen grid voltage by means of the different potentiometers 34a34e, and once the adjustment is made, the potentiometer may be set.

The above circuit has been successfully operated with the following circuit values:

Tube 10 Type 6AU6 Resistor 22 ohms 2.7 Resistor 24 megohms 1 Resistor 26 do 1 Resistor 28 do 1 Resistor 36 kilohms 10 Resistor 38 do 50 Capacitor 40 microfarads Voltage supply 42 volts 1700 Capacitor 45 micromicrofarads 1O Capacitor 48 do 50 Capacitor 50 do 180 Capacitor 52 do 500 Capacitor 54 microfarads .001 Transistor 56 Type 2N2800 Capacitor 62 micromicrofarads .8-18 Resistor 66 kilohms 10 Capacitor 68 micromicrofarads 10 Capacitor 70 do 30 Resistor 71 ohms 51 Resistor 76 do 51 The above circuit produces a positive ramp voltage linear within 10% of 1500-2000 volts having a duration of .5 to 200 microseconds.

FIG. 2 illustrates another embodiment of the positive ramp voltage generator in which means are provided for pulsing the control grid positively relative to the cathode and for maintaining the potential difference between the grid and cathode constant for the duration of the ramp. In this circuit the negative step voltage 69 from the negative step generator 72 is fed through capacitor 70 to the primary winding 78 of a stepdown pulse transformer 80. The pulse transformer 80 steps the 500 volt negative step voltage down to 250 volts. One end of the secondary winding 82 is connected in series with capacitor 45 and to junction point 74. The other end of the secondary winding 82 is connected in series with a current limiting resistor 84 and a coupling capacitor 86 to the control grid 14 of tube 10. A zener diode 88 is connected from the junction between resistor 84 and capacitor 86 to capacitor 45. The Zener diode 88 limits the secondary output voltage applied between the control grid 14 and capacitor 45 to 100 volts, the polarity of the secondary winding 82 being reversed so that the control grid end is positive. The screen grid voltage is maintained fixed at about 700 volts positive. The control grid 14 is variably biased through grid resistor 26 by means of a potentiometer 90 connected in series with resistor 92 across a negative volt supply.

The bias is sufficient to cut off the tube 10. In operation, the 100 volt positive step voltage, which has a duration at least as long as the longest ramp duration is coupled to the control grid 14 through capacitor 86 and raises the control grid voltage to a level 100 volts more positive than the bias voltage as set by potentiometer 90. With the potentiometer 90 set at 50 volts, the control grid will be driven 50 volts positive. Since the cathode is initially at zero volts the tube current will be increased to about 500 milliamperes. While the control grid will draw relatively heavy current because of its overdrive, the zener diode 88 maintains the control grid-cathode voltage constant. The increased tube current charges the capacitor 45 linearly, as in the first embodiment. The ramp voltage generated across the capacitor 45 is coupled through the zener diode 88 and capacitively coupled through capacitor 86 to the control grid 14 of tube 10. Hence, during the period of the ramp voltage the control grid voltage follows the cathode voltage to maintain a fixed potential difference therebetween and thereby maintains a constant current through the tube.

The slope of the ramp voltage is varied by varying the potentiometer 90 to vary the control grid bias and thereby vary the grid drive.

In addition to the circuit values listed above for those parts which are common to both FIG. 1 and FIG. 2, the following circuit values are exemplary for those parts which are specific to FIG. 2:

Pulse transformer 80 Type No. RE. 2196 Resistor 84 ohms 150 Capacitor 86 microfarad .01 Zener diode 88 Type 1N985 Potentiometer 90 kilohms 100 Resistor 92 do 100 The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A ramp voltage generator circuit, comprising:

a vacuum tube including cathode, control grid and anode electrodes and having a constant current characteristic over a wide range of changing anode to cathode voltage;

means for establishing initial operating potentials on said electrodes such that said control grid is negatively biased a first amount relative to said cathode and said anode is positive relative to said cathode;

load capacitance means connected in series with said tube;

means in circuit between said control grid and said cathode for abruptly reducing by external trigger the negative bias below said first amount to establish a second potential diiference between said control grid and said cathode so as to increase the current flow through said tube and charge said load capacitance means;

means for maintaining constant said second potential difference between said control grid and said cathode for the duration of the desired ramp voltage, thereby to establish constant current flow through said tube and produce a linear ramp voltage across said load capacitance means;

and means for terminating the operation of said generato-r circuit after generation of a single ramp voltage to cause the generator circuit to reset itself for the reception of the next trigger.

2. The invention according to claim 1 and further including means for selectively altering the capacitance value of said load capacitance means.

3. The invention according to claim 1, and further including means for altering the control grid bias to alter the ramp slope.

4. The invention according to claim 1, wherein said means in circuit between said control grid and said cathode includes:

a pulse transformer having primary and secondary windings;

means connecting said secondary winding in series between said load capacitance means and said control grid;

and means for coupling a step voltage into said primary winding whereby a corresponding positive step volt age is applied to said control grid relative to said cathode.

5. A ramp voltage generator, comprising:

a multielectrode vacuum tube including cathode, control grid and anode electrodes and having a constant current characteristic over a wide range of changing anode to cathode voltage;

means for establishing initial operating potentials on said electrodes such that said control grid is negatively biased relative to said cathode and said anode is positive relative to said cathode;

load capacitancemeans connected in series with said tube;

a transistor connected in circuit between said cathode and control grid and initially in nonconducting state;

means for causing said transistor to conduct for a predetermined ramp voltage duration, to cause an abrupt reduction in the bias voltage on said control grid, thereby to increase the current flow through said tube and charge said load capacitance means;

andmeans for maintaining constant the reduced bias voltage on said control grid for the duration of a single ramp voltage, thereby to establish constant current flow through said tube and produce a linear ramp voltage across said load capacitance means.

6. A ram-p voltage genera-tor, comprising:

load capacitance means connected in series with said tube;

a transistor connected in circuit between said cathode and control grid and initially in nonconductingstate;

said transistor circuit having its emitter-base circuit connected in series between said load capacitance means and a second capacitor;

said transistor having its emitter-collector circuit connected between said load capacitance means and said control grid;

a resistor connected between the base and emitter of said transistor; and

means for coupling a negative trigger pulse into the base of said transistor.

7. A ramp voltage generator, comprising:

a multielectrode vacuum tube including cathode, control grid, screen grid, and anode electrodes and having a constant current characteristic over a wide range of changing anode to cathode voltage;

means for establishing initial operating potentials on said electrodes such that said control grid is negatively biased and said screen grid and anode are positive relative to said cathode;

load capacitance means connected in series with said tube;

a coupling capacitor connected between said screen grid and cathode electrodes;

means for reducing the negative bias on said control grid by a predetermined amount so as to increase the current through said tube and charge said load capacitance means;

means for maintaining the potential difference between said control grid and cathode at said predetermined amount for a predetermined ramp duration, thereby to produce a linear ramp voltage across said load capacitance means;

means for selectively altering the capacitance value of said load capacitance means; and

means for altering the potential of said screen grid for different capacitance values of said load capacitance.

8. The invention according to claim 1, wherein said last three mentioned means include a transistor circuit connected in shunt with said load capacitance means between said control grid and said cathode; said transistor circuit including a path for conducting a portion of said constant tube current for saturating the transistor.

(References on following page) 7 8 References Cited 3,049,625 8/1962 Brockman 328-185 X I D Hickey X UN TE TES 3,257,619 6/1966 Fackler 328-67 X 2,522,957 9/ 9 Miller J23183 3 257 5 7 19 Kogas 307 3 5 2,645,715 7/ 1953 Weller et al 328-181 XR 5 I 2,715,182 8/1955 Bishop 3QS-185 X MILTON 0. HIRSHFIELD, Primary Examiner. 2,835,809 5/1958 Taylor 328-183 X v y X ASSl S/(UZ Examiner.

Claims

1. A RAMP VOLTAGE GENERATOR CIRCUIT, COMPRISING: A VACUUM TUBE INCLUDING CATHODE, CONTROL GRID AND ANODE ELECTRODES AND HAVING A CONSTANT CURRENT CHARACTERISTIC OVER A WIDE RANGE OF CHANGING ANODE TO CATHODE VOLTAGE; MEANS FOR ESTABLISHING INITIAL OPERATING POTENTIALS ON SAID ELECTRODES SUCH THAT SAID CONTROL GRID IS NEGATIVELY BIASED A FIRST AMOUNT RELATIVE TO SAID CATHODE AND SAID ANODE IS POSITIVE RELATIVE TO SAID CATHODE; LOAD CAPACITANCE MEANS CONNECTED IN SERIES WITH SAID TUBE; MEANS IN CIRCUIT BETWEEN SAID CONTROL GRID AND SAID CATHODE FOR ABRUPTLY REDUCING BY EXTERNAL TRIGGER THE NEGATIVE BIAS BELOW SAID FIRST AMOUNT TO ESTABLISH A SECOND POTENTIAL DIFFERENT BETWEEN SAID CONTROL GRID AND SAID CATHODE SO AS TO INCREASE THE CURRENT FLOW THROUGH SAID TUBE AND CHARGE SAID LOAD CAPACITANCE MEANS; MEANS FOR MAINTAINING CONSTANT SAID SECOND POTENTIAL DIFFERENCE BETWEEN SAID CONTROL GRID AND SAID CATHODE FOR THE DURATION OF THE DESIRED RAMP VOLTAGE, THEREBY TO ESTABLISH CONSTANT CURRENT FLOW THROUGH SAID TUBE AND PRODUCE A LINEAR RAMP VOLTAGE ACROSS SAID LOAD CAPACITANCE MEANS; AND MEANS FOR TERMINATING THE OPERATION OF SAID GENERATOR CIRCUIT AFTER GENERATION OF A SINGLE RAMP VOLTAGE TO CAUSE THE GENERATOR CIRCUIT TO RESET ITSELF FOR THE RECEPTION OF THE NEXT TRIGGER.