US3354466A - Apparatus in data processing system for coordinating memory communication among processors and peripheral devices - Google Patents

Apparatus in data processing system for coordinating memory communication among processors and peripheral devices Download PDF

Info

Publication number
US3354466A
US3354466A US8394A US839460A US3354466A US 3354466 A US3354466 A US 3354466A US 8394 A US8394 A US 8394A US 839460 A US839460 A US 839460A US 3354466 A US3354466 A US 3354466A
Authority
US
United States
Prior art keywords
data processing
processors
peripheral devices
processing system
cpd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US8394A
Inventor
Henry L Herold
Weizenbaum Joseph
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Priority to US8394A priority Critical patent/US3354466A/en
Application granted granted Critical
Publication of US3354466A publication Critical patent/US3354466A/en
Priority to US27157D priority patent/USRE27157E/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/99931Database or file accessing
    • Y10S707/99933Query processing, i.e. searching

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)

Description

Nov. 21, 1967 H. L. HEROLD ETAL 3,354,466
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 252 Sheets-Sheet 1 CK/AEACTEK 50 r R E READER smrfm 15 L f fi (GA/W01. ;MEMO/Pr u/v/r f 1 CENT/PAL MULTIPLEX r P 5 P39065550? BU/TZW N J14 7 war/$21 TA Z2; co/vmm wwmoL CONSOLE L....
F115, 1 .7 I r mix/01. 5/? i i l IN VEN TORJ' Nov. 21, 1967 H. 1.. HEROLD ETAL 3,354,466
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORs AND PERIPHERAL DEVICES Filed Feb. 12, 1960 252 Sheets-Sheet Nov. 21, 1967 Filed Feb. 12, 1960 H. HEROLD ETAL 3,354,466
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES 252 Sheets-Sheet I:
5/! 56 GATE a-c/n/ ur 69" 6206A PULSE DRIVER INVENTORJ 568 HENRY 1.. HEROLD JOSEPH WEIzENB-AUM //VPUT BY Nov. 21, 1967 H. L. HEROLD ETAL. 3,354,466
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES 12, 1960 252 Sheets-Sheet 4 Filed Feb.
QQSAS Nov. 21, 1967 H. 1. HEROLD ETAL 3,
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. l2, l960 252 Sheets-Sheet L RSQW. $5 NN m Nov. 21, 1967 H. 1.. HEROLD ETAL 3,354,466
APPARATUS LN DATA FROCEJSSING SYSTEM FOR COORDINATING MENORY COMMUNICATION AMSNG PROCESSORS AND PERIPHERAL DEVICES 12, 1960 252 Sheets-Sheet 8 Filed Feb.
Nov. 21, 1967 H. L HEROLD ETAL 3,354,466
APPARATUS IN DATA lROCIISSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 252 Sheets-Sheet J INVENTORS HENRy 1.. HEEOLD OSE H EIZE BAUM ATTOFNEX WNU E K. km
1 WWW \lj TIA h @Ekdhk u Y :Swk m? 1 QMN \hlu. QW RG Cfi 1 [law m Q F MD Wu wm ENE; QM WM ksmk l I w MN H MNN hWN Nov. 21, 1967 H. 1.. HEROLD ETAL 3,354,456
IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY G PROCESSORS AND PERIPHERAL DEVICES 252 Sheets-Sheet ."JPARAIUS COMMUNICATION AMON Filed Feb. 12. 1960 INVENTORS HENRY L. HEROLD JOSEPH WEIzEMgAuM L... .Li .EILl 8E ATTORNEY 1967 H. HEROLD ETAL 3,354,466
APPARATUS 1N DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 2.33 SheetsSheet i1 E5. 145 CENTRAL 1 39065550 DAT/4 TQA/V5/ EQ 7'0 M-PIFGLKZiP (1'5 ONL Y) 291 Hervey L. HEEOLD BY JOSEPH WEIZENBAUM ATTO MEI.
Nov. 21, 1967 APPARATUS 1N DATA PROCESSING H. L HEROLD ETAL SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 262 Sheets-Sheet 12 mo/w M-PEG/jfti? (1'5 OVLKfXCEPTMJ) M7 M6 M5 M4 M5 M2 Mimi U 4 1} xm r y 1 v I 1 i V XArA )(ArA YI11 IXA/M 'Y'Y INVENTORJ HENRY L Hsreow JOSEPH WElzE/VBA M ATTORNEY.
1967 H. L. HEROLD ETAL 3,
APPARATUS IN DATA PROCESSING SYSTEM FDR CUURDINATING MEMORY COMMUNlCATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 1?, 1960 252 Sheets$heet 13 TIMING SEQUENCE CENTRAL PROCESSOR T2 T9 Ts t T 0 1 1 T1 1 o 1 0 2 TaZ 2 0 1 1 3 T33 3 1 0 0 4 4 p Tv 1 0 1 5 5 1 1 1 0 6 6 1 1 1 1 7 7 1 0 0 0 8 Ta8 8 I 9 Tbl 1 I 10 2 I 11 3 I 12 4 Tb 13 5 I 14 6 I 15 Th7 7 16 Th8 8 1 7 Tbl 1 18 2 19 3 20 a Tb Ty 21 5 22 6 23 Th7 7 J 21 Th8 8 25 Tbl 1 26 2 27 3 g8 a Th 29 5 30 6 31 T137 7 J L Th8 8 FTZ 33 Tbl 1 3a 2 35 3 36 4 Tb 37 5 & 6 39 Th? 7 +0 Tb8 8 Ty +1. Tbl 1 a 2 2 43 3 111 Tb p Td Q5 5 +6 6 17 T137 7 J 48 Th8 8 J HVVENTURJ .2 15. J5 HENR/ L. HEROLD BY JOSEPH WE/ZEWBAUM ATTORNEX Nov. 21, 1967 H. HEROLD ETAL 3,354,466
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12. 1960 252 Sheets-Sheet 1;
W INVENTORJ' Hsrvky 1.. wszow By JosE PH WE/ZE'NBAl/M ATTU/YJYEK Nov. 21, 1967 H. L. HEROLD ETAL APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 252 Sheets-5heet 1n msree 3a1- 553 g-i flr302 65v. Owl/Z2 roam 02mm u 6 MUZWQHBUFFLP 3 505 ;304 30.? 22 222 0M7 CPD. CPD. CPD. CDA i 005 t we *1 CPD 0 0 I CPD CPD I CPD ch21) 317' "sld 35' 5IP 76 26 6 A6 56 (P0 020 CRO. CPD CPD.
co/412 527 5947* W 555 544% 000. CPD. c220 CPD. CRO
"" 00415 525 XAAw 5..) 5L2? 6 e e s 6 CPD. 0212 c120. CPD. 6.20.
60/114" 5A XA/V 5P2? SRXB 8 6 56 CPD. C. PD. C. PD. C. PD. CPD.
"" SAC 5L "'xArA "5N5 "'xAaA 56 5 Q G CPD. CPD CPD. c720 CPD.
' SC 506 XAwA 5/? XMA (.20. 0.20. 6.919. CPD. CPD.
"" 5pc 5LL7 XNA 5214 XMJ cm). b CPD. 0.20. XJI s/v XZJ 6 5.15.17 is INVENTORJ HENKy L. HERO/.0
CL 06K C/PCU/T-CE/VTPAL P20555502 BY JOSEPH m ATTOJPJVEX Nov. 21, 1967 H. L. HEROLD ETAL 3,354,466
APPARATUS LN DATA PROCESSZNG SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 252 Sheets-Sheet l) HENRY L. HEEOLD BY JOSEPH WEIZENSAUM ATTORNEY Nov. 21, 1967 H. L. HEROLD ETAL APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES mvxm Nov. 21, 1967 H. HEROLD ETAL 3,354,466
APPARATUS IN DATA PROCESSING SYSTEM FOR COORDINATING MEMORY COMMUNICATION AMONG PROCESSORS AND PERIPHERAL DEVICES Filed Feb. 12, 1960 252 Sheets-Sheet 2O 497 (ORE RESET 1: ,ee'ssr o 2x00 I 477 479 A M- w u .271; a 65g 493 5600 4% 2 L50 433 w /e/r OUT g /401: Z 06/6 ONE -/5;
INVENTORJ HENAy L. HEROLD Jose PH WEIZENBAUM 17' JUIPA'EX

Claims (2)

1. IN COMBINATION, A DATA STORAGE UNIT FOR STORING A PLURALITY OF DATA ITEMS, FIRST MEANS FOR HANDLING DATA ITEMS, SIGNALLING MEANS FOR PROVIDING A SIGNAL WHEN SAID FIRST MEANS MUST COMMUNICATE WITH SAID DATA STORAGE UNIT, A DATA PROCESSING UNIT ADAPTED TO PERFORM DATA PROCESSING OPERATIONS ON DATA ITEMS RECEIVED THEREBY, AND MEANS RESPONSIVE TO SAID SIGNAL FOR PROVIDING COMMUNICATION BETWEEN SAID FIRST MEANS AND SAID DATA STORAGE UNIT DURING A PERIOD OF PREDETERMINED DURATION WHEREIN NO DATA ITEM IS TRANSFERRED BETWEEN SAID DATA STORAGE UNIT AND SAID DATA PROCESSING UNIT.
2. IN COMBINATION, A DATA STORAGE UNIT FOR STORING A PLURALITY OF DATA ITEMS, FIRST MEANS FOR HANDLING DATA ITEMS IN SEQUENCE, SIGNALLING MEANS FOR PROVIDING A SIGNAL
US8394A 1960-02-12 1960-02-12 Apparatus in data processing system for coordinating memory communication among processors and peripheral devices Expired - Lifetime US3354466A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US8394A US3354466A (en) 1960-02-12 1960-02-12 Apparatus in data processing system for coordinating memory communication among processors and peripheral devices
US27157D USRE27157E (en) 1960-02-12 1969-01-13 Memory dump

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8394A US3354466A (en) 1960-02-12 1960-02-12 Apparatus in data processing system for coordinating memory communication among processors and peripheral devices
US80187269A 1969-01-13 1969-01-13

Publications (1)

Publication Number Publication Date
US3354466A true US3354466A (en) 1967-11-21

Family

ID=26678154

Family Applications (2)

Application Number Title Priority Date Filing Date
US8394A Expired - Lifetime US3354466A (en) 1960-02-12 1960-02-12 Apparatus in data processing system for coordinating memory communication among processors and peripheral devices
US27157D Expired USRE27157E (en) 1960-02-12 1969-01-13 Memory dump

Family Applications After (1)

Application Number Title Priority Date Filing Date
US27157D Expired USRE27157E (en) 1960-02-12 1969-01-13 Memory dump

Country Status (1)

Country Link
US (2) US3354466A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3490690A (en) * 1964-10-26 1970-01-20 Ibm Data reduction system
US20040030828A1 (en) * 1989-12-13 2004-02-12 Hitachi, Ltd. Cache control method and apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228501A (en) 1978-06-21 1980-10-14 Data General Corporation Data transfer technique for use with peripheral storage devices

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2679638A (en) * 1952-11-26 1954-05-25 Rca Corp Computer system
US2831179A (en) * 1949-12-02 1958-04-15 Int Standard Electric Corp Information handling equipment
US2863604A (en) * 1951-10-04 1958-12-09 Bull Sa Machines Electronic calculator for multiplication and division
US2923476A (en) * 1957-04-10 1960-02-02 Bell Telephone Labor Inc Signal comparison system
US2934269A (en) * 1954-11-23 1960-04-26 Ibm Product generator
US2949231A (en) * 1958-02-24 1960-08-16 Westinghouse Electric Corp Arithmetic unit for floating radix notation
US3008127A (en) * 1959-06-03 1961-11-07 Honeywell Regulator Co Information handling apparatus
US3024445A (en) * 1956-10-18 1962-03-06 Rca Corp Information transferring system
US3029414A (en) * 1958-08-11 1962-04-10 Honeywell Regulator Co Information handling apparatus
US3063036A (en) * 1958-09-08 1962-11-06 Honeywell Regulator Co Information handling apparatus

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2831179A (en) * 1949-12-02 1958-04-15 Int Standard Electric Corp Information handling equipment
US2863604A (en) * 1951-10-04 1958-12-09 Bull Sa Machines Electronic calculator for multiplication and division
US2679638A (en) * 1952-11-26 1954-05-25 Rca Corp Computer system
US2934269A (en) * 1954-11-23 1960-04-26 Ibm Product generator
US3024445A (en) * 1956-10-18 1962-03-06 Rca Corp Information transferring system
US2923476A (en) * 1957-04-10 1960-02-02 Bell Telephone Labor Inc Signal comparison system
US2949231A (en) * 1958-02-24 1960-08-16 Westinghouse Electric Corp Arithmetic unit for floating radix notation
US3029414A (en) * 1958-08-11 1962-04-10 Honeywell Regulator Co Information handling apparatus
US3063036A (en) * 1958-09-08 1962-11-06 Honeywell Regulator Co Information handling apparatus
US3008127A (en) * 1959-06-03 1961-11-07 Honeywell Regulator Co Information handling apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3490690A (en) * 1964-10-26 1970-01-20 Ibm Data reduction system
US20040030828A1 (en) * 1989-12-13 2004-02-12 Hitachi, Ltd. Cache control method and apparatus
US7082496B2 (en) 1989-12-13 2006-07-25 Hitachi, Ltd. Cache control method and apparatus

Also Published As

Publication number Publication date
USRE27157E (en) 1971-07-20

Similar Documents

Publication Publication Date Title
US3354466A (en) Apparatus in data processing system for coordinating memory communication among processors and peripheral devices
CA935928A (en) Partitioning logic operations in a generalized matrix system
CA1006985A (en) Communication mechanism for data transfer and control between data processing systems and subsystems
US3248528A (en) Simple general purpose digital computer
CA920662A (en) System and apparatus for testing logic functions in a multiline data communication system
CA1009372A (en) Multiple-station receiver-controlled transmission loop interface for data transfer and control between data processing systems and subsystems
CA962772A (en) Input control logic for a code reading system
GB1278940A (en) Polyester reinforced rubber articles
CA772439A (en) Island for mooring, loading and unloading tanker-ships in open sea
CA871940A (en) Associative logic for highly parallel computer and data processing systems
AU429496B2 (en) Leaching process for reduced nickel and cobalt bearing lateritic ores
CA882940A (en) Storage reference priority in a data processing system
CA806606A (en) Process for recovering nickel and/or cobalt
CA870369A (en) Means for launching, towing and recovering an oceanographic towed body in a seaway
AU5178469A (en) Rice hull method, apparatus and product
AU3341768A (en) Leaching process for reduced nickel and cobalt bearing lateritic ores
US3219977A (en) Automatic information modification apparatus for a data processing system
CA679280A (en) Process for incorporating a finishing agent in a reinforced plastic
CA726786A (en) Polyurethane foams and a process for making them
CA881143A (en) Communications control apparatus in an information processing system
AU4705068A (en) A process for isolating cis-1, 4-polyisoprene from hydrocarbon solutions
CA784884A (en) Storage cancellation and panel data key fetching in a data processing system
AU438226B2 (en) A data communication system
CA827239A (en) Process for treating ethylene recycle streams
CA822355A (en) Conveyance loader system