US3317668A

US3317668A - Open line and busy line detection circuit

Info

Publication number: US3317668A
Application number: US302358A
Authority: US
Inventors: James A Johnsen
Original assignee: Teletype Corp
Current assignee: AT&T Teletype Corp
Priority date: 1963-08-15
Filing date: 1963-08-15
Publication date: 1967-05-02
Anticipated expiration: 1984-05-02

Description

United States Patent 3,317,668 OPEN LINE AND BUSY LINE DETECTION CIRCUIT James A. Johnsen, Niles, Ill., assignor to Teletype Corporation, Skokie, 11]., a corporation of Delaware Filed Aug. 15, 1963, Ser. No. 302,358 7 Claims. (Cl. 178-69) This invention relates to busy line and open line detection circuits for use in monitoring a telegraph line having start-stop telegraph signals applied to it, and more particularly to an electronic busy line and open line detection circuit for this purpose.

The most common method of telegraph transmission used at the present time is the start-stop method of transmission. Start-stop telegraph codes use binary signals, hereinafter termed mark and space, in which the information carrying portion of each character of the signal is preceded by a start pulse (space) and is followed by a stop pulse (mark). The information bearing portion of each character is made up of mark and space signals arranged in permutation code according to the information to be conveyed by that character. Thus, it is seen that each telegraph character consisting of a predetermined number of information bearing elements is preceded by a start or space pulse and is terminated by a stop or mark pulse. This signal format is invariable and may be utilized to ascertain whether or not the line is busy, idle or open.

In many telegraph operations it is desirable to monitor the signals present on the telegraph line in order to ascertain its condition, that is, whether it is busy, idle or open. A busy line is a line over which normal signal transmission of telegraph messages is taking place. An idle line is a line over which no signal transmission is taking place and which is in the stop or marking condition. An open line is one over which there is no signal transmission taking place and which is in a spacing condition signifying that there is a break or open circuit condition somewhere on the line which would prevent any transmission from being made on that line.

Since the start and stop signals cause a transition from mark to space to take place at the beginning of each character of a transmitted message, a busy line may be detected during automatic transmission by detecting these transitions and recycling a timing circuit having a period or timing cycle which is slightly longer than the period of a normal telegraph character. An idle line may be detected whenever the line is in a marking condition for a period greater than the length of a normal telegraph character including the stop pulse. In a like manner an open line condition may be detected whenever a spacing condition is present on the line for a period greater than the length of a normal telegraph character.

Prior to this invention, busy line and open line detection circuits utilized slow release relays or vacuum tube detection circuits operated by space signals in the case of a busy line detection circuit or operated by mark signals in the case of an open line detection circuit. The release time of the relays or the operating time of the vacuum tube circuits was chosen to be greater than the length of a normal telegraph character thereby providing a busy line or open line indication whenever the relay released or the vacuum tube circuit operated.

Slow release relays presently available have a relatively wide margin of error, so that it is usually necessary to set the timing cycle or period of the release of the relays to its maximum margin in order to prevent erroneous operation of the relays during normal line conditions. In a telegraph system operating at 60 words per minute, the character length is approximately .163 second; but slow release relays for monitoring signals having this character length usually are set to release in from one-half to one second in order to prevent errors. Thus, in transmission of a large number of short messages from different transmitters, much time is wasted when slow release relays are used to detect open line and busy line circuit conditions in order to cause a transmitter start circuit to call in or poll the transmitters after the termination of the last message from a preceding transmitter.

The slow release relays and the vacuum tube circuits of the prior art require a separate timing means or circuit for detecting a busy line condition and another timing means or circuit for detecting an open line condition if detection of both of these line conditions is desired.

Accordingly, it is an object of this invention to provide an open line and busy line detection circuit with a reduced timing margin to prevent the waste of valuable line time.

It is another object of this invention to detect open line and busy line circuit conditions on a telegraph line by means of an electronic detection circuit.

It is a further object of this invention to utilize a single electronic timing means in an electronic circuit for detecting both open line and busy line circuit conditions.

Further objects and features of this invention will become apparent to those skilled in the art upon consideration of the following detailed specification taken in conjunction with the drawing, the single figure of which shows a detailed circuit diagram of a preferred em bodiment of the invention.

Referring now to the drawing, the signals on a telegraph line to be monitored by the circuit of this invention are applied to a pair of signal line terminals 10 and 11. For neutral operation the signal conditions are indicated by current flowing from terminal 10 to terminal 11 through resistor 12 whenever a mark appears on the line. When space signals are present on the line, no current flows between the terminals 10 and 11. The line signals are used to operate a conventional Schmitt trigger circuit 13 including a pair of PNP transistors 14 and 15. No detailed description of the operation of the trigger circuit 13 will be given since such circuits are well known in the art.

The voltage drop across the resistor 12 which occurs when a mark appears on the line causes the base of the normally nonconducting transistor 14 to be biased negatively with respect to its emitter whenever the line current reaches approximately one-half of its final value. This causes the transistor 14 to conduct which in turn causes the transistor 15 to be rendered nonconductive. When a space occurs on the line, the voltage drop across the resistor 12 is reduced to zero; and the transistor 14 is rendered nonconducting which causes the transistor 15 to be driven into conduction.

A diode assembly 16 consisting of a string of diodes 17 connected in their forward direction with resect to the normal mark current flowing on the line and a single diode 18 connected in the reverse direction to normal mark current act to protect the Schmitt trigger from excessive line currents in either direction. The string of diodes 17 has a forward voltage characteristic high enough to avoid shorting a normal mark signal. However, if for some reason, such as a hit on the line due to lightning, the current on the line becomes excessive, the string of diodes 17 conducts and clamps the voltage across the resistor 12, and thus across the emitter-base junction of the transistor 14, to a predetermined safe value. For currents of reverse polarity applied to the signal line, the diode 18 acts as -a short circuit thus preventing these currents from damaging the transistor 14. Once a single diode 18 is required to shunt current of reverse polarity since there is no switching level of the Schmitt trigger 13 involved in the reverse direction.

The normal idle line condition of the telegraph line is for a steady mark signal to be applied between the terminals and 11 thus causing the transistor 14 to be rendered conductive and the transistor 15 to be rendered nonconductive in the manner previously stated. When a space signal is applied to the line, such as the first start pulse following a period during which the line was idle, the transistor 14 is rendered nonconductive thereby driving the transistor 15 into conduction. On such a mark to space transition, a positive going pulse is applied from the collector of the transistor 15 through the lines 19 and 20 and a coupling capacitor 21 to fire a fourlayer diode 22 which resets a timing circuit 23 in a manner described hereinafter.

The timing circuit 23 is a conventional unijunction oscillator with a fast reset circuit. Reset of the timer is initiated by the positive pulse from the collector of the transistor 15 which is applied to the anode of the four-layer diode 22, the cathode of which is connected through a resistor 24 and a diode 25 to a suitable source of negative voltage. Whenever such a positive pulse is thus applied, the diode 22 breaks down and starts conducting heavily. This provides a charging path for the timing capacitor 26 of the unijunction oscillator extending from ground through the capacitor 26, a blocking diode 27, the four-layer diode 22, the resistor 24, and the diode 25 to the source of negative voltage. When the capacitor 26 is charged, the four-layer diode 22 stops conducting; and the capacitor 26 begins discharging toward ground through a variable resistor 28.

The timing cycle of the unijunction oscillator is determined by the time required for the capacitor 26 to discharge to near ground through the variable resistor 28. The length of this timing cycle may be varied by varying the resistance of the resistor 28. The voltage on the junction between the capacitor 26 and the resistor 28 is applied to the emitter of the unijunction transistor 29, and as this voltage approaches ground, the emitter of the unijunction transistor 29 becomes forward biased and the transistor 29 conducts. When this occurs, a positive going pulse is applied through a coupling capacitor 30 and a diode 31 to a line mode indicating bistable flip-flop 32 including a pair of

transistors

33 and 34. The flip-flop 32 is a conventional Eccles- Jordan flip-flop well known in the art. The positive going pulse applied through the capacitor 30 and diode 31 is applied to the base of the normally conducting transistor 33 to render that transistor nonconductive thereby indicating that the timing cycle has terminated.

The timing cycle of the timing circuit just described is chosen to be slightly longer than the length of a normal character in the start-stop code being supplied to the signal line. Thus, during normal transmission every mark to space transition causes a positive pulse to be applied from the collector of the transistor 15 through lines 19 and 20 and the coupling capacitor 21 to the fourlayer diode, triggering it into conduction and thereby recharging the timing capacitor 26 to the negative voltage applied to the diode 26. Since, in normal signal transmission, a mark to space transition of the type which causes this resetting pulse to be generated occurs each time a transition from a stop pulse (marking) to a start pulse (spacing) is made, the unijunction transistor 29 is never driven into conduction since the capacitor 26 is never allowed to discharge sufficiently but is reset at least once for each character. However, at any time that no mark to space transition occurs on the signal line for a period which is greater than a normal character and greater than the timing cycle or period of the timing circuit, the unijunction transistor 29 is driven into conduction in the manner previously stated, causing a positive pulse to be between the terminals 10 and 11.

applied through the capacitor 30 and diode 31 to the base of the transistor 33. Thus, a pulse is obtained from the unijunction transistor 29 whenever either an idle line condition (constant marking signal on the line longer than a character interval) occurs on the telegraph signal line or whenever an open line condition (constant spacing condition longer than a character interval) occurs.

The bistable flip-flop 32 is used to determine Whether or not a busy line condition exists on the signal line being monitored by the circuit of this invention. The normal condition of the flip-flop 32 when the line is busy with the transistor 33 conductive and the transistor 34 nonconductive. Whenever transmission is initially begun on the signal line, a mark to space transition occurs signifying the beginning of the start pulse for the first character. As stated previously, this transition causes the transistor 15 to be rendered conductive. A positive reset pulse then is supplied from the collector of the transistor 15 through the lines 19 and 35, a coupling capacitor 36 and a diode 37 to the base of the transistor 34 to render that transistor nonconductive if it is conducting and the transistor 33 is rendered conductive. This reset pulse insures that the transistor 33 is rendered conductive at the beginning of the timing cycle initiated by the same positive pulse applied on the line 19, as described previously.

As long as the timing circuit 23 is not allowed to complete a timing cycle, the transistor 33 remains conductive with the transistor 34 being nonconductive. Each time that a mark to space transition occurs on the signal line a reset pulse is applied to the base of the transistor 34, but these pulses have no effect on the transistor 34 during normal signal transmission since this transistor is already nonconductive. The only time that a reset pulse is effective is when it is preceded by an output pulse from the unijunction transistor 29 signifying the end of the timing cycle which renders the transistor 33 nonconductive and the transistor 34 conductive.

Thus, for normal signal transmission the transistor 33 remains constantly conductive. This causes a path to be established from the ground through the emitter collector path of the transistor 33, the winding of a busy line relay 38 to a suitable source of negative potential. The current flowing through this path energizes the re lay 38 to signify that the telegraph line being monitored is busy. When the relay 38 is energized, it closes a pair of contacts 39 to complete a circuit from the secondary winding of a transformer 40 through a busy line alarm or lamp 41 to energize the lamp. Energy is supplied to the primary winding of the transformer 40 from a suitable alternating current source 42. So long as the transistor 33 remains conductive the lamp 41 is energized.

Assume now that the signal line becomes open due to a break, thus causing a space signal of a longer duration than a normal start-stop character to be applied When this occurs, the timing capacitor 26 is allowed to complete discharging toward ground until it reaches the point where the unijunction transistor 29 is triggered into conduction. The timing circuit 23 is allowed to complete its cycle due to the fact that no additional mark to space transitions occur to cause reset pulses to be applied through the lines 19 and 20 and the coupling capacitor 21 to drive the four-layer diode 22 into conduction. At the end of the timing cycle, when the unijunction transistor 29 conducts, a positive pulse is applied to the base of the transistor 33 thereby rendering that transistor nonconducting. The relay 38 then is released or deenergized causing the contacts 39 to be opened and the busy line lamp 41 to be deenergized. At the same time, the voltage on the collector of the transistor 33 becomes negative and this negative voltage is applied to a diode 43 which is part of a two input and gate 45, the other input to which is applied a diode 44 from the collector of the transistor 14 in the Schmitt trigger .13. The output of the and gate 45 is applied through a resistor 46 to the base of a PNP transistor 47. During the time that a spacing signal is present between the terminals and 1.1, the transistor .14 is rendered nonconductive as previously described thus causing a negative potential to be .applied from its collector to the anode of the diode 44. With the anodes of both

diodes

43 and 44 at a negative potential, the base of the transistor 47 is biased negatively with respect to its emitter by the voltage divider consisting of the

resistors

46, 48 and 49 connected between sources of positive and negative potential. T-he transistor 47 is rendered conductive by this condition and energizes an open line relay 50 by com pleting a path extending from ground through the emitter-collector path of the transistor 47 and the winding of the relay 50 to a source of negative potential.

When the relay 50 is energized, it closes a pair of contacts 51 thereby completing a path from the secondary winding of the transformer 40 through an open line alarm or lamp 52, energizing the lamp 52 to indicate an open line condition. It .is to be noted that the busy line lamp 41 is deenergized whenever the open line lamp 52 is energized since the relay 38 is released at the end of a timing cycle as described previously.

During normal transmission, with the transistor 33 conductive, ground potential is applied through the emitter-collector path of the transistor 33 and the diode 43 to the junction of the

resistors

46 and 49 causing the base potential of the transistor 47 to be above ground thereby biasing the transistor 47 into nonconduction. This in turn causes the relay 50 to be released thereby opening the contacts 51; so that whenever a normal busy line condition exists, the open line lamp 52 is deenergized.

Now assume that the message previously being transmitted on the signal line has ended and the signal line remains in its stop or idle line condition signified by a steady marking signal being applied between the terminals 10 and 11. As stated previously, this causes the transistor 14 of the 'Schmitt trigger circuit to be rendered conductive which in turn causes a positive potential to be applied from the collector of the transistor 14 to the anode of the diode 44. Whenever this occurs, this positive potential applied to the diode 44 forming a part of the and gate 45 causes the base potential of the transistor 47 to be positive with respect to its emitter potential thereby biasing the transistor 47 oif. The relay 50 then is deenergized and the contacts 51 are opened deenergizing the lamp 52.

The timing circuit 23 completes a timing cycle when the marking signal has been present on the signal line for .a period greater than one character interval, and the transistor 33 then is rendered nonconductive in the manner previously described. This causes a negative potential to be applied to the anode of the diode 43 in the and gate 45; but since a positive potential is applied to the anode of the diode 44 from the collector of the conductive transistor 14, the transistor 47 is held nonconductive. Thus, the change in conduction of the transistor 33 from a conductive state to a nonconductive state has no effect on the conduction of the transistor,

47 when this condition exists.

From the foregoing, it can be seen that when an idle line (steady marking condition) exists on the signal line between the terminals 10 and v1'1, both the relay 38 and the relay 50 are deenergized and the

contacts

39 and 51 are open causing the busy line lamp 41 and the open line lamp 52 to be deenergized.

When the next start signal (mark to space transition) occurs on the line, the transistor 14 is rendered nonconductive thereby causing a negative potential to be applied to the anode of the diode 44 in the and gate 45; but at the same time, the transistor is rendered conductive causing a positive pulse. to reset the flip-flop 32 by rendering the transistor 34 nonconductive and the transistor 33 conductive. The potential on the collector of the transistor 33 then rises to ground, and this ground potential on the anode of the diode 43 in the and gate 45 causes the transistor 47 to remain nonconductive. The open line relay 50 continues to be deenergized while at the same time the busy line relay 38 is energized in the manner previously described. This same positive pulse initiates a new timing cycle by triggering the fourlayer diode 22 into conduction as previously stated and the foregoing sequence of operation is repeated.

It should be noted that in the system described, the single timing circuit 23 operates in conjunction with the line mode flip-flop 32 and the and gate 45 to energize only the busy line relay 38 so long as a busy line condition of normal trafiic is present on the signal line. Whenever a timing cycle is completed, signifying the end of normal traffic and the end of a busy line condition, the open line relay 50 is energized only when the completion of a timing cycle which renders the transistor 33 nonconductive concurs with a spacing signal on the line which renders the transistor 14 nonconductive. Further, if the end of a timing cycle which renders the transistor 33 nonconductive occurs when a mark condition exists on the line, the open line relay 50 is not energized and the busy line relay 38 is deenergized thereby signifying that an idle line condition exists.

In the foregoing description it should be noted that each timing cycle is initiated or reinitiated by mark to space transitions in the signal applied to the signal line between the terminals 10 and 11. Due to the fact that the information being transmitted is encoded in permutation code, the time interval between the beginning of an open line condition (space) and the output of the timing circuit 23 can vary according to thetime which elapses since the last mark to space transition, which in turn depends upon the permutation of the last character transmitted. The minimum time interval occurs when an open line condition commences before the stop pulse of a blank character. The maximum time interval for indicating an open line occurs when the open line condition commences during a stop pulse. However, this maximum time interval is only slightly longer than a normal character interval and is equal in length to the timing cycle of the timing circuit.

In a corresponding manner, the minimum time interval for indicating an idle line condition in which both the busy line relay 38 and the open line relay 50 are deenergized occurs when the last message character is a BLANK (all spacing) or LETTERS (all marking) character. The maximum interval for indicating an idle line condition occurs after transmission of a character that is a markspace transition starting during the last information pulse of the character.

The open line and busy line detection circuit of this invention may be used with start-stop telegraph signals of any length, the only criterion being that the timing cycle of the timing circuit 23 must be longer than the duration of a character including the start and stop impulses.

It should be noted that while the circuit has been shown and described as operating busy line and open line indicating lamps, the operation of the

relays

38 and 50 could be used to perform other functions, such as initiating a transmitter start code generator into operation whenever an idle line condition occurs or causing audible alarms to be sounded when open line or busy line circuit conditions exist. Various changes and modifications may occur to those skilled in the art upon consideration of the foregoing description of the preferred embodiment of the invention without departing from the true scope of this invention, and the invention is not to be considered limited to the specific embodiment chosen for the purposes of this disclosure.

What is claimed is:

1. In an open line and busy line detection circuit for monitoring a telegraph line carrying signals of first and second conditions wherein signals of the first condition are used to indicate an idle line,

(a) signal responsive means providing a first output when the line signals are of the first condition and providing a second output when the line signals are of the second condition,

(b) timing means having a predetermined timing period initiated into operation in response to each change in the output of the signal responsive means from the first output to the second output,

(c) bistable means operated by the timing means providing a first output during the timing period of the timing means and providing a second output whenever a timing period is completed,

(d) first utilization means operated by the first output of the bistable means, and

(e) second utilization means operated only upon concurrence of the second output of the bistable means with the second output of the signal responsive means.

2. In an open line and busy line detection circuit for monitoring a telegraph line carrying two condition signals in permutation code wherein signals of one condition are used when the line is idle,

(a) a trigger circuit responsive to the line signals providing a first output when the line signals are of one condition and providing a second output when the line signals are of the other condition,

(b) a timing circuit having a predetermined timing cycle initiated into operation in response to each change in the output of the trigger circuit from the first output to the second output,

() a bistable circuit operated by the timing circuit providing a first output during the timing cycle of the timing circuit and providing a second output whenever a timing cycle is completed,

(d) a busy line alarm circuit operated by the first output of the bistable circuit, and

(e) an open line alarm circuit operated only upon concurrence of the second output of the bistable circuit with the second output of the trigger circuit.

3. In an open line and busy line detection circuit for monitoring a telegraph line carrying two condition signals arranged in permutation code wherein signals of one condition are used when the line is idle,

(a) a trigger circuit responsive to the line signals providing a first output when the line signals are of the one condition and providing a second output when the line signals are of the other condition,

(b) a timing circuit having a predetermined timing cycle initiated into operation in response to each change in the output of the trigger circuit from the first output to the second output.

(c) a bistable circuit operated by the timing circuit providing a first output during the timing cycle of the timing circuit and providing a second output whenever a timing cycle is completed,

(d) a first alarm circuit operated by the first output of the bistable circuit, and

(e) a second alarm circuit operated only upon concurrence of the second output of the bistable circuit with the second output of the trigger circuit.

4. In an open line and busy line detection circuit for monitoring a telegraph line carrying binary signals arranged in start stop permutation code wherein signals of a first type are used to indicate an idle line,

(a) a Schmitt trigger circuit responsive to the binary line signals providing a first output when the line signals are of the first type and providing a second output in the line when signals are of a second type,

(b) an electronic timing circuit having a predetermined timing cycle initiated into operation in response to each change in the output of the Schmitt trigger circuit from the first output to the second output,

(0) a bistable flip-flop operated by the timing circuit and providing a first output during the timing cycle of the timing circuit and providing a second output whenever a timing cycle is completed by the timing circuit,

(d) a busy line alarm,

(e) means operated by the first output of the bistable fiip-fiop for energizing the busy line alarm,

(f) an open line alarm, and

(g) means operated only upon concurrence of the second output of the bistable flip-flop with the second output of the Schmitt trigger circuit for energizing the open line alarm.

5. In an open line and busy line detection circuit for monitoring a telegraph line carrying binary signals arranged in start-stop permutation code wherein signals of a first type are used to indicate a stop condition and signals of a second type are used to indicate a start condition,

(a) a Schmitt trigger circuit responsive to the binary line signals providing a first output when the line signals are of the first type and providing a second output in the line when signals are of the second type,

(b) an electronic timing circuit having a predetermined timing cycle initiated into operation in response to each chapge in the output of the Schmitt trigger circuit from the first output to the second output,

(c) a bistable flip-flop operated by the timing circuit and providing a first output during the timing cycle of the timing circuit and providing a second output whenever a timing cycle is completed by the timing circuit,

(d) abusy line alarm,

(e) a first relay operated by the first output of the bistable fiip-fiop for energizing the busy line alarm,

(f) an open line alarm, and

(g) a second relay operated only upon concurrence of the second output of the bistable flip-flop with the second output of the Schmitt trigger circuit for energizing the open line alarm.

6. In an open line and busy line detection circuit for monitoring a telegraph line carrying binary signals encoded into start-stop permutation codes wherein each character of the start-stop code has a time duration A and where binary signals of a first type are applied to the line to indicate a stop condition and signals of a second type are applied to the line to indicate a start condition,

(a) a Schmitt trigger circuit responsive to the binary line signals providing a first output when the line signals are of the first type and providing a second output in the line when signals are of the second yp (b) an electronic timing circuit having a predetermined timing cycle B which is longer than the time A, the timing circuit being initiated into operation in response to each transition in the output of the signal responsive means from the first output to the second output,

(d) a busy line alarm,

(f) an open line alarm, and

7. In an open line and busy line detection circuit for monitoring a telegraph line carrying binary signals encoded in start-stop permutation code wherein signals of a first type are used to indicate a stop condition and signals of a second type are used to indicate a start condition.

(a) a Schmitt trigger circuit responsive to the binary line signals for providing a first output when the line signals are of the first type and providing a second output when the line signals are of the second type,

(b) an electronic timing circuit having a predetermined timing cycle initiated into operation in response to each transition in the output of the Schmitt trigger circuit from the first output to the second output,

(d) a busy line indicating means,

(e) a first relay operated by the first output of the bistable flip-flop for energizing the busy line indicating means,

(t) an open line indicating means,

(g) a second relay operated only upon concurrence of the second output of the bistable circuit with the second output of the Schmitt trigger circuit for energizing the open line indicating means, and

(h) means for resetting the bistable flip-flop to provide its first output upon each transition of the Schmitt trigger from its first output to its second output.

References Cited by the Examiner UNITED STATES PATENTS 2,522,874 9/1950 Kahn l7869 2,597,071 5/1952 Cory l7869 2,668,192 2/1'954 Cory l7869 NEIL C. READ, Primary Examiner. T. A. ROBINSON, Assistant Examiner.

Claims

1. IN AN OPEN LINE AND BUSY LINE DETECTION CIRCUIT FOR MONITORING A TELEGRAPH LINE CARRYING SIGNALS OF FIRST AND SECOND CONDITIONS WHEREIN SIGNALS OF THE FIRST CONDITION ARE USED TO INDICATE AN IDLE LINE, (A) SIGNAL RESPONSIVE MEANS PROVIDING A FIRST OUTPUT WHEN THE LINE SIGNALS ARE OF THE FIRST CONDITION AND PROVIDING A SECOND OUTPUT WHEN THE LINE SIGNALS ARE OF THE SECOND CONDITION, (B) TIMING MEANS HAVING A PREDETERMINED TIMING PERIOD INITIATED INTO OPERATION IN RESPONSE TO EACH CHANGE IN THE OUTPUT OF THE SIGNAL RESPONSIVE MEANS FROM THE FIRST OUTPUT TO THE SECOND OUTPUT, (C) BISTABLE MEANS OPERATED BY THE TIMING MEANS PROVIDING A FIRST OUTPUT DURING THE TIMING PERIOD OF THE TIMING MEANS AND PROVIDING A SECOND OUTPUT WHENEVER A TIMING PERIOD IS COMPLETED, (D) FIRST UTILIZATION MEANS OPERATED BY THE FIRST OUTPUT OF THE BISTABLE MEANS, AND