US3226682A - Error sensing apparatus for a document handler - Google Patents

Error sensing apparatus for a document handler Download PDF

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Publication number
US3226682A
US3226682A US46162A US4616260A US3226682A US 3226682 A US3226682 A US 3226682A US 46162 A US46162 A US 46162A US 4616260 A US4616260 A US 4616260A US 3226682 A US3226682 A US 3226682A
Authority
US
United States
Prior art keywords
document
register
processing unit
data processing
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US46162A
Inventor
Jay G Levinthal
Norman R Crain
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Priority to US46162A priority Critical patent/US3226682A/en
Application granted granted Critical
Publication of US3226682A publication Critical patent/US3226682A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/06—Arrangements for sorting, selecting, merging, or comparing data on individual record carriers

Claims (1)

1. IN COMBINATION: APPARATUS FOR AUTOMATICALLY READING AN INFORMATION BEARING DOCUMENT AND FOR PROVIDING ELECTRICAL REPRESENTATIONS OF THE INFORMATION THEREON, A DATA PROCESSING UNIT FOR PERFORMING A PLURALITY OF OPERATIONS ON INFORMATION SUPPLIED THERETO, MEANS FOR TRANSFERRING SAID ELECTRICAL REPRESENTATIONS TO SAID DATA PROCESSING UNIT, A DEVICE CONTAINING A PLURALITY OF RECEPTACLES FOR RECEIVING DOCUMENTS, A REGISTER FOR STORING A RECEPTACLE INDENTIFICATION ITEM IDENTIFYING ONE OF SAID RECEPTACLES, MEANS FOR RECEIVING SAID DOCUMENT AND FOR DEPOSITING SAID DOCUMENT IN ONE OF SAID RECEPTACLES IN RESPONSE TO AN IDENTIFICATION ITEM IN SAID REGISTER IDENTIFYING SAID ONE RECEPTACLE, MEANS FOR CAUSING SAID DATA PROCESSING UNIT TO PRODUCE A RECEPTACLE IDENTIFICATION ITEM IN RESPONSE TO SAID ELECTRICAL REPRESENTATIONS, MEANS FOR TRANSMITTING THE IDENTIFICATION ITEM PRODUCED BY SAID DATA PROCESSING UNIT TO SAID REGISTER, MEANS FOR PROVIDING A FIRST SIGNAL FOLLOWING THE TERMINATION OF AN INTERVAL OF PREDETERMINED DURATION REALTIVE TO THE TIME OF READING SAID DOCUMENT, TESTING MEANS FOR SENSING THE TRANSMISSION OF SAID IDENTIFICATION ITEM TO SAID REGISTER, AND MEANS RESPONSIVE TO SAID FIRST SIGNAL AND THE FAILURE OF SAID TESTING MEANS TO DETECT SAID TRANSMISSION PRIOR TO THE OCCURRENCE OF SAID FIRST SIGNAL FOR GENERATING A SECOND SIGNAL.
US46162A 1960-07-29 1960-07-29 Error sensing apparatus for a document handler Expired - Lifetime US3226682A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US46162A US3226682A (en) 1960-07-29 1960-07-29 Error sensing apparatus for a document handler

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US46162A US3226682A (en) 1960-07-29 1960-07-29 Error sensing apparatus for a document handler

Publications (1)

Publication Number Publication Date
US3226682A true US3226682A (en) 1965-12-28

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US46162A Expired - Lifetime US3226682A (en) 1960-07-29 1960-07-29 Error sensing apparatus for a document handler

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050228992A1 (en) * 2004-04-09 2005-10-13 Lucent Technologies, Inc. Method for authenticating dual-mode access terminals
US20170212972A1 (en) * 2015-08-07 2017-07-27 Austemper Design Systems Inc. Low power vlsi designs using circuit failure in sequential cells as low voltage check for limit of operation

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2558941A (en) * 1949-01-31 1951-07-03 Ibm Record controlled machine
US2907011A (en) * 1957-06-28 1959-09-29 Milton L Kuder Automatic information sorting system
US2918656A (en) * 1957-06-07 1959-12-22 Rca Corp Information storage apparatus
US2990956A (en) * 1953-12-21 1961-07-04 Ibm Record sorting machine
US2994428A (en) * 1958-04-28 1961-08-01 Ncr Co Sorting apparatus
US3029019A (en) * 1956-06-01 1962-04-10 Ibm Card to tape converter

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2558941A (en) * 1949-01-31 1951-07-03 Ibm Record controlled machine
US2990956A (en) * 1953-12-21 1961-07-04 Ibm Record sorting machine
US3029019A (en) * 1956-06-01 1962-04-10 Ibm Card to tape converter
US2918656A (en) * 1957-06-07 1959-12-22 Rca Corp Information storage apparatus
US2907011A (en) * 1957-06-28 1959-09-29 Milton L Kuder Automatic information sorting system
US2994428A (en) * 1958-04-28 1961-08-01 Ncr Co Sorting apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050228992A1 (en) * 2004-04-09 2005-10-13 Lucent Technologies, Inc. Method for authenticating dual-mode access terminals
US7904715B2 (en) * 2004-04-09 2011-03-08 Alcatel-Lucent Usa Inc. Method for authenticating dual-mode access terminals
US20170212972A1 (en) * 2015-08-07 2017-07-27 Austemper Design Systems Inc. Low power vlsi designs using circuit failure in sequential cells as low voltage check for limit of operation
US10522237B2 (en) * 2015-08-07 2019-12-31 Mentor Graphics Corporation Low power VLSI designs using circuit failure in sequential cells as low voltage check for limit of operation

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