US3174052A - Multistable circuit including serially connected unidirectional conducting means - Google Patents

Description

March 16, 1965 R. A. HEMPEL 3,174,052 MULTISTABLE cmcun mcwnzuc SERIALLY CONNECTED UNIDIRECTIONAL CONDUCTING MEANS Original Filed Sept. 11, 1956 4 Sheets-Sheet 2 INVENTOR. ROY A. HEMPEL,

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ATTORNEY United States Patent MULTISTABLE (SERGUET WELUDING SERl-ALLY CONNEGTED UN IREGTIONAL CONDUtZTING NIEANS Roy A.Hernpel, Plioenix,,Ariz., assignor, by mesne assignments, to Textron Electronics, Inc, Providence, R.I., a corporation of Delaware Uriginal application Sept. 11, 1956, Ser. No. 669,131, now Patent No. 3,038,658, dated June 12,1962, Divided and this application Dec. 22, 1958, Ser. No. 7 82,281

Claims. (Cl. 307-885) This invention relates toan electronic device and more particularly to a multistable electronic device capable of determinin and indicating the number of electronic impulses of a predetermined polarity applied thereto and is a division of my copending application for Electronic Counter, Serial No. 609,131, filed September 11, 1956, now Patent No. 3,038,658, issued June 12, 1962.

Broadly, this invention comprehends the provision of a flip-flop multivibrator or binary circuit for receiving incoming pulses to be counted and comprising among other circuit elements, two, three element semi-conductor devices having two conditions of stable'equilibriu-m wherein either one of the semi-conductor devices is conducting and the other is non-conducting and providing a square wave in the output thereof for application to a quinary circuit com-prising five, three element semi-conductor devices having five conditions of stable equilibrium wherein one semi-conductor device is non-conducting and the others are conducting to provide output signals. The quinary circuit is responsive to preferably the trailing edge of the mentioned square wave to Shift from one condition of equilibrium to the next. Appropriate visual and electrical indicating means as, for example, suitable neon lamps are provided for indicating the number of pulses received in the counter input circuit.

In many industrial and military applications it is highly desirable and at times imperative that electronic counters be light in weight and occupy a minimum of space. As a consequence, counters have been provided that incorporate three electrode semi-conductor amplifiers commonly called transistors to overcome the undesirable aspects of comparable electron tube circuits necessitating larger, heavier and more costly components. This invention incorporates the mentioned semi-conductor devices for size and weight considerations and further incorporates a novel and more tilllClfiIlt circuit to further reduce the size and weight thereof.

Accordingly, it is an object of this invention to provide a novel electronic counter circuit that is light in weight, simple, compact, rugged, low-powered, efficient and effective in accomplishing the purposes for which designed.

It is a further object of this invention to provide a novel multivibrator circuit of the bistable type having an increased frequency response.

It is a further object of this invention to provide an electronic counter circuit having a novel quinary circuit with five conditions of stable equilibrium and being responsive to successive pulses of a predetermined polarity to successively alter the conditions of equilibrium of said circuit in an orderly sequence.

It is a further object of this invention to provide an electronic counter incorporating a novel visual indication of the count of said circuit.

It is a further object of this invention to provide an electronic counter incorporating novel means of electrically indicating the number of count received thereby.

Other objects and advantages of this invention will become apparent from a more detailed description 3,174,952 Patented Mar. 16, 1965 of the invention taken with; the accompanying drawings in which:

FIGURE 1 illustrates an over-all counter circuit incorporated in this invention,

FIGURE 2 illustrates in amore graphical manner the quinary circuit of this invention,

FIGURE 3 illustrates a portion of the circuit of the invention facilitating a determination of potentials in the circuit,

FIGURE 4 illustrates a table of values of potentials of points in the circuit of- FIGURE 3 for various stages of operation thereof,

FIGURE 5 illustrates a portion of the circuit of the invention facilitating; a determination of potentials of points in the circuit,

FIGURE 6 illustrates a table of values of potentials of points in the circuit of FIGURE 5 for various stages of operation thereof,

FIGURE 7v Illustrates a portion of the circuit of this invention on facilitating a determination of potentials in the circuit,

FIGURE 8 illustrates atable of values of potentials in the circuit of FIGURE 7 for various stages of operation thereof, and

FIGURE 9 illustrates schematically the relationship between the neon lamp indicators and the binary and quinary circuits.

Referring now more particularly to FIGURES 1 and 2 of the drawings, 10 represents generally the binary circuit of this invention having a first semiconductor device 12 comprising a base preferably of N-type semiconducting material 14, an emitter 16 and a collector 1S and a second: semi-conductor device 26 having a base preferably of N-type semi-conducting material 22, an emitter 24 and a collector 26. The semi-conducting devices 12 and are interconnected with passive circuit elements in a manner so as to provide a flip-flop or direct coupled multivibrator circuit. Base 14 is connected to collector 26. through a resistor 28 having a capacitor 30 in shunt therewith and base 22 is connected to collector 1.8. through a resistor 32 having a capacitor 34 in shunt therewith. A suitable load resistor 36, a resistor 39; and a potentiometer 38 for adjusting the magnitude applied to subsequent circuit elements are serially connected between collectors 18 and 26 and the junction of re: sistor 36 and potentiometer 38 is connected to an adjustable potentiometer 42 in series with a resistor 43 for connection to emitters of the quinary circuit to be described.

It is noted that under normal condition of operation of the circuit of this invention, quinary circuit 60 requires somewhat greater power for operation thereof than binary circuit it) and further requires a greater current. Accordingly, current in addition to that sup: plied through binary it) is provided through resistor 50 connected to quinary as between the potential source B+ and quinary circuit 60 in parallel with binary circuit 10.

An input terminal 44 for receiving incoming signals is connected to base 14 through a capacitor 45 serially connected with a unidirectional diode 48 and to base 22 through a capacitor serially connected with a unidirectional diode 52. The junction of capacitor 46 and diode 48 is directly connected to base 22 and the junction of capacitor 50 and diode 52 is directly connected to base 14. Bases 14 and 22 are cross-coupled to respective collectors 26 and 18 through parallel resistorcapacitor combinations 28-24) and 3244, respectively, to provide a direct coupled bistable multivibrator circuit. It is to be observed that diodes 48 and 52 may be considered as additions to a multivibrator circuit having an input connection to bases 14 and 22 through capacitors 50 and 46, respectively. According to a feature of the invention, diodes 48 and 52 facilitate an increased frequency response of binary circuit of the counter over the same circuit Without diodes 48 and 52. It is further to be noted that according to the invention, other impedance elements such as resistors may be substituted for diodes 48 and 52 but that circuit 10 has a higher frequency response with unilateral rather than bilateral elements so disposed.

A suitable source of B+ potential (not shown), positive with respect to bases 14 and 22 is applied to emitters 16 and 24.

The paramenters of binary circuit 10 are so proportioned that upon the application of the emitter voltage, the current passing from emitter to collector in one of the semi-conductor devices 12 or 20 is greater than that in the other. In a manner Well known, a cumulative action occurs, resulting in a heavy conduction in one semi-conductor device and a very small conduction in the other.

Negative pulses received at input terminal 44 and applied to respective bases 14 and 22 affect only the non-conducting semi-conductor wherein and instantaneous flow of current occurs in the collector circuit which causes a positive pulse to be engendered as a result thereof across its collector load circuit and such positive pulse to be applied to the base of the previously conducting semi-conductor to lessen its collector current flow, As a consequence a negative pulse is engendered in the collector load circuit of such previously conducting semiconductor and is applied to the base of the previously non-conducting semi-conductor to further increase the flow therein. A repetitive and cumulative action, as described, of short time duration results in a new equilibrium wherein the previously conducting semi-conductor is rendered non-conducting and the previously non-conducting semi-conductor is conducting heavily. In response to a second negative pulse applied to the bases of the semi-conductors, a chain of similar events follows causing a shift back in the equilibrium of the circuit wherein the originally conducting semi-conductor is again conducting and the originally non-conducting semiconductor is rendered non-conducting. Accordingly, the binary circuit 10 is responsive to input pulses applied thereto to shift the conditions of equilibrium therein and to complete a cycle of shifts of equilibrium in response to every two input pulses.

Each time semi-conductor 20 shifts from a state of conduction to non-conduction, a negative pulse generated in the collector load circuit thereof is applied to the quinary circuit 60, to be described, as the trailing edge of a square wave. It is obvious, therefore, that every second negative pulse applied to input terminal 4-4 is effective to provide a single negative pulse in the output of binary circuit 10.

Quinary circuit 60, as illustrated in FIGURE 1 and more graphically in FIGURE 2, comprises five semiconductor devices 62, 70, 78, 86 and 94, preferably of the PNP-type, interconnected in a manner to be described. Semi-conductor device 62 comprises a base 64, an emitter 66 and a collector 68. Semi-conductor devices 70, 78, 86 and 94 are entirely similar todevice 62 and include respective bases 72, 80, 88 and 96; respective emitters 74, 82, 90 and 98 and respective collectors 76, 84, 92 and 100. Bases 64, 72, 80, 88 and 96 are coupled to collector 26 in the binary circuit through respective capacitors 63, 71, 79, 87 and 95, each having one terminal connected to respective bases of the semi-conductors and the other terminals joined and connected to the movable arm of potentiometer 38. C01- lector 68 of semi-conductor 62 is coupled to base 72 through a parallel resistor-capacitor combination 102- 104 and is coupled to bases 80, 88 and 96 through resistors 106, 108 and 110, respectively. Collector 76 of semi-conductor 70 is coupled to base 80 through a parallel resistor-capacitor combination 112-114 and to bases 64, 88 and 96 through resistors 116, 118 and 120, respectively. Collector 84 of semi-conductor 78 is coupled to base 88 through parallel resistor-capacitor combination 122-124 and to bases 96, 64 and 72 through resistors 126, 128 and 130, respectively. Collector 92 is coupled to base 96 through parallel resistor-capacitor combination 132-134 and to bases 64, 72 and through resistors 136, 138 and 140, respectively. Collector is coupled to base 64 through a parallel resistor-capacitor combination 141-143 and to bases 72, 80 and 88 through respective resistors 145, 147 and 149, respectively. Suitable load resistors 142, 144, 146, 148 and 150 are provided between each of the collectors 68, 76, 84, 92 and 100 and ground. Diodes 182, 184, 186, 188 and 190 are connected between bases of the semi-conductors for a purpose to be explained.

A visual indicator circuit is provided for visually indicating at any instant of time the number of counts received by the counter. Circuit 160 comprises a series of neon lamps 162, 164, 166, 168, 170, 172, 174, 176, 178 and 180, each being responsive to a predetermined value of potential in the output circuit of an associated semi-conductor to fire and light.

The collectors 68, 76, 84, 92 and 100 of the semiconductors are preferably connected to first electrodes of respective pairs of neon lamps 162-164, 166-168, 170-172, 174-176 and 178-180. The second electrodes of each of the neon lamps 162, 166, 170, 174 and 178 are electrically joined and connected through resistor 183 to collector electrode 18 in the binary circuit described and the second electrodes of each of neon lamps 164, 168, 172 and 180 are electrically joined and connected through resistor 194 to collector 26 in the binary circuit. I

Collector 18 in binary circuit 10 is connected to first electrodes of neon lamps 164, 168, 172, 176 and 180 through respective pairs of serially connected pairs of parallel resistor-capacitor combinations 198-298, 199- 299; 202-302, 203-303; 206-306, 207-307; 210-310, 211-311 and 214-314, 215-315 and collector electrode 26 in binary circuit 10 is connected to second electrodes of neon lamps 164, 168, 172, and 180 through a resistor 194 and to first electrodes on neon lamps 162, 166, 170, 174, and 178 through respective pairs of serially connected pairs of parallel resistor-capacitor combinations 196-296, 197-297; 200-300, 201-301; 204-304, 205-305; 208-308, 209-309 and 212-312, 213-313. Capacitors 296 through 314 are provided to improve the strength of the signal output of the counter circuit at high frequencies and have values depending on the physical layout of the counter circuit and concomitant inter-circuit electrical parameters.

By Way of example only, specifications and values of circuit components, which may be used in this invention are as follows:

Semi-conductors 12, 20, 62, 70, 78, 86,

and 94 l 2N107 or 2N35. Capacitors 30 and 34 330 mmf. Capacitors 46 and 50 82 mmf. Capacitors 63, 71, 79, 87 and 95 220 mmf. Capacitors 104, 114, 124, 134, and

143 820 mmf. Capacitors 296-314 5-33 mrnf. Resistors 28 and 32 33,000 ohms. Resistor 36 6,800 ohms. Resistor 40 1,500 ohms. Resistors 102, 106, 108, 110, 112, 116,

136, 138, 140, 141, 145, 147, 149-- 22,000 ohms Resistors 142, 144, 146, 148 and 150 4,700 ohms Resistors 182 and 194 100,000 ohms.

Resistors 196-215 2 megohms. Potentiometer 38 7,700 ohms. Diodes (all) 1N34 For a more detailed explanation of the operation of the invention, reference is had to FIGURES 3, 4, 5, 6, 7, S and 9.

FIGURE 3 illustrates portions. of each of the binary and quinary circuits of FIGURE 1 and FIGURE 4 illustrates representative values of collector potentials with respect to ground, of the semi-conductors of the binary and quinary circuits, assuming the values of circuit parameters as set forth hereinabove. Further assuming a source of direct potential of 95 volts applied between emitters l6 and 24 and ground, an initial condition wherein semi-conductors 12, 7t), 78, 86 and 94 are conducting and therefore semi-conductors 20 and 62 are nonconducting, voltages appearing at the respective collectors of semi-conductors 62, 7t 78, S6, 94, 12 and 20 are shown in the first row in the table in FIGURE 4 for the zero (9) count. It should be observed that the po tential of collector 63 of semi-conductor 62, the only non-conducting semi-conductor of the quinary circuit is unique and that the potentials of each of the other collectors of the quinary circuit are equal in value.

As shown schematically in FIGURE 9, this invention comprises a binary circuit serially connected with a potential source, an adjustable potentiometer 42 and a quinary circuit and further having a neon indicator in series with an appropriate resistor in shunt with the adjustable resistor and quinary circuit. As a preliminary condition, potentiometer 42 is adjusted to provide an appropriate potential drop across the neon tube circuit to facilitate firing only in response to maximum potentials developed as set forth in the table of FIGURE 6.

Assuming now the application of an input pulse to terminal 44-, it is noted that a change in the equilibrium of binary circuit Ill occurs whereby semi-conductor 12 is cut-off and semi-conductor 2% is rendered conducting. Consequently, the potentials at collectors 18 and 26 reverse as shown in FIGURE 4 for count 1. The potentials at collectors in quinary circuit 69, however, remain the same as for zero count since a negative output pulse capable of affecting quinary 6G, is produced in binary 10 only when semi-conductor 2.6 is rendered non-conducting after having previously been conducting.

In response to a second input pulse, the following sequence of events takes place: Semi-conductor 12 is rendered conducting and semi-conductor 29 is rendered non-conducting producing a negative pulse in the circuit of collector 25. The negative pulse so produced is applied to the bases of semi-conductors 62, 7t), 78, 86 and 9d tending to initiate conduction in semi-conductor Q. and to increase conduction of the other semi-conductors in the quinary circuit. Semi-conductors 7'3, '78, 86 and 94, however, are conducting heavily and any increased conduction effected by such pulse in these semi-conductors is insignificant and ineffective in producing any direct results. Semi-conductor 62 on the other hand is rendered conducting whereby the collector potential thereof changes suddenly from 12 volts to 24 volts as observed in the table of FIGURE 4. This potential change is applied ot the bases of all other semi-conductors in the quinary circuit. However, Since coupling between co1 lector 68 and the next succeeding base in the quinary loop includes a parallel combination of capacitor 194 and resistor 162 adording a reduced impedance compared with that of resistors 1%, res and lit to such pulse, only semi-conductor '74 is sufficiently affected to be rendered non-conducting and semi-conductors 78, 86, 94 and 62 remain conducting. It is to be understood that the count of quinary circuit 60 is determined by condensers 164, 114, 124, I34, and 143 and the count proceeds in a counter clockwise direction in FIGURE 2 of the drawings. The count could be reversed in direction by connecting condensers H94, 114, 124, 13 3, and 1 .3 from the semi-conductor collectors to the bases of the semiconductors preceding the respective ones considered rather than to. the bases succeeding the semi-conductors considered.

Reference to FIGURE 4 illustrates that in this state of operation, the potentials at collectors 18. and 26 with respect to ground again reverse and that the potential at collector 76 of semi-conductors 71 is unique. at 12 volts and that the potentials at collectors 84;, 92, 1%, and 68 are equal at 24 volts.

It is to be observed in FIGURE 4 that the voltages of collectors 18 and 2d of semi-conductors 12 and 2% in the binary circuit shift or reverse in response to each incoming negative pulse and that the potential of the lone conducting semi-conductor in the quinary circuit is unique with respect to all other collector potentials in the quinary circuit for two Successive pulses of every ten applied to the input. Also, it is to be observed that in response to each two incoming negative pulses the semi-conductors in the quinary circuit are sequentially and uniquely rendered conducting.

In FIGURE 5' is shown a portion of the present counter circuit and in FIGURE 6 are values of certain potentials with respect to ground, of points in the circuit of FIGURE 5. The Vertical columns represent potentials appearing in the circuit of FIGURE 5 across neon lamps and the rows represent such potentials at respective neon lamps for the respective number of pulses applied to the input of the circuit or in other words, the count number.

Assuming in the circuit of FIGURE 5 that no pulses have been applied to the input thereof, it is observed that with circuit elements of the value listed above, the collector potential of semi-conductor 12, which is conducting, is volts and the collector voltage of semi-conductor 62 is 12 volts. Since neon lamp 162, representing zero count, is connected across these collectors, the ditterence between the potentials at these collectors or 83 volts is impressed upon this lamp. Accordingly, lamp 162 is fired since the potential impressed thereon exceeds its firing potential. In a similar manner, potentials impressed upon neon tubes 164-130 are determined and listed for zero (0) count in the first row of the table of FIGURE 6. The potential of collector 26 under such circumstances is 70 volts and the potential of each of collectors 764$!) is 24 volts and it is noted that the voltage of no neon lamp other than lamp 162 exceeds 7.1 volts. Accordingly, each lamp is oil or not fired,

It is next assumed that a single input pulse is applied to the circuit input, rendering semi-conductors 2d, 7d, '73, 86 and 94 conducting and semi-conductors 12 and 62 cutoff in a manner explained hereinabove. It is readily understood that the maximum potential of 83 volts appears between collectors 26 and 68 and therefore across neon tube 164 to fire the same. Likewise it is observed that potentials of the remaining neon lamps are as listed in the table of FIGURE 6, and insufiicient to fire any of neon lamps 162 and 166-180. In a similar manner it may be determined that a maximum potential of 83 volts appears across successive lamps I62-18l as successive impulses are received at terminal 44 and that corresponding to each impulse an individual neon lamp has such maximum potential applied thereto to fire the same and that all other neon lamps fail to tire because of insufficient applied potential. It is therefore clear that neon lamps 162484} indicate the number of pulses less than ten applied to input terminal 44 according to the number of the neon lamp fired.

According to another feature of this invention, an electrical indication of the count received in the counter input may be obtained. To this end, signals facilitating such a determination are derived at ten output pins 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 shown more clearly in FIGURE 7 of the drawings. FIGURE 7 illustrates that portion of the circuit of FIGURE 1 including semi-conductors 1-2 and Z-tl of binary circuit 10 and semi-conductors 6294 of quinary circult 60 and various passive circuit elements associated therewith It is noted than pin 0 is connected to the junction of a pair of resistors 196 and 197, the other ends of which are connected to respective collectors 68 and 26- Accordingly, under operating conditions as assumed hereinabove, the potential of pin is arithmetically determinable with the knowledge of potentials empirically determined at respective collectors in the counter circuit. Under initial conditions wherein no input pulse has been received and semi-conductors 12 and 70-94 are conducting and semi-conductors 20 and 62 are non-conducting; the potential appearing at collector 26 is substantially 70 volts and that appearing at collector 68 is substantially 12 volts. Manifestly, a potential drop of 58 volts appears across resistors 196 and 197 whereby 29 volts appears from the junction thereof to the remote end of either. Consequent 1y, pin 0 assumes a potential which is the sum of that at collector 68 plus that across resistor 196 equal to 12 plus 29 or 41 volts.

In a similar manner the potentials of pins 2 to 9 may be determined for the zero count condition and in FIG- URE 8 these potentials appear in the first row to indicate the zero (0) count. It is to be noted that the potential of any of pins 0 to 9 may be determined for any number of counts received by the counter circuit and that the potentials of each pin are indicated in the respective columns in the table in FIGURE 8. It is further to be noted that the potential for zero (0) count of pin 0 is a minimum with respect to the same pin for other counts and that the potential of each successive pin of pins 0 to 9 is a minimum for the number of count equal to the number of the pins considered, Accordingly, the potentials of pins 0 to 9 may be applied to remote circuit means responsive to such minimum potentials to give a remote indication of the number of count received in the counter circuit of this invention,

-In situations wherein it is desired to initiate some operation in response to a receipt of a predetermined number of counts in the present counter circuit, circuit means responsive to a minimum voltage as derivable at the pins 0 to 9 may be connected by a suitable selector switch to either one of pins 0 to 9 so as to be appropriately triggered and activated upon the receipt of the number of count desired. For example, assuming that it is desired to activate a circuit means (not shown) upon the receipt of the :seventh count in the present counter, connection between pin 7 and such circuit means is appropriately made. In a manner explained hereinabove, pin 7 assumes a minimum potential upon the receipt of the seventh count in the counter input circuit. Accordingly, an appropriate signal is applied from pin 7 to the circuit means in response to the receipt of the seventh count.

As a further feature of the invention, provision is made for resetting the counter circuit to an initial condition wherein, of course, semi-conductors 12, 70, 78, 86 and 94 are rendered conducting and semi-conductors 20 and 62 are rendered non-conducting or cut-off irrespective of the count indicated by the circuit. To this end, connection is made from reset pin 250 to base 14 of semi-conductor 12 in the binary circuit and to collector 68 of semi-conductor 62 in quinary circuit 60 through serially connected capacitor-diode combination 252-254 and diode 256, respectively. Capacitor 252 serves as a low impedance to high frequency signals and serves to block direct current providing isolation between quinary and binary circuits while in operation. When it is desired to return the counter circuit to its initial condition of operation a pulse of appropriate polarity and of any suitable duration and of sufiicient magnitude is applied to terminal 250 to be impressed upon base 14 and collector 68 as hereinabove set forth. As a consequence, semi-conductors 20 and 62 are rendered non-conducting whereby semi-conductors 12, 70, 78, 86 and 94 are rendered conducting. The counter circuit is therefore adapted for further operation in the manner already explained.

A suitable output terminal 350 is connected to collector 68 and it is understood that a single output pulse is engendered in response to every ten input pulses applied to input terminal 44. Pulses produced in output circuit 350 are adapted to be applied to further counter circuits for counting to sums greater than that enabled by the circuit of this invention.

It is noted that this invention incorporates as a feature thereof, diodes 48, 52 and 182-190 for improving the frequency response of the circuit. In a circuit according to this invention incorporating the diodes described, the frequency response of the binary circuit was increased from approximately kilocycles per second to approximately 175 kilocycles per second and the frequency response of the quinary circuit was increased from approximately 45 kilocycles per second to approximately 75 kilocycles per second, each figure representing an upper limit. a

It is to be understood that preferably the transistors utilized in this invention are substantially uniform in all characteristics such as base and emitter resistance, gain, frequency response to provide a more balanced and accurate circuit. While the semi-conductors of this invention have been described as being of the PNP type, other semi-conductors such as NPN type may be used throughout provided the potential source designated B+ is reversed so as to provide volts negative with respect to ground at emitters l6 and 24.

While this invention has been described with reference to a certain specific embodiment thereof, it is understood that the same is susceptible to numerous modifications and variations without deviating or departing from the spirit or scope thereof.

I claim:

1. A direct coupled multivibrator circuit comprising first and second semi-conductor devices, each having a base, an emitter and a collector, the collector of said first device being coupled to the base of said second device and the collector of said second device being coupled to the base of said first device, a pair of unidirectional diodes serially connected in a closed circuit, a first junction between said diodes connected to the base of said first device and a second junction between said diodes connected to the base of said second device, biasing means connected to the emitter of both semi-conductor devices and connected to the collector of one of said semi-conductor devices.

2. A multi-stable circuit comprising a plurality of active circiut elements, each capable of a stable condition of conduction and non-conduction, each of said elements having means for controlling the condition of stability therein, unidirectional current conducting means being interconnected between each stability controlling means of each element and the stability controlling means of each of a different pair of elements, the conduction controlling means of each element being coupled to one of the other elements to receive a signal therefrom, one of said elements being in a unique condition of equilibrium and the other elements each being in the same condition of equilibrium, means for applying a signal to each of said elements to alter the condition of equilibrium in said element having a unique condition of equilibrium and one of said other elements.

3. A multi-stable circuit comprising a plurality of active circuit elements, each capable of a stable condition of conduction and non-conduction, each of said elements having means for controlling the condition of stability therein, unidirectional current conducting means being interconnected between each stability controlling means of each element and the stability controlling means of each of a different pair of elements, the conduction controlling means of each element being coupled to one of the other elements to form a closed circuit, one of said elements being in a unique condition of equilibrium and the other elements each being in the same remaining condition of equilibrium, means for applying a signal to each of said elements to alter the condition of equilibrium in said one 9 element and the element following the same in said closed circuit.

4. A multi-stable circuit comprising a plurality of active circuit elements, each being capable of conduction and non-conduction and having an electrode for controlling its condition of conduction, a like plurality of unidirectional current conducting means connected in a closed series circuit and each being poled for current conduction in one direction in said closed circuit, and means connecting the control electrodes of said active circuit elements to respective junctions of said unidirectional means.

5. A multi-stable circuit comprising a plurality of active circuit elements, each being capable of a condition of conduction and non-conduction and having an electrode for controlling its condition of conduction, a plurality of unidirectional elements each having first and second elec trodes, means connecting first electrodes of said unidirectional means to respective control electrodes of said elements, and means connecting second electrodes of said unidirectional means to respective control electrodes of 19 said elements, the first and second electrodes of each one of said unidirectional means being connected to different control electrodes.

References Cited by the Examiner UNITED STATES PATENTS OTHER REFERENCES Lewis: Electrical Counting, MacMillan-l943, pages 90-92 No. QC702-L49.

ARTHUR GAUSS, Primary Examiner.

20 SIMON YAFFEE, GEORGE N WESTBY, Examiners.

Claims (1)

1. 4. A MULTI-STABLE CIRCUIT COMPRISING A PLURALITY OF ACTIVE CIRCUIT ELEMENTS, EACH BEING CAPABLE OF CONDUCTION AND NON-CONDUCTION AND HAVING AN ELECTRODE FOR CONTROLLING ITS CONDITION OF CONDUCTION, A LIKE PLURALITY OF UNIDIRECTIONAL CURRENT CONDUCTING MEANS CONNECTED IN A CLOSED SERIES CIRCUIT AND EACH BEING POLED FOR CURRENT CONDUCTION IN ONE DIRECTION IN SAID CLOSED CIRCUIT, AND MEANS CONNECTING THE CONTROL ELECTRODES OF SAID ACTIVE CIRCUIT ELEMENTS TO RESPECTIVE JUNCTIONS OF SAID UNDIRECTIONAL MEANS.

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