US3170882A

US3170882A - Process for making semiconductors of predetermined resistivities

Info

Publication number: US3170882A
Application number: US322007A
Authority: US
Inventors: Gutsche Heinrich
Original assignee: Merck and Co Inc
Current assignee: Merck and Co Inc
Priority date: 1963-11-04
Filing date: 1963-11-04
Publication date: 1965-02-23
Anticipated expiration: 1982-02-23

Description

Feb. 23, 1965 H. GUTSCHE 3,170,882

PROCESS FOR MAKING SEMICONDUCTORS OF PREDETERMINED RESISTIVITIES Filed Nov. 4, 1963 Tickle Core of SemiconductorMateriol I Va or deposition of semiconductor Z ma er ial saturated with impurities 1 q- Saturated Subst me Second Generation First Generation Core pulling to decrease diameter Core pulling to decrease and increase length diameter and increase length Shorter |engms ---Cutting intoshorter lengths t t Saturated Substrate Rods Second Generation Third Generation Vapor deposition of pure semiconductor Float zone refining to produce ---moterial to increase diameter and ---predetermined resistivity single dilute impurity concentration crystal r m Rodsv Single Crystal Rods Second Generation Third Generation --Zone refining to produce predetermined resistivity single crystal material Single Crystal Rods Second Generation iNVENTOR HE NRICH GUTSCHE United States Patent 3,170,882 PROCESS FUR MAKING SEMICONDUCTORS 0F PREDETERMINED RESISTIVITIES Heinrich Gutsche, Northurnberiand County, Pa., assignor to Merck & Co., Inc, Railway, N.J., a corporation of New Jersey Filed Nov. 4, 1963, Ser. No. 322,007 15 Claims. (Cl. 252-623) This invention relates to a method of manufacture of single crystal semiconductor material and more particularly to a method of forming a plurality of single crystal semiconductor material having predetermined resistivities within the range of 0002-1000 ohm-cm.

It is known in the art that the type of conductivity of semiconductor materials may be controlled by introducing certain foreign materials, generally termed impurities, into a melt of the semiconductive material. The introduction of such impurities into the semiconductor materials is usually referred to as doping. The type of conductivity established in the semiconductor is dependent upon the electron configuration of the atoms of the impurity material and of the host crystal. Thus, a substance whose atoms are capable of giving up electrons to the atoms of a particular substance is termed a donor impurity, and since there is a surplus of electrons available to carry a current, the semiconductor so doped is deemed to be of N-t-ype (negative) conductivity. On the other hand, a substance whose atoms are capable of borrowing or accepting electrons is termed an acceptor impurity, and since there is a shortageof electrons in the crystal lattice available for current conduction, the semiconductor so doped is deemed to be of P-type (positive) conductivity.

The usual and most directly convenient manner hitherto achieved in the art for introducing predetermined amount of such impurities into a semiconductor material is to add the impurity into a melt of the semiconductor mate rial. Some semiconductor materials, however, have relatively high melting points. Silicon, for example, melts at 1420 C. Great difliculty is therefore encountered in attempting to dope such high melting point semiconductors with lower boiling point impurities inasmuch as such impurities boil off either prior to introduction into the semiconductor melt or before alloying with the molten semiconductor. This is especially true when the boiling point of the impurity is greatly lower than the semiconductor melting point.

Accordingly, it is an object of the present invention to provide a method for the preparation of single crystals of semiconductor material having predetermined resistiviti'es.

Another object of the present invention is to provide a method of forming uniform single crystals of semicon- :ji;

ductor material of predetermined resistivities within the range of 0002-4000 ohm-cm.

Still another object is to provide a method of forming by vapor deposition uniform single crystals of silicon semiconductor material of a desired conductivity type and having predetermined resistivities within the range of 0.002-1000 ohm-cm.

A further object of the instant invention is to provide a technique for the preparation of a plurality of uniformly doped single crystals of semiconductor material having predetermined different resistivities within the range of 0002-1000 ohm-cm.

Yet another object of this invention is to provide a method for the preparation of uniformly doped'single crystal semiconductor materials having predetermined resistivities wherein the resistivity level is achieved by providing a substrate of semiconductor material provided with a saturated concentration of impurities, increasing the diameter of the substrate, diluting the concentration of said impurities by depositing of additional high purity semiconductor material thereon and zone refining the substrate in accordance with a predetermined number of zone passes at a controlled travel rate to further reduce the im purity concentration in a predetermined manner to produce single crystal rods of semiconductor material having the desired resistivity.

These and other objects will be made readily apparent from the following more detailed description of the invention taken in reference with the accompanying drawings:

In the drawings:

FIGURE 1 is a flow sheet showing the process steps according to the present invention used to produce single crystal semiconductor material of relatively low resistivities.

FIGURE 2 is a similar flow sheet illustrating an embodiment of the instant invention wherein single crystal semiconductor material of relatively high resistivity is produced In accordance with the present invention there is provided an improved method for producing single crystal semiconductor material having predetermined resistivities. As a feature of this invention, the aforementioned predetermined resistivities extend over the range of 0002-1000 ohm-cm.

The present invention includes a number of process steps which are designed to achieve the aforementioned predetermined resistivities over the aforesaid wide resistivity range. The process will be made abundantly clear by reference to the flow sheets shown in FIGURES 1 and 2.

In the flow sheet in FIGURE 1, there is presented the feature of the invention which illustrates the preparation of one or a plurality ofrods having similar resistivities within the aforesaid range. ,FIGURE 2, on the other hand, is directed to an embodiment of the invention in which several additional process steps are employed to produce one or a plurality of rods of semiconductor material having relatively high resistivities as compared to that produced by the process steps shown in FIGURE 1.

Hereinafter the process will be illustrated by reference to the formation of single crystals of silicon, although other semiconductor material such as germanium, and compounds of the Group III-V elements may be used as well. Accordingly, there is first provided a pure silicon core of relatively small diameter. For example a core of four millimeters in diameter and of about 12 inches in length may be selected.

Continuing now to follow the course of the process of the instant invention with reference to the flow sheet of FIGURE 1, the core is then provided with a heavy semiconductor overlayer of like material having a saturated concentration of impurities present therein. Preferably the core is placed in an apparatus wherein the semiconductor material and active impurities may be co-deposited thereon fromthe vapor phase, suitably in the reactor shown in the copending application of Gutsche, Serial No. 99,906, filed Mar. 31, 1962, now US. Patent 3,108,072. As described in detail in this copending application, the semiconductor material and active impurities therewith are codeposited from the vapor phase onto .a heated semiconductor substrate from a thermally decomposable vapor source of silicon, such as silicochloroform, and of imv purity atoms, suitably phosphorus trichloride for N-type and boron trichloride for P-type. By this process an overlayer of semiconductor material and a saturating amount of active impurities therewith is built up on the core thereby increasing its diameter to form a saturated rod of the first generation.

As mentioned, the concentration of the doping agent is 3,17o,asa

adjusted to insure that the rod will be saturated with impurities.

Doping of the rod at the saturation level is easily realized in commercial production with a minimum of control required. For example, when phosphorus trichloride is utilized to provide N-type conductivity doping its concentration is controlled merely at greater than 0.5 mole percent of the vapor stream. Thereby the vapor deposited silicon overlayer is saturated uniformly along the length of the rod to the limit of its solubility with phosphorus impurities. At this doping level the phosphorus content in the silicon overlayer corresponds to approximately 0.002-ohm-cm. N.

The next step in the process involves pulling the saturated rod in a conventional core pulling apparatus to decrease its diameter to about millimeters. Cores thus pulled are arbitrarily designated second generation substrates. The substrate is then cut into lengths approximating those of the saturated cores of the first generation. At this point the shorter length cores may be processed according to the final steps shown in FIGURE 1 or taken through the additional process cycle presented in FIG URE 2.

Considering the production of single crystal silicon material of a relatively low resistivity, the second generation substrates will be taken through the remaining process steps of FIGURE 1. The substrates then are placed in the vapor growth reactor as before and an overlayer of pure silicon is grown thereon. During the deposition process the diameter of the core is increased by a pre determined amount in accordance with the resistivity level desired for the material. The essential feature of this step is to dilute the concentration of the saturated core by a predetermined amount which is accurately controlled by the increase in diameter of the core caused by the additional deposit on the core. This increase in diameter is determined by a standardizing procedure which takes in account the flow rates of decomposable semiconductor material and the temperature of the core on which deposition occurs as described in the copending application. In essence this procedure may be described as predetermined dilution by controlled deposition. In the example being described, the second generation substrate is increased to a diameter of 20 mm., an increase in resistivity from 0.002 ohm-cm. to about 0.045 ohm-cm. Semiconductor material producedfrom second generation substrates by this process are known as second generation rods.

Second generation rods may be polycrystalline or single crystal in structure depending upon the crystalline state of the core and the rate of deposition of semiconductor material from the vapor phase. In commercial application a high deposition rate is desired and therefore the second generation rods usually are polycrystalline. Accordingly a zone refining step is usually desired in order to convert the rods into single crystal material.

Zone refining may be carried out in any manner known in the art. While it is preferred to zone refine in a vacuum, non-vacuum conditions also may be employed, for example, zone refining in an inert gaseous atmosphere, that is, in a gas inert with respect to the semiconductor material.

Zone refining of the polycrystalline rods within a vacuum chamber also serves to remove additional impurities from the rod in accordance with the total number of 'zone passes and the zone travel rate, thereby providing an additional means by which the resultant resistivities of the rod may be determined. Semiconductor material produced by zone refining of substrates are known as second generation rods and afford single crystal semiconductor material with resistivities in the range 0.08-2 ohm-cm.

The zone refining apparatus used herein is conventional in the art; for example, that which is described in U.S. Patent 2,901,325 is quite suitable. The process of zone refining involves mounting the core body with a heating 4t coil around the end and moving the coil at a prescribed travel rate along the length of the body. In the present process a standard travel rate of 3 mm. per minute was used. Thereby the amount of impurities removed during zone refining depended only on the total number of zone passes to which the rod was subjected.

A zone pass is defined as a complete traversal of the length of the crystal with the heating coil. Thus when the rods are given two zone passes, the resistivities are increased to 0.15 ohm-cm. Additional but not excessive numbers of zone refining passes provide single crystal rods having predetermined resistivities up to about 2 ohm-cm.

High resistivity silicon, that is, above 2 ohm-cm., may be produced by taking one of the second generation rods and further diluting the impurity concentration by another controlled deposition cycle as illustrated in the flow sheet of FIGURE 2. Accordingly, the second generation rods are elongated in a core puller, cut into several pieces of smaller lengths to about 12 inches, and its diameter again increased by silicon deposited thereon to produce a third generation of rods, referred to as third generation rods.

After zone refining, third generation rods yield single crystal material with resistivities of about 08-20 ohm- As will be apparent to those skilled in the art, the cycle just described may be repeated to produce a fourth generation of rods with final resistivities approaching 1000 ohm-cm. after zone refining.

What has been described herein is a process for the production of single crystal semiconductor material having predetermined resistivities. The process depends upon keeping certain operational parameters in the process constant at all times while varying others in order to achieve a selectivity in resistivity within a desired range. The process is amenable to the production of a plurality of single crystal rods having similar resistivities and also to a plurality of rods of different resistivities over a wide resistivity range.

An essential feature of the invention is the provision of a semiconductor core having a saturated concentration of impurities therein. Such an impurity level is easily attained in commercial production with a minimum of control, preferably by deposition from the vapor phase.

This application is a continuation-in-part of application Serial No. 99,744, filed March 31, 1961, now abandoned.

While the invention as presently described with specific reference to particular embodiments thereof, various changes and alterations therein may be made which are within the skill of the art.

I claim:

1. A method for the production of semi-conductor material having predetermined resistivities which comprises providing a substrate of semi-conductor material of predetermined length and diameter and having a saturated concentration of active impurities therein, pulling said substrate to increase its length and decrease its diameter, depositing from the vapor phase an overlayer of pure said semiconductor material to increase its diameter by a predetermined amount thereby decreasing the effective impurity concentration in said substrate thereby forming a rod of said material, and zone refining said rod in an atmosphere non-reactive with respect to the semiconductor material during a predetermined number of zone passes at a controlled travel rate to distribute the impurities throughout said material.

2. A method for the production of single crystal semiconductor material having predetermined resistivities which comprises providing a substrate of semiconductor material of predetermined length and diameter and having a saturated concentration of active impurities therein, pulling said substrate to increase its length and decrease its diameter, depositing from the vapor phase an overlayer of pure said semiconductor material to increase its diameter by a predetermined amount thereby decreasing the effective impurity concentration in said substrate thereby forming a rod of said material, and zone refining said rod in an atmosphere non-reactive with respect to the semiconductor material during a predetermined number of zone passes at a controlled travel rate to further decrease its impurity concentration thereby to produce single crystal rods of said semiconductor material having said 'a saturated concentration of active impurities therein,

pulling said substrate to increase its length and decrease its diameter, cutting the elongated substrate to form a plurality of substratesof shorter length, depositing from the vapor phase onto said shorter length substrate an overlayer of pure saidsemiconductor material to increase its diameter by a predetermined amount thereby decreasing the effective impurity concentration in said zone refining said rod in an atmosphere non-reactive with respect to the semiconductor material during a predetermined number of zone passes at a controlled travel rate to further decrease its impurity concentration thereby to produce single crystal rods of said semiconductor material having said predetermined resistivity.

' 6. A method in accordance with claim 5 wherein said semiconductor material is silicon.

comprises providing a substrate of semiconductor material of predetermined length and diameter having a saturated concentration of active impurities therein, core pulling said substrate to decrease its diameter and increase its length, cutting the elongated substrate to form a plurality of substrates of shorter length to provide thereby a plurality of substrates of shorter length of the same resistivity, zone refining one of said shorter length subsubstrate. thereby forming a rod of said material, and

7. A method in accordance with claim 5 wherein said active impurity is phosphorus.

8. A method for the preparation of single crystal semiconductor material having predetermined resistivities which comprises providing a substrate of semiconductor material of predetermined length and diameter, codepositing from the vapor phase thereon said semiconductor material and active impurities therewith in an amount sufiicient to provide a saturated concentration of said active impurities for said deposited semiconductor material thereby to form a saturated substrate, pulling said saturated substrate to increase its length and decrease its diameter, cutting said elongated substrate to form a plurality of saturated substrates of shorter length, depositing from the vapor phase ontos aid shorter length substrate an overlayer of pure semiconductor material to increase its diameter by a predetermined amount thereby decreasing its impurity concentration and zone refining said increased diameter substrate during a predetermined number of zone passes in an atmosphere 'nonstrates in an atmosphere non-reactive with respect to the semiconductor material during a predetermined number of zone passes at a controlled travel rate to provide a first single crystal semiconductor rod having a relatively low resistivity, and subjecting another of said shorter length substrates to said pulling, cutting and zone refining steps as above to form a second single crystal semiconductor rod having a relatively higher resistivity as compared to first single crystal substrates.

12. A method in accordance with claim 11 wherein said semiconductor material is silicon.

13. A method in accordance with claim 11 wherein said active impurity is phosphorus.

14. A method for the production of single crystal semiconductor material having predetermined resistivities which comprises providing a substrate of semiconductor material of predetermined length and diameter, depositing a saturated concentration of active impurities therein from the vapor phase, pulling said substrate to increase its length and decrease its diameter, depositing from the vapor phase an overlayer of pure said semiconductor materialto increase its diameter by a predetermined amount thereby decreasing the effective impurity concentration in said substrate thereby forming a rod of said material,

{and zone refining said rod in a vacuum during a predetermined number of zone passes at a controlled travel rate to further decrease its impurity concentration thereby to produce single crystal rods of said semiconductor material having said predetermined resistivity.

15. A method of making a plurality of single crysal semiconductor materials of predetermined different resistivities within the range of 0.002-1000 ohm-cm. which comprises providing a substrate of semiconductor material of predetermined length and diameter, depositing a saturated concentration of active impurities therein from the vapor phase, core pulling said substrateto decrease its diameter and increase its length, cutting the elongated substrate to form a plurality of substrates of shorter length of the same resistivity, zone refining one of said shorter length substrates in an atmosphere non-reactive with respect to the semiconductor material during a predetermined number of zone passes at a controlled travel rate to provide a first single crystal semiconductor rod having a relatively low resistivity, and subjecting another of said shorter length substrates to said pulling, cutting and zone refining steps as above to form a second single crystal semiconductor rod having a relatively higher resistivity ascompared to first single crystal substrates.

References Cited by the Examiner UNITED STATES PATENTS 2,739,088 3/56 Pfann 252--62.3 2,964,396 12/60 Rummel et al 252-62.3 2,970,111 1/61 Hoffmann et al 25262.3 3,011,877 12/61 Schweickert et a]. 252-623 MAURICE A. BRINDISI, Primary Examiner,