US3142763A

US3142763A - Circuit arrangement for supplying an impedance with current pulses

Info

Publication number: US3142763A
Application number: US842441A
Authority: US
Inventors: Traas Laurus Jan
Original assignee: US Philips Corp
Current assignee: US Philips Corp; North American Philips Co Inc
Priority date: 1958-10-03
Filing date: 1959-09-25
Publication date: 1964-07-28
Anticipated expiration: 1981-07-28
Also published as: NL103758C; CH393422A; DE1091610B; FR1236934A; GB929786A

Description

\ 28, 1964 L. J. TRAAS 3,142,763

cmcurr mmcsum FOR suy umc an, xursnmcs: um cuaasn'r PULSES Filed Sept. 25. 1959 INVENTOR Icarus an trues BY M W AGE United States Patent Ofiice 42,763 CIRCUIT ARRANGEMENT FOR SUPPLYING, AN

IMPEDANCE WITH CURRENT PULSES Laurus Ian Trass, Eindhoven, Netherlands, asslgnor to North American Philips Company, Inc., New York, N.Y., a corporation of Delaware Filed Sept. 25, 1959, Ser. No. 842,441 Claims priority, application Netherlands Oct. 3, I958 8Claims. (Cl. 307-885) The present invention relates to circuit arrangements for feeding an impedance with current pulses having a substantially constant amplitude substantially independent of the voltage drop across the impedance; the impedance is usually fed through a regulating impedance and the main current electrode path of a transistor acting as 1 i a switch, the former of which mainly determine the pulse amplitude.

' impedance, the most obvious solution is that of FIG. 1 of the accompanying drawing; The current pulses are generated by closing'aswitch 1, as a result of which the voltage E of a-supply is applied via a regulating impedance 2, across the impedance 3 to be supplied. If the regulating impedance 2 is high in proportion tothe impedance 3,

and if the voltage E is large in proportion to the maximum voltage V; occurring across the impedance 3, the amplitude I of the current pulses corresponds with a high degree of approximation to E/Zgwhere Z, is the value of the regulating impedance. lf thisin particular is a resistor having a value R,, then I In case of given minimum and maximum values of I and given values of the impedance 3 and of the voltage V to be expected, E. must often be chosen so high that the maximum voltage operative across the switch 1 in the blocked state E and possibly E+ V is unduly high for any available transistor.

A typical example of the use of a transistor as a switch for feeding an impedance with current pulses is that in which the impedance is formed by many series-connected control windings of memory cores, such as are found in the matrix memory. system of a computer. In FIG. 1 the impedance is represented as such a series-combination of windings which usually consist of a wire threaded through the cores 4 to be controlled.

Assuming, for example, that the amplitude I of the current pulses must not vary by more than approximately that the regulating impedance 2 is a resistor having a value R compared to which the resistance of the series of windings on the cores 4 is negligible, and that, if all the cores have been read in and their magnetization is reversed or they are demagnetized by the current pulse, a' maximum reverse voltage V, is generated across the impedance 3, then we have i max- 2 nomlnal- 2 if the magnetization of none of the cores is reversed by the current pulse, and:

- rest condition with a non-conductive switch 1, a current 3 Vce ms: Q 'i' 3 eb max From (1) and (2) it follows:

' 0.2I =V; I Substituting (1) and (4) in (3) there follows: nom ce max v( and from (5) and (4) follows:

V, 0.2 %=0.154V.. m...

At a given V m and/ or V mu and at .ajgiven ,value of the voltage V; generatedacross the winding 4 oi acore of which the magnetization .is being reversed,,tl 1e, maxi; mum number of controllable cores and thesupply voltage E can be calculated from (6) and (3), while the value R, of the regulating resistor 2 can be deteirninedfrom (l) or (2) for a certain value of I,,,,,,,. It is thereby striking thatV, must be only a comparatively small part of ee max or cb mnx- Inorder to be able to control a large number of cores while fulfilling the described conditions (I), (2) and (3),

it is known to limit the voltage across the switch as shown in FIG. 2 by means of a clamping diode 5 with the use of an additional source E. The condition (3) remains unaltered and valid. Inthe Equations 1 and 2,

which relate to the situation with a conductive switch 1, E-i-E, is, however, substituted for B, so that I and 1 m can be determined by means of E, and R A drawback of this type of circuit arrangement is that in the -E+E I i when the switch is conductive. For example, if E, is of the same order as E, this quiescent current I. is of the same order as I, for example 0.5 A., and the energy dis:

sipated in the resistor R is unduly high. If the switch 1 I is a transistor, R should be at least so high that the transistor is bottomed when in the conductive state, so that reduction of the dissipated power (1').R, cannot be reached by reduction of R Besides, when assuming the same tolerances for the current I through the windings of a number of cores to be controlled, the new condition:

a s mu+ 1) becomes valid.

In order to be able to control a number of cores considerably greater in number than in the preceding case,

for example twice as many, E, must necessarily be of the same order as V and as E, for example equal to E.

On the other hand, it is also known, to switch higher voltages on and otf by means of two or more transistors, the emittercoliector electrode paths .of which are con- Patented July 28, 1964 'pedance may be chosen low,

' ce max cb max regulating circuit 8. The load impedance 3 I drop is dependent on the nectcd in series with each other, while the base potential [of each transistor, with the exception of that of a first directly controlled transistor, is adjusted by means of a potentiometer so that the voltages across each transistor 7 remain within the permissible limits. However, no meassolution of the problem set out with reference to FIG. 1,

which solution provides a circuit arrangement in which there is no quiescent current. According to the invention, this is achieved by compensating the voltage drop across the impedance to be supplied by means of current pulses taken from the output circuit of a current amplifier controlled by this voltage drop.

By this step, the changes of the amplitude of the current pulses as a function of the value of the impedance to be supplied or of the voltage drop across this impedance are reduced substantially proportionately to the current amplification of the amplifier.

Preferably a voltage higher than that permissible for the switch transistor is applied, via the output circuit of the current amplifiento the series-combination of the regulating impedance, the main current electrode path of the switching transistor, and the impedance to be supplied, while the voltage across the switching transistor is limited by a so-called clamping diode which is connected in the forward direction with respect to the current through th main current electrode path of the switching transistor. This is in the direction opposite to that of the diode 5 of FIG. 2. The condition (3) is not changed by this additional measure, yet the supply voltage E for the switching transistor and the value R of the regulating imso that the maximum voltage drop V across the impedance to be fed which can still be compensated is, for example, only 1 v.'smaller than the maximum permissible voltage V, or V of the switching transistor. If the current amplifier is equipped with a second transistor, the higher voltage E should be lower than the maximum permissible voltage for this transistor, while a second separating diode prevents a voltage drop of reverse direction across the' impedance to be supplied from being superimposed on the supply voltage E of this transistor.

In order that the invention may be readily carried into effect, it will now be described in greater detail with reference to the FIGS. 3 to 6 of the accompanying drawing, in which FIG. 3 is the basic circuit diagram and 7 FIGS. 4 to 6 are circuit diagrams of three dilierent embodiments of the circuit arrangement according to the invention.

The basic circuit diagram, represented in FIG. 3, comprises a switch 1, one contact of which is connected to the negative terminal of a source of supply voltage E and to ground via a load impedance 3. The other contact of the switch is connected to the positive terminal of the supply source via a regulating impedance 2 and 0. consists or the series-combination of control windings of a comparatively large number of memory cores 4.

Each control current pulse supplied to the impedance 3 from the supply source E, via the regulating impedance 2, the regulating circuit 8, and the switch 1, produces a given voltage drop across the impedance 3. This voltage value of the impedance 3 and this value is in turn dependent on the condition of the memory cores 4. If all the cores have been read in beforehand, their magnetization is again reversed by the current pulse and consequently a comparatively high voltage pulse is produced across the impedance 3. This voltage pulse counteracts the current pulse supplied to this impedance via the switch 1, so that, under these conditions, the amplitude of the control pulseis comparatively strongly reduced. If, however, none of the cores 4 has been read in, not a single core will flip from one condition of magnetic saturation into the reverse condition of magnetic saturation by the current pulse. Consequently,

the amplitude of this current pulse is larger than in the preceding case, because the reverse voltage produced across the impedance 3 is lower.

The described change in amplitude of the control current pulses due to the presence of the impedance 3 is objectionable for the satisfactory operation of a device having magnetic memory cores, for example of a matrix of a computer or of an automatic system such as an automatic selection equipment. A control current pulse may happen to be too small to make all the cores 4 re- I assume the same state of magnetic saturation. It is consequently desirable to maintain and/ or regulate the amplitude of the control current pulses within given limits. So long as the number of memory cores 4 is not too large, this can be effected by means of the regulating imped ance 2 and by corresponding increase of the voltage of the supply source E. However, it is most practical to use a transistor as a switch and in the case of alarge number of cores and with a high regulating impedance the sum of the voltage E of the supply source and of the reverse voltage across the impedance 3 will rapidly reach the maximum permissible value of the collector-emitter and/ or collector base voltage of the transistor employed. It may indeed happen that all the cores 4 flip at the same time under the influence of the current through othermust be added to the voltage of the supply source, which is eliective across the collector-emitter and collector-base electrode paths of the switch 1 then blocked. According to the invention, in order to compensate the influence of the voltage drop across the impedance 3 during a control current pulse applied via the switch 1, the voltage drop across this impedance 3 is amplified by means of a current amplifier 6 and converted into corresponding current pulses, which are taken from the output circuit of this amplifier and fed back to the impedance 3 via the switch 1.

According to the basic circuit diagram shown in FIG.

3, the voltage drop across the impedance 3 is supplied to the input terminals 7 of the current amplifier 6 and the output circuit of this current amplifier constitutes the regulating circuit 8 and is connected in series with the source of supply voltage E across the series-combination of the regulating impedance 2, of the switch 1 and of the impedance 3 to be supplied. The voltage.

across the output circuit 8 of the current amplifier 6 is, with a high degree of approximation, invariably equal to the voltage across its input terminals 7 and, as this amplifier is able to supply a comparatively high output current and has a comparatively small internal impedance, the amplitude of the control current pulses through the impedance 3 is only dependent on the voltage of the supply source B and on the value of the regulating impedance 2, which voltage and which value can be chosen at will so as to supply the impedance 3 with current pulses of the desired amplitude.

In the example shown in FIG. 4, the switch 1 is formed by a junction transistor of the npn-type in common emitter arrangement, the base of which is controlled by positive control pulses supplied via a transformer 9 the secondary winding 10 of which is connected between the ed via a comparatively high-value resistor 15. The diode 13 is connected inthe forward direction with respect, to voltage pulses produced across the impedance 3 by current pulses via the transistor 1. These voltage pulses are thus transmitted, via this diode and via the capacitor 14, to the base of the transistor 11 which produces a corresponding increase in voltage across the series combination connected in its emitter circuit and 'comprising the resistor 22, the collector-emitter circuit of the transistor 1 and the impedance 3. From the instant at which the transistor 11 becomes conductive, the amplitude of the current pulses through the impedance 3 is consequently approximately equal to the quotient of the voltage E and of the value R of the resistor 22. The sole object of the resistor 21 is to pass a current through the impedance 3, the transistor 1 and the resistor 22 at the beginning of each control current pulse. The time constant of the capacitor 14 in connection with resistor 12 and with the forward input resistance of the transistor 11 connected in parallel therewith should be large with respect to the duration of the control current pulses to be supplied to the impedance 3.

In the example shown in FIG. 5, the current amplifier comprises a second transistor 16, the base of which is directly connected to the common point of the diode 13 and of the resistor 15. The'emitter of this transistor 16 is grounded via a load resistor 17 and its collector is directly connected to the positive terminal +E of a source of higher supply voltage. The emitter circuit of the transistor 16 consequently forms a source of pulse voltage of comparatively small internal resistance, and the voltage pulses produced at its emitter and corresponding to the positive voltage pulse across the impedance 3 to be supplied are transmitted to the supply circuit for the collector of the transistor 1 via a high-value capacitor 14'. This supply circuit comprises the series-cor'nbination of the supply source E, of a diode 18 connected in the forward direction with respect to a current from this source, and of the regulating impedance formed by a resistor 22. By the current amplifier with the transistor 16 and via the capacitor 14', the voltage at the common point of the diode 18 and of the resistor 22 is increased by the amount of the voltage drop across the lgg'rad resistor 17, which voltage drop is approximately equal to the voltage drop produced across the impedance 3 by control current pulse via the transistor 1. The time constant of the capacitor 14' in connection with the resistor 22 should be large with respect to the duration of the control. current pulses to be supplied to the impedance 3. Sometimes, this condition is difficult to meet without using a comparatively costly capacitor of unduly large size.

As a result of the presence of the diode 13, only positive voltages can be produced across the

resistors

15 and 17, so that the voltage of the supply source of higher voltage E may be approximately equal to the maximum permissible collector-base and/or collector-emitter voltage for the transistor 16. On the other hand, be-

tween the current pulses, the voltage at the collector of the transistor 1 cannot exceed that of the supply source E, since the diode 18 is then conductive: The voltage at the collector of the transistor 1 then cut 011 is thus practically equal to the voltage at the terminal +E. During the pulses, this diode 18 is blocked by the current pulses taken from the emitter circuit of the transistor 16 via the capacitor 14', when the transistor 1 is conductive and the voltage between its emitter and collector electrodes is very low, for example a few tenths of a volt. The voltage drop across the impedance 3 to be supplied is thus compensated by a voltage which is not taken from the supply source E and which is added to the voltage of this source.

In the example shown in FIG. 6. the current amplifier comprises three stages. The first stage comprises a transistor 16 connected similarly to the transistor 16 of the example shown in FIG. 5 with the dilference that its emitter is not connected to the main circuit for sup- This transistor is again connected as an emitter-follower and, like the transistor 16, is fed from the supply source of higher voltage E. Its emitter circuit comprises a load resistor 27 and its emitter is coupled to the base of the transistor 11 of the third stage via a capacitor 14. The transistor of the third stage corresponds to, the transistor 11 shown in FIG. 4 and is connected in the same manner, with the difference that the resistor 21 of FIG. 4-has been replaced by the diode 18 shown in FIG. 5 in series-combination with decoupled resistors 28 and 29. The resistors 28 and 29, together with anadditional resistor 30, form a voltage divider. so that the voltage applied to the'collector of the transistor 1 in its quiescent or non-conductive state is. reduced to a permissible value. A capacitor 32 is connected in parallel with the resistor 28. This capacitor is to supply a current through the regulating resistor 22, the diode 18, the collectoremitter electrode path of the transistor 1 and the impedance 3 to be supplied, during the very short time between the instant at which the transistor 1 becomes con ductive as a result of a control pulse applied between its baseand emitter-electrodes and the instant at which the transistor 11 also becomes conductive as a result of the voltage drop across the impedance 3, transmitted toits base electrode via the diode 13, the emitter-followers with the transistors 16 and 26, and the connecting capacitor 14. Consequently, this capacitor 32 does 'not need to have a high value and the circuit arrangement has the advantage of being supplied from a single supply source having the voltage E. The collectors of the transistors 16 and 26 are connected to the common point of the resistors 28 and 29, so that the transistor 11 can never be bottomed, since its base potential remains smaller than its collector potential by voltage drop across the resistor 28. Also this second tapping of the voltage divider 28, 29, 30 is decoupled by means of a capacitor 31.

In each of the circuit arrangements according to the FIGS. 4, 5 and 6, the impedance to be supplied is shunted by a diode 13 connected in the forward direction with respect to the voltage drop produced across this impedance by a current pulse via the transistor 1 and connected in series with a resistor 15 and with the baseemitter circuit of a transistor, 11 and 16 respectively,

connected in parallel therewith. The control current pedance 3 by a corresponding amount, so that it is de- I sirable to keep it as low as possible. If the amplifier 6 comprises more than one stage, this control current can be strongly reduced. A further reduction of this control current can be obtained by replacing the transistor 16 of the first stage of the amplifier.6 by a tube in cathode-follower arrangement, for example by a small triode for low anode voltage. can be connected directly to the emitter of the transistor 1, omitting the diode 13 and the resistor 15.

What is claimed is: l. A circuit arrangement for feeding current pulses having substantially constant amplitude to a load impedance, comprising a switching transistor having base, emitter and collector electrodes and an emitter-collector elec- The grid of this triode trode path, a regulating impedance and a load impedance connected in series with said emitter-collector path, a

, source of supply voltage poled to bias said emitter elecput circuits, said input circuit being coupled to said load impedance, said output circuit being coupled to said regulating'impedance, compensating current pulses being produced in said output circuit in response to the voltage drop produced across said load impedance when a current-pulse is fed to said load impedance via said regulating impedance and said emitter-collector electrode path, said compensating current pulses being superimposed on said current pulses and compensating for the influence of said voltage drop upon the amplitude of the current pulses.

2. A circuit arrangement as claimed in claim 1, said current amplifier comprising an additional transistor having base, emitter and collector electrodes, said amplifier being connected in grounded collector arrangement, said input circuit including the base electrode of the amplifier.

3. A circuit arrangement as claimed in claim 1, said current amplifier comprising an additional transistor havingbase, emitter and collector electrodes, said amplifier being connected in grounded collector arrangement, said input circuit including the base electrode of the amplifier, a diode connected between said .load impedance and the base electrode of said amplifier, said diode having a polarity such that the voltage drop produced across the load impedance is applied to the amplifier base electrode.

4. A circuitarrangement as claimed in claim 1, further including a separate source of supply voltage for said amplifier, said separate source having a value which is greater than the maximum permissible collector voltage of the switching transistor, and a diode connected iii-said emitter-collector electrode path of said switching transistor, said diode having apolarity which is in the forward direction with respect to the current insaid path. v

5. A circuit arrangement as claimed in claim 4, said current amplifier comprising an additional transistor having base, emitter and collector electrodes, said amplifierv being connected in grounded collector arrangement, said input circuit including the base electrode of the amplifier, a diode connected between said load impedance and the base electrode of said amplifier, said diode having a polarity such that the voltage drop produced across the load impedance is applied to the amplifier base electrode.

6. A circuit arrangement as claimed in claim 5, said additional transistor having a main-current electrode path whichis conductively connected between said source of supply voltage and said series connection.

7. A circuit arrangement as claimed in claim 4, the electrode of said diode remote from said emitter-collector electrode path of said switching transistor being connected to a voltage divider connected across said separate source of higher voltage.

8. A circuit arrangement for feeding current pulses having substantially constant amplitude to a plurality of series-connected control windings of magnetic memory cores, each of said cores having a substantially rectangular hysteresis loop and being capable of independently assuming a distinct remanence condition, comprising: a switching transistor having base, emitter and collector electrodes and an emitter-collector electrode path, a regulating impedance, said core control windings being connected in series with said regulating impedance and said emitter-collector path, a source of supply voltage poled tobias said emitter electrode in the forward direction, means for applying control current pulses in the conducting direction to said base electrode, a current amplifier having inputand output circuits, said input circuit being coupled to said series-connected control windings, said output circuit being coupled to said regulating impedance, compensating current pulses being produced in said output circuit in response to the voltage drop produced across said control windings when a current pulse is fed to said windings via said regulating impedance and said emitter-collector electrode path, said compensating current pulses being superimposed on said current pulses and compensating for the influence of said voltage drop upon the amplitude of the current pulses.

References Cited in the file of this patent UNITED STATES PATENTS 2,751,549 Chase June 19, 1956 2,832,900 Ford Apr. 29, 1958 2,878,440 Jones Mar. 17, 1959 2,888,633 Carter May 26, 1959 2,912,635 Moore Nov. 10, 1959 2,916,705 Stephenson Dec. 8, 1959

Claims

1. A CIRCUIT ARRANGEMENT FOR FEEDING CURRENT PULSES HAVING SUBSTANTIALLY CONSTANT AMPLITUDE TO A LOAD IMPEDANCE, COMPRISING A SWITCHING TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES AND AN EMITTER-COLLECTOR ELECTRODE PATH, A REGULATING IMPEDANCE AND A LOAD IMPEDANCE CONNECTED IN SERIES WITH SAID EMITTER-COLLECTOR PATH, A SOURCE OF SUPPLY VOLTAGE POLED TO BIAS SAID EMITTER ELECTRODE IN THE FORWARD DIRECTION, MEANS FOR APPLYING CONTROL CURRENT PULSES IN THE CONDUCTING DIRECTION TO SAID BASE ELECTRODE, A CURRENT AMPLIFIER HAVING INPUT AND OUTPUT CIRCUITS, SAID INPUT CIRCUIT BEING COUPLED TO SAID LOAD IMPEDANCE, SAID OUTPUT CIRCUIT BEING COUPLED TO SAID REGULATING IMPEDANCE, COMPENSATING CURRENT PULSES BEING PRODUCED IN SAID OUTPUT CIRCUIT IN RESPONSE TO THE VOLTAGE DROP PRODUCED ACROSS SAID LOAD IMPEDANCE WHEN A CURRENT PULSE IS FED TO SAID LOAD IMPEDANCE VIA SAID REGULATING IMPEDANCE AND SAID EMITTER-COLLECTOR ELECTRODE PATH, SAID COMPENSATING CURRENT PULSES BEING SUPERIMPOSED ON SAID CURRENT PULSES AND COMPENSATING FOR THE INFLUENCE OF SAID VOLTAGE DROP UPON THE AMPLITUDE OF THE CURRENT PULSES.