US3140966A - Vapor deposition onto stacked semiconductor wafers followed by particular cooling - Google Patents

Vapor deposition onto stacked semiconductor wafers followed by particular cooling Download PDF

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US3140966A
US3140966A US209489A US20948962A US3140966A US 3140966 A US3140966 A US 3140966A US 209489 A US209489 A US 209489A US 20948962 A US20948962 A US 20948962A US 3140966 A US3140966 A US 3140966A
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stack
semiconductor
vessel
temperature
reaction gas
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US209489A
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Wartenberg Klaus
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Siemens Schuckertwerke AG
Siemens AG
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/02—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the solid state
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/052—Face to face deposition

Definitions

  • the copending coassigned application discloses a method for the production of electronic semiconductor devices having a monocrystalline semiconductor body with two or more layers of different electric conductance properties, namely respectively diiferent types of conductance or respectively ditferent dopant concentration and hence ohmic resistances.
  • the devices are produced by monocrystalline precipitation of semiconductor material from gaseous halogen compounds of the semiconductor material upon a substratum or carrier member of semiconductor material having the same crystalline lattice structure, the carrier member being heated during the process.
  • the process is performed by stacking semiconductor discs of respectively different conductance types or different dopant concentration alternate- 1y upon each other within a closable vessel, and then producing, in the presence of a reaction medium that forms gaseous compounds with the semiconductor material, a temperature gradient from one end to the other of the rod-shaped stack of semiconductor members.
  • the above-mentioned stack of semiconductor disc members is preferably located in an elongated vessel, for example a quartz tube, which is heated by an electric furnace for example of the resistance-heater type.
  • an electric furnace for example of the resistance-heater type.
  • My invention has as an object the improvement of the above-described method with respect to uniformity of the resulting properties of the semiconducor devices. This is accomplished by arranging the elongated stack in a vertical direction and producing the temperature gradient in a manner so that it is directed downwardly along the stack from above.
  • the drawing shows a furnace 2, such as an electric resistance furnace, with a heater winding 2a, in which a quartz tube 3 is arranged.
  • a stack of semiconductor discs 4 is located inside the quartz tube 3.
  • the quartz tube protrudes partly out of the furnace 2 for the purpose of being properly supported and held in position.
  • the heater winding 2a of the furnace 2 is arranged at about the middle portion of the furnace. This has the consequence that the temperature profile occurs within the tubular heating space of the furnace as is shown in the diagram at the left of the furnace 2.
  • the diagram shows the temperature T plotted over the axial length L of the furnace. In the middle of the furnace there exists a region having an approximately uniform temperature, whereas the temperature declines about linearly toward the top and toward the bottom of the furnace space.
  • the semiconductor bodies 4 are stacked into the quartz tube 3 and after the tube is filled with the reaction gas, the tube space is fused off at about the middle of its length, namely at the location 3a.
  • the quartz tube is then placed into the furnace in such a position that the fusion locality 3a issituated in the region of the uniform temperature.
  • the semiconductor disc members 4 are then located in the range of the lower heat gradient so that thermal motion of the reaction gas is virtually fully prevented.
  • the semiconductor discs may consist for example of silicon of alternately opposed conductance characteristics, that is of different dopant types or concentrations.
  • thirteen semiconductor bodies having a disc thickness of about 300 to 400 a diameter of about 18 mm. and of alternating p and n conductance types were stacked upon each other. The length of the stack was about 10 mm.
  • the inner space of the quartz tube 3 in this case is preferably filled with a mixture of silicon tetrachloride and hydrogen in the ratio 1:10.
  • the heat gradient from the upper to the lower end of the semiconductor stack for this purpose can be adjusted to 50 C.
  • the upper end of the semiconductor stack is kept at a temperature of 1190 C., whereas the temperature at the lower end of the stack is 1140 C.
  • the quartz tube 3 is rapidly pulled out of the furnace 2 in order tofreeze the discs in the condition obtained by the heat treatment. It was essential that the surrounding atmosphere in the enclosed space did not contain oxygen, nitrogen or water vapor which otherwise would result in the formation of oxides and nitrides at the surface of of the semiconducting bodies producing masking elfects which would result in a non-uniform removal and transference of material.
  • the precipitation method of producing electronic semiconductor devices having a monocrystalline semiconductor body with a plurality of monocrystalline layers of respectively diiferent electric conductance properties which comprises vertically stacking in a sealable vessel a multiplicity of plate members having alternately difi er- J? ent respective conductance properties upon each other to form an axially elongated stack, said members consisting of semiconductor monocrystals of substantially the same lattice structure as the semiconductor substance to be precipitated; subjecting the stack in the vessel to a reaction gas which contains a halogen compound of semiconductor substance to be precipitated; heating the stack in the presence of the reaction gas to precipitation temperature, to produce a temperature gradient from one end of the stack to the other with the higher temperature near the top of the stack.
  • the precipitation method of producing electronic semiconductor devices having a monocrystalline semiconductor body with a plurality of monocrystalline layers of respectively different electric conductance properties which comprises vertically stacking in a scalable vessel a multiplicity of plate members having alternately different types of conductance upon each other to form an axially elongated stack, said members consisting of semiconductor monocrystals of substantially the same lattice structure as the semiconductor substance to be precipitated; subjecting the stack in the vessel to a reaction gas which contains a halogen compound of semiconductor substance to be precipitated; heating the stack in the presence of the reaction gas to precipitation temperature, to produce a temperature gradient from one end of the stack to the other with the higher temperature near the top of the stack.
  • the precipitation method of producing electronic semiconductor devices having a monocrystalline semiconductor body with a plurality of monocrystalline layers of respectively different electric conductance properties which comprises vertically stacking in a scalable vessel a multiplicity of plate members having alternately different dopant concentrations upon each other to form an axially elongated stack, said members consisting of semiconductor monocrystals of substantially the same lattice structure as the semiconductor substance to be precipitated; subjecting the stack in the vessel to a reaction gas which contains a halogen compound of semiconductor substance to be precipitated; heating the stack in the presence of the reaction gas to precipitation temperature, to produce a temperature gradient from one end of the stack to the other with the higher temperature near the top of the stack.

Description

July 14, 1964 K WARTE ERG 3,140,966
NTO ST FERS VAPOR DEPOSITION ACK SEMICONDUCTOR WA FOLLOWED BY PARTIC R COOLING Filed July 1962 United States Patent '0 "cc VAPOR DEPOSITION ONTO STACKED SEMICON- DUCTOR WAFERS FOLLOWED BY PARTICULAR COOLING Klaus Wartenberg, Erlangen, Germany, assignor to Siemens-Schuckertwerke Aktieugesellschaft, Berlin-Siemensstadt, Germany, a corporation of Germany Filed July '11, 1962, Ser. No. 209,489 Claims priority, application Germany May 29, 1962 3 Claims. (Cl. 148-175) My invention relates to a method according to application Serial No. 205,740 of K. Reuschel, filed on even date herewith, and concerns an improvement thereof.
The copending coassigned application discloses a method for the production of electronic semiconductor devices having a monocrystalline semiconductor body with two or more layers of different electric conductance properties, namely respectively diiferent types of conductance or respectively ditferent dopant concentration and hence ohmic resistances. The devices are produced by monocrystalline precipitation of semiconductor material from gaseous halogen compounds of the semiconductor material upon a substratum or carrier member of semiconductor material having the same crystalline lattice structure, the carrier member being heated during the process. More specifically, the process is performed by stacking semiconductor discs of respectively different conductance types or different dopant concentration alternate- 1y upon each other within a closable vessel, and then producing, in the presence of a reaction medium that forms gaseous compounds with the semiconductor material, a temperature gradient from one end to the other of the rod-shaped stack of semiconductor members.
The above-mentioned stack of semiconductor disc members is preferably located in an elongated vessel, for example a quartz tube, which is heated by an electric furnace for example of the resistance-heater type. By producing a temperature gradient within the furnace itself or by slowly moving the tubular vessel with its contents out of the furnace, the desired temperature gradient in the elongated stack of semiconductor members can be adjusted.
My invention has as an object the improvement of the above-described method with respect to uniformity of the resulting properties of the semiconducor devices. This is accomplished by arranging the elongated stack in a vertical direction and producing the temperature gradient in a manner so that it is directed downwardly along the stack from above.
I have found that the migration of the semiconductor material from one semiconductor disc to the adjacent one occurs in dependence upon the position and arrangement of the disc members. Apparently this can be explained by the fact that a flow of the gaseous reaction medium occurs within the vessel and that such flow has the tendency to promote or impede the elimination and the growth of the semiconductor material at individual localities. Thus, with a vertical direction of an elongated vessel with a rod-shaped stack of semiconductor discs located therein, a non-tu1iform elimination of material exhibiting itself by pit formation or eating-away at singular localities occurs near the edge of the materialissuing side of the semiconductor discs when the temperature gradient is oriented from below toward the top of the stack as is the case with the equipment and procedure described in the above-mentioned copending application, the pertinent portions of which are incorporated herein by reference. However, when the semiconductor stack is arranged in accordance with the present invention and the temperature gradient is set to a curve from above toward the bottom of the stack, then apparently no thermal motion of the reaction gases takes 3,146,956 Patented July 14, 1964 place because the gas zones or layers correspond to the orientation of the temperature gradient in the stack. That is, the warmer gases are located at the upper end of the closed processing vessel and the colder gases at the lower end thereby preventing any possible convective motion. I have found that, as a consequence, the precipitation takes place much more uniformly over the entire surface of the individual semiconductor discs, so that the invention considerably contributes to improved performance and results of the process.
The invention will be further described with reference to an embodiment of processing equipment and an appertaining explanatory diagram shown by way of example on the accompanying drawing.
The drawing shows a furnace 2, such as an electric resistance furnace, with a heater winding 2a, in which a quartz tube 3 is arranged. A stack of semiconductor discs 4 is located inside the quartz tube 3. The quartz tube protrudes partly out of the furnace 2 for the purpose of being properly supported and held in position.
The heater winding 2a of the furnace 2 is arranged at about the middle portion of the furnace. This has the consequence that the temperature profile occurs within the tubular heating space of the furnace as is shown in the diagram at the left of the furnace 2. The diagram shows the temperature T plotted over the axial length L of the furnace. In the middle of the furnace there exists a region having an approximately uniform temperature, whereas the temperature declines about linearly toward the top and toward the bottom of the furnace space. After the semiconductor bodies 4 are stacked into the quartz tube 3 and after the tube is filled with the reaction gas, the tube space is fused off at about the middle of its length, namely at the location 3a. The quartz tube is then placed into the furnace in such a position that the fusion locality 3a issituated in the region of the uniform temperature. The semiconductor disc members 4 are then located in the range of the lower heat gradient so that thermal motion of the reaction gas is virtually fully prevented.
The semiconductor discs may consist for example of silicon of alternately opposed conductance characteristics, that is of different dopant types or concentrations. In the instant example thirteen semiconductor bodies, having a disc thickness of about 300 to 400 a diameter of about 18 mm. and of alternating p and n conductance types were stacked upon each other. The length of the stack was about 10 mm. The inner space of the quartz tube 3 in this case is preferably filled with a mixture of silicon tetrachloride and hydrogen in the ratio 1:10. The heat gradient from the upper to the lower end of the semiconductor stack for this purpose can be adjusted to 50 C. For example, the upper end of the semiconductor stack is kept at a temperature of 1190 C., whereas the temperature at the lower end of the stack is 1140 C. After heat treatment of about 13 minutes duration, the quartz tube 3 is rapidly pulled out of the furnace 2 in order tofreeze the discs in the condition obtained by the heat treatment. It was essential that the surrounding atmosphere in the enclosed space did not contain oxygen, nitrogen or water vapor which otherwise would result in the formation of oxides and nitrides at the surface of of the semiconducting bodies producing masking elfects which would result in a non-uniform removal and transference of material.
I claim:
1. The precipitation method of producing electronic semiconductor devices having a monocrystalline semiconductor body with a plurality of monocrystalline layers of respectively diiferent electric conductance properties, which comprises vertically stacking in a sealable vessel a multiplicity of plate members having alternately difi er- J? ent respective conductance properties upon each other to form an axially elongated stack, said members consisting of semiconductor monocrystals of substantially the same lattice structure as the semiconductor substance to be precipitated; subjecting the stack in the vessel to a reaction gas which contains a halogen compound of semiconductor substance to be precipitated; heating the stack in the presence of the reaction gas to precipitation temperature, to produce a temperature gradient from one end of the stack to the other with the higher temperature near the top of the stack.
27 The precipitation method of producing electronic semiconductor devices having a monocrystalline semiconductor body with a plurality of monocrystalline layers of respectively different electric conductance properties, which comprises vertically stacking in a scalable vessel a multiplicity of plate members having alternately different types of conductance upon each other to form an axially elongated stack, said members consisting of semiconductor monocrystals of substantially the same lattice structure as the semiconductor substance to be precipitated; subjecting the stack in the vessel to a reaction gas which contains a halogen compound of semiconductor substance to be precipitated; heating the stack in the presence of the reaction gas to precipitation temperature, to produce a temperature gradient from one end of the stack to the other with the higher temperature near the top of the stack.
3. The precipitation method of producing electronic semiconductor devices having a monocrystalline semiconductor body with a plurality of monocrystalline layers of respectively different electric conductance properties, which comprises vertically stacking in a scalable vessel a multiplicity of plate members having alternately different dopant concentrations upon each other to form an axially elongated stack, said members consisting of semiconductor monocrystals of substantially the same lattice structure as the semiconductor substance to be precipitated; subjecting the stack in the vessel to a reaction gas which contains a halogen compound of semiconductor substance to be precipitated; heating the stack in the presence of the reaction gas to precipitation temperature, to produce a temperature gradient from one end of the stack to the other with the higher temperature near the top of the stack.
References Cited in the file of this patent ORourke et 211.: Electrical Properties of Vapor Grown Ge Junctions, I.B.M. Journal of Research and Development, vol. 4, No. 3, July 1960, pages 256258.
Loonam: Principles and Applications of the Iodide Process, Journal of the Electrochemical Society, vol. 106, N0. 3, March 1959, pages 238-244.

Claims (1)

1. THE PRECIPITATION METHOD OF PRODUCING ELECTRONIC SEMICONDUCTOR DEVICES HAVING A MONOCRYSTALLINE SEMICONDUCTOR BODY WITH A PLURALITY OF MONOCRYSTALLINE LAYERS OF RESPECTIVELY DIFFERENT ELECTRIC CONDUCTANCE PROPERTIES WHICH COMPRISES VERTICALLY STACKING IN A SEALABLE VESSEL A MULTIPLICITY OF PLATE MEMBERS HAVING ALTERNATELY DIFFERENT RESPECTIVE CONDUCTANCE PREOPERTIES UPON EACH OTHER TO FORM AN AXIALLY ELONGATED STACK, SAID MEMBERS CONSISTING OF SEMICONDUCTOR MONOCRYSTALS OF SUBSTANTIALLY THE SAME LATTICE STRUCTURE AS THE SEMICONDUCTOR SUBSTANCE TO BE PRECIPITATED; SUBJECTING THE STACK IN THE VESSEL TO A REACTION GAS WHICH CONTAINS A HALOGEN COMPOUND OF SEMICONDUCTOR SUBSTANCE TO BE PRECIPITATED: HEATING THE STACK IN THE PRESENCE OF THER REACTION GAS TO PRECIPITATION TEMPERATURE, TO PRODUCE A TEMPERATURE GRADIENT FROM ONE END OF THE STACK TO THE OTHER WITH THE HIGHER TEMPERATURE NEAR THE TOP OF THE STACK.
US209489A 1962-05-29 1962-07-11 Vapor deposition onto stacked semiconductor wafers followed by particular cooling Expired - Lifetime US3140966A (en)

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DES79662A DE1237696B (en) 1962-05-29 1962-05-29 Process for the production of semiconductor components with a single-crystal semiconductor body

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3226254A (en) * 1961-06-09 1965-12-28 Siemens Ag Method of producing electronic semiconductor devices by precipitation of monocrystalline semiconductor substances from a gaseous compound
US3357852A (en) * 1962-12-01 1967-12-12 Siemens Ag Process of producing monocrystalline layers of indium antimonide
JPS49108971A (en) * 1973-02-20 1974-10-16
JPS49121479A (en) * 1973-03-20 1974-11-20
JPS50120967A (en) * 1974-03-11 1975-09-22
JPS5748227A (en) * 1980-09-08 1982-03-19 Fujitsu Ltd Manufacture of semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL99536C (en) * 1951-03-07 1900-01-01

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3226254A (en) * 1961-06-09 1965-12-28 Siemens Ag Method of producing electronic semiconductor devices by precipitation of monocrystalline semiconductor substances from a gaseous compound
US3357852A (en) * 1962-12-01 1967-12-12 Siemens Ag Process of producing monocrystalline layers of indium antimonide
JPS49108971A (en) * 1973-02-20 1974-10-16
JPS49121479A (en) * 1973-03-20 1974-11-20
JPS50120967A (en) * 1974-03-11 1975-09-22
JPS5748227A (en) * 1980-09-08 1982-03-19 Fujitsu Ltd Manufacture of semiconductor device
JPS636138B2 (en) * 1980-09-08 1988-02-08 Fujitsu Ltd

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BE632892A (en)
DE1237696B (en) 1967-03-30

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