US3099787A

US3099787A - Sequential switching system

Info

Publication number: US3099787A
Application number: US119763A
Authority: US
Inventors: Elovic Alexander
Original assignee: Indiana General Corp
Current assignee: Indiana General Corp
Priority date: 1961-05-10
Filing date: 1961-05-10
Publication date: 1963-07-30
Anticipated expiration: 1980-07-30

Description

July 30, 1963 A. ELOVIC SEQUENTIAL SWITCHING SYSTEM Filed May 10. 1961 N %E w 5&3 m muaomdd v A/JDOr v o I mI 8 :1 & NIY I. +000 H +H 3 OOWO V F5050 JOtFZOO INVENTOR. Alexander ElOVIC BY M ATTORNEYS.

United States Patent C) 3,099,787 SEQUENTIAL SWITCHING SYTEM Alexander Elovic, Elizabeth, N.J., assignor to Indiana General Corporation, Valparaiso, End, a corporation of Indiana Filed May 10, 196i, Ser. No. 119,763 13 Claims. (Cl. 321-45) This invention relates to electronic switching systems and more particularly relates to fast-acting sequential switching circuitry.

When transformers are used in high-speed pulsed or switching circuits, the rate of sequencing or successive pulsing of the transformers is limited by their recovery time needs. This factor substantially reduces the potential circuit speed of operation. In accordance with the present invention, at least two control branches are successively triggered into a common load or output.

With a control transistor and a pulse or output transformer in each branch, their utilization in rapid alternate sequence provides successive sequential control operation for the common output. Each output transformer fully recovers during its successive reset or non-operative cycles. The load is therefore directly sequentially pulsed or controlled with no time lag, namely, with an eiiective zero recovery circuit. This results in a high repetition rate of control, independent of transformer recovery time. The use of output transformers in the invention arrangement provides ready current or voltage ratio transformation to the load, as desired.

The invention control system, in operating the output transformers for no more than 50% of the control periods, thereby distributes the load between them. In this mannor, the units cool oil, as well as recover, between alternate control pulses. The result is eflicient, effective and fast control operation, with load sharing by the transformers. The individual transformer design is thus less costly as compared to designs for fast repetition response. In a similar manner, the branch control transistors share the load of the control operation. This results in the effective use of cheaper types, as germanium, as against silicon, for rapid sequencing.

Another important feature and advantage of the present invention is the stabilization of the power supply operation and demand by the branched control system hereof. The overall current requirement of the system is made substantially constant by novel control Steering of the transistor currents among the circuit sections. This results in a negligible ripple and transients in the power supply section, reducing the cost and and weight of its filtering.

It is accordingly, a primary object of the present invention to provide a novel fast-acting sequential switching system, one with a rapid repetition rate.

Another object of the present invention is to provide a novel branched control circuit with a common load or output wherein the branch components successively assume and share the control load.

Another object of the present invention is to provide a novel control circuit with a plurality of output transformers to a common load, that alternately assume rest status for full recovery and resultant rapid sequential output response.

Still a further object of the present invention is to provide a novel sequential control system with stabilized power supply current operation.

These and further objects of the present invention will become more apparent from the following description of an exemplary embodiment thereof, illustrated in the drawing in which the sole FIGURE is a schematic circuit diagram of the exemplary sequential control circuit.

The exemplary control circuit is arranged to apply cur- 3,099,787 Patented July 30, 1963 rent pulses to a load 20*, in rapid sequence if need be. A typical load contemplated herein is an inhibit Winding of a magnetic core matrix memory plane ofa digital computer. For half cycle sequential memory plane operation, current pulses of the order of 3 microseconds duration, with negligible time separation, are desirably applied to the windings (20) in a controlled pattern. The invention system effectuates such control operation with the use of transformers 21 and 22, coupled to load winding 20. As set forth hereinafter, the output coupling results in uni-directional flow to the winding 20, despite alternated cycling of the transformers 21 and 22.

The exemplary control circuit contains three PNP transistors, T T and T wherein only one may be conductive at any one time. Alternatively NPN transistors may be used with reversal of operating voltages and bias, as is understood by those skilled in the art. When no current pulse is to be impressed on load 29, input transistor T is rendered On, with a predetermined current flowing through it, and the output transistors T and T are cut Off. This is the standby mode of circuit operation. A common DC. power supply 25 contains the usual rectifier and filter sections (not shown), and is energized from a suitable A.C. source 26.

Power supply 25 has three output terminals: one (27) for +V, as 'at +22 volts; one (28) for -V, as at 22 volts; and ground (29). The emitter electrode of transistor T is connected to +V terminal 27 through resistor 3%. Its collector is returned to the V terminal 28 through resistor 31. A diode D is connected between the base electrode of transistor T and system ground to provide a fixed bias to the base, as a clamp. Thus, point 32 may be normally held, e.g. at O.8 volt bias, when no control inputs from the input AND control circuit 35 occurs. A constant or predetermined current i, thereby flows through transistor T as indicated, of magnitude determined by the circuit parameters and voltages applied by power supply 25, and the clamp diode D In this standby circuit mode, the control transistors T and T are in their cut-off region, and not conducting. Also, the standby voltage output of unit 35 is negative.

When it is desired to send a signal circuit pulse into theload (20) a positive pulse or signal is applied to the base of transistor T to drive it to cut-off. This is accomplished in the exemplary circuit by and AND control unit 35. The AND circuit 35 has a plurality of

input control lines

36, 36 which are individually controlled or pulsed. When all

lines

36, 36 receive simultaneous signals, the AND unit 35 is arranged to produce a positive output pulse (s). Positive pulse s on input control lead 33 makes the base of transistor T sufiiciently positive to cut-oil its standby current flow i with transistor T becoming non-conductive for the duration of the positive input signal s.

When transistor T is thus cut off by a positive input control pulse (s), the current i drops to zero. As current t recedes, the potential at circuit point a becomes somewhat positive with respect to ground, whereupon the

emitters

43 and 44 are so directly biased thereby. The clamp D holds point a reasonably close to ground, at positive mode when i is cut-oil. This positive value at a becomes a control signal that can initiate an output pulse through either control transistor T or T through lead 37. Which of the two branches, T or T becomes energized is determined by the concurrent selective biasing of their

bases

41 or 42. When a

base

41 or 42. is thus biased positive with respect to ground its transistor T or T remains in the cut-oil state. However, the

base

41 or 42 that is at a negative voltage with respect to ground is in condition capable of being rendered conductive by a positive; signal impressed on its associated

emitter

43 or 44.

In the exemplary circuit, the

bases

41 and 42 are alternatively biased positively and negatively, sequentially by flip-flop unit 40. In this way the T and T control branches, with output transformers 21 and 22, are assured of the aforesaid alternate cycle rest periods, as a minimum. Other modes of the selective biasing of

bases

41 and 42 are contemplated for the invention system. For the rapid repetition rate or sequencing requirements referred to, the flip-flop unit 40 is impressed with signal pulses s corresponding to those desired in the output inhibit winding 20, as to duration, wave form, and succession intervals.

Alternate pulses into input 45 of flip-flop 40 results in conventially known 'bi-stable operation, with output terminals A and B alternating between positive and negative potential states with respect to ground. Flip-flop 40 is arranged to provide alternate +V and V at its A and B output terminals. When terminal A, therefore, is at V, terminal B would be at +V; and vice versa, for successive similar pulse inputs .9 at 45. The s pulses at unit 40 are synchronized with the control pulses into AND circuit 35 at

input

36, 36. In this way the control action among transistors T T and T are coordinated for optimum action.

When terminal A is rendered negative, below ground, at V, such potential is imparted to point 46 through limiting resistor 47. In this state, the transistor base 41 becomes clamped to ground through diode D with base 41 (at point 46) being held at a suitable negative bias, e.g. at 0.3 volt. In such negatively biased mode the transistor T is in readiness to be fired or rendered conductive if the control signal impressed upon its emitter 43 is suitably positive. Such positive pulse or signal is provided at point a upon the transistor T cut-ofi when AND unit 35 produces the signals s, as set forth hereinabove.

With points a and b thus positive, namely at (+2), the emitter 43 directly ibecomes positive. Transistor T thereby conducts for the duration of the negative state at terminal A in conjunction with the duration of circuit point b being positive. This conjoint voltage action renders T conductive for these stated circuit conditions, producing the local control branch current i Concurrently, as terminal B of unit 40 is positive, due to the bistable circuit action of unit 40, base 42 and circuit point 48 are positive, and transistor T is cut-off, or rendered non-conductive. The current i may be viewed as being steered from the input transistor T branch to cross-over point b, and thence steered into the T transistor branch as i The control current i then flows through primary winding 51 of output transformer 21, and back to power supply 25 through common negative (V) return lead Alternatively, at the next successive pulse (6''), terminal B becomes negative, and A, positive. This state promptly cu ts off current i in branch T and makes base T and circuit point 48 negative. Diode D clamps base 42 to ground and renders it subject to conduction. If the T branch is simultaneously cut-off, then current i directly flows in branch T with transistor T being conductive and signal current flowing into primary transformer winding 52 and to V power return through lead 50.

When the T branch signal current i flows through primary winding 51, a corresponding current I flows in the secondary winding 53 of transformer 21. Current I flows unidirectionally through diode 54- into load 24 at its terminals 55, 55 as current I Similarly, when branch T conducts current i through primary winding 52, the corresponding current I flows in the secondary winding 56 of transformer 22. Current I flows unidirectionally through diode 57 and into load 20 as the same current I in magnitude, direction, and wave shape as from branch T Diodes 54 and 57 prevent back-flow of current I and I and keep these currents directed to the common load (20). By using the same circuit elements and parameters for the T and T control abranches one insures identical output signal action on the load 20, e.g., an inhibit winding, from both successively fired circuit section. Further, such balanced current and loading arrangement makes the current 1' in lead 37 constant whenever steered therein, as it can only become i or i When the load (20) is primarily a current responsive device, as an inhibit winding, a step-down winding ratio used at the secondary windings 53' and '56 is advantageous. Also, the indicated output connections are floated, i.e., they avoid signal ground connections. This is very practical for reset operations. An important aspect of the circuit hereof is that the successive switching between control branches T and T through the flip-flop (40) action eliminates transformer recovery time as a factor in repetition rate. The control signals or pulses impressed upon load 20 are as rapid as the transistors T and T can function.

Successive pulses, closely spaced, of the order of 2 to 3 microseconds long have been practically controlled and impressed upon inhibit Winding loads (20). In fact due to the load sharing feature of this invention, the transistors T and T cool off and recover at least for alternate pulses, and relatively inexepnsive germanium-type units are adequate for such rapid repitition rates. Similarly, no expensive design or construction for the output transformers 21 and 22 is requisite. A single transformer with a center-tapped primary may be used in place of two transformers 21 and 22. Where a common directional output is required, two secondary windings are used corresponding to windings 53 and 46 for an inhibit winding load.

Particularly practical advantages also accrue to the power supply (25) for the invention system. One important aspect is substantial uniformity of system loading or current drain on the power supply 25, regardless of the control status or mode of operation of the control circuitry. The current i from terminal 27 through resistor 3t) can be steered at circuit point a into input branch T and i or into control lead 37 as 2' Proportioning the T branch elements and parameters is preferred, so that its current i when flowing, is made substantially equal in magnitude to 1' i and i when flowing. In this way current f remains constant regardless of whether T T or T is On.

The invention circuitry thus controls or steers a steady output current i from power supply 25 in resistor 30 from standby branch T into either control branch T and T The currents i i or i can only occur independently of each other in the circuit. The control or circuit current steering rate is of the order of 0.2 to 0.3 microsecond, dependent upon the speed of the respective transistors T T and T mainly. Such switching rate is practically instantaneous. Thus, there is negligible ripple in the power supply (25) loading by this circuitry; the load current (i is substantially constant at terminal 27, as Well as at converging point 0 to the V terminal 23. The power supply (25) avoids switching transients, and has "a simple, economical, filtering requirement.

While the present invention has been described in connection with an exemplary circuit form and use, it is to be understood that variations and modifications as to its arrangement and applications may be made by those skilled in the art within the broader spirit and scope of the invention as set forth in the following claims.

I claim:

1. An electrical switching system comprising a first transistor with an impedance, a pair of transistors, output transformer means in circuit with'electrodes of said transistor pair, other electrodes of said transistor pair being coupled to said impedance for control actuation thereby upon current drop-off condition of said first transistor, means coupled to said transistor pair for alternately switching the capability of current passage through the transistors of said pair, and control means in circuit with said first transistor for impressing control signals to substantially reduce the current therethrough in correspondence therewith and effect redirection of the first transistor current into said transformer means through the alternately operable transistors of said pair.

2. An electrical switching system comprising a first transistor circuit with a load impedance connected to a power supply source, a pair of control transistors, output transformer means in circuit with like electrodes of said transistor pair, a second like set of electrodes of said transistor pair being connected to said impedance for control actuation thereby upon current cut-oif condition of said first transistor circuit, bistable means coupled to a third like set of electrodes of said transistor pair for alternately switching the capability of current passage through the transistors of said pair, and control means in circuit with said first transistor circuit for impressing control signals to cut-0E the current therethrough in correspondence therewith and eifect redirection of the first transistor circuit current intosaid transformer means through the alternately operable transistors of said pair.

3. An electrical switching system comprising a standby transistor circuit with a load resistor connected to a power supply source, a pair of control transistors, output transformer means in circuit with electrodes of said transistor pair, other electrodes of said transistor pair being connected directly to said resistor for control signal actuation thereby upon current cut-off condition of said standby transistor circuit, bistable means coupled to said transistor pair for alternately controlling the capability of current passage through the transistors of said pair, and control means in circuit with said standby transistor for impressing pulsed control signals to cut-off the standby current therethrough in correspondence therewith and effect redirection of the standby transistor circuit current into said transformer means through the alternately operable transistors of said pair, whereby the current loading on the power supply remains substantially constant during system switching operations.

4. An electrical switching system comprising a standby transistor circuit with a load impedance connected to a DC. power supply source, said transistor circuit being proportioned to normally conduct a predetermined current through said impedance, a pair of control transistors, output transformer means having two primary windings each in circuit with like electrodes of said transistor pair, a second like set of electrodes of said transistor pair being coupled to said impedance for control signal actuation thereby upon current reduction condition of said standby transistor circuit, bistable means coupled to the third electrodes of said transistor pair for alternately switching the capability of current passage through the transistors of said pair, and control means in circuit with said standby transistor for impressing control signals to substantially reduce the standby current therethrough in correspondence therewith and eifect redirection of the stand by transistor circuit current into said transformer windings through the associated alternately operable transistor of said pair, whereby the transistors of said pair effectively share the load of the output control operation.

5. An electrical switching system as claimed in claim 1, in which said control means is an AND circuit with a plurality of control inputs.

6. An electrical switching system as claimed in claim 2, in which said control means is an AND circuit with a plurality of control inputs and said bistable means is a flip-flop unit with substantial voltage outputs for its switchin g function.

7. An electrical switching system as claimed in claim 4, in which said bistable means is a flip-flop unit with substantial biasing control voltage outputs for its switching function.

8. An electrical switching system as claimed in claim 1, in which said output transformer means includes two transformers in individual circuit with a transistor of said pair, whereby each transformer shares the output loading and fully recovers in its signal translating capability between successive signal conditions.

9. An electrical switching system as claimed in claim 3, in which said output transformer means includes two pulse transformers with their primary windings in individual circuit with a transistor of said pair and a common current return path to the power supply.

10. An electrical switching system as claimed in claim 2, in which said output transformer means includes two transformers with their primary windings in individual circuit with a transistor of said pair, and the secondary windings of said transformers being interconnected for common output signal phasing to the load, whereby each transformer shares the output loading and fully recovers in its signal translating capability between successive signal conditions.

11. An electrical switching system as claimed in claim 4, in which said output transformer means includes two pulse transformers with their primary windings in individual circuit with a transistor of said pair and a common current return path to the power supply, and the secondary windings of said pulse transformers being interconnected for common output signal phasing to the load with diodes in circuit therewith to prevent winding interaction, where each pulse transformer shares the output loading and fully recovers in its signal translating capability between successive signal conditions.

12. An electrical switching system comprising a first transistor circuit with an impedance, said first transistor circuit being and normally biased to have a predetermined standby current flow, a second circuit containing a plurality of transistors and a load element connected to a first electrode of each of the transistors thereof, a second electrode of each of said transistors being coupled to said impedance for control actuationby said first circuit means connected to each of said transistors for selectively controlling their conducting capability, and control means coupled with said first transistor circuit for impressing control signals thereon to effect an input control on said second electrodes and effectively redirect the standby current through the transistor that is coincidentally controlled by said means and thereby into its associated load element.

13. An electrical switching system comprising a first transistor circuit with an impedance and normally biased to have a predetermined standby current flow, a second transistor circuit containing a plurality of transistors and a load element connected to a first like electrode of each of the transistors thereof, a second like electrode of each of said transistors being coupled to said impedance for control actuation by said first circuit, selective biasing means connected to a third like electrode of each of said transistors for selectively controlling their conducting capability, and control means coupled with said first transsistor circuit for impressing control signals thereon that substantially cut-01f its standby current flow to effect an input :control of said second like electrodes of said second transistor circuit and effectively redirect the standby current through the transistor of said second transistor circuit that is coincidentally controlled by said selective biasing means and thereby into its associated load element.

References Cited in the file of this patent UNITED STATES PATENTS 2,881,332 Jensen Apr. 7, 1959

Claims

4. AN ELECTRICAL SWITCHING SYSTEM COMPRISING A STANDBY TRANSISTOR CIRCUIT WITH A LOAD IMPEDANCE CONNECTED TO A D.C. POWER SUPPLY SOURCE, SAID TRANSISTOR CIRCUIT BEING PROPORTIONED TO NORMALLY CONDUCT A PREDETERMINED CURRENT THROUGH SAID IMPEDANCE, A PAIR OF CONTROL TRANSISTORS, OUTPUT TRANSFORMER MEANS HAVING TWO PRIMARY WINDINGS EACH IN CIRCUIT WITH LIKE ELECTRODES OF SAID TRANSISTORS PAIR, A SECOND LIKE SET OF ELECTRODES OF SAID TRANSISTOR PAIR BEING COUPLED TO SAID IMPEDANCE FOR CONTROL SIGNAL ACTUATION THEREBY UPON CURRENT REDUCTION CONDITION OF SAID STANDBY TRANSISTOR CIRCUIT, BISTABLE MEANS COUPLED TO THE THIRD ELECTRODES OF SAID TRANSISTOR PAIR FOR ALTERNATELY SWITCHING THE CAPABILITY OF CURRENT PASSAGE THROUGH THE TRANSTORS OF SAID PAIR, AND CONTROL MEANS IN CIRCUIT WITH SAID STANDBY TRANSISTOR FOR IMPRESSING CONTROL SIGNALS TO SUBSTANTIALLY REDUCE THE STANDBY CURRENT THERETHROUGH IN CORRESPONDENCE THEREWITH AND EFFECT REDIRECTION OF THE STANDBY TRANSISTOR CIRCUIT CURRENT INTO SAID TRANSFORMER WINDINGS THROUGH THE ASSOCIATED ALTERNATELY OPERABLE TRANSISTOR OF SAID PAIR, WHEREBY THE TRANSISTORS OF SAID PAIR EFFECTIVELY SHARE THE LOAD OF THE OUTPUT CONTROL OPERATION.