US3044147A - Semiconductor technology method of contacting a body - Google Patents

Semiconductor technology method of contacting a body Download PDF

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US3044147A
US3044147A US807857A US80785759A US3044147A US 3044147 A US3044147 A US 3044147A US 807857 A US807857 A US 807857A US 80785759 A US80785759 A US 80785759A US 3044147 A US3044147 A US 3044147A
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aluminum
region
transistor
layer
semiconductor
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US807857A
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Harold L Armstrong
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Pacific Semiconductors Inc
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Pacific Semiconductors Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/033—Diffusion of aluminum
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/035—Diffusion through a layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/923—Diffusion through a layer

Definitions

  • This invention relates to electrical devices, and more particularly to a method for providing closely spaced electrodes in an electrical device. This invention also relates to electrical devices having closely spaced electrodes upon at least one surface thereof.
  • a layer of electrically conductive material is applied to a portion of one surface of a bod'y.
  • the material is alloyed with the body to cause it to penetrate intothe body.
  • An insulative layer of material is formed upona protrusion remaining at the body surface and thereafter a layer of electrically conductive metal is applied to the surface of the body and over the insulative layer.
  • a device in accordance with the present invention, includes a body having an electrically conductive material alloyed with at least a portion of one surface thereof. A layer of insulative material is provided upon the alloy and a layer of metal is provided upon the surface of the body and over the insulative material.
  • junction-type semiconductor device in accordance with the present invention includes first and second regions of opposite conductivity type sepa;
  • a heavily doped region having a conductivity type the same as the second region ex# tends through the first region yand* tinto the second region and has a protrusion molecularly aixed thereto.
  • the protrusion has a layer of insulative material upon it.
  • a layer of metal is provided upon the surface of the body and over the insulative layer.
  • FIG. 1 is a cross-sectional view of a semiconductor device upon which the method of ther present invention is to be carried out;
  • FIG. 2 is a schematic representation of the function of the apparatus which may be used in practising the method of .the present invention
  • FIG. 3 is a top viewof a semiconductor device after the rst step in the method ofthe present invention has been carried out
  • FIG. 4 is a cross-sectional view of .the semiconductor device as illustrated in FIG. 3;
  • FIG. 5 is a cross-sectional view after the next succeed-A ing lstep of the method of the present invention has been carried out;
  • FIG. 6 is a cross-sectional view of a semiconductor device lafter each of the steps of the present invention have been carried out;
  • FIG. 7 is a cross-sectional View illustrating a finished.
  • FIG. 8 is a cross-sectional -view illustrating another ernbodiment of a device in accordance with the present inxtention;andY .l'
  • FIG. 9 is a schematic representation of a semiconductor device as illustrated ⁇ in FIG. 6.
  • a semiconductor transistor generally designated as 10'Which includes ⁇ an emitter region 11, ka base region 12, and a collector region 13. As illustrated, and by way of example, the transistor as shown is an N-P-N type transistor.
  • the semiconductor device as killustrated in FIG. l is a transistor of the N-P-N type
  • the method of the present invention is applicable to many types of Ibodies to which contact is to be made ⁇ and to transistors of the P-N-P type and. is as well applicable to other semiconductor devices such as diodes, thermistors, resistors, photocells, and the like.
  • the description of the method of the present invention will be described in connection with an N-P-N transistor of the silicon type. It should also be expressly understood that the method of the present invention is applicable to semiconductor de- 'vices constructed from materials other than silicon.
  • Examples of additional materials lfrom which semiconductor devices may be made are germanium, germanium-silicon' alloys and the inter-metallic compounds such as, by Vway of example only, gallium-arse'nide, indium-phosphide and the like. f f
  • the transistor as illustrated in FIG. 1, may be constructed by the well known diffusion process.
  • a P-type silicon body is placed within an open or closed tube type furnace.
  • a gaseous medium is providedY in .the tube and around the semiconductor body.
  • the gaseous medium v will contain an active impurity type material which will diffuse into all surfaces of the semiconductor body and which will convert the exterior regions thereof to the opposite, or N-type, conductivity.
  • 'Ihe diffusion process has been fully' 'disclosed in the literature and is well known to the art. i l,
  • the semiconductor body is then formed into the configuration as shown in FIG. l by removing the edgeportions thereof by dining, lapping, or the like, thus, leaving first ⁇ and second regions of N-type conductivity separated by an intermediateregion of P-type conductivity as illustrated.
  • i Y f After formation of the transistor, a mask is then placed adjacent the emitter region thereof as illustrated at 14 in FIG. 2, yto which referencey is hereby made.
  • ⁇ 'Ilhe'masking material may be any which is .presently well known to the art, such as, for example, nickel, molybdenum, ⁇ tantalum, graphite, or the like.
  • nickel isutilizedas the masking material.
  • the masking material is constructed in such a manner that openings xare provided therein to expose a predetermined portionrofrthe surface of the semiconductor body upon which the mask -14 is placed.
  • the transistor is placed within an 4apparatus which is vadapted to apply jan electrically Vaofi/1,14*?
  • the electrically conductive Vmaterial is applied through the openings in the maskrand upon the surface of the emitter region 11 as illustrated by the arrows 16 extending from the source 15.
  • the electrically conductive material is a metal and preferably is aluminum.
  • the material which is ⁇ deposited upon or applied to the surface of the Semiconductor device must be capable of dissolving the particular semiconductor material when heated in combination therewith. Although other metals such as bismuth and tin arecapable of dissolving semiconductor material, it has been found preferable in practicing the present invention to utilize aluminum which readily dissolves bothsilifcon and germanium.
  • the aluminum is preferably applied to theY semiconductorV body by vapor deposition in a vacuum while maintaining the temperature of the semiconductor body 1() above the eutectic temperature of aluminum and silicon and preferably at approximately 800 C.
  • the aluminum may be applied by evaporating through the mask directly upon the semiconductor body without raising the temperature of the Vsemiconductor body.
  • the temperature of the semiconductor body 10 is raised to the desired level by applying a source of po-V tential to vthe heating device 17 to cause heat to be applied therefrom to the semiconductor body 10 as illustrated by the lines 18 in FIG. 2. As long as an electrical potential is applied to the heating device 17, the temperature of the semiconductor body 10 will be maintained at the desired level.
  • the temperature of the semiconductor body 101 is main- ⁇ tained in excess of the eutectic temperature of'silicon and lustrated the pattern which the evaporated aluminum' asconductive material through the openings in the mask f l sumes Vafter passing through the openings in the mask 14 onto the surface of the emitter region 11 of the transistor 10.
  • the evaporated aluminum assumes a configuration similar to a bar having a series of elongated protrusions or fingers along one surface. thereof and extending across a ⁇ major portion of the surface of'the emitter region 11 of .the transistor 10.- Al# though five of these protrusions are illustrated in FIG.
  • each of the ngers should be approximately one to twentymicrons in thickness and approximately one to ten mils in width.
  • the coniiguration'of material as illustrated at 21 in FIG. 3 may valsobe obtained, in addition to evaporation through a mask, by way of spraying molten valuminum onto the surface, or by pre-forming Va solid blank of material and placing this blank upon the surface of the semiconductor body prior to heating the combination.
  • the congura tion of the aluminum shown at 21 in FIG. 3 is the pre-V ferred embodiment in accordance with the method of the pres/ent invention, it may vary in accordance with any particular design configuration. For example, a bar of material could be provided across the center of the tran# sistor with the fingers extending from each side thereof. Other configurations will become readily apparent to those skilled in the art.
  • FIG. 4 is a cross-sectional view taken along the line 4 4 of FIG. 3, it is seen that the aluminum has penetrated into the semiconductor body as illustrated by dashed lines 23. As hereinabove described, this penetration is accomplished by maintaining the temperature of the semiconductor body and the aluminum material deposited thereon at a temperature above the eutectic temperature of silicon and aluminum.
  • the temperature at which the combination of the aluminum and silicon is maintained causes the aluminum to remain or become molten and to dissolve portions of the silicon semiconductor body with which it is in contact. As the aluminum dissolves the semiconductor material, it penetrates into the semiconductor body. The depth of penetration is controlled by the particular temperature and the amount of time during which this temperature is maintained. As illustrated by the terminus 24 of the dashed lines 23 in FIG. 4, the desired depth of penetration is completely through the emitter region 11 of the transistor and into the base region 12 thereof. When applying contacts to a silicon transistor which is approximately one-half inch square and .O05 inch in thickness and with the thickness of aluminum, temperature and time as above set forth, the amount of penetration as illustrated in FIG. 4 will occur.
  • the heat is removed from the silicon transistor and it is allowed to cool.
  • rate of cooling is not considered a critical parameter, it has been found that a cooling rate of approximately 0.2" C. per second gives satisfactory results.
  • a portion of the dissolved silicon precipitates from the molten aluminumsilicon solution and regrows onto the parent semiconductor body and in so doing follows the crystalline planes present in the parent semiconductor body..
  • the temperature of the combination of aluminum and silicon goes below the eutectic temperature of silicon and aluminum, the remaining molten portion of the aluminum-silicon solution freezes out as an aluminum-silicon alloy which is predominantly aluminum.
  • the resulting structure as illustrated in FIG. 4 consists of a silicon transistor as illustrated in FIG. 1 with regions of very low resistivity P-type silicon material eX- tending through the emitter region and into the base region as illustrated by the dashed lines 23 as shown in FIG. 4.
  • the low resistivity is a result of the use of aluminum as the metal which is deposited upon the sur- :face of the semiconductor body 1t).
  • This aluminum is, as is well known in the art, an active impurity of the P- type which is capable of doping semiconductor material.
  • a material may be added which is a P-type active impurity, for example, gallium, indium, aluminum, or boron from column III, of the periodic table as arranged according to Mendeleev.
  • P-type active impurities such as phosphorous, arsenic, antimony, or bismuth from column V of the periodic table may be selected and added to the material which is deposited upon the surface of the transistor 10.
  • aluminum which is heavily doped with one of the N-type active impurities may be deposited upon the surface of a P-N-P transistor and the remaining steps of the method of the present invention carried out to provide the desired contact.
  • This contact would be constituted by that portion of the dashed line 23 which extends into the base region 12 as illustrated by the dashed portion 24 thereof. ,Since the emitter region 11 is of sN-type conductivity and the low resistivity region is of P-type conductivity, a rectifying contact is established between these two areas.
  • the low resistivity region that is formed must have the same conductivity type as the base region and opposite conductivity type to that of the emitter region.
  • the molten alumin'urri may penetrate completely through the base region and contact the collector region. If this should occur, the resulting device would be operative since a rectifying contact would occur between the low resistivity P-type region and the N-type collector region of the transistor. For optimum results, however, this should not be allowed to occur since it will decrease the amount of contact between the low resistivity region and the base region of the transistor, thereby decreasing the amount of voltage which can be supported by the contact structure.
  • the transistor includes an N-type emitter region' 41, a P-type base region 42 and an N-type collector region 43.
  • a junction 46 separates the base region 42 and the collector region 43. ⁇ A junction also separates the base and emitter regions but it may be viewed in a slightly different'manner.
  • the metal which is applied to the surface of' the emitter region is caused to penetrate through the Vemitter region and into the base region to thereby provide a base contact at the surface' of the device.
  • This may also be looked upon as causing the base region 42 to extend in an upward direction through the emitterregion 41 and to the surface of the device as shown at 44.
  • the base region 42 therefore includes upwardly extending portions 44 as shown in FIG. 9; Such a lstructure clearly increases the contact surface be-y tween the emitter and base regions.
  • the junction separating the emitter and base region is then as shown at 47.
  • the extended portions 44 of the base region 42 are heavily doped and of low resistivity as above described which is designated by the P+ appearing therein.
  • the P-jportion extends into the base region 42 as shown by dashed lines 45 to accomplish the desired contact therewith.
  • a slightly higher barrier will exist between the N region 41 and the P
  • FIG. 5 there is illustrated the ⁇ structure of FIG. 4 and in addition a layer of insulative material 31 is provided upon the aluminum rich alloy material 21 extending above the surface of they emitter region 11 of the ⁇ transistor 10. As is illustrated in FIG. 5, this region is in tlhe physical configuration of a protrusi-on above the surface of the transistor.
  • this insulative layer may be aluminum' order to form the base electrode to the transistor 10, the
  • insulative layer may be provided in other manners.
  • insulating material may be applied which completely. covers the metallic protrusions extending above the surface of a semiconductor' body.
  • Such insulatinglmaterial may be applied for example, through a mask, by painting, or other well known methods.
  • the present invention is to provide an electrically conductive layereof material Vupon the exposed o emitter portions of the .transistor 10. ⁇ Such a layer of material is 'as illustrated inFIG. 6.
  • the electrically conductive material which is illustrated at 32 in FIG. 6, may be applied ltdthe emitter region 11 of Vthe transistor 10 by evaporating fthe material 32 upon substantially the entire surface of thesemi-conductive body including the protrusions having the insulative ymaterial 311 thereo'ver.
  • any suitable material may be utilized to provide the layer 32 which is electrically conductive and which will provide godlohmi-c contact to the surface of .the emitter region 11:.
  • the semiconductor body is preferably ⁇ heated during this,evaporation.Y InV thealternative, l-ayer of material 32 m'ay be applied lupon :the surface by means well known to the art other than evaporating such as electroless plating, 'chemicalV reduction, land the like.
  • Types of material which may be utilized and which meet the requirements for 'the emitter ⁇ Contact material .32 are for example, silver, gold, nickel, copper, Vand the like, or
  • This l' may be accomplished by ab'radi'rig 'that portion or infth'ealternative', by applying a small mask to thejdesired aeaprior 'tothe deposition of the materials 31 and 32t
  • 4the lspacing between the emitter and 'the .base electrodes is 'exceedingly 'close' and is de-V termined only by the thickness of the insulative layer 31 which vis applied as illustrated in FIG. ⁇ 5.
  • l Therefore, spacing between emitter and base electrodes of approximately .0002 render readily yaccomplished ⁇ in"accorda.uce with the method' of the present invention, thereby providing a transistor which will give optimum results.
  • FIG. 8 there'is 'illustrated a body 33 of P-type semiconductor material which may be used as a'zresistor or Vthe like. Contacts to portionsof the body 33 have been made by yalloying a metal thereto as hereinabove described and as illustrated at 34 to provide a region of like conductivity type.V VThe alloying has providedohmic contact to the Ibody 33 illustrated by dashed linesm3l.V ⁇ insulativelayer of material 35 'is provided over the pro-trusions 34 and m-ay be aluminum oxide.v A layer 36 of conductive metal is then placed over the entire surface of the body 33 including the insulative oxide vlayer to provide electrical contact directly to body 33.
  • the method of providing closely spaced contacts upon atleast one surface of a body comprising the steps of: applying a contact to one surface of a body; providing a layer of insulative material upon said contact; applying a layer of electrically conductive material upon said one surface and over said insulative layer; removing a predetermined portion of said layer of electrically conductive material and of said insulative layer to expose a surface of said contact; and, ohmically bonding an electrical lead to said exposed surface of said contact.
  • the ymethod of providing closely spaced contacts upon'at least one surface of a semiconductor body comprising the steps of: alloying an electrically conductive material with at least a portion of one surface of a semiconductor body, forming a layer of insulative kmaterial only upon that portion of said alloyed material ertnding above said one surface; and applying a layer of electrically conductive material upon said surface and over said insulative layer.
  • the -m'ethod of providing closely spaced electrodes for-a semiconductor body containing a P-N junction comprising the steps of .providing a semiconductor body having'at least a region of one conductivity type separated Yfrom a region of the opposite conductivity by a P-'N junction; applying a solvent metal containing conductivity type determining atoms 'of said opposite conductivity type to a predetermined portion of said one conductivity type region of said semiconductor body, heating the combination to a temperature to cause said solvent metal to penetrate through said one vconductivity type'region andirto ysaid opposite conductivity Vtype region; cooling the combination to provide Yan area consisting predominantly of said solvent mtal 'upon said semi-conductor body; providing an iusulative oxide layer upon fsaidsolvent metal area; and depositing a layer of electrically conductive metal upon said one conductivity type region of said semi-conductor body.
  • the method of providing closely spaced contacts upon one major surface of a semiconductor body comprising the steps of: applying aluminum to a predetermined portion of said surface; heating the combination to cause said aluminum to penetrate through said first region and into said second region while retaining an area consisting predominantly of aluminum at said surface; cooling the combination; providing a layer of aluminum oxide on gsaid area of aluminum; and applying a layer of electrically conductive metal upon said surface and over said aluminum oxide.
  • the method of providing close spaced emitter and base electrodes on N-P-N transistors comprising the steps of: providing an N-P-N transistor having emitter, base, and collector regions; depositing a layer of aluminum upon predetermined portions of the emitter region of said transistor; heating the combination to a temperature above the eutectic temperature of said transistor and said aluminum to cause said aluminum to dissolve a portion of said transistor; maintaining said temperature above the eutectic temperature for a time sufficient to permit said aluminum to penetrate into said transistor and at least contact said base region; cooling the combination to provide an area on a portion of said.
  • emitter region consisting predominantly of aluminum; anodizing said area of aluminum to provide a layer of aluminum oxide thereupon having a thickness of the order of 0.2 mil; depositing a layer of electrically conductive metal upon said emitter region including said alurm'num area; and attaching leads to said aluminum area and said metal layer to provide base and emitter leads, respectively for said transistor.
  • the method of providing closely spaced emitter and base electrodes upon one major surface of a silicon transistor having N-type emitter and collector regions separated by a P-type base region comprising the steps of: applying a photo emulsion to said surface of said silicon transistor; exposing a predetermined portion of said emulsion; removing the unexposed portion l@ t Y of said emulsion from said surface; vapor depositing aluminum upon said surface of said silicon transistor; etching said transistor to remove that portion of aluminum which covers said exposed emulsion along with said emulsion; heating said transistor and said aluminum tol a temperature exceeding the silicon-aluminum eutectic temperature to cause the aluminum to penetrate through the emitter region and into the base region; cooling the combination to provide an area consisting predominantly of aluminum upon said surface and to provide an ohmic contact with said base region and a rectifying contact with said emitter region; treating at least said surface to provide a layer of aluminum oxide upon said area of aluminum; and depositing a layer of electrical
  • the method of providing closely spaced contacts upon at least one surface of a semiconductor body comprising the steps of: molecularly bonding an electrically conductive material to a predetermined surface portion of a semiconductor body forming a layer of insulative material upon said electrically conductive material, and applying a layer of electrically conductive material upon the surface of said semiconductor body and over said insulating layer.
  • the method of providing closely spaced contacts upon at least one surface ⁇ of ia semiconductor body comprising the steps of: alloying an electrically conductive material with at least a portion of one surface of a semiconductor body, forming a layer of insulative material only upon that portion of said alloyed material extending above said one surface, applying a layer of electrically conductive material upon said surface and over said insulative layer, removing a predetermined portion of said layer of electrically conductive material and of said insulative layer to expose a surface portion of said alloyed electrically conductive material, and bonding an electrical lead in ohmic contact with said exposed surface portion of said electrically conductive material.
  • the method of providing closely spaced contacts upon at least one surface of a semiconductor body comprising the steps of: alloying aluminum with at least a portion of one surface of a semiconductor body, forming a layer of aluminum oxide upon said alloy, applying a layer of electrically conductive material upon said surface and over said oxide, removing a predetermined portion of said layer of electrically conductive material and of said layer of aluminum oxide to expose a surface portion of said alloyed aluminum, and bonding an electrical lead in ohmic contact With said exposed surface portion of said alloyed aluminum.
  • the method of providing closely spaced contacts uponrone major surface of a semiconductor body, including rst and second regions of opposite conductivity type separated by a P-N junction comprising the steps of: applying a solvent metal to a predetermined portion of said surface; heating the combination to ⁇ cause said solvent metal to penerate through said first region and into said second region; cooling the combination to provide an area of said solvent metal at said surface and an ohmic contact with said second region and a rectifying contact with said first region; providing an insulative metallic composition upon said area of said solvent metal; applying a layer of electrically conductive material upon substantially the entire area of said surface; removing a predetermined portion of said layer of electrically conductive material and of said insulating metallic composition 'to expose a predetermined surface portion of said solvent metal; and, bonding an electrical lead in ohmic contact with said exposed surface portion of said solvent metal.
  • said method comprising vthe steps of: applying aluminum to a predetermined portion of Vsaid surface;heating the combination to cause said aluminum to penetrate through said first region and into said second region While-retainngan area consisting predominantlyof aluminum at said surface; cooling the combination; providing a layer of aluminum oxide on said area ofaluminum; applying a layer of electrically conductive metal upon said surface and over said ⁇ aluminum oxide; ⁇ removing a predetermined portion of said layer of electrically conductive metal and of said aluminum oxide to expose a surface portion of said aluminum; and,

Description

July 17 H. L. ARMSTRONG SEMICONDUCTOR TECHNOLOGY METHOD OF CONTCTING A BODY Filed April 2l, 1959 Matig 2! ma@ 5f mmm. 37...
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IN V EN TOR.
BYMMM United States Patent vi() 3,044,147 SEMICONDUCTOR TECHNOLOGY METHOD OF CONTACTING A BODY Harold L. Armstrong, Kingston, Ontario, Canada, as-
signor to Pacific Semiconductors, Inc., Lawndale, Calif., a corporation of Delaware Filed Apr. 21, 1959, Ser. No. 807,857
Claims. (Cl. 29--25.3)
This invention relates to electrical devices, and more particularly to a method for providing closely spaced electrodes in an electrical device. This invention also relates to electrical devices having closely spaced electrodes upon at least one surface thereof.
It has long been desirable in the Asemiconductor art to produce transistors'capable of carrying relatively large currents. While this has been accomplished in some instances by increasing the size of the semiconductor body from which the transistor is manufactured, it remains de- ,sirable to produce a transistor of relatively small size which has a low base resistance and thereby is capable of carrying large currents. In order to accomplish this -it has been recognized that the emitter electrode should have a substantial amount of contact with the base region and at the same time should be as closelyspaced to the base electrode as is physically possible.
A structurejto meet the above requirements has in the past been attempted by alloying concentric rings of metal into the surface of the semiconductor body from which the transistor has been made. Typical examples of such a structure may be found by referring to volume 45 of Proceedings of the I.R.E., page `544 in an article by N. AH. Fletcher, published in 1957. While devices having such a structure as above disclosed work quite well under "some circumstances, it has been found that it is exceed- Iingly diicult to control the close spacing between the concentric contact rings. It has also been found that during the alloying step, the material which is being utilized to form adjacent rings has a tendency to dissolve 'laterally through the semiconductor material and cause the adjacent rings to come into contact with each other, thereby shorting out the various regions of the transistor.
YIn addition to the above diiculties, when the concentric structure is utilized, and particularly when several of the narrow rings are required in order to obtain the desired amount of contact, it becomes necessary to physically attach leads for electrical connection to' each of the concentric rings which are alloyed to the semiconductor device. If a great number of the rings are utilized, this necessitates additional steps in the process of manufacture, thereby greatly increasing the cost of the device. If a large number of the rings are utilized, it becomes exceedingly diicult to make the proper electrical connections thereto and also causes the end product to be quite fragile. Furthermore, in constructing such electrical devices as resistors and the like it often becomes necessary to provide electrical contact to closely spaced regions of the device body. By using prior art techniques it is exceedingly diicult to obtain very close spacing of contacts and in some cases almost impossible.
Accordingly, it is an object of the present invention to provide a method of making closely spaced contacts to a surface of an electrical device.
It is another object of the present invention to provide a method for making semiconductor devices which are capable of carrying a relatively heavy current. Y It is another object of the present invention to provide a method for making semiconductor devices having electrodes more closely spaced than heretofore-possible, while at the same time providing a large amount of contact to the desired portions of the semiconductor device.
It is yet another object of the present invention to pro- Mce vide a methodfor making more ecient high-current carrying capacity transistors.
It is still another object of thepresent invention to provide a method for making semiconductor devices having closely spaced electrodes which provide a large amount of contact to desired portions of the semicon-Z ductor body and at the same time requires only a single connection to each of the regions of the semiconductor device. Y l
It is a further object of the present invention to provide a method for making transistors which have the emitter and base electrodes thereof located' upon fone sur' face of the transistor and spaced close to each other.
It is a further object of the present invention to pro-l vide a transistor capable of carrying greater currents than heretofore possible with transistors of comparable size.-
It is yet a further object of the present invention to provide an electrical device having closely spaced electrodes located on one surface thereof.'
It is yet a further object of the present invention to provide a transistor having the emitter and base elec-y trodes closely spaced and located upon one major surface thereof.
In accordance with the method of the present invention; a layer of electrically conductive material is applied to a portion of one surface of a bod'y. The material is alloyed with the body to cause it to penetrate intothe body. An insulative layer of material is formed upona protrusion remaining at the body surface and thereafter a layer of electrically conductive metal is applied to the surface of the body and over the insulative layer.
Also in accordance with the present invention, a device includes a body having an electrically conductive material alloyed with at least a portion of one surface thereof. A layer of insulative material is provided upon the alloy and a layer of metal is provided upon the surface of the body and over the insulative material. f
More specifically, a junction-type semiconductor device in accordance with the present invention includes first and second regions of opposite conductivity type sepa;
rated by a P-N junction. A heavily doped region having a conductivity type the same as the second region ex# tends through the first region yand* tinto the second region and has a protrusion molecularly aixed thereto.. The protrusion has a layer of insulative material upon it. A layer of metal is provided upon the surface of the body and over the insulative layer. j
Other and more specific objects of the present invention will become apparent from a consideration of the following description taken in conjunction with the accompanying drawing, which is presented by -wayof vexample only7 and is not intended -as a limitation upon the nolvel features of this invention which are .set forth in the appended claims, and in which: j
FIG. 1 is a cross-sectional view of a semiconductor device upon which the method of ther present invention is to be carried out;
FIG. 2 is a schematic representation of the function of the apparatus which may be used in practising the method of .the present invention; FIG. 3 is a top viewof a semiconductor device after the rst step in the method ofthe present invention has been carried out; FIG. 4 is a cross-sectional view of .the semiconductor device as illustrated in FIG. 3;
FIG. 5 is a cross-sectional view after the next succeed-A ing lstep of the method of the present invention has been carried out;
FIG. 6 is a cross-sectional view of a semiconductor device lafter each of the steps of the present invention have been carried out;
FIG. 7 is a cross-sectional View illustrating a finished.
semiconductor device in accordance the present in-d vention;
FIG. 8 is a cross-sectional -view illustrating another ernbodiment of a device in accordance with the present inxtention;andY .l'
FIG. 9 is a schematic representation of a semiconductor device as illustrated `in FIG. 6. Y Referring now to the drawing, land more particularly to FIG; l thereof, there is shown a semiconductor transistor generally designated as 10'Which includes `an emitter region 11, ka base region 12, and a collector region 13. As illustrated, and by way of example, the transistor as shown is an N-P-N type transistor.
Although the semiconductor device as killustrated in FIG. l is a transistor of the N-P-N type, it should be expressly understood that the method of the present inventionis applicable to many types of Ibodies to which contact is to be made `and to transistors of the P-N-P type and. is as well applicable to other semiconductor devices such as diodes, thermistors, resistors, photocells, and the like. For purposes of illustration only, the description of the method of the present invention will be described in connection with an N-P-N transistor of the silicon type. It should also be expressly understood that the method of the present invention is applicable to semiconductor de- 'vices constructed from materials other than silicon. Examples of additional materials lfrom which semiconductor devices may be made are germanium, germanium-silicon' alloys and the inter-metallic compounds such as, by Vway of example only, gallium-arse'nide, indium-phosphide and the like. f f
The transistor as illustrated in FIG. 1, may be constructed by the well known diffusion process. For example, a P-type silicon body is placed within an open or closed tube type furnace. A gaseous medium is providedY in .the tube and around the semiconductor body. The gaseous medium vwill contain an active impurity type material which will diffuse into all surfaces of the semiconductor body and which will convert the exterior regions thereof to the opposite, or N-type, conductivity. 'Ihe diffusion process has been fully' 'disclosed in the literature and is well known to the art. i l,
The semiconductor body is then formed into the configuration as shown in FIG. l by removing the edgeportions thereof by dining, lapping, or the like, thus, leaving first `and second regions of N-type conductivity separated by an intermediateregion of P-type conductivity as illustrated. i Y f After formation of the transistor, a mask is then placed adjacent the emitter region thereof as illustrated at 14 in FIG. 2, yto which referencey is hereby made.` 'Ilhe'masking material may be any which is .presently well known to the art, such as, for example, nickel, molybdenum,` tantalum, graphite, or the like. In the presently preferred embodiment voi this invention, nickel isutilizedas the masking material.` The masking material is constructed in such a manner that openings xare provided therein to expose a predetermined portionrofrthe surface of the semiconductor body upon which the mask -14 is placed.
After the mask 14 is in place adjacent the emitter region 11 ofthe transistor 10, the transistor is placed within an 4apparatus which is vadapted to apply jan electrically Vaofi/1,14*?
4 ductor-s For Signal Translating Devices, issued Novem# ber 30, 1954 to M. Sparks.
After the semiconductor body is positioned Within the apparatus as illustrated in FIG. 2, the electrically conductive Vmaterial is applied through the openings in the maskrand upon the surface of the emitter region 11 as illustrated by the arrows 16 extending from the source 15. In the presently preferred embodiment of the present invention wherein an N-P-N silicon transistor, as'illus trated in FIG. ll, is utilized, the electrically conductive material is a metal and preferably is aluminum.
The material which is`deposited upon or applied to the surface of the Semiconductor device must be capable of dissolving the particular semiconductor material when heated in combination therewith. Although other metals such as bismuth and tin arecapable of dissolving semiconductor material, it has been found preferable in practicing the present invention to utilize aluminum which readily dissolves bothsilifcon and germanium.
The aluminum is preferably applied to theY semiconductorV body by vapor deposition in a vacuum while maintaining the temperature of the semiconductor body 1() above the eutectic temperature of aluminum and silicon and preferably at approximately 800 C. In thel alternative, the aluminum may be applied by evaporating through the mask directly upon the semiconductor body without raising the temperature of the Vsemiconductor body. The temperature of the semiconductor body 10 is raised to the desired level by applying a source of po-V tential to vthe heating device 17 to cause heat to be applied therefrom to the semiconductor body 10 as illustrated by the lines 18 in FIG. 2. As long as an electrical potential is applied to the heating device 17, the temperature of the semiconductor body 10 will be maintained at the desired level.
After the aluminum is applied to the surface thereof,.
the temperature of the semiconductor body 101 is main-` tained in excess of the eutectic temperature of'silicon and lustrated the pattern which the evaporated aluminum' asconductive material through the openings in the mask f l sumes Vafter passing through the openings in the mask 14 onto the surface of the emitter region 11 of the transistor 10. As is illustrated in FIG. 3, the evaporated aluminum assumes a configuration similar to a bar having a series of elongated protrusions or fingers along one surface. thereof and extending across a `major portion of the surface of'the emitter region 11 of .the transistor 10.- Al# though five of these protrusions are illustrated in FIG. 3, one skilled in the art can readily see that fewer or additional lringers may be utilized depending upon the particular application and the amount of current for which the transistor is being designed. It should also be understood that the evaporated aluminum may be deposited in discrete regions upon the region 11 in order to form a series `of individual contacts to the body. 'For the best results with reference to the current carrying capacity of the transistor, the dimensions of each of the ngers should be approximately one to twentymicrons in thickness and approximately one to ten mils in width. I
The coniiguration'of material as illustrated at 21 in FIG. 3 may valsobe obtained, in addition to evaporation through a mask, by way of spraying molten valuminum onto the surface, or by pre-forming Va solid blank of material and placing this blank upon the surface of the semiconductor body prior to heating the combination. It should also be expressly understood that although the congura tion of the aluminum shown at 21 in FIG. 3 is the pre-V ferred embodiment in accordance with the method of the pres/ent invention, it may vary in accordance with any particular design configuration. For example, a bar of material could be provided across the center of the tran# sistor with the fingers extending from each side thereof. Other configurations will become readily apparent to those skilled in the art.
Referring now more particularly to FIG. 4, which is a cross-sectional view taken along the line 4 4 of FIG. 3, it is seen that the aluminum has penetrated into the semiconductor body as illustrated by dashed lines 23. As hereinabove described, this penetration is accomplished by maintaining the temperature of the semiconductor body and the aluminum material deposited thereon at a temperature above the eutectic temperature of silicon and aluminum.
The temperature at which the combination of the aluminum and silicon is maintained causes the aluminum to remain or become molten and to dissolve portions of the silicon semiconductor body with which it is in contact. As the aluminum dissolves the semiconductor material, it penetrates into the semiconductor body. The depth of penetration is controlled by the particular temperature and the amount of time during which this temperature is maintained. As illustrated by the terminus 24 of the dashed lines 23 in FIG. 4, the desired depth of penetration is completely through the emitter region 11 of the transistor and into the base region 12 thereof. When applying contacts to a silicon transistor which is approximately one-half inch square and .O05 inch in thickness and with the thickness of aluminum, temperature and time as above set forth, the amount of penetration as illustrated in FIG. 4 will occur.
After the desired penetration has been accomplished, the heat is removed from the silicon transistor and it is allowed to cool. Although the rate of cooling is not considered a critical parameter, it has been found that a cooling rate of approximately 0.2" C. per second gives satisfactory results. When this is done, a portion of the dissolved silicon precipitates from the molten aluminumsilicon solution and regrows onto the parent semiconductor body and in so doing follows the crystalline planes present in the parent semiconductor body.. As the temperature of the combination of aluminum and silicon goes below the eutectic temperature of silicon and aluminum, the remaining molten portion of the aluminum-silicon solution freezes out as an aluminum-silicon alloy which is predominantly aluminum.
The resulting structure as illustrated in FIG. 4 consists of a silicon transistor as illustrated in FIG. 1 with regions of very low resistivity P-type silicon material eX- tending through the emitter region and into the base region as illustrated by the dashed lines 23 as shown in FIG. 4. The low resistivity is a result of the use of aluminum as the metal which is deposited upon the sur- :face of the semiconductor body 1t). This aluminum is, as is well known in the art, an active impurity of the P- type which is capable of doping semiconductor material. If a lower resistivity than that which is possible by 4utilizing aluminum is desired, or if a metal other than aluminum is deposited from the source 15 as hereinabove described upon the surface of the semiconductor body 10, a material may be added which is a P-type active impurity, for example, gallium, indium, aluminum, or boron from column III, of the periodic table as arranged according to Mendeleev. In the alternative, if the method of the present invention is being carried out upon a P-N-P transistor, N-type active impurities such as phosphorous, arsenic, antimony, or bismuth from column V of the periodic table may be selected and added to the material which is deposited upon the surface of the transistor 10. Particularly, aluminum which is heavily doped with one of the N-type active impurities may be deposited upon the surface of a P-N-P transistor and the remaining steps of the method of the present invention carried out to provide the desired contact.
Since as hereinabove described, a very low resistivity region of P-type semiconductor material extends into a P-type base region, an ohmic contact occurs between the 6 low resistivity material and the original base region 12 of the transistor 10.
This contact would be constituted by that portion of the dashed line 23 which extends into the base region 12 as illustrated by the dashed portion 24 thereof. ,Since the emitter region 11 is of sN-type conductivity and the low resistivity region is of P-type conductivity, a rectifying contact is established between these two areas.
It is, therefore, seen that to provide the desired contact the low resistivity region that is formed must have the same conductivity type as the base region and opposite conductivity type to that of the emitter region.
Under certain circumstances during the practice of the method of the present invention, it is possible that the molten alumin'urri may penetrate completely through the base region and contact the collector region. If this should occur, the resulting device would be operative since a rectifying contact would occur between the low resistivity P-type region and the N-type collector region of the transistor. For optimum results, however, this should not be allowed to occur since it will decrease the amount of contact between the low resistivity region and the base region of the transistor, thereby decreasing the amount of voltage which can be supported by the contact structure.
In accordance with the foregoingsteps of the method of the present invention, a large amount of contact has now been provided to the base region and is brought present invention as hereinabove described may be illus' trated schematically as shown in FIG. 9 to which reference is hereby made. As therein shown the transistor includes an N-type emitter region' 41, a P-type base region 42 and an N-type collector region 43. A junction 46 separates the base region 42 and the collector region 43.` A junction also separates the base and emitter regions but it may be viewed in a slightly different'manner. It should' be recalled that the metal which is applied to the surface of' the emitter region is caused to penetrate through the Vemitter region and into the base region to thereby provide a base contact at the surface' of the device. This may also be looked upon as causing the base region 42 to extend in an upward direction through the emitterregion 41 and to the surface of the device as shown at 44. The base region 42 therefore includes upwardly extending portions 44 as shown in FIG. 9; Such a lstructure clearly increases the contact surface be-y tween the emitter and base regions. The junction separating the emitter and base region is then as shown at 47. The extended portions 44 of the base region 42 are heavily doped and of low resistivity as above described which is designated by the P+ appearing therein. The P-jportion extends into the base region 42 as shown by dashed lines 45 to accomplish the desired contact therewith. In operation of a device of this type a slightly higher barrier will exist between the N region 41 and the P| portion 44 of the emitter-base junction than between the N region 41 and the P-type main portion of the base.
Referring now more particularly to FIG. 5, there is illustrated the `structure of FIG. 4 and in addition a layer of insulative material 31 is provided upon the aluminum rich alloy material 21 extending above the surface of they emitter region 11 of the `transistor 10. As is illustrated in FIG. 5, this region is in tlhe physical configuration of a protrusi-on above the surface of the transistor.
In accordance with the preferred embodiment of the present invention where aluminum is evaporated upon ya silicon transistor, this insulative layer may be aluminum' order to form the base electrode to the transistor 10, the
insulative layer may be provided in other manners. YFor example, insulating material may be applied which completely. covers the metallic protrusions extending above the surface of a semiconductor' body. Such insulatinglmaterial may be applied for example, through a mask, by painting, or other well known methods.
Auber the formation of the insulative layer such as the oxide layer 31 of FIG. 5, Ithe next step in the method fof the present invention is to provide an electrically conductive layereof material Vupon the exposed o emitter portions of the .transistor 10.` Such a layer of material is 'as illustrated inFIG. 6. The electrically conductive material which is illustrated at 32 in FIG. 6, may be applied ltdthe emitter region 11 of Vthe transistor 10 by evaporating fthe material 32 upon substantially the entire surface of thesemi-conductive body including the protrusions having the insulative ymaterial 311 thereo'ver. Any suitable material may be utilized to provide the layer 32 which is electrically conductive and which will provide godlohmi-c contact to the surface of .the emitter region 11:. The semiconductor body is preferably `heated during this,evaporation.Y InV thealternative, l-ayer of material 32 m'ay be applied lupon :the surface by means well known to the art other than evaporating such as electroless plating, 'chemicalV reduction, land the like. Types of material which may be utilized and which meet the requirements for 'the emitter `Contact material .32 are for example, silver, gold, nickel, copper, Vand the like, or
, combinations thereof.A
,.'Afterltheformation `of the emitter electrode las illustrated in FIG.. 6,l the only step remaining to provide a completed transistor isnthe attachment of lthe electrical ledsftoV the variousportions ofthe transistor. This is as illustratedin FIG. 7. Qhmc contacts are made as illus'- trated 'at 53 so l'die collector region, at 54 to the emitter region, k1and at `V55 to the base region. vl'hese ohmic *contacts may bemade by any' well-knownm'ethod such as menno-'compression bonding, soldering,Y or the like. AAs noted,`in 'order to maketh'e base lead SScontact the base electrode a portion 'of the 'material 3l?. which has been applied in "-orlder to form theemitter electrode, together with a corresponding Yportion of the underlying insulativ'e material '31, must be removed from one of the protrusions f21 'in order to allow contact to be lmade thereto. This l'may be accomplished by ab'radi'rig 'that portion or infth'ealternative', by applyinga small mask to thejdesired aeaprior 'tothe deposition of the materials 31 and 32t It will be noted that 4the lspacing between the emitter and 'the .base electrodes is 'exceedingly 'close' and is de-V termined only by the thickness of the insulative layer 31 which vis applied as illustrated in FIG.` 5. l Therefore, spacing between emitter and base electrodes of approximately .0002 inchis readily yaccomplished`in"accorda.uce with the method' of the present invention, thereby providing a transistor which will give optimum results.
Referring now to FIG. 8, there'is 'illustrated a body 33 of P-type semiconductor material which may be used as a'zresistor or Vthe like. Contacts to portionsof the body 33 have been made by yalloying a metal thereto as hereinabove described and as illustrated at 34 to provide a region of like conductivity type.V VThe alloying has providedohmic contact to the Ibody 33 illustrated by dashed linesm3l.V` insulativelayer of material 35 'is provided over the pro-trusions 34 and m-ay be aluminum oxide.v A layer 36 of conductive metal is then placed over the entire surface of the body 33 including the insulative oxide vlayer to provide electrical contact directly to body 33. Such aconguration provides contact to very closely spacedy portions of the body, the contacts provided by the alloy 34 and the metal layer 36 being separated by the insulative layer Y35,. Leads may then be applied to the alloy regionw34 and to the conductive metal layer Saas above described to provide the completed device. l There has been thus disclosed a method for making a device having closely spaced electrodes and there is as well disclosed a transistor and a semiconductor body having closely spaced electrodes on at least one surface thereof. Y Y
What is claimed is:
l. The method of providing closely spaced contacts upon atleast one surface of a body, said method comprising the steps of: applying a contact to one surface of a body; providing a layer of insulative material upon said contact; applying a layer of electrically conductive material upon said one surface and over said insulative layer; removing a predetermined portion of said layer of electrically conductive material and of said insulative layer to expose a surface of said contact; and, ohmically bonding an electrical lead to said exposed surface of said contact.
The ymethod of providing closely spaced contacts upon'at least one surface of a semiconductor body, said method comprising the steps of: alloying an electrically conductive material with at least a portion of one surface of a semiconductor body, forming a layer of insulative kmaterial only upon that portion of said alloyed material ertnding above said one surface; and applying a layer of electrically conductive material upon said surface and over said insulative layer.
3. The method of providing closely spaced contacts upon at least one surface of a semiconductor body, said methd'cornpri'sing the steps of: alloying aluminum with at least a portion of one surface of a semiconductor body, forming a layer of aluminum oxide upon said alloy, and applying a layer of electrictrically conductive material upoufkfsaid surface and oversaid oxide.
44. 'Ihe .method of providing closely spaced contacts upon one major surface of a semiconductor body, including yfirst and second regions of opposite conductivity type separated by a P-N junction, said method comprising uthe steps of: applying a solvent metal t0 a predetermined portion of said surface; heating the combination to cause -said solvent metal to penetrate throughv said first region and into said second region; cooling the combination to provide an area of said solvent metal at said surface and an ohmic contact with said second region and a rectifying contact with said first region; providing an insulativc metallic composition upon said area of said sol-vent metal; and applying a layer of electrically conductive material upon substantially the entire area of said surface.
`5. The -m'ethod of providing closely spaced electrodes for-a semiconductor body containing a P-N junction, said method comprising the steps of .providing a semiconductor body having'at least a region of one conductivity type separated Yfrom a region of the opposite conductivity by a P-'N junction; applying a solvent metal containing conductivity type determining atoms 'of said opposite conductivity type to a predetermined portion of said one conductivity type region of said semiconductor body, heating the combination to a temperature to cause said solvent metal to penetrate through said one vconductivity type'region andirto ysaid opposite conductivity Vtype region; cooling the combination to provide Yan area consisting predominantly of said solvent mtal 'upon said semi-conductor body; providing an iusulative oxide layer upon fsaidsolvent metal area; and depositing a layer of electrically conductive metal upon said one conductivity type region of said semi-conductor body.
6. The method of providing closely spaced contacts upon one major surface of a semiconductor body, including rst and second regions of opposite conductivity type separated by a P-N junctiomsaid method comprising the steps of: applying aluminum to a predetermined portion of said surface; heating the combination to cause said aluminum to penetrate through said first region and into said second region while retaining an area consisting predominantly of aluminum at said surface; cooling the combination; providing a layer of aluminum oxide on gsaid area of aluminum; and applying a layer of electrically conductive metal upon said surface and over said aluminum oxide.
7. The method of providing close spaced emitter and base electrodes on N-P-N transistors comprising the steps of: providing an N-P-N transistor having emitter, base, and collector regions; depositing a layer of aluminum upon predetermined portions of the emitter region of said transistor; heating the combination to a temperature above the eutectic temperature of said transistor and said aluminum to cause said aluminum to dissolve a portion of said transistor; maintaining said temperature above the eutectic temperature for a time sufficient to permit said aluminum to penetrate into said transistor and at least contact said base region; cooling the combination to provide an area on a portion of said. emitter region consisting predominantly of aluminum; anodizing said area of aluminum to provide a layer of aluminum oxide thereupon having a thickness of the order of 0.2 mil; depositing a layer of electrically conductive metal upon said emitter region including said alurm'num area; and attaching leads to said aluminum area and said metal layer to provide base and emitter leads, respectively for said transistor.
8. The method of providing closely spaced contacts upon one major surface of a silicon semiconductor body including first and second regions of opposite conductivity type separated by a P-N junction, said method cornbase contacts upon one major surface of a silicon transistor housing iirst and second regions of N-type conductivity separated by an intermediate region of P-type conductivity, said method comprising the steps` of: providing a mask adapted to expose a predetermined area adjacent said surface of said silicon transistor; vapor depositing aluminum through said mask and upon said surface of said silicon transistor; heating the combination to a temperature exceeding the silcon-aluminum eutectic temperature to cause the aluminum to penetrate through said iirst N-type region and into said intermediate P-type region; cooling the combination to provide an area consisting predominantly of aluminum upon said surface of said silicon transistor; treating said transistor to provide a layer of aluminum oxide upon said aluminum area; and depositing an electrically conductive layer of metal upon said surface and over said aluminum area.
1.0. The method of providing closely spaced emitter and base electrodes upon one major surface of a silicon transistor having N-type emitter and collector regions separated by a P-type base region, said method comprising the steps of: applying a photo emulsion to said surface of said silicon transistor; exposing a predetermined portion of said emulsion; removing the unexposed portion l@ t Y of said emulsion from said surface; vapor depositing aluminum upon said surface of said silicon transistor; etching said transistor to remove that portion of aluminum which covers said exposed emulsion along with said emulsion; heating said transistor and said aluminum tol a temperature exceeding the silicon-aluminum eutectic temperature to cause the aluminum to penetrate through the emitter region and into the base region; cooling the combination to provide an area consisting predominantly of aluminum upon said surface and to provide an ohmic contact with said base region and a rectifying contact with said emitter region; treating at least said surface to provide a layer of aluminum oxide upon said area of aluminum; and depositing a layer of electrically conductive metal upon said surface and .over said aluminum area.
l1. The method of providing closely spaced contacts upon at least one surface of a semiconductor body, said method comprising the steps of: molecularly bonding an electrically conductive material to a predetermined surface portion of a semiconductor body forming a layer of insulative material upon said electrically conductive material, and applying a layer of electrically conductive material upon the surface of said semiconductor body and over said insulating layer.
12. The method of providing closely spaced contacts upon at least one surface `of ia semiconductor body, said method comprising the steps of: alloying an electrically conductive material with at least a portion of one surface of a semiconductor body, forming a layer of insulative material only upon that portion of said alloyed material extending above said one surface, applying a layer of electrically conductive material upon said surface and over said insulative layer, removing a predetermined portion of said layer of electrically conductive material and of said insulative layer to expose a surface portion of said alloyed electrically conductive material, and bonding an electrical lead in ohmic contact with said exposed surface portion of said electrically conductive material.
13. The method of providing closely spaced contacts upon at least one surface of a semiconductor body, said method comprising the steps of: alloying aluminum with at least a portion of one surface of a semiconductor body, forming a layer of aluminum oxide upon said alloy, applying a layer of electrically conductive material upon said surface and over said oxide, removing a predetermined portion of said layer of electrically conductive material and of said layer of aluminum oxide to expose a surface portion of said alloyed aluminum, and bonding an electrical lead in ohmic contact With said exposed surface portion of said alloyed aluminum.
14. The method of providing closely spaced contacts uponrone major surface of a semiconductor body, including rst and second regions of opposite conductivity type separated by a P-N junction, said method comprising the steps of: applying a solvent metal to a predetermined portion of said surface; heating the combination to `cause said solvent metal to penerate through said first region and into said second region; cooling the combination to provide an area of said solvent metal at said surface and an ohmic contact with said second region and a rectifying contact with said first region; providing an insulative metallic composition upon said area of said solvent metal; applying a layer of electrically conductive material upon substantially the entire area of said surface; removing a predetermined portion of said layer of electrically conductive material and of said insulating metallic composition 'to expose a predetermined surface portion of said solvent metal; and, bonding an electrical lead in ohmic contact with said exposed surface portion of said solvent metal.
l5. The method of providing closely spaced contacts upon one major surface of a semiconductor/body, in-
cluding first and second regions of opposite conductivity type separated by a P-N junction, said method comprising vthe steps of: applying aluminum to a predetermined portion of Vsaid surface;heating the combination to cause said aluminum to penetrate through said first region and into said second region While-retainngan area consisting predominantlyof aluminum at said surface; cooling the combination; providing a layer of aluminum oxide on said area ofaluminum; applying a layer of electrically conductive metal upon said surface and over said` aluminum oxide;` removing a predetermined portion of said layer of electrically conductive metal and of said aluminum oxide to expose a surface portion of said aluminum; and,
bonding an electrical lead in ohmic contact with said exposed surface portion of said aluminum.
References Cited in the le, of'this patent UNITED STATES PATENTS Deyrup et al Nov. 27, 1945 Mathews et al Sept. 29, 1953 Fuller Dec. 21, 1954 Ross Nov. 25 1958 Jones et al Dec. 23, 1958 Durst et al f Apr. 26, 1960
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Cited By (22)

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US3141226A (en) * 1961-09-27 1964-07-21 Hughes Aircraft Co Semiconductor electrode attachment
US3183576A (en) * 1962-06-26 1965-05-18 Ibm Method of making transistor structures
US3206339A (en) * 1963-09-30 1965-09-14 Philco Corp Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites
US3212160A (en) * 1962-05-18 1965-10-19 Transitron Electronic Corp Method of manufacturing semiconductive devices
US3212943A (en) * 1961-10-04 1965-10-19 Ass Elect Ind Method of using protective coating over layer of lithium being diffused into substrate
US3214652A (en) * 1962-03-19 1965-10-26 Motorola Inc Transistor comprising prong-shaped emitter electrode
US3215570A (en) * 1963-03-15 1965-11-02 Texas Instruments Inc Method for manufacture of semiconductor devices
US3295185A (en) * 1963-10-15 1967-01-03 Westinghouse Electric Corp Contacting of p-nu junctions
US3309241A (en) * 1961-03-21 1967-03-14 Jr Donald C Dickson P-n junction having bulk breakdown only and method of producing same
US3312882A (en) * 1964-06-25 1967-04-04 Westinghouse Electric Corp Transistor structure and method of making, suitable for integration and exhibiting good power handling capability and frequency response
US3316131A (en) * 1963-08-15 1967-04-25 Texas Instruments Inc Method of producing a field-effect transistor
US3345221A (en) * 1963-04-10 1967-10-03 Motorola Inc Method of making a semiconductor device having improved pn junction avalanche characteristics
US3355636A (en) * 1965-06-29 1967-11-28 Rca Corp High power, high frequency transistor
US3434019A (en) * 1963-10-24 1969-03-18 Rca Corp High frequency high power transistor having overlay electrode
US3436809A (en) * 1964-11-09 1969-04-08 Int Standard Electric Corp Method of making semiconductor devices
US3438121A (en) * 1966-07-21 1969-04-15 Gen Instrument Corp Method of making a phosphorous-protected semiconductor device
US3489962A (en) * 1966-12-19 1970-01-13 Gen Electric Semiconductor switching device with emitter gate
US3562610A (en) * 1967-05-25 1971-02-09 Westinghouse Electric Corp Controlled rectifier with improved switching characteristics
US3629669A (en) * 1968-11-25 1971-12-21 Gen Motors Corp Passivated wire-bonded semiconductor device
US3895975A (en) * 1973-02-13 1975-07-22 Communications Satellite Corp Method for the post-alloy diffusion of impurities into a semiconductor
US3922706A (en) * 1965-07-31 1975-11-25 Telefunken Patent Transistor having emitter with high circumference-surface area ratio
US4310363A (en) * 1974-05-20 1982-01-12 Societe Suisse Pour L'industrie Horlogere Management Services S.A. Sealed electric passages

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US2697269A (en) * 1950-07-24 1954-12-21 Bell Telephone Labor Inc Method of making semiconductor translating devices
US2862160A (en) * 1955-10-18 1958-11-25 Hoffmann Electronics Corp Light sensitive device and method of making the same
US2866140A (en) * 1957-01-11 1958-12-23 Texas Instruments Inc Grown junction transistors

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3309241A (en) * 1961-03-21 1967-03-14 Jr Donald C Dickson P-n junction having bulk breakdown only and method of producing same
US3141226A (en) * 1961-09-27 1964-07-21 Hughes Aircraft Co Semiconductor electrode attachment
US3212943A (en) * 1961-10-04 1965-10-19 Ass Elect Ind Method of using protective coating over layer of lithium being diffused into substrate
US3214652A (en) * 1962-03-19 1965-10-26 Motorola Inc Transistor comprising prong-shaped emitter electrode
US3212160A (en) * 1962-05-18 1965-10-19 Transitron Electronic Corp Method of manufacturing semiconductive devices
US3183576A (en) * 1962-06-26 1965-05-18 Ibm Method of making transistor structures
US3215570A (en) * 1963-03-15 1965-11-02 Texas Instruments Inc Method for manufacture of semiconductor devices
US3345221A (en) * 1963-04-10 1967-10-03 Motorola Inc Method of making a semiconductor device having improved pn junction avalanche characteristics
US3316131A (en) * 1963-08-15 1967-04-25 Texas Instruments Inc Method of producing a field-effect transistor
US3206339A (en) * 1963-09-30 1965-09-14 Philco Corp Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites
US3295185A (en) * 1963-10-15 1967-01-03 Westinghouse Electric Corp Contacting of p-nu junctions
US3434019A (en) * 1963-10-24 1969-03-18 Rca Corp High frequency high power transistor having overlay electrode
US3312882A (en) * 1964-06-25 1967-04-04 Westinghouse Electric Corp Transistor structure and method of making, suitable for integration and exhibiting good power handling capability and frequency response
US3436809A (en) * 1964-11-09 1969-04-08 Int Standard Electric Corp Method of making semiconductor devices
US3355636A (en) * 1965-06-29 1967-11-28 Rca Corp High power, high frequency transistor
US3922706A (en) * 1965-07-31 1975-11-25 Telefunken Patent Transistor having emitter with high circumference-surface area ratio
US3438121A (en) * 1966-07-21 1969-04-15 Gen Instrument Corp Method of making a phosphorous-protected semiconductor device
US3489962A (en) * 1966-12-19 1970-01-13 Gen Electric Semiconductor switching device with emitter gate
US3562610A (en) * 1967-05-25 1971-02-09 Westinghouse Electric Corp Controlled rectifier with improved switching characteristics
US3629669A (en) * 1968-11-25 1971-12-21 Gen Motors Corp Passivated wire-bonded semiconductor device
US3895975A (en) * 1973-02-13 1975-07-22 Communications Satellite Corp Method for the post-alloy diffusion of impurities into a semiconductor
US4310363A (en) * 1974-05-20 1982-01-12 Societe Suisse Pour L'industrie Horlogere Management Services S.A. Sealed electric passages

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