US2978179A

US2978179A - Electronic digital multipliers

Info

Publication number: US2978179A
Application number: US593230A
Authority: US
Inventors: Daniel L Curtis
Original assignee: Litton Industries Inc
Current assignee: Litton Industries Inc
Priority date: 1956-06-22
Filing date: 1956-06-22
Publication date: 1961-04-04
Anticipated expiration: 1978-04-04

Description

United States Patent C ELECTRONIC DIGITAL MULTIPLIERS Daniel L. Curtis, Manhattan Beach, Calif., assignor, by mesne assignments, to Litton Industries, Inc., Beverly I-Iills, Calif.,` a corporation of Delaware Filed `Iuue 22, 1956, Ser. No. 593,230 vClaims.` (Cl. 23S-194) digital systems in that all of the signals in the difunction signal train which have the same value represent identical numbers. For example, if it is assumed that the difunction signal train is normalized, or in other words, that the numbers represented by the signals in the train represent two numbers of equal amplitude but opposite signs such as either a plus one or a minus one, then each of the signals in the train represents either a plus one or a minus one, the average value of the signals in the train representing the quantity to which the vtrain corresponds. Accordingly, a difunction signal train may be termed a non-numerical representation of the quantity which the train represents, since the signals are not weighted according to any number system, or in other words, have no radix aslthis term is customarily employed.

Difunction signal trains may take numerous forms, the most common of which are a bilevel electrical signal train in which either ahigh level voltage or low level voltage is presented during each signal period, a train of bipolar electrical pulses in which one pulse is presented during each signal period, or a train of unipolar pulses in which the occurrence of a pulse during a signal period represents one of the algebraic numbers representable by the signals in the train and the absence of a pulse during a signal period represents the other algebraic number which is representable. Although subsequently it will be obvious to those skilled in the art that any of these different signal types may be employed for conveying difunction intelligence information in the difunction multipliers of the invention, it will be assumed for purposes of simplicity that the applied difunction signal trains and the product-representing.difunction output signal'train to be hereinafter described convey intelligence by a bilevel signal train in which either a relatively high level voltage or a relatively low level voltage is presented during each signal period.

The representation of physical or mathematical quantities by difunction signal trains has been found to be extremely useful both in the solution of mathematical equations and in the field of automatic control. For

lexample, copending U.S. patent application Serial No.

Patented Apr. 4, 1961-` Difunction Computing Elements by `Floyd G. Steele', tiled May 24, 1955, illustrates structures for adding, subtracting, multiplying and dividing quantities by operating upon difunction signal trains. Although these and other circuits .heretofore constructed satisfy the requirements of many systems applications, there has remained a need for a simple lmultiplier circuit which is capable of multiplying together the quantities represented by an analog' input signal and a difunction input signal train, and which may be utilized as either an input conversion device, or as a computing element within a digital computing system.

The present invention tills the foregoing void in the art by providing difunction multipliers which, according to their basic concept, include one or more gating circuits `which are selectively operable under the control of the voltage levels of the individual signals in a difunction multiplier signal train to either pass or reject an applied analog multiplicand signal, the filtered average of the analog signal samples being a function of the product of the quantities represented by the multiplier signal train and the analog multiplicand signal. The signal passed by the gate is then applied to an analog-to-difunction converter, which may be any one of several known types to be hereinafter described, the converter functioning to filter the analog signal samples and to produce a difunction output signal representative of the product of the input quantities.

More particularly, in accordance with one embodiment of the invention there is disclosed a difunction multiplier which structurally includes a pair of input gating circuits both of which feed to a common analog-to-difunction converter, and Which functionally is operable to produce a difunction output signal train representative of the product of the quantities represented by an applied analog signal and an applied normalized difunction signal train; as previously indicated, the term normalized is used to imply that each signal in the train having one value, such as a high level voltage for example, represents a plus one, while each of the other signals in the train represents a minus one. In this embodiment of the invention the two input gates are operated conjugately under the control of the input difunction signal trains to pass either the'analog signal itself to the associated converter or to pass electrical image of the analog signal to the converter; the term analog image signal as herein utilized implies a second analog signal whose magnitude is proportional to the magnitude of the input analog signal but whose polarity is opposite to that of the input analog signal taken with respect to a predetermined reference voltage.

According to another embodiment of the invention there is disclosed a difunction multiplier which is operative to produce a difunction' output train representative of the product of the quantities represented by an applied analog signal and a non-normalized difunction input signal train, as for example a train in which signals of one value represent plus one and signals of the other value represent zero. In this embodiment the multiplication is accomplishedthrough the use ofva single gate circuit and an associated analog-to-difunction converter, the gate circuit'being operable in the same manner as previously described. In still another embodiment of the invention there is disclosed a multiplier which employs onlya singleV gate circuit, which in conjunction with a variable biasing circuit and an associated difunction converter functions to multiply the quantities represented by an analog signal and a normalized difunction input train.

In all of the embodiments of the invention the multiplication operation is accomplished by operating Vupon signals which represent directly the input quantities, and

no complex cancellation networks are required to eliminate undesired components in the output signal representing the product of the multiplication operation. In addition, each of the difunction multipliers herein disclosed may be employed in conjunction with an input filter for multiplying two input quantities which are respectively represented by two input difunction signal trains, the tilter being employed for converting one of the input trains to an analog signal whose magnitude corresponds to the average value of the quantity represented by the applied train; the analog signal thereby generated is then applied to the difunction multiplier wherein it is gated in accordance with the signals sequentially appearing in the other applied difunction signal train.

It is, therefore, an object of the invention to provide difunction multipliers which are operable to produce a difunction output signal train representative of the product of the quantities represented by an applied analog multiplicand signal and difunction multiplier signal train.

It is also an object of the invention to provide difunction multipliers which are operative to multiply the quantities represented by an applied difunction input signal train and an applied analog signal to produce a difunction output signal train representative of the product of the quantities.

It is a further object of the invention to provide difunction multipliers which function to produce a difunc- `tion output signal train representative of the product of the quantities represented by an applied analog signal and a difunction input signal train by gating the analog signal under the control of the signals in the input train to produce an analog product signal, and converting the product signal to the difunction output signal.

Another object of the invention is to provide difunc- `tion multipliers operable to multiply together the quantities represented by two difunction input signal trains by converting one of the trains to a corresponding analog signal, selectively gating the analog signal under the control of the sequential signals in the other difunction train to produce an analog product signal, `and converting the analog product signal to a difunction output signal train representative of the product of the input quantities.

The novel features which are believed to be characteristic of the invention, both as to its organization and method of operation, together with further objects and advantages thereof, will be better understood from the following description considered in connection with the 'accompanying drawings in which several embodimetns of the invention are illustrated by way of example. It is to be expressly understood, however, that the drawings are for the purpose of illustration and description only, and are not intended as a definition of the limits of the invention.

Fig. l is a block diagram of a difunction multiplier, according to the invention;

Fig. 2 is a schematic diagram of one form of electronic gate circuit which may be employed in the difunction multipliers of the invention;

Fig. 3 is a block diagram, partly in schematic form, illustrating one form of electromechanical gate circuit which may be utilized in the difunction multipliers herein disclosed; and

Figs. 4 and 5 are block diagrams of alternate forms of difunction multipliers, in accordance with the invention.

With reference now to the drawings, wherein like or corresponding parts are designated by the same reference characters throughout the several views, there is shown in Fig. 1 a difunction multiplier which is operative to produce at an output terminal a difunction signal train Exy which represents the product of the quantities represented by an applied signal Ex and an applied difunction signal train Ey. in this particular embodiment of the invention the analog signal is actually represented by the signal EX which is applied to an input terminal 12,'and by an image signalv 13,S of opposite polarity but .4 proportional in magnitude, the image signal being applied to an input terminal 14. The applied difunction signal trade Ey, on the other hand, includes a rst signal train Y composed of sequential signals each having a xed period and either a high level value representing a iirst number or a low level value representing a second number, and a complementary signal train Y composed of sequential signals consonant with the signals in train Y, the signal in train Y having a low level value when the simultaneous-ly appearing signal in train Y is high and a high level value when train Y presents a signal having a low level value.

4As set forth briefly hereinabove, the quantity represented by difunction signal train Ey over any given interval corresponds to the average value of the numbers represented by the signals in the difunction train which occur during that interval. Thus if it is assumed that the difunction train is normalized, or in other words, that a high level signal in train Y represents a plus one and a low level signal represents a minus one, the quantity represented by difunction train Ey is given by the equation:

ymt-l- 1,- 1)

where N1=number of plus one-representing signals N2=number of minus one-representing signals and N1|N2=the total number of signals occurring during the interval in which the difunction train is evaluated.

On the other hand if it is assumed that a high level signal in train Y represents a plus one and a low level signal represents a zero, then the quantity represented by the difunction train is given by:

where N1 again equals the number of plus onerepresenting signals and N2 now corresponds to the number of zero-representing signals.

With reference oncemore to the difunction multiplier of Fig. 1, this particular embodiment of the invention includes -three basic elements, namely, an analog-to-difunction converter 16 which is operative to generate at output terminal 10 a difunction signal train representative of the amplitude and polarity of an analog signal applied at an input terminal 18, and a pair of

gate cir cuits

20 and 22 which are selectively operable under the control of the signals in difunction train Ey for respectively applying to terminal 1,8 a current signal proportional yto analog signal Ex or a current signal proportional to the electrical image signal Ew The conversion of the applied voltages Ex and --Ex to corresponding current signals is accomplished `by a pair of resistors 24 and 26 which respectively intercouple

gates

20 and 22 to the analog-to-difunction converter.

In addition to the yforegoing elements the difunction multiplier of Fig. 1 `also includes a timing signal source 27 which produces a train of periodically recurring clock pulse signals cp; these signals occur at a preselected Xed -frequency corresponding to the difunction signal frequency, and areemployed to synchronize the operation of the multiplier by controlling the operational frequency of converter 16, and, in addition, the input instrument or mechanism, not shown, which generates difunction signal train Ey. It will be recognized by those skilled in the computer art that timing signal source 27 may embody any of vseveral wellfknown structures for generating clock pulses, such as a magnetic drum having a timing track thereon, a free rupninlg multivibrator, or a conventional stabilized sine-wave oscillator with yan associated overdriven amplitier and differentiating circuit.

Analog-to-difunction converter 16 is preferably of the V `general type disclosed' in copending U.S. Patent vapplication'Serial No. 540,699, for Analog-to-Difunction Converter by Siegfried Hansen, tiled October 17, 1955, now Patent No. 2,885,662, and more specically, is preferably structurally similar to the improved converter disclosed in U.S. Patent application Serial No. 592,963, for Apparatus for Analog-to-Difunction Conversion tiled June 2l, 1956, now Patent No. 2,885,663, by the present inventor. As shown in Fig. 1 the converter includes an integrator, such as capacitor 28, for integrating the electrical signal applied to terminal 18, la sensing element() responsive to the magnitude of the integral signal on capacitor 28 for settinga flip-flop 32 to a plus one-representing state whenever the integral exceeds a predetermined reference Ilevel at the end of a difunction time interval is negative with respect to the reference level at the end of a period, and a standard signal source 34 which'is responsive to the difunction signals generated for feeding back to the integrator capacitor through a resistor 36 a standard or unit charge to reduce the integral signal by a predetermined amount. Accordingly, the average value of the difunction signal train presented at output terminal corresponds to the average rate at which the integral of the signal applied at terminal 18 is changing, and hence corresponds to the ratio of the average `amplitude of the applied signal to the full scale value which the converter is capable of representing.

Consider now the structure and operation of gate circuits and 22. Each of these gates is selectively operable to present either a closed circuit or an open circuit between its associated input and output terminals, and may comprise either an electronic switching mechanism or a mechanical switching mechanism. With reference to Fig. 2, for example, there is shown a bridge type gating circuit which may be utilized for electronically opening and closing a circuit between an input-terminal 12 and an output terminal 38 under the control of signals applied at a pair of control terminals 40` and 42. This particular yform of gate circuit includes four diodes or crystal recti- -ers y44, 45, 46 and 47, which are connected as a bridge, the junction of rectiiiers 44 and 46 being connected to input terminal 12 while output -terminal 38 is connected to the junction of rectitiers 45 and 47. The junction of a resistor 48 to one terminal B+ of a relatively high voltage, whereas the junction of rectiers 46 and 47 is coupled to a terminal B- of a relatively low voltage vthrough a Iresistor 49. In addition, the junction of

rectitiers

44 and 45 is also connected to the anode of a switching rectifier S0 while thek junction of rectiers 46 and 47 .isl connected to the cathode of a second switching rectiiier 52, the other terminals of these rectiers being connected to control terminals 40 and 42, respectively.

The signals which are applied to control terminals 40 and 42 are determined by whether the gate is being used in Fig. l to-gate the analog signal Vl-Ex or its electrical `image Vsignal -Ex, the signal trains Y and Y being respectively applied to terminals 40 and 42 in gate 20 and being transposed in gate 22. In either instance, the application of a low level `signal to terminal 40 and a high Elevel signal to terminal 42 will render

diodes

50 and 52 conductive and will thereby cl-amp the junction of

diodes

44 and 45 at substantially the same voltage as that of the ,low level signal and the junction of diodes 46- and 47 at 'passed to-the output terminal and then on to the

integratrectifiers

44 and 45, on the other hand, is coupled through l 'gate circuit 22 functions to pass the image signal Ex whenever a minus one is represented by the applied difunction signal train. Thus the laverage current supplied to the integrating capacitor in the analog-to-difunction converter may be expressed as:

where R=the resistance of resistors 24 and 26 N1=the number of plus ones in a given interval N2=the number of minus ones in a given interval By combining thev terms and substituting Equation 1, Equation 3 becomes:

or in other words, is directly proportional to the product of the quantities represented by the analog signal Ex and the difunction signal train Ey. Inasmuch as the resistance value R provides a scaling factor so that a full scale input signal will correspond to the maximum quantity representable by the difunction output signal train, it follows that the difunction output signal generated by the difunction converter will represent the product of the quantities represented by the analog signal and the input difunction signal train, and is therefore properly designated Eyy.

It is to be expressly understood, of course, that the difunction multipliers of the invention may employ other forms of electronic gate circuits, and in relatively low frequency applications may also utilize electromechanical gating mechanisms. For example, there is shown in Fig. 3 an electromechanical gate which comprises a relay arnplitier 54 which is selectively operable under the control of the voltage level of a signal applied at a control terminal S6 to either open or close a pair of contacts 58 which intercouple the input terminal with an associated output terminal 38. If it is assumed that the relay amplifier closes its associated contacts in response to a high level voltage and opens them in response to a low level signal, and that a pair of these gates are to be utilized in the circuit of Fig. l, then the signal train Y should be applied to terminal 56 of gate 2Q whereas the signal train Y should be applied tothe corresponding terminal of gate 22. Y

In the description of the invention as set forth hereinyabove it has been assumed that the input difunction Ey was normalized, or in other words that each signal in the train represented either a plus one or a minus one. It should be emphasized, however, that the basic teachings of the invention are also applicable to difunction multipliers wherein the signals in the multiplier difunction signal train represent either a one or a zero. It will be recalled that the method or" evaluating the quantity represented by this form of difunction signal train is set forth in Equation 2 hereinabove;

With reference now to Fig. 4 there is shown a difunction multiplier in accordance with the invention, which is operative to generate at output terminal 10 a difunction train representative of the product of the quantities represented by an Vanalog multiplicand signal Ex and a difunction multiplier signal train Ey which represents intelligence in a one-zero difunction system. As shown in Fig. 4, the multiplier again includes an analog-to-difunction converter 16 and an input gate circuit 20Vwhich is coupled thereto, `each of which elements may be structurally identical with the similarly designated components of Fig. 1. For reasons which will be apparentV in view i?. of the discussion set -forth hereinbelow, the difunct-ion multiplier of Fig. 4 requires -no additional gate nor does it require the application of an electrical image of the analog signal.

Assuming now that gate 20 in Fig. 4 interconnects its input Vand output terminals whenever a one-representing high level signal appears in the multiplier difunction train, and presents an open circuit in response to a zerorepresenting low level signal in the t-rain, it is clear that the average current supplied `to the analog-to-difunction converter is given by:

where R is again the value of resistor 24 and N1 and N2 respectively corresponds to the number of one and zerorepresenting signals received in `the interval Nl-l-Nz. Substituting Equation 2 in Equation 5 then gives:

@Fil-,reina c6) Consequently the difunction output signal train lbxy from the converter again represents the product of the quantities represented by the applied analog multiplicand signal and the dif-unction multiplier signal.

It -should be pointed out that in the difunction multipliers of Figs. l and-4 the difunction output signal train lbxy may present its output intelligence in either a normalized plus one-minus one difunction system or in a non- -normalized one-zero difunction system, depending upon the construction of the analog-to-difunction converter. More specifically, if the converter is structurally similar -to the converter shown in Fig. 2 of the previously referenced LUS. Patent application, Serial No. 540,699, or to the improved converter shown in Fig. 1 of the previously referenced U.S. Patent application Serial No. 592,963, then the output difunction conveys the product of the input quantities directly in the plus one-minus system of difunction rotation. If on the other hand the analog-to-difunction converter is structurally similar Vto the converter shown in Fig. 6 of U.S. Patent application Serial No. 592,963, then the output difunction conveys the *product of the input quantities directly in the one- Yzero system of difunction notation.

It should also be pointed out that the utilization of a -single multiplier gate circuit, as shown in Fig. 4, is also applicable to the multiplication of difunction signals which represent their input quantities in the normalized plus one-minus one difunction system. For example,

there is shown in Fig. 5 a difunction multiplier, according to the invention, which is operative to produce at output terminal 10 a difunetion output signal lxy representative of the products of the quantities represented by `an ana-log multiplicand signal Ex, and a difunction multi- 4plier signal train l2)y which represents the quantity Y in the plus one-minus one system of notation.

The difunction multiplier of Fig. again includes an analog-to-difunction converter 16 and input gate 20 which is coupled to the converter by a register 24, the only difference in these elements being that the resistance of resistor 24 is `of Fig. 5 also comprises a filter circuit 62 vand an inverter circuit 64, these additional elements being included in order to emphasize that Vthe y.analog `signal Ex and its 3 electrical image signal -Ex may be :obtained by Aoperating upon a difunction multiplicand Ysignal train x.' For example, if filter circuit 62 includesa simple R-C filter network whose time constant is relatively large compared to the period of an individual difunction signal, then the voltage across the capacitor for a given difunction input signal pattern represents the average .value of the quantity represented by the input lsignal train; it is clear therefore, that this voltage may be applied directly to the input circuit of muiiplier gate 20, and in addition `may be utilized to generate the image signal --Ex by merely passing the signal through inverter 64.

In operation the current supplied to the integrator circuit of the analog-to-difunction converter includes a current component i3 from gate 20 and a bias current component i., which flows through 'resistor 60, the average value of the resultant current being given by:

which may be rewritten as:

Combining terms and substituting Equation l -then gives:

This equation will be recognized as providing the identical product shown in Equation 4 derived hereinabove for operation upon a 4normalized `difunction multiplier signal train. Consequently, it will be recognized that the difunction output signal train EX, presented as output terminal 10 is directly representative of the desired product.

It is to be directly understood, of course, that other modifications and alterations may be made in the difunction multipliers of the invention without departing from the spirit and scope of the invention. For example, low pass filters may be employed in the various embodiments of the invention between the multiplier gates and their associated analog-to-difunction converters for filtering or averaging the currents supplied to the converters, and thereby providing smoothing. Accordingly, the scope of the invention is to be limited only by the spirit and scope of the appended claims.

What is claimed as new is:

1. A difunction multiplier for producing a difunction output signal train representative of the product of the .quantities represented by an applied analog signal and an applied input difunction signal train, said difunction trains each being composed of sequential bivalued electrical signals each having a fixed period, and having either a first value representing a first number or a second value representing a second number, the average of the lnumbers represented by the signals in a train ,corresponding to the quantity represented by the train, said multiplier comprising: at least one gate circuit having an input terminal, an output terminal and a control terminal; means for applying the analog input signal to said input terminal Yand the difunction input signal train to said control terminal, said gate circuit being responsive to said difunction input signal train for presenting the analog signal at said output terminal for substantially said fixed period in response to each signal in said input train having said first value; and an analog-to-difunction converter operable to produce a difunction output signal train representative of the filtered average value of analog signals applied thereto; and means for applying to said converter the signal appearing at said gate circuit output terminal.

2. A difunction multiplier for producing a difunction output signal train representative o f the product of the `quantities represented by an applied analog signal and an applied input difunction signal train, said difunction trains ,each being composed of sequential electrical ,sig-

,.a -9 hals each havin'ga l'ixedperiod, and having' either a first value representing a first number or a second value representing a second number, the average value of the numbers represented by the signals in a train corresponding to the quantity represented by the train, said multiplier comprising: an analog-to-difunction converter operable age value represents the quantity represented by the average value of an input signal applied thereto; a gating circuit having a control terminal, an input terminal and an output terminal; means for applying the input difunction signal train to said control terminal and the analog input signal to said input terminal, said gating circuit being operable to selectively sample the analog input signal by passing to said output terminal the analog input signal in response to each signal in said difunction input signal train having said first value, whereby the signal train appearing at said output `terminal represents a func tion of the product of theV quantities represented by the applied analog input signal and the difunction input signal train; and means for applying to said analog-to-difunction converter the signal train presented at said gate circuit output terminal.

3. A difunction multiplier for operating upon an analog signal representative of a first quantity and a difunction input signal train representative of a second quantity to produce a difunction output signal train consonant with the input train and representative of the product of said first and second quantities, said difunction input signal train being composed of sequential signals occurring at a fixed preselected frequency and having either a first value representative of a first number or a second value representative of a second number, the average of the numbers represented by the signals in the train representing the second quantity, said multiplier comprising: at least one gate circuit having an output terminal and selectively operable under the control of said difunction input signal train for presenting said analog signal at said output terminal whenever a signal in said input difunction train has said first value whereby a train of pulses is produced at said output terminal whose filtered average is a function of the product of said first and second quantities; an analog-to-difunction converter operable to produce a difunction output signal train representative of the filtered average value of an analog signal applied thereto; and means for applying to said converter the signal train presented at said gate circuit output terminal.

4. The difunction multiplier defined in claim 3 wherein the first number represented by the first-valued signals in` the difunction input train is one and the second number represented by the second-valued signals in the difunction input train is zero whereby the average value of the train of pulses produced at said output terminal over a given interval is l ExN 1 Nfl-N2 where Ex=the analog input signal;

N1=the number of one-representing signals occurring during the given intervahand N2=the number of zero-representing signals occurring during the given interval.

to produce an output difunction signal train whose aver- 10 second gate circuit having an output terminal and selec tively operable under the control of said difunction input signal train for presenting the electrical image of said analog signal at its output terminal whenever a signal in said input difunction train has said secondvalu'e, and means for applying to said converter the signal train presented at said output terminal of said second gate circuit.

7. YA difunction multiplier for opera-ting upon an analog signal representative of a first quantity and a difunction input signal train representative of a second quantity to produce a difunction output signalftrain consonant with the input train and representative of the product of said first and second quantities, said difunction input signal train Aand said difunction output Vsignal train being each composed of sequential bivalued signals occurring at a fixed preselected frequency and having either a first value representative of the number one or a second value representative of the number zero, the average of the numbers represented by the signals in the train representing the second quantity, said multiplier comprising: at least one gate circuit having an output terminal and selectively operable under the control of said difunction input signal train for presenting said analog signal at said output terminal whenever a onerepresenting signal is received whereby a train of pulses is produced at said output terminal whose filtered average directly represents the product of said first and second quantities; an analog-to-difunction converter operable to produce a difunction output signal train representative of the filtered average value of an analog signal applied thereto; and means for applying to said converter the signal train presented at said gate circuit output terminal whereby said analog-to-difunction converter produces as its output the said difunction output signal train representative of the product of said first and second quantities.

8. A difunction multiplier for operating upon an analog input signal representative of a first quantity and a difunction input signal train representative of a second quantity to produce a difunction output signal train consonant with the input train and representative of the product of said first and second quantities, saidv difunction input signal train being composed of sequential bivalued signals occurring at a fixed preselected frequency and each of said sequential bivalued signals having either a first value representative of a plus one or a second value representative of a minus one, the average of the nurnbers represented by the signals in the train representing the second quantity, said multiplier comprising: a gate circuit having an output terminal and selectively operable under the control of said difunction input signal train for presenting said analog signal at said output terminal whenever a signal in said input difunction train has said first value; an analog-to-difunction converter operable to produce a difunction output signal train representative of the filtered average value'of an analog signal applied thereto; first impedance means for applying to said converter the signal train presented at said gate circuit output terminal; second impedance means; and means for applying to said converter through said second impedance means a second analog signal whose amplitude is directly proportional to the analog signal and whose polarity is opposite vto that of the analog input signal.

` 9. A difunction multiplier for producing a difunction output signal train representative of the product of the quantities represented by an applied analog signal and an applied input difunction signal train, said difunction trains being composed of bivalued electrical signals each bivalued signal having a fixed period, and having either a first value representing a plus one or a second value representing a minus one, the average of the numbers represented by the signals in a train corresponding to the quantity represented by the train, said multiplier comprising: an analog-to-difunction converter operable to produce an output difunction signal train whose average agraire value represents the quantity represented by the filtered average value of an analog signal applied thereto; first and second gate circuits each having an inputiterminal; means for applying the analog input signal and an elec? trical image thereof to said input terminals, of s aid first and second gates respectively, said gating circuits being conjugately operable to selectively pass the analog signal in response to each plus one-representing signal in the input train and the electrical image of the analog signal in response to each minus one-representing signal in the input train; and means for applying to said converter the signals passed by said rst and second gates.

10. A difunction multiplier for operating upon an analog signal representative of a first quantity and a difunction input signal train representative of a second quantity to produce a difunction output signal train con sonant with the input train and representative of the product of said first and second quantities, said difunction input signal train being composed of sequential bivalued signals occurring at a xed preselected frequency and each bivalued signal having either a first value representative of a rst number or a second value representative of a second number, the average of the numbers represented by the signals in the train representing the second quantity, said multiplier comprising: at least one gate circuit having an output terminal and selectively operable under the control of said difunction input signal train for presenting said analog signal at said output terminal whenever a signal in said input difunction train has said tirst value whereby a train of pulses is produced at said output terminal whose filtered average is a function of the products of said first and second quantities; an analog-todifunction converter operable to produce a difunction output signal train representative of the liltered average value of an analog signal applied thereto, said converter comprising,l an integrator for integrating signals applied Y to said converter to produce an integral signal, a sensing element operable to sample the integral signal at the xed preselected frequency and to generate an output signal whenever the integral signal exceeds a predetermined reference level, means for generating a difunction output signal having said tirst Value whenever an output signal is produced by said sensing element and a difunction output signal having said second value Whenever the integral signal is below said predetermined reference level when sampled, and a feedback network for feeding back to said integrator a Standard unit signal to reduce the integral signal negatively with respect to said reference level in response to each diiunction signal representing said rst value and to reduce the integral signal positively with respect to said reference level in response to each difunction signal representing said second value; and means for applying the signals presented at said output circuit of said gate circuit to said integrator of said analog-to-difunction converter.

References Cited in the tile of this patent UNITED STATES PATENTS OTHER REFERENCES Seeley: Electron Tube Circuits, 1950, page 153.