US2902542A - Electric pulse code modulation systems - Google Patents

Description

Sept. 1, 1959 c. cs. TREADWELL 2,902,542

ELECTRIC PULSE' CODE MODULATION SYSTEMS Filed June 19, 1953 12 Sheets-Sheet 1 I l -lnverntnr CYRI L G. TREABWELL A itorney Sept. 1, 1959 c. G. TREADWELL ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19, 1953 12 Sheets-Sheet 2 Inventor CYRI L G. TREADWELL R. Q om mm NV Attorney Sept. 1, 1959 c. e. TREADWELL ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19. 1953 12 Sheets-Sheet 3 Inventor CYRIL G. TREADWELL Attorney p 1, 9 c. G. TREADWELL 2,902,542

ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19. 1953 12 Sheets-$heet 4 TRA NSM/ T T ER CHANNEL UNI T 7 F/G.7. /36 E 120 COO/N6 STAGE 79 Inventor STAB/USED VOL7AG sou/m5 42 6 A ttorne y p 1959 c. e. TREADWELL 2,902,542

ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19, 1953 12 Sheets-Sheet '7 FROM 70 FIG 6 FIG. 10.

FIE. 5

VERN/ER D/G/T AMPLIFIER 29 TIMI/Y6 WAVE 3 FROM F/GJZ.

Inventor CYRIL G. TREADWELL.

A itorney Sept. 1, 1959 c. G. TREADWELL 2,902,542

ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19. 195:5

12 Sheets-Sheet 8 Inventor CYRI L G. TREADWELL Attorney c. G. TREADWELL 2,902,542

ELECTRIC PULSE CODE MODULATION SYSTEMS l2 Sheets-Sheet 9 Sept. 1, 1959 Filed June 19, 1953 T0 SHAPER 47 & 278 7% i/l N L/M/TER AND 46L. CONTROL 45 STAB/USED VOLTAGE-SOURCE 65 I nventor GYRl L G. TREADWELL Atiorne y P 1, 1959 c. G. TREADWELL 2,902,542

ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19, 1953 12 Sheets-Sheet 10 PULSE COMB/N/NG T/M/NG WAVE c/Rcu/r 5a NPZ F/G./64' HP '57 t I vQ lnventur RECE/VER CHAN/YEA UNIT 60 H? I-GG'TREADWELL A ttorney v Sept. 1, 1959 c. G. TREADWELL 2,902,542

ELECTRIC PULSE comm MODULATION SYSTEMS Filed Juhe 19, 1953 12 Sheets-Sheet 11 Attor 1 Sept. 1, 1959 C. G. TREADWELL ELECTRIC PULSE CODE MODULATION SYSTEMS Filed June 19, 1953 FROM 57 12 Sheets-Sheet 12 I/M/NG WA VES a L ZL miL ML FROM 56 Inventor Alinrn United States Patent ELECTRIC PULSE coon MODULATION SYSTEMS Cyril Gordon Treadwell, London, England, assignor to International Standard Electric Corporation, New York, N.Y., a corporation of Delaware Application June 19, 1953, Serial No. 362,863

Claims priority, application Great Britain June 24, 1952 19 Claims. (Cl. 179--15) The present invention relates to electric pulse code modulation systems of communication.

The system is of the kind described in U. S. Patent 2,272,070. In recent years a number of forms of pulse code modulation systems have been proposed, and the practical systems developed have generally utilised a binary pulse code for the reason that the best discrimination against the effects of noise is obtained when the receiver has only to recognise whether a code pulse is present or not. However, in order to provide a suflicient number of code combinations to enable the speech wave to be conveyed with suificient fidelity, a binary code with at least six elements is necessary, and sometimes seven elements have been used.

Apart from the fact that the coding and decoding arrangements for a six or seven element code are complicated, the necessity for transmitting six or seven code pulses during each channel period without at the same time occupying an excessive frequency bandwidth seriously limits the number of channels which can be provided in any one system.

The present invention is based on the recognition that the immunity from the effects of noise of a binary code is unnecessarily high. Reliable commercial systems are always operated under conditions in which the signalto-noise ratio is fairly good, and it follows that a pulse code may then be quite satisfactorily used in which each digit pulse represents more than two conditions. This having been recognised, a special advantage is secured if both positive and negative digit pulses are used, because the number of coding stages necessary to provide all the pulse levels can be halved.

The use of pulses representing more than two conditions is, of course, suggested in US. Patent 2,272,070 already referred to; and positive and negative code pulses have been suggested in a very special single pulse system described in British Patent No. 627,462 where the code pulses indicate the manner in which the speech wave amplitude is changing, not its actual value. The distinctive feature of the present invention is the use of both positive and negative digit pulses in a multi-digit code representing the actual amplitude values of the speech wave or other electrical wave to be conveyed.

The invention accordingly provides an electric pulse code modulation system of communication comprising means for sampling an electrical wave at frequently occurring instants, means for determining the amplitude of the wave at each of such instants with respect to a discontinuous amplitude scale having an equal specified number of positive and negative steps, means for generating in response to each sample of the electrical wave a group of one or more digit pulses according to a code of two or more elements, any digit pulse having an amplitude level selected from a series of equal positive and negative values, and means for transmitting the digit pulses over a communication medium.

The invention also provides a transmitter for an electric pulse code modulation system of communication ice comprising means for producing from a complex electrical wave a pulse of invariable sign, but having an amplitude representing the instantaneous amplitude of the said wave with respect to a mean level, quantising means for quantising the said pulse, separate means for indicating the sign of the said instantaneous amplitude with respect to the said mean level, means under the control of the said quantising means and of the said separate means for producing a group of one or more digit pulses according to a code of two or more elements, any digit pulse having an amplitude selected from. 11 positive and u respectively equal negative amplitudes, where u is an integer, and means for transmitting the digit pulses over a communication medium.

The invention further provides a receiver for an electric pulse code modulation system of communication in which an instantaneous amplitude value of a complex electrical wave is represented by a group of one or more digit pulses according to a code of two or more elements, any digit pulse having an amplitude selected from a series of n positive and u respectively equal negative amplitudes, where n is an integer, comprising means for receiving the digit pulses from a communication medium, means for producing from each digit pulse an intermediate pulse of invariable sign, but having an amplitude representing the amplitude of the digitpulse irrespective of its sign, recording means for deriving from the intermediate pulse a derived pulse having an amplitude proportional to the instantaneous amplitude represented by the digit pulse when present by itself in the group, separate means for indicating the sign of the digit pulse, means under the control of the said recording means and of the said separate means for producing from the derived pulses corresponding to a group of digit pulses an output pulse which represents in quantised form an instantaneous amplitude value of the complex electrical wave, and means for recovering from the output pulse an approximate replica of the said complex electrical wave. t

The digit pulses may, of course, be transmitted in any convenient Way: they could, for example, be sent direct over a coaxial cable or other wire line. When, as in radio systems, it is necessary to convey the pulses by modulation of a carrier wave, it will be preferable to employ frequency modulation, which is most convenient when both positive and negative pulses have to be transmitted. This is, however, quite common practice and has other advantages.

The invention will be described with reference to the accompanying drawings, in which:

Fig. 1 shows a graphical diagram of the code employed in the preferred system according to the invention;

Figs. 2 and 3 respectively show block schematic circuit diagrams of the transmitter and the receiver of the preferred two-digit system according to the invention;

Figs. 4 to 12 show detailed circuits of certain elements of Fig. 2, namely:

Fig. 4 shows the circuit of a channel unit;

Fig. 5 shows the circuit of the mean level restorer;

Fig. 6 shows the circuit of the coder;

Fig. 7 shows the circuit of a coding stage of Fig. 6;

Fig. 8 shows the circuit of the stabilised voltage source;

Fig. 9 shows the circuit of the polarisation control device;

Fig. 10 shows the circuit of the polarisation restorer;

Fig. 11 shows the circuit of the Vernier digit amplifier;

Fig. 12 shows the circuit of the timing and synchronising generator;

Figs. 13 to 16 show detailed circuits of certain elements of Fig. 3, namely:

Fig. 13 shows the circuit of the limiter and A.G.C. control device;

Fig. 14 shows the circuit of the stabilised voltage source;

Fig. 15 shows the circuit of the pulse combining circuit;

Fig. 16 shows the circuit of a channel unit; and

Figs. 17 and 18 show modifications of Figs. 11 and 15, respectively, for use in a system employing more than two digits.

In its more general form, the code employed in systems according to the invention comprises groups of m digit pulses each of which can have n amplitude levels and can be positive or negative. Thus the total number of conditions represented by a digit pulse is 2n+1, where zero amplitude, which is indicated by the absence of the pulse, corresponds to one condition. It follows that the total number of quantised amplitude steps (including .zero) which the code can represent is (2n-|l)". Various choices can be made for m and 11 according to the requirements which have to be met.

The embodiment of the invention to be described comprises a multi-channel communication system for conveying speech waves and supervisory signals, which it will be assumed cover a frequency band from zero to about 3,400 cycles per second. As is well known, the sampling frequency should be at least double the highest frequency of the speech band, and in the present case the sampling frequency is chosen to be 8 /3 kilocycles per second. The sampling period that is, the time interval between successive samples is thus 120 microseconds, and is conveniently divided into 120 channel periods each of one microsecond duration. Of these channel periods, one is set aside for a synchronising signal, and the remaining 119 periods is used for the code pulses of 119 corresponding communication channels.

The code to be adopted for this embodiment employs two digit pulses which are transmitted to re resent each sam le of a speech wave. Each digit pulse may be of either positive or negative polarity, and each may have one of four different amplitudes, which are the same whether the pulse is positive or negative. Thus each digit pulse can indicate nine amplitude values (including zero, which is indicated by absence of the digit pulse). The code is therefore capable of representing 9 or 81 diflerent am litude values for the speech wave samples. In order to obtain as many quantised values as this with a binary code. seven digits would be necessary.

In order to produce the digit pulses in this embodiment, therefore, only four stabilised amplitude values are used for the roduction of both the positive and the negative digit pulses.

Since it is necessary to transmit both positive and negative pulses over the communication medium, it is most convenient to transmit them by frequency modulation of a carrier wave having a suitable mean frequency. This also has the advantage of being a constant amplitude system so that the amplitudes of the transmitted digit pulses are not affected by fading.

In this specification, it will frequently be stated that pulses are spaced apart by a certain interval. It is to be understood that the spacing applies to corresponding distinctive features of the pulses, such as the leading edges, and not the interval between the trailing edge of one pulse and the leading edge of the other.

In each of the aove-mentioned 119 channel periods of one microsecond duration, there will in general be transmitted two digit pulses spaced /2 microsecond apart, though sometimes one of them will be missing when the Zero value is to be indicated. During the synchronising period a pair of synchronising pulses spaced apart by /z microsecond will be transmitted. These synchronising pulses differ from the digit pulses in being of larger amplitude than the maximum amplitude which the digit pulses can assume, in order that the synchronising pulses can be recognised and selected at'the receiver.

It will thus be seen that a train of digit and synchronising pulses spaced apart by /2 microsecond is transmitted by the transmitter, but some of the digit pulses will fre quently be missing, according to the amplitudes of the samples which have to be coded. In particular, if all the channels are idle, no digit pulses at all will be transmitted, as will appear later. For timing purposes at the receiver, a periodic timing wave of frequency 1 megacycle per second is required, and this wave has to be synchronised with a corresponding timing wave at the transmitter. It would be possible, but inconvenient, to generate or synchronise the timing wave at the receiver by means of the synchronising pulses. Accordingly, as will be explained more fully later, it is preferred to transmit from the transmitter a train oftiming pulses spaced /2rnicrosecond apart and having an amplitude less than the minimum amplitude which a digit pulse can assume, so that they can be distinguished from the digit pulses or synchronising pulses at the receiver. It is further arranged at the transmitter that when a digit pulse or synchronising pulse is transmitted, the corresponding timing pulse is suppressed. It will thus be seen that by this arrangement, a continuous train of pulses spaced /2 microsecond apart is transmitted to the receiver, in which any digit pulse not present is replaced by a timing pulse.

The four possible voltage amplitudes of each digit pulse are preferably arranged to differ by a fixed voltage E, and the actual amplitude values chosen for the various pulses already mentioned will preferably be A: E for the timing pulses; 1 /2E, 2 /zE, 3%E, 4 E for the four amplitude values of the digit pulses; and 5 /zE for the synchronising pulses. Furthermore, in order to obtain the greatest possible discrimination against the effects of noise, the critical amplitude levels used in the decoding device at the receiver for distinguishing between the four digit amplitudes are set to correspond to the four values E, 2E, 3E and 4E. Thus no response is obtained for any amplitude less than that corresponding to E, so the decoding device does not respond to the timing pulses; it will also indicate the digit pulse values 1, 2, 3 and 4, in response to applied pulses having amplitudes lying respectively between E and 2E; 2E and 3E; 3E and 4E; and greater than 4E. By this arrangement the greatest possible discrimination against noise is obtained, since a noise voltage of either sign exceeding /2B is required to cause the decoding device to operate incorrectly.

The manner in which the code is arranged is indicated in Fig. 1. The input speech wave is sampled in such manner as effectively to obtain short amplitude modulated sample pulses, the amplitudes of which are proportional to the corresponding instantaneous speech wave voltage, and are positive or negative according as the speech wave voltage is positive or negative. Thus the pulse amplitude is zero when the speech wave voltage is zero. The amplitudes of both positives and negative sample pulses are quantised into 40 equally spaced values, thus producing 81' quantised steps, including Zero. Before quantising, the speech wave, or the sample pulses produced from it, are preferably passed through a logarithmic amplifier according to the usual practice, in order to reduce the quantising distortion for the smaller amplitudes.

Fig. 1 shows how the code is arranged for-negative voltages of the input speech waves. Graph A represents a range of negative sample pulse voltage amplitudes ranging from zero to V, where 1V is the maximum amplitude range covered by the speech Wave. The lengths of the forty equally spaced ordinates represent the forty corresponding negative quantised values.

In graph B the horizontal lines is divided into 41 parts by short vertical strokes and in these parts are represented the digit pulse combinations for the respective quantised values of graph A, including zero value. The digit pulse combination is a combination of two pulses but in some cases one of the pulses is zero. In that case the zero pulse is replaced by a corresponding timing pulse (shown dotted) in place of it.

The pulse combination represents the quantised value of the input speech wave on a scale of notation with radix 9, the amplitudes of the pulses of the pulse combination being regarded as digits of a number expressed in radix 9.

For a number of two digits the value represented is 9a+b where a is the value of the first digit and b the value of the second digit. a and b can each have 8 integral values +4 +4 or zero.

When two digit pulses are transmitted therefore the first one, identified in graph B by an arrow, represents nine times the relative value of the second one. The representation is complicated by the fact, referred to previously, that an amplitude of l /zE is the minimum amplitude of a pulse of a combination so that the nine possible amplitudes are +4 /zE=4, +3 /2E=3, +2 /2E=2, +1 /zE=1, 0:0, +l /zE=+1 and so on.

It will be observed that some of the pulses are positive and some are negative and the addition 9a+b must therefore be performed algebraically to arrive at the corresponding quantised value represented.

Some of the pulse combinations are numbered to facilitate comparison with the ordinates of graph A to which they correspond.

The amplitudes of all the pulses are shown approximately to scale in order to indicate the values already stated above. For convenience, the four possible amplitude values of each digit pulse will be called levels. The difference between two adjacent ordinates of graph A will be called a step; each level of the second digit pulse then corresponds to one step and each level of the first digit pulse corresponds to 9 steps.

The ordinates l to 4 of graph A are indicated by the presence of the second digit pulse alone, with the corresponding levels +1 to +4, which represent 1 to 4 steps, respectively. For ordinate 5, the first digit pulse appears with level +1 (corresponding to +9 steps) and the second digit pulse appears with level +4 corresponding to +4 steps, the total indication being 9(l+l)+4=+5 steps. For the next eight ordinates up to 13, the first digit pulse remains unchanged, and the second digit pulse appears successively With levels +3, +2, +1, 0, +1, +2, +3, and +4. For 14 the first digit pulse appears with level +2 (corresponding to +18 steps) and the second digit pulse appears with level +4, and the same series of changes is then repeated up to 22. The first digit pulse appears at level +3 for ordinate 23, and +4 at ordinate 32, the second digit passing through all the levels from +4 to +4 for the intermediate ordinates. The last ordinate 40 is given by the first pulse at level +4 (correspending to +36 steps) and the second pulse also at level +4 making up +40 steps altogether.

The coding for positive quantised values of the input speech wave can be deduced from Fig. 1, since for positive values, both digit pulses have signs opposite to those indicated in graph B, but they have the same amplitude as those shown.

The operation of the transmitter and of the receiver of the system will first be described with reference to the block schematic circuits of Figs. 2 and 3, respectively, and then detailed circuits of certain of the elements of these figures will be described.

The transmitter of the system is shown by the block schematic circuit of Fig. 2. The timing of the whole system is controlled by a crystal-controlled master generator 1 which generates a wave of frequency 2 megacycles per second which is converted by known methods into a train of rectangular pulses of alternately positive and negative polarity, each of the same duration, namely microsecond. This train of pulses will be called timing wave No. 1. The pulses are supplied to a frequency divider 2 which divides by two and produces a train of equal positive and negative rectangular pulses of duration /2 microsecond, which will be called timing wave No. 2. This wave is supplied to a shaping device 3 which produces a train of positive pulses of Mt microsecond duration with a repetition period of l microsecond. This train of pulses will be called timing wave No. 3.

Timing wave No. 2 from the output of the divider 2 is also supplied to a gate pulse generator 4' which includes a dividing circuit which divides by 120, and produces at its output a train of positive gating pulses of duration 1 microsecond, which will be repeated at a frequency of 8 /3 kilocycles per second. This dividing circuit may, of course, have any number of separate dividing stages in cascade, each of which divides by a convenient small number. The gating pulses are supplied to a delay network distributor 5 used for gating the speech waves corresponding to the 119 channels of the system. The dividing circuit 4 may be stabilised, if desired, by applying thereto over conductor 6 pulses from a suitable tapping point near the lower end of the delay network 5.

The 119 channel units 7 are all alike, and only the first three and the last one are shown. Each is connected to a corresponding tapping point 8 on the delay network 5, such tapping points being spaced at distances corresponding to a delay of 1 microsecondv Timing wave No. 2 is also supplied to each of the channel units 7 over conductor 9 and is so phased that a /2 microsecond positive pulse arrives at each channel unit approximately centrally during the period of the corresponding 1 microsecond gating pulse from the delay network 5. The channel gating arrangements are similar to those described in US. Patent 2,462,111 and British Patent 635,472.

The corresponding modulating input speech wave is applied to a terminal 10 of each channel unit 7. The circuit of a channel unit is described in detail below with reference to Fig. 4.

From the output of each channel unit 7 there appear simultaneously two negative pulses of /2 microsecond duration in response to the simultaneous reception of a gating pulse from the delay network 5 and a positive A2 microsecond pulse from timing Wave No. 2. The two negative output pulses appear on separate output conductors 11 and 12 and will be called the A pulse and the B pulse, respectively. When the modulating input voltage applied to terminal 10 is zero, both pulses are of the same amplitude at. If the input voltage is negative the A pulse will have a negative amplitude (a+x) and the B pulse will have a negative amplitude (a+x), where x is proportional to the magnitude of the applied voltage. If the input voltage is positive then the amplitudes of the A and B pulses are interchanged.

The A and B pulses from any one channel are coincident in time, but the pairs of A and B pulses from diiferent channels appear at different times determined by the corresponding gating pulses. Thus the A and B pulses from all the channels are respectively supplied over sepa rate conductors to two corresponding amplifiers contained in the circuit 13, each amplifier having a logarithmic characteristic, for compressing the amplitude variations of the A and B pulses in order to reduce the quantising error for small values of x, according to known practice. The A and B pulses from the output of the amplifiers 13 are applied to a mean level restorer circuit 14 over conductors 15 and 16. The circuit 14 is described in detail later with reference to Fig. 5, and combines the A and B pulses in such a manner as to remove the constant part a of the amplitude, retaining only a portion proportion to x and having a sign corresponding to the sign of x. The circuit 14 has two output conductors 17 and 18 on which respectively appear two pulses A and B of opposite sign but of equal amplitude proportional to x. If the input voltage is negative then pulse A is negative and pulse B is positive. If the input voltage is positive then the signs of the pulses A and B are interchanged. The conductors 17 and 18 are applied to a polarisation control device 19, the function of which will be explained later.

Timing wave No. 3 is also applied over conductor to the mean level restorer circuit 14 for the purpose of trimming the A and B pulses to a duration of /1 microsecond in order to reduce the effects of crosstalk from the pulses of adjacent channels.

The A and B1 pulses have equal amplitudes proportional to the input speech wave amplitude at the time defined by the A microsecond timing pulse applied over conductor 20: they therefore represent a sample of the input speech wave, and will be called sample pulses for convenience. The A and B pulses are coincident in time.

The pulse A or the pulse B whichever is negative, is also applied over conductor 21 to a coder 22 which generates the pair of code'pulses corresponding to the sample of the speech wave produced by the channel unit.

It will be noted from graph B, Fig. 1, that when the applied input voltage V is negative, the first digit pulse of each pair to be transmitted is always negative; also it was stated above, that when V is positive, all the digit pulses are reversed in sign. Thus, when V is positive the first digit pulse of each combination will be positive. This arrangement enables the coder 22 to be designed so that it covers only the 40 steps corresponding to one sign of V. If V has the other sign, it is only necessary to re verse the signs of all the pulses set up by the coder. This operation is controlled by the polarisation control device 19 which operates the polarisation restorer circuit 23 connected to the output of the coder 22. The circuit 23 decides the final signs of the output digit pulses. These digit pulses are supplied from the circuit 23 through a mixer circuit 24 to a transmitter 25 for frequency modulation of a carrier wave of appropriate frequency which is radiated from an antenna 26.

Considering first the production of the first digit pulse, it has already been state-d that the coder is supplied over conductor 21 with a negative pulse whose amplitude is proportional to the input voltage. If this amplitude is greater than that which corresponds to ordinate 4 of graph A, Fig. 1, a positive first digit pulse will be delivered by the coder 22 to the polarisation restorer circuit 23, the amplitude of the digit pulse having one of the four levels determined by the input voltage according to graph B, Fig. 1. It has already been explained that A and B pulses of opposite signs are supplied to the polarisation control device 19 over conductors 1'7 and 13 respectively. If the device 19 finds a negative pulse on conductor 17, corresponding to a negative input voltage, it applies a negative pulse to the polarisation restorer circuit 23 over conductor 27. This causes the circuit 23 to supply a negative digit pulse to the mixer circuit 24. If, however, the device 19 finds a negative pulse on conductor 18, corresponding to a positive input voltage, it now ap plies a negative pulse over conductor 28 to the polarisation restorer circuit 23 and causes it to supply a positive digit pulse to the mixer circuit 24. Thus the first digit pulse is always negative if the input voltage is negative, and always positive if it is positive, as required by the code shown in graph B, Fig. 1.

In order to produce the second digit pulse, the Vernier digit amplifier 29 is used. This amplifier is normally blocked, but is unblocked for microsecond at the right time during the channel period concerned by the corresponding positive pulse of the timing wave No. 3 applied over conductor 30. The polarisation restorer circuit 23 supplies the first digit pulse, just set up, over conductor 31 to the amplifier 29, and with the same sign as it is supplied to the mixer circuit. The circuit 23 also supplies the same digit pulse with the opposite sign over conductor 32 to the amplifier 22. The digit pulses supplied over conductors 31 and 32 will be denoted A and B respectively, The sample pulses A and B (from one of which the first digit pulse was derived) are also supplied from the mean level restorer circuit 14 to the vernier digit amplifier 29 over conductors 33 and 34- respectively. From what has been explained, it will be clear that pulses A and B have the same signs as pulses A and B respectively. The amplifier 29 derives from the A and B pulses-corresponding comparison pulses with the same signs as A and B respectively, and with amplitude equal to that which the first digit pulse represents when present alone without the second digit pulse. The ampliher 29 also picks out 'the positive sample pulse and the positive comparison pulse and subtracts one from the other, and multiplies the'amplitude difference by 9; thereby producing a pair of output pulses of equal amplitude but opposite signs called A and B pulses. If the positive comparison pulse corresponds to the B pulse and is or" smaller amplitude than the positive B pulse, or if it corresponds to the A pulse and is of greater amplitude than'the positive A pulse, then the A pulse will be negative and the B pulse will be positive. For the other two possible conditions the signs of the A and B pulses will be interchanged. The A and B pulses are delayed by /2 microsecond in the amplifier 29, and are respectively applied over conductors 35 and 36 to the input conductors 1'7 and 18 of the polarisation control device 19, in order to determine the sign of the second digit pulse at the output of the polarisation restorer circuit 23, as described for the first digit pulse. Whichever of the pulses A or B is negative is also applied (after /2 microsecond delay) to the input conductor 21 of the coder 22, which it operates a second time in the same way as before to produce the second digit pulse. The coder does not operate a third time because the A microsecond timing pulse applied over conductor 30 Will have disappeared, so that the Vernier digit amplifier 29'will be blocked. The second digit pulse is thus applied to the mixer circuit 24 half a microsecond after the first digit pulse.

It remains to describe the arrangements for transmitting the synchronising and timing signals. The timing wave No. 1, consisting of a train of positive pulses of microsecond duration with a repetition frequency of 2 megacycles per second, is applied over conductor 37 to the timing and synchronising generator 38, the output of which is connected over conductor 39 to the mixer circuit 24. This generator includes a timing amplifier through which the pulses are normally passed, and they emerge with an amplitude equal to /2E, as indicated in graph B, Fig. 1. However, conductors 31 and 32 are also connected to the generator 38, and whichever of the A and B pulses is negative acts as a blocking pulse, so that when a digit pulse is present, the corresponding timing pulse is suppressed, as already explained. It is evidently necessary to phase the timing wave No. 1 so that the timing pulses occur at the same times as the digit pulses.

The generator 38 also includes a second normally blocked amplifier to which gating pulses from the tap id of the delay network 5 corresponding to channel 12% (which is not used as a speech channel) are supplied over conductor 41. Timing wave No. 1 is also supplied to this amplifier, so that two /4 microsecond pulses are passed through the second amplifier during the synchronising period, but they emerge with amplitude 5%.E so that they can be recognised at the receiver, as already explained.

Thus it will be seen that there will be supplied to the transmitter 25 from the mixer circuit 24 two A microsecond pulses of amplitude 5 /2E spaced /1 microsecond apart during the synchronising period No. 120, and in general a pair of digit pulses each of microsecond duration and spaced apart by /2 microsecond during each of the 119 channel periods, such digit pulses having one of the four amplitudes 1 /2E, 2 /2E, 3 /2E or 4 /2E, according to the code; it however, a digit pulse is absent, its place is taken by a timing pulse of duration A microsecond and amplitude /zE. The receiver-thus receives a continuous train of pulses of various amplitudes but spaced apartby a constant interval of microsecond.

Although the pulses supplied to the transmitter 25 are all of duration microsecond, it is desirable, in order to reduce the frequency bandwidth occupied by the system, to widen out all the pulses to nearly /2 microsecond and give them substantially a half-sinusoidal shape. This can be done by known circuit arrangements (not indicated) in the transmitter 25.

As will be explained later, the coder 22 requires for its operation four stabilised limit voltages which are provided by the stabilised voltage source 42 which also supplies a fifth stabilised voltage required by the Vernier digit amplifier 29. This amplifier derives a further stabilised voltage from the timing and synchronising generator 38 over conductor 43. This will be made clear when the de tailed circuits are explained.

Fig. 3 shows a block schematic circuit diagram of the receiver for decoding the digit pulses produced by the transmitter circuit shown in Fig. 2. The frequencymodulated carrier wave is received and demodulated by means of conventional arrangements including a discriminator circuit (not shown) from which are obtained the digit pulses which are supplied to a linear pulse amplifier 44, one or more stages of which are provided with automatic gain control arrangements. The digit pulses at the output of the amplifier 44 will be of both signs, and are applied to a limiter and automatic gain control circuit 45. The circuit 45 generates an automatic gain control voltage which is applied over conductor 46 to one or more stages of the amplifier 44, and adjusts the gain until the synchronising pulses at the output of the circuit 45 have a specified amplitude, by means of which the relative levels of the received digit pulses are set. The circuit 45 also includes means for selecting the synchronising pulses and applying them to a shaper circuit 47 over a conductor 48. Circuit 47 produces a rectangular gating pulse of 1 microsecond duration in response to each pair of synchronising pulses. The gating pulses are applied to a delay network distributor 49 (similar to 5, Fig. 2) which is used for gating the receiving channel units.

The pulses present in the circuit 45 are already of the required frequency to serve as a timing wave at the receiver, but they will be accompanied by noise. They are therefore applied over conductor 50 to a timing wave selector circuit 51, which consists of one or more sharply resonant circuits arranged in cascade and tuned to a fre quency of 2 megacycles per second, whereby a sine-wave of frequency 2 megacycles per second of substantially constant amplitude, and substantially free from noise, is derived from the received pulses, which, as already explained, are of various amplitudes, but are repeated at regular intervals of /2 microsecond. The sharply resonant circuits are followed by a limiter in which the sinewave is converted into a train of rectangular pulses of /4 microsecond duration, which will be the same as timing wave No. 1 of Fig. 2. This Wave is applied to a dividing circuit 52 similar to the divider 2 of Fig. 2, which divides by 2 and includes shaping means for producing a train of alternately positive and negative rectangular pulses of duration /2 microsecond, which train is the same as timing wave No. 2 of Fig. 2. This timing wave No. 2 is applied over conductor 53 to a pulse combining circuit 54. The timing wave No. 3 is not required in Fig. 3.

The limiter circuit 45 is also provided with a balanced output arrangement connected to two output conductors 15 and 16. The arrangement is such that if a received digit pulse is negative, a corresponding negative pulse is delivered to conductor 15, and if the received digit pulse is positive, a corresponding negative pulse is delivered to conductor 16 instead. The conductors 15 and 16 are connected to a recoder driver unit 55 which is substantially the same as the mean level restorer circuit 14 of Fig. 2. The same detailed circuit (Fig. 5) serves for the mean level restorer 14 and the recoder driver unit and hence the input and output conductors connected to the latter have the same reference numerals as those for the circuit 14 in Fig. 2'. The unit 55 supplies in response to each digit pulse a pair of pulses respectively over conductors 17 and 18 to a polarisation control device 56 exactly similar to the device 19 of Fig. 2. These pulses will be called A; and B, respectively and are of the same nature as the A and B pulses of Fig. 2. The unit 55 is supplied with the timing wave No. 1 from the selector 51 over conductor 20 so phased that each pair of digit pulses synchronises with a pair of A microsecond pulses of the timing wave, for trimming the A and B pulses corresponding to each digit pulse. Whichever of the A and B pulses is negative is applied to a recoder 57 which differs from the coder 22 of Fig. 2 only in the adjustment, as will be explained later. Positive recoded output pulses corresponding to each pair of received digit pulses are supplied from the recoder circuit 57 to the pulse combining circuit 54 which is controlled by polarisation control pulses A and B applied over conductors 27 and 23 from the polarisation control circuit 56. The combining circuit 54 adds together the two recoded pulses produced by the circuit 57 in the ratio 9:1 and with the proper signs as determined by the A and 13 pulses. The combining circuit 54 is caused to distinguish between the first and second recoded pulses by the timing wave No. 2 which is applied from the divider circuit 52 over conductor 53. The combined pulses at the output of the combining circuit 54 will then be quantised versions of the pulses at the output of the logarithmic amplifier 13 of Fig. 2. They are accordingly applied through an antilogarithmic amplifier 58, which is connected over conductor 59 to the inputs of all the 119 channel receiving units 60. These units are gated at the proper times by gating pulses from appropriate tapping points 61 of the delay network 49. The reconstituted pulses of each channel are passed through a low pass filter (not shown) in the channel unit, and the recovered speech wave appears at terminal 62. As in the case of Fig. 1, the recoder 57 requires to be supplied with four stabilised voltages provided by a stabilised voltage source 63 generally similar to the source 42 of Fig. 2. This also provides two further stabilised voltages required for the limiter and automatic gain control circuit 45.

It will be realised that the two received synchronising pulses of amplitude 5 /zE will be applied to the recoder driver unit 55 and will behave like two digit pulses of maximum amplitude, and so will produce an output pulse from the combining circuit 54 having an amplitude of 40 steps. However, during the synchronising period none of the channel units will be operative, so this is immaterial.

Having given a general outline of the operation of the system, the detailed circuits of the more important elements thereof will be described, from which the processes of coding and decoding will be more clearly understood.

The circuits required for the master generator 1, the divider and shaper 2 and 3, and the gate pulse generator 4 of Fig. 2 are all well known. The distribution and synchronising arrangements involving the delay network 5 are similar to those described in U.S. Patent 2,462,111 and British Patent 635,472, already referred to.

Fig. 4 shows the circuit of the channel units 7 of the transmitter, Fig. 2. It consists of a pair of similar valves, 64, 65 arranged as a push-pull amplifier which, however, is biased so as to be normally blocked. The operating high tension source (not shown) for the valves is intended to have its positive terminal connected to terminal 66 and its negative terminal to terminal 67, which should preferably be connected to ground. Numerals 66 and 67 will be used for the terminals for the high tension source in all subsequent figures. The speech or other input wave to be transmitted is applied to the input terminal 10 mam connected to one end of the primary winding of a transformer 68, the other end being connected to ground. The secondary Winding is connected between the control grids of the two valves, and has a centre tap connected to ground.

The cathodes of the valves 64 and 65 are connected together and are biased positively beyond the cut-off point by connection to the junction point of the resistors 69 and 70 connected in series between terminals 66 and 67. Equal load resistors 71 and 72 are provided for the anode circuits of the valves 64 and 65 and the anodes are respectively connected to the output conductors 11 and 12 (shown also in Fig. 2) through capacitors 73 and 74 and isolating rectifier- s 75 and 76. The amplifier com prising the valves 6 and 65 is periodically unblocked by a gating valve 77, the cathode of which is biased positively by a conventional resistor-capacitor network 78 so as to block the valve. The anode is connected to terminal 66 through a load resistor 79, and to the cathodes of the valves 64 and 65 through a coupling capacitor 86. The l microsecond gating pulses from the tap 8 of the delay network (Fig. 2) are applied to the control grid of the gating valve 77 through a capacitor 81 and resistor $2. The control grid is, however, connected to ground through a rectifier 83 and a resistor 84 of moderate value. A grid leak resistor 85 connects the junction point of elements 81 and 82 to ground.

The rectifier 83 is directed so that it normally shunts to ground the positive gating pulses applied through the capacitor 31, so that they are unable to unblock the gating valve. However, the timing Wave No. 2 is applied from conductor 9 over a capacitor 86 to the junction point of elements 83 and 84. As already explained, the timing wave No. 2 consists of alternate positive and negative pulses of /2 microsecond duration, and should be phased so that a positive /2 microsecond pulse occurs symmetrically during the l microsecond interval occupied by the gating pulse. The A. microsecond pulse being applied to the cathode of the rectifier 83 blocks it so that the gating pulse is able to unblock the valve 77 for the period of the /2 microsecond timing pulse, and a negative pulse of A1 microsecond duration is then transmitted to the cathodes of the valves 64 and 65, thereby unblocking them for a period of /2 microsecond. The amplitude of the last-mentioned pulse should be so chosen that when the valves 64 and 65 are unblocked, the control grids are biased to the centre of the straight portion of the anode current-grid voltage characteristic curve. It will thus be seen that if the input voltage at terminal 16 is zero, each of the valves 64 and 65 will generate a negative output pulse of duration /2 microsecond during each 1 microsecond period of the channel concerned. The rectifiers 75 and 76 should be directed so as to pass these negative pulses respectively to the output conductors ill and 12. These are the pulses already designated A and B, and have equal amplitudes a when the input voltage is zero.

it will be supposed that the transformer 68 has been connected so that when the input voltage at terminal 10 is negative, a positive potential is applied to the control grid of the valve 64. and an equal negative potential to the control grid of the valve 65. The amplitude of the A pulse delivered to conductor 11 will then be increased to a+x and that of the B pulse delivered to conductor 12 will be decreased to ax, where x is proportional to the input voltage. If the input voltage is positive, it follows that the amplitude of the A and B pulses will be ax and a-l-x, respectively, the pulses, however, still being negative.

The leak resistor 87 connected between the junction point of elements 74 and 76 and ground is provided as a return path for the rectifier 76. Two resistors 88 and 89 together equal to resistor 87 connect the junction point of elements 73 and 75 to ground, for a similar reason. A terminal 99 connected to the junction point of resistors 88 and 89 is provided for the application of a supervisory signal voltage which should be positive and sufficient to block the rectifier 75, thereby suppressing the A pulses. The suppression of the A pulses thus indicates a supervisory signal, and as will be explained later, the corresponding channel unit at the receiving end is provided with a rectifier circuit and relay which responds to this condition.

Fig. 5 shows the details of the mean level restorer circuit 14 of Fig. 2, and also of the recoder driver unit 55 of Fig. 3. For the present the operation at the transmitter only will be described. As shown in Fig. 5, the mean level restorer circuit comprises two similar pentode valves 91 and 92, arranged as a push-pull amplifier.

The negative A and B pulses from the logarithmic amplifiers 13 of Fig. 2 are applied respectively over conductors 15 and 16 through transformers 93 and 94 to the control grids of the valves 92 and 91. The anodes of these valves are connected to opposite ends of the primary winding of an output transformer 95, this winding having a centre tap connected to the positive high tension terminal 66. The secondary winding also has a centre tap connected to ground, and the ends of the winding are connected to the conductors l7 and 18 (shown also in Fig. 2) leading to the polarisation control device 19,

Fig. 9. The ends of the said secondary winding are also connected to the conductors 33 and 34 which, as shown in Fig. 2, lead to the Vernier digit amplifier 29, Fig. 11.

The ends of the secondary winding of transformer 95 are also connected through rectifiers 96 and 97 to the common output conductor 21 which is connected to the coder 22, Fig. 6.

The valves 91 and 92 are provided with cathode bias resistors 98 and 99 which introduce a relatively large amount of negative feedback, so that the gain of each valve is small or zero and remains very stable over a long period. The valves are at the same time biased so as to be cut as by the suppressor grids, but the timing wave No. 3 (consisting of positive A microsecond pulses) is applied to the suppressor grids over conductor 20 to unblock the valves during the centre of the period of each pair of /2 microsecond A and B pulses applied to the control grids, for trimming these pulses, as already explained.

The secondary windings of the transformers 93 and 94 each have one terminal connected to a tapping point on the corresponding cathode resistor 99 or 98, to provide appropriate bias for the control grids, and the transformers are poled in such manner that the pulses applied to the control grids are positive, it being remembered that the A and B pulses are always negative. As already explained, when the input voltage applied to the channel unit is zero, the A and B pulses will have the same amplitude a, and this amplitude is chosen in relation to the efiective control grid bias of the valves 91 and 92 so that when the valves are unblocked by the trimming pulse, the total control grid potential corresponds to the lower end of the straight portion of the anode current-grid voltage characteristic of the valves. When the A and B pulses both have amplitude a, it is evident that owing to the balance of the windings of the transformer 95, there will be no potential at either end of the secondary winding. For a negative input voltage, however, the A and B pulses will have respective negative amplitudes a+x and a-x, as already explained, and it will be evident that the potentials generated respectively at the terminals of the secondary winding will be equal, and proportional to the difference between the amplitudes of the A and B pulses, that is, proportional to x; and will have opposite signs. It will be assumed that the transformer windings are so poled that when the A pulse is of greater amplitude than the B pulse, indicating that the speech wave voltage is negative, a negative potential appears on conductors l7 and 33. it will be evident from what has been explained that when the speech wave 13 voltage is positive, the A pulse will be of smaller amplitude than the B pulse, and so a negative potential now appears on conductors 18 and 34.

The pulses appearing on conductors 17 and 18 are the pulses which have been already denoted as A and B and will have equal amplitudes proportional to x, and will be of opposite signs. Whichever of these pulses is negative gets through one of the rectifiers 96 and 97, and is supplied to the coder over conductor 21, as already explained.

It should be mentioned that owing to the presence of stray capacities in the circuit, the windings of the transformers 93, 94 and 95 are liable to form oscillatory circuits which may ring on the application of pulses. This may be avoided, if necessary, by connecting damping resistors (not shown) across the primary and secondary windings. Transformers such as 93 and 94 which are transmitting unidirectional pulses could alternatively be damped by shunting them with rectifiers (not shown) poled so as to be blocked by the pulses.

In several of the circuits which will be described below, similarly arranged transformers are shown. The windings of such transformers may, if necessary, be damped in like manner with appropriate resistors or rectifiers.

The details and operation of the coder 22 will now be explained with reference to Fig. 6, which also includes a block representing the stabilized voltage source 42 described in detail in Fig. 8. The coder 22 shown in Fig. 6 comprises four exactly similar coding stages 100, 101, 102 and 103 which comprise single stroke multivibrators each of which is arranged as shown in Fig. 7. The conductor 21 (Fig. 6) is connected to the control grid of an amplifier valve 104 arranged as a cathode follower, and the upper end of the cathode load resistor 105 is connected in common to the input terminals 106 of the four coding stages through capacitors 107 to 110 and rectifiers 111 to 114. The negative pulse of amplitude proportional to x supplied by the mean level restorer circuit 14 (Figs. 2 and to conductor 21 and constituting a sample of the input speech wave, thus causes a negative pulse of proportional amplitude to be applied to all the rectifiers 111 to 114 simultaneously through the valve 104. These rectifiers are however, all initially blocked by corresponding positive potentials derived from terminals 115 to 118 of the stabilised voltage source 42, these potentials having respectively the values 5e, 14c, 23e and 32a, where 4-02 is the maximum amplitude of the pulse at the cathode of the valve 104. When a given pulse has an amplitude exceeding one of the four first-mentioned values, the corresponding rectifier and also the preceding ones of the series (if any) will be unblocked and the corresponding coding stages will be triggered. Thus, for example, if the applied pulse amplitude is 20c, the stages 100 and 101 will be triggered but not 102 or 103. The triggering of any coding stage causes it to generate a rectangular pulse of /2 microsecond duration which is delivered to the output terminals 119 and 120 in such manner that terminal 120 is positive to terminal 119. The output terminals of the four coding stages are connected in series aiding between ground and the output conductor 121 leading to the polarisation restorer circuit 23 (Figs. 2 and A positive digit pulse having amplitude equal to the sum of the amplitudes of all the pulses generated by the coding stages which have been triggered will thus appear on conductor 121. Terminals 119 and 120 of the respective coding stages are shunted by rectifiers 122 to 125 directed as shown so that any coding stage which has not been triggered will be by-passed by the pulses produced by the other stages, thus avoiding any risk of unwanted triggering of such stages. These rectifiers also act as damping loads to prevent the output circuits of the coding stages from ringing. The reason for the particular choice of the four potentials produced by the source 42 at terminals to 118 can be understood by reference to Fig. 1. It will be noted that the first digit pulse at a level 1 /2E appears when the amplitude has reached five steps, and it appears at successively increasing levels when the amplitude has reached 14, 23 and 32 steps respectively. Thus for the production of the first digit pulse, the blocking bias potentials for the rectifiers 111 to 114 evidently have to be in the ratios 5 :14:23:32.

It was explained with reference to Fig. 1, that the digit pulse amplitude levels are given by 1 /zE, 2 /2E, 3 /zE and 4 /2E. These differ by E, but the first level is 1 /2E. Accordingly it is necessary that the second, third, and fourth coding stages 101 to 1.03 should each generate a pulse of amplitude E, while the first coding stage 100 must generate a pulse of larger amplitude l /2E. The amplitude of the pulse generated by any coding stage is determined by a stabilised voltage determined by a gas discharge tube 126 and two resistors 127 and 128 connected in series between the high tension terminals 66 and 67. The junction point of resistors 127 and 128 is connected to a limiter terminal 129 of the first coding stage 100 through a rectifier 130, and the junction between the tube 126 and the resistor 127 is connected to the limiter terminal 129 of each of the other coding stages 101, 102 and 103 through rectifiers 131, 132 and 133 respectively, each rectifier having its cathode connected to the corresponding limiter terminal 129.

The gas discharge tube 126 effectively fixes the potential applied to the rectifiers 131, 132 and 133 at a potential P volts less than that of the high tension source, the value of P depending on the type of gas tube used. The rectifier must, however, be biased at a somewhat lower voltage, and the values of the resistors 127 and 128 should be so chosen that the potential applied to the rectifier 130 is l /zP less than that of the high tension source. As will be explained with reference to Fig. 7, by this arrangement the amplitude of the pulses generated by the first coding stage will be fixed at 1 /2E volts, while the amplitude of the pulses generated by each of the other coding stages will be fixed at E volts.

Fig. 7 shows the circuit of each of the coding stages of Fig. 6. It consists of two valves 134, 135 arranged as a conventional single-stroke multivibrator. The anode of valve 134 is connected to terminal 66 through a load resistor 136 and to the control grid of valve 135 through a capacitor 137. The anode of valve 135 is connected to terminal 66 through the primary winding of an output transformer 138, and to the control grid of the valve 134 through a capacitor 139. The secondary winding of the transformer 138 is connected to the output terminals 119 and 120. The cathode of the valve 135 is biased positively by connection to the junction point of two resistors 140 and 141 connected in series between terminals 66 and 67 so that this valve is normally cut off. The cathode of the valve 134 is connected directly to ground and the control grids of the valves are connected to ground through the usual leak resistors 142 and 143. These resistors are shunted by rectifiers 144 and 145, which are oppositely directed so that they do not affect the triggering of the multivibrator by the negative pulses applied at terminal 106, but they accelerate the recovery of the circuit by short circuiting the leak resistors as soon as the potential of the control grids is on the point of changing sign. The values of the resistors and capacitors should be chosen so that the pulses generated when the circuit is triggered have a duration of /2 microsecond.

The limiter terminal 129 is connected to the anode of the valve 135. Before triggering, this valve is cut off, so that the anode voltage is equal to that of the high tension source. In the case of the first coding stage, the rectifier 130 (Fig. 6) will be blocked in this condition. When the circuit is triggered, the valve 135 conducts and the anode voltage falls rapidly until it equals the potential of the junction point of resistors 127 and 128 (l /2P volts). The rectifier 130 then conducts and prevents the anode potential from falling any further. The amplitude of the negative pulse so generated at the anode is thus rigidly limited to the desired value 1 /2P. In the case of the other coding stages the limiting action is similar, except that the limiting amplitude is P volts instead of 1 /2P volts.

The transformer 138 should be poled so that when the multivibrator is triggered, terminal 120 produces a positive potential with respect to terminal 119. If it be assumed that the voltage amplification ratio of the polarisation restorer circuit 23 is y, and that the voltage step-up ratio of the transformer 138 is z, then in order to obtain the desired four levels 1 /2E, 2 /2E, 3 /2E, and 4 /2E for the pulses which are transmitted to the mixer circuit 24, Fig. 2, it will evidently be necessary to choose yz=E/P.

The conductor 146 shown dotted in Fig. 7 is connected to terminal 129 of the first coding stage 100 only of the coder as shown in Fig. 6, and connects this coding stage to the polarisation control device, Fig. 9. It will be clear from what has just been explained that a negative pulse will be applied to conductor 146 when the multivibrator of the first coding stage 100 is triggered. Thus, if the pulse at the cathode of the valve 104 (Fig. 6) is of suflicient amplitude to operate at least the first stage of the coder, so that a digit pulse is produced, a negative pulse for unblocking the polarisation control device (Fig. 9) will be applied over conductor 146, as will be explained later.

Fig. 8 shows details of the stabilised voltage source 42 shown in Figs. 2 and 6. It comprises a gas discharge tube 147 connected in series with a resistor 148 between the high tension terminals 66 and 67. A chain of four resistors 149, 150, 151 and 152 is connected across the tube 147. Four similar valves 153 to 156 are arranged as cathode followers with their anodes connected directly to terminal 66 and their cathodes through four corresponding equal resistors 157 to 160 to ground. The control grids are respectively connected to the left-hand ends of resistors 149 to 152. Terminals 115 to 118 are connected respectively to the cathodes of the valves 153 to 156 through high resistors 161 to 164 shunted by rectifiers 165 to 168. A terminal 169 (the purpose of which is described later) is connected in a similar manner through a resistor 170 shunted by a rectifier 171 to a tapping point on resistor 157.

The resistors 156 to 152 should each have a resistance equal to some convenient value R, while the resistance of resistor 149 should be R/9. Then if 32e/k is the potential across the tube 147, where k is the voltage transformation ratio of the cathode follower circuit, the potentials of the cathodes of the valves 153 to 156 will be 52, 146, 232 and 32e as required. The tapping point on the resistor 157 should be that corresponding to a potential of 4e. The ratio k depends on the value chosen for the resistors 157 to 166, and is generally slightly less than 1.

The use of the cathode follower valves enables the desired potentials to be conveniently produced from sources having a very low effective internal impedance, so that the potentials will not be appreciably changed when current is drawn from any of the terminals 115 to 118 or 169. in order that the pulses applied to the coding stages in Fig. 6 shall not thereby be efiectively shunted away, the high series resistances 161 to 164 and 170 are provided in Fig. 8. The rectifiers shunting these resistances are provided to prevent the capacitors 107 to 116 of Fig. 6 from becoming charged. These rectifiers are directed, as shown, to be normally blocked by the positive potentials of the corresponding cathodes of the valves 153 to 156.

in practice, of course, the value of e will be determined by the maintaining voltage of the type of gas discharge 16 tube 147 which is selected. Thus, for example, this maintaining voltage might be volts, in which case 32e=80 volts, or e=2 /z volts. The gain of the elements 7, 13 and 14 (Fig. 2) should in this case be so chosen that the maximum amplitude of a sample pulse at the input to the coder 22 is 40e:100 volts.

As stated above with reference to Fig. 2, the first digit pulse from the coder 22, Fig. 7, is applied to the polarisation restorer circuit 23, Fig. 10, which is also aflected by the polarisation control device 19, the circuit of which is shown in Fig. 9. The device 19 comprises two pairs of similar valves 172', 173, 174 and 175 arranged as two similar multivibrators, and a bias control valve 176. The anodes of the valves 172 and 173 are respectively connected to terminal 66 through load resistors 177 and 173, and to the control grids of the opposite valves through capacitors 179 and 1811. Elements 181 to 184 associated with valves 174 and 175 are respectively the same as elements 177 to 180.

The cathodes of the valves 1'72 and 174 are connected directly to ground. The cathodes of the valves 173 and 175 are connected directly to the cathode of the valve 176, which is connected to ground through two resistors 1 85 and 186 connected in series. The anode of the valve 176 is connected to terminal 66 through resistor 187. The control grid of the valve 176 is connected to the junction point of resistors 185 and 186 through a leak resistor 188. The resistors are so proportioned that the drop of potential produced by the cathode current of the valve 176 will bias the valves 173 and 175 beyond the cut-ofi. Valves 172 and 174 will evidently be in the conducting condition.

The cut-off bias is of such magnitude that neither of the A and B pulses applied to conductors 17 and 18 is able to trigger the corresponding multivibrator except when a negative pulse is applied from the coder 22 over conductor 146 through the blocking capacitor 189 to the control grid of valve 176. As will be evident from the previous description of the coder circuit, this negative pulse appears whenever an output digit pulse is produced by the coder 22, and it is arranged to reduce the cathode current of the valve 176 and thereby to reduce the cutoff bias of the valves 173 and 175 by such an amount that while these valves are still cut off, it is now possible for one of the multivibrators to be triggered by the A or the B pulse. This arrangement is for the purpose of preventing the polarisation control device from operating if no output digit pulse is produced by the coder.

It will be noted that it is not necessary to provide the valves 173 and 175 with separate bias valves because the multivibrators are never both operated at the same time.

The conductors 17 and 18 are connected respectively to the control grids of the valves 172 and 174 through isolating rectifiers 196 and 191 directed to pass only negative pulses to these control grids. The anodes of the valves 173 and 175 are respectively connected through capacitors 192 and 193 to the output conductors 27 and 28 connected to the polarisation restorer circuit 23 which is shown in detail in Fig. 10. Leak resistors 194 and 195' are provided as return paths for isolating rectifiers which are shown in Fig. 10.

The polarisation control circuit (Fig. 9) operates as follows:

If the input voltage is negative, the A and B pulses respectively applied to conductors 17 and 18, are negative and positive, respectively. The A pulse thus gets through the rectifier and triggers the left hand multivibrator from the idle condition to the operated condition with the valve 173 conducting, if an unblocking pulse is received from the coder 22 over conductor 146. The multivibrator restores itself after a period depending on the time constants of the associated circuits, and the anode of the valve 173 delivers a negative rectangular pulse to the output conductor 27. The time constants are pref-

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