US20230402480A1 - Method of manufacturing semiconductor image sensor - Google Patents
Method of manufacturing semiconductor image sensor Download PDFInfo
- Publication number
- US20230402480A1 US20230402480A1 US18/448,093 US202318448093A US2023402480A1 US 20230402480 A1 US20230402480 A1 US 20230402480A1 US 202318448093 A US202318448093 A US 202318448093A US 2023402480 A1 US2023402480 A1 US 2023402480A1
- Authority
- US
- United States
- Prior art keywords
- light sensing
- forming
- sensing unit
- type
- reflective layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 61
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 238000002955 isolation Methods 0.000 claims abstract description 59
- 238000000034 method Methods 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 230000005855 radiation Effects 0.000 claims abstract description 25
- 229910052751 metal Inorganic materials 0.000 claims description 37
- 239000002184 metal Substances 0.000 claims description 37
- 238000007788 roughening Methods 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 description 29
- 238000000231 atomic layer deposition Methods 0.000 description 10
- 238000005229 chemical vapour deposition Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- -1 HfZrO Inorganic materials 0.000 description 1
- 206010034960 Photophobia Diseases 0.000 description 1
- 229910004481 Ta2O3 Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910000167 hafnon Inorganic materials 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14641—Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14629—Reflectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14634—Assemblies, i.e. Hybrid structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14645—Colour imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14649—Infrared imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
Definitions
- Semiconductor image sensors are used for sensing light.
- the semiconductor image sensors utilize an array of pixels in a substrate, including photodiodes and transistors that can absorb radiation projected toward the substrate and convert the sensed radiation into electrical signals.
- a performance of a semiconductor image sensor depends on, among other things, its quantum efficiency and optical crosstalk.
- the quantum efficiency of an image sensor indicates a number of electrons generated per number of incident photons in the image sensor.
- the optical crosstalk occurs when some photons incident upon a pixel are absorbed by another pixel.
- FIG. 1 ( a ) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 1 ( b ) illustrates a cross-sectional view taken along line A-A′ of the semiconductor device in FIG. 1 ( a ) .
- FIG. 2 ( a ) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 2 ( b ) illustrates a cross-sectional view taken along line B-B′ of the semiconductor device in FIG. 2 ( a ) .
- FIG. 3 ( a ) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 3 ( b ) illustrates a cross-sectional view taken along line C-C′ of the semiconductor device in FIG. 3 ( a ) .
- FIG. 4 ( a ) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 4 ( b ) illustrates a cross-sectional view taken along line D-D′ of the semiconductor device in FIG. 4 ( a ) .
- FIG. 5 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 6 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 7 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure.
- FIG. 8 A , FIG. 8 B , FIG. 8 C , FIG. 8 D , FIG. 8 E , FIG. 8 F , FIG. 8 G , and FIG. 8 H illustrate a method of manufacturing a semiconductor device such as the semiconductor device of FIG. 2 ( a ) , FIG. 2 ( b ) , FIG. 3 ( a ) , and FIG. 3 ( b ) .
- first and second features are formed in direct contact
- additional features may be formed between the first and second features, such that the first and second features may not be in direct contact
- present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
- spatially relative terms such as “beneath,” “below,” “lower,” “above,” “upper,” “on” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures.
- the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures.
- the apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
- first,” “second,” and “third” describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another.
- the terms such as “first,” “second,” and “third” when used herein do not imply a sequence or order unless clearly indicated by the context.
- the terms “approximately,” “substantially,” “substantial,” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation.
- the terms can refer to a range of variation of less than or equal to ⁇ 10% of that numerical value, such as less than or equal to ⁇ 5%, less than or equal to ⁇ 4%, less than or equal to ⁇ 3%, less than or equal to ⁇ 2%, less than or equal to ⁇ 1%, less than or equal to ⁇ 0.5%, less than or equal to ⁇ 0.1%, or less than or equal to ⁇ 0.05%.
- two numerical values can be deemed to be “substantially” the same or equal if a difference between the values is less than or equal to ⁇ 10% of an average of the values, such as less than or equal to ⁇ 5%, less than or equal to ⁇ 4%, less than or equal to ⁇ 3%, less than or equal to ⁇ 2%, less than or equal to ⁇ 1%, less than or equal to ⁇ 0.5%, less than or equal to ⁇ 0.1%, or less than or equal to ⁇ 0.05%.
- substantially parallel can refer to a range of angular variation relative to 0° that is less than or equal to ⁇ 10°, such as less than or equal to ⁇ 5°, less than or equal to ⁇ 4°, less than or equal to ⁇ 3°, less than or equal to ⁇ 2°, less than or equal to ⁇ 1°, less than or equal to ⁇ 0.5°, less than or equal to ⁇ 0.1°, or less than or equal to ⁇ 0.05°.
- substantially perpendicular can refer to a range of angular variation relative to 90° that is less than or equal to ⁇ 10°, such as less than or equal to ⁇ 5°, less than or equal to ⁇ 4°, less than or equal to ⁇ 3°, less than or equal to ⁇ 2°, less than or equal to ⁇ 1°, less than or equal to ⁇ 0.5°, less than or equal to ⁇ 0.1°, or less than or equal to ⁇ 0.05°.
- Some embodiments of image sensors use at least two kinds of pixel sensors, classified by the incident radiation, forming a repeating unit arranged in an array.
- an image sensor include a first pixel sensor for sensing long wavelengths (e.g., infrared (IR) and red light) and a second pixel sensor for sensing short wavelengths (e.g., green and blue light).
- each of the pixel sensors further use at least two kinds of light sensing units, classified by the amount of the incident radiation (or light) to be received.
- a first light sensing unit refers to a light sensing unit that is operable to receive less radiation (or light) compared to a second light sensing unit given a certain period of time.
- crosstalk becomes a major concern between neighboring pixel sensors and further the neighboring light sensing units contained in the neighboring pixel sensors.
- the light sensing unit becomes more sensitive to crosstalk because the signal (light directly received by the sensor) is smaller in comparison to the noise (the crosstalk between neighboring pixel sensors).
- Crosstalk adversely affects the amount of the light that is received by the light sensing unit. Pixel sensor designs which reduce crosstalk provide increased light absorption efficiency, especially beneficial for low levels of incident light.
- FIG. 1 ( a ) illustrates a top view of a semiconductor device 101 according to some embodiments of the present disclosure.
- FIG. 1 ( b ) illustrates a cross-sectional view taken along line A-A′ of the semiconductor device 101 in FIG. 1 ( a ) .
- the semiconductor device 101 of FIG. 1 ( a ) includes a plurality of first light sensing units 103 a , 103 b and a plurality of second light sensing units 105 a , 105 b , 105 c , 105 d.
- the semiconductor device 101 has a first surface 101 a and a second surface 101 b opposite to the first surface 101 a .
- semiconductor device 101 is a bulk semiconductor substrate (e.g., a bulk silicon (Si) substrate), a silicon-on-insulator (SOI) substrate, or a wafer.
- the semiconductor device 101 is a wafer.
- the first light sensing unit 103 a , 103 b is operable to receive a radiation projected toward the first light sensing unit 103 a , 103 b and convert the radiation to electrical signal.
- the first light sensing unit 103 a , 103 b is operable to detect different wavelengths (colors) from an incident light (e.g., blue (B), green (G), and red (R) light).
- the first light sensing unit 103 a , 103 b is a component or a part of a pixel sensor.
- the first light sensing unit 103 a , 103 b is arranged in a sub-array in a pixel sensor.
- the second light sensing unit 105 a , 105 b , 105 c , 105 d is operable to receive a radiation projected toward the second light sensing unit 105 a , 105 b , 105 c , 105 d and convert the radiation to electrical signal.
- the second light sensing unit 105 a , 105 b , 105 c , 105 d is operable to detect different wavelengths (colors) from an incident light (e.g., blue (B), green (G), and red (R) light).
- the second light sensing unit 105 a , 105 b , 105 c , 105 d refers to a light sensing unit that is operable to receive more radiation than a first light sensing unit 103 a , 103 b .
- the first light sensing unit 103 a , 103 b refers to a light sensing unit that is operable to receive less radiation than a second light sensing unit 105 a , 105 b , 105 c , 105 d .
- the first light sensing unit 103 a , 103 b is operable to receive less radiation by disposing a reflective layer 119 above the first light sensing unit 103 a , 103 b .
- the second light sensing unit 105 a , 105 b , 105 c , 105 d is also a component or a part of a pixel sensor.
- the second light sensing unit 105 a , 105 b , 105 c , 105 d is arranged in a sub-array with the first light sensing unit 103 a , 103 b in a pixel sensor.
- the first light sensing unit 103 a , 103 b and the second light sensing unit 105 a , 105 b , 105 c , 105 d constitute a pixel sensor.
- a pixel sensor includes at least one first light sensing unit 103 a , 103 b and at least one second light sensing unit 105 a , 105 b , 105 c , 105 d .
- the first light sensing unit 103 a , 103 b is disposed adjacent to at least two second light sensing units 105 a , 105 b , 105 c , 105 d .
- the first light sensing unit 103 a , 103 b is disposed adjacent to two, three, four, five, six, seven, or eight second light sensing units 105 a , 105 b , 105 c , 105 d .
- the first light sensing unit 103 a , 103 b is surrounded by the second light sensing unit 105 a , 105 b , 105 c , 105 d around a periphery of the first light sensing unit 103 a , 103 b .
- the second light sensing units 105 a , 105 b , 105 c , 105 d is a circular region surrounded by the first light sensing units 103 a , 103 b .
- the first light sensing unit 103 a , 103 b is surrounded by at least two second light sensing units 105 a , 105 b , 105 c , 105 d in a pixel sensor.
- a first light sensing unit 103 a , 103 b is surrounded by three second light sensing units 105 a , 105 b , 105 c , which constitute a repeating pixel sensor unit.
- a repeating pixel sensor unit includes a first light sensing unit 103 a , 103 b surrounded by four second light sensing units 105 a , 105 b , 105 c , 105 d.
- a pixel sensor composed of the first light sensing unit 103 a and the second light sensing units 105 a , 105 b , 105 c , 105 d is one of a blue light sensor, a green light sensor, and a red light sensor.
- a first isolation structure 111 a , 111 b , 111 c is further disposed between the first light sensing unit 103 a , 103 b and the neighboring second light sensing unit 105 a , 105 b so the light projected toward to the second light sensing unit 105 a , 105 b is blocked and does not reach the first light sensing unit 103 a , 103 b .
- crosstalk interference from the neighboring second light sensing unit 105 a , 105 b to the first light sensing unit 103 a , 103 b is reduced.
- the first isolation structure 111 a , 111 b , 111 c has a substantially rectangular shape, a trapezoidal shape, an elongated elliptical shape, or any other suitable shape.
- the first isolation structure 111 a , 111 b , 111 c includes a liner 107 a , 107 b and an insulating structure 109 a , 109 b.
- the liner 107 a , 107 b is disposed in conformity with a trench 108 a , 108 b disposed adjacent to the first surface 101 a of the semiconductor device 101 .
- the liner 107 a , 107 b includes a low-refractive index (low-n) material which has a refractive index (n) less than a color filter operable for the first light sensing unit 103 a , a high-k (high dielectric constant) material, or a combination thereof.
- the low-n material includes, for example, SiO 2 , HfO 2 , or a combination thereof.
- the high-k material includes, for example, HfO 2 , Al 2 O 3 , TiO 2 , HfZrO, Ta 2 O 3 , Ta 2 O 5 , HfSiO 4 , ZrO 2 , ZrSiO 2 , Ln 2 O 3 , or a combination thereof.
- the insulating structure 109 a , 109 b is disposed adjacent to the liner 107 a , 107 b . In some embodiments, the insulating structure 109 a , 109 b is disposed on the liner 107 a , 107 b . In some embodiments, the insulating structure 109 a , 109 b includes a low-n material, which has a refractive index (n) less than a color filter operable for the first light sensing unit 103 a . In some embodiments, the low-n material includes, for example, SiO 2 , HfO 2 , or a combination thereof.
- the insulating structure 109 a , 109 b also includes a low-k material (e.g., a glass material composed of fluorine, silicon, and oxygen), an oxide layer, and a reflective material to prevent the radiation projected toward one side of the insulation structure 109 a , 109 b from entering another side of the insulation structure 109 a , 109 b to further reduce the crosstalk between the first light sensing unit 103 a , 103 b and the second light sensing unit 105 a , 105 b.
- a low-k material e.g., a glass material composed of fluorine, silicon, and oxygen
- a logic device 123 a , 123 b such as a transistor, is further disposed in the semiconductor device 101 and operable to enable readout of the first light sensing unit 103 a , 103 b , the second light sensing unit 105 a , 105 b , 105 c , 105 d , or both.
- the logic device 123 a , 123 b is disposed adjacent to the first light sensing unit 103 a , 103 b , the second light sensing unit 105 a , 105 b , 105 c , 105 d , or both.
- the logic device 123 a , 123 b is disposed adjacent to a third surface 101 c opposite to the first surface 101 a of the semiconductor device 101 and close to the back end of the first light sensing unit 103 a , 103 b and the second light sensing unit 105 a , 105 b , 105 c , 105 d.
- the circuit stack 129 is further disposed adjacent to the logic device 123 a , 123 b . In some embodiments, circuit stack 129 is disposed adjacent to the second surface 101 b of the semiconductor device 101 . In some embodiments, circuit stack 129 is a back-end-of-line (BEOL) metallization stack. In some embodiments, circuit stack 129 electrically connects to the logic device 123 a , 123 b through at least one conductive via, at least one conductive contact, or a combination thereof. In some embodiments, circuit stack 129 includes at least one metal layer 127 and at least one dielectric layer 125 .
- BEOL back-end-of-line
- the metal layer 127 is disposed in the dielectric layer 125 .
- the metal layer 127 includes, for example, copper, tungsten, aluminum, other metals, or a metal alloy thereof.
- dielectric layer 125 includes a low-k material (e.g., a dielectric material having a dielectric constant less than 3.9).
- FIG. 2 ( a ) illustrates a top view of a semiconductor device 201 according to some embodiments of the present disclosure.
- the semiconductor device 201 illustrated in FIG. 2 ( a ) is similar to that illustrated in FIG. 1 ( a ) with a difference including that at least a portion of a first light sensing units 203 a is adjacent to at least one first light sensing unit 203 b , 203 c , 203 d .
- FIG. 2 ( b ) illustrates a cross-sectional view taken along line B-B′ of the semiconductor device 201 in FIG. 2 ( a ) .
- the semiconductor device 201 illustrated in FIG. 2 ( a ) and FIG. 2 ( b ) includes at least one first light sensing unit 203 a disposed adjacent to at least one first light sensing unit 203 b , 203 c , 203 d .
- at least one side surface of the first light sensing unit 203 a is disposed adjacent to at least one first light sensing unit 203 b , 203 c , 203 d .
- At least two side surfaces of the first light sensing unit 203 a is disposed adjacent to at least one first light sensing unit 203 b , 203 c , 203 d .
- a first instance of a first light sensing unit 203 a may be adjoined at a first side by a second instance of the first light sensing unit 203 b , and at a second side adjacent to the first side by a third instance of the first light sensing unit 203 d .
- at least a portion of the first light sensing unit 203 a is surrounded by at least one first light sensing unit 203 b , 203 c , 203 d .
- At least a portion of the first light sensing unit 203 a is surrounded by at least two first light sensing units 203 b , 203 c . In some embodiments, at least a portion of the first light sensing unit 203 a is surrounded by at least three first light sensing units 203 b , 203 c , 203 d.
- At least a portion of the first light sensing unit 203 a is surrounded by at least a portion of another first light sensing unit 203 b , 203 c , 203 d and at least a portion of the first light sensing unit 203 a is surrounded by at least a portion of a second light sensing unit 205 a .
- at least a portion of the first light sensing unit 203 a is surrounded by at least a portion of another first light sensing unit 203 b , 203 c , 203 d and the rest portions of the first light sensing unit 203 a is surrounded by at least a portion of a second light sensing unit 205 a.
- the first light sensing unit 203 a and the second light sensing unit 205 a constitute a pixel sensor.
- a pixel sensor includes at least one first light sensing unit 203 a and at least one second light sensing unit 205 a .
- the first light sensing unit 203 a is adjacent to at least one second light sensing unit 205 a .
- the first light sensing unit 203 a is disposed adjacent to one, two, three, four, or five second light sensing units 205 a , 205 b , 205 c .
- the first light sensing unit 203 a is surrounded by the second light sensing unit 205 a , 205 b , 205 c partially. In some embodiments, first light sensing unit 203 a is surrounded by at least one second light sensing unit 205 a in a pixel sensor. In some embodiments, a repeating pixel sensor unit includes a first light sensing unit 203 a surrounded by a second light sensing unit 205 a . In some embodiments, the first light sensing unit 203 a is disposed adjacent to a corner of a pixel sensor. In some embodiments, the first light sensing unit 203 a is located at a corner of a pixel sensor. In some embodiments, a projection area of the first light sensing unit 203 a , 203 b to the projection area of the second light sensing unit 205 a , 205 b is about 1:3.
- a first light sensing unit 203 a is surrounded by one second light sensing units 205 a of the same pixel sensor and by another second light sensing unit 205 b , 205 c of another pixel sensor.
- the portion of the first light sensing unit 203 a surrounded by the second light sensing units 205 a of the same pixel sensor is not greater than the portion of the first light sensing unit 203 a surrounded by a first light sensing unit 203 b , 203 c , 203 d.
- the crosstalk occurred due to the reflection or refraction of the light from the neighboring second light sensing unit 205 a to the first light sensing units 203 a is reduced as the area of the second light sensing unit 205 b surrounding the first light sensing unit 203 a is reduced.
- the light interference e.g., crosstalk
- the light sensitivity of the first light sensing units 203 a , 203 b increases.
- the reflective layer 219 extends from a projection area of the first light sensing unit 203 a to a projection area of the first light sensing unit 203 b.
- FIG. 3 ( a ) illustrates a top view of a semiconductor device 301 according to some embodiments of the present disclosure.
- the semiconductor device 301 illustrated in FIG. 3 ( a ) is similar to that illustrated in FIG. 2 ( a ) with a difference including that a side surface 303 e of the first light sensing unit 303 a is curved by which the portion of the first light sensing unit 303 a surrounded by the second light sensing units 305 a of the same pixel sensor may be further reduced compared to that illustrated in FIG. 2 ( a ) .
- the portion of the first light sensing unit 303 a surrounded by the second light sensing units 305 a of the same pixel sensor is smaller than the portion of the first light sensing unit 303 a surrounded by a first light sensing unit 303 b , 303 c , 303 d .
- the crosstalk interference mentioned above is further reduced compared to that illustrated in FIG. 2 ( a ) .
- FIG. 3 ( b ) illustrates a cross-sectional view taken along line C-C′ of the semiconductor device 301 in FIG. 3 ( a ) .
- the structure of the semiconductor device 301 illustrated in FIG. 3 ( b ) is similar to that illustrated in FIG. 2 ( b ) , which are not further described for brevity.
- FIG. 4 ( a ) illustrates a top view of a semiconductor device 401 according to some embodiments of the present disclosure.
- the semiconductor device 401 illustrated in FIG. 4 ( a ) is similar to that illustrated in FIG. 2 ( a ) with a difference including that an third light sensing unit 431 a , 431 b is disposed between the first light sensing unit 403 a , 403 b and the second light sensing unit 405 a , 405 b .
- FIG. 4 ( b ) illustrates a cross-sectional view taken along line D-D′ of the semiconductor device 401 in FIG. 4 ( a ) .
- the third light sensing unit 431 a , 431 b is different from the first light sensing unit 403 a , 403 b and the second light sensing unit 405 a , 405 b so the third light sensing unit 431 a , 431 b could be distinguished from the first light sensing unit 403 a , 403 b and not cause a crosstalk as the second light sensing unit 405 a , 405 b does.
- the third light sensing unit 431 a , 431 b is operable to receive a radiation projected toward the third light sensing unit 431 a , 431 b and convert the radiation to electrical signal.
- the third light sensing unit 431 a , 431 b is operable to receive less radiation projected toward it than the first light sensing unit 403 a , 403 b , the second light sensing unit 405 a , 405 b , or both and convert the radiation to electrical signal.
- the third light sensing unit 431 a , 431 b may receive less radiation projected toward it than the second light sensing unit 405 a , 405 b , it may cause less crosstalk than the second light sensing unit 405 a , 405 b does, which further reduces the crosstalk interference toward the first light sensing unit 403 a , 403 b compared to a second light sensing unit 405 a , 405 b.
- the third light sensing unit 431 a , 431 b between the first light sensing unit 403 a , 403 b and the second light sensing unit 405 a , 405 b may increase the distance between them and make the crosstalk source of the second light sensing unit 405 a , 405 b to be away from the first light sensing unit 403 a , 403 b , less crosstalk may reach the first light sensing unit 403 a , 403 b , which further improves the sensitivity of the first light sensing unit 403 a , 403 b.
- FIG. 5 illustrates a cross-sectional view of a semiconductor device 501 according to some embodiments of the present disclosure.
- the semiconductor device 501 illustrated in FIG. 5 is similar to that illustrated in FIG. 1 ( a ) , FIG. 2 ( a ) , FIG. 3 ( a ) , and FIG. 4 ( a ) with a difference including that the first isolation structure 511 b has a larger projection area compared to a regular design.
- a projection area of the first isolation structure 511 b is enlarged compared to a regular design so less crosstalk transmits through it and reaches the first light sensing unit 503 a , 503 b .
- the crosstalk interference from the neighboring second light sensing unit 505 b is reduced.
- the crosstalk interference from the neighboring second light sensing unit 505 b is reduced by disposing the first isolation structure 511 b having a larger projection area than the second isolation structure 511 a.
- the first isolation structure 511 b includes a liner 507 b and an insulating structure 509 b .
- the second isolation structure 511 a includes a liner 507 a and an insulating structure 509 a .
- the liners 507 b , 507 a and the insulation structures 509 b , 509 a are similar to those described above and are not further described for brevity.
- FIG. 6 illustrates a cross-sectional view of a semiconductor device 601 according to some embodiments of the present disclosure.
- the semiconductor device 601 illustrated in FIG. 6 is similar to that illustrated in FIG. 1 ( a ) , FIG. 2 ( a ) , FIG. 3 ( a ) , and FIG. 4 ( a ) with a difference including that the reflective layer 619 extends from a projection area of the first light sensing unit 603 a to a projection area of a neighboring second light sensing unit 605 b.
- the reflective layer 619 By disposing the reflective layer 619 extending from a projection area of the first light sensing unit 603 a to a projection area of a neighboring second light sensing unit 605 b , the reflective layer 619 reduces the light projected toward the second light sensing unit 605 b and crosstalk generated from the first light sensing unit 603 a . Nevertheless, it should be noted that embodiments of the extension of the reflective layer 619 are designed that the reduction of the light toward the second light sensing unit 605 b by the reflective layer 619 does not affect the intended purpose of the second light sensing unit 605 b as receiving more radiation than a first light sensing unit 603 a.
- FIG. 7 illustrates a cross-sectional view of a semiconductor device 701 according to some embodiments of the present disclosure.
- the semiconductor device 701 illustrated in FIG. 7 is similar to that illustrated in FIG. 1 ( a ) , FIG. 2 ( a ) , FIG. 3 ( a ) , and FIG. 4 ( a ) with a difference including that a first surface 733 of a second light sensing unit 705 b has roughness.
- the second light sensing unit 705 b has a first surface 733 facing the reflective layer 719 and a second surface 701 b opposite to the first surface 733 .
- the first surface 733 of the second light sensing unit 705 b By disposing the first surface 733 of the second light sensing unit 705 b as having roughness compared to the first surface 101 a of the semiconductor device 101 , less light is transmitted through the semiconductor device 701 to reach the second light sensing unit 705 b because some light is refracted or reflected by the roughed first surface 733 of the second light sensing unit 705 b . As a result, since less light reaches the second light sensing unit 705 b because of the roughed first surface 733 , less crosstalk interference is generated toward the neighboring first light sensing unit 703 a . Therefore, the sensitivity of the neighboring first light sensing unit 703 a increases.
- the roughness of the first surface 733 of the second light sensing unit 705 b is so designed that the reduction of the light toward the second light sensing unit 705 b by the roughness of the first surface 733 does not affect the intended purpose of the second light sensing unit 705 b as receiving more radiation than a first light sensing unit 703 a.
- FIGS. 8 A- 8 H illustrate a method of manufacturing a semiconductor device such as the semiconductor device of FIG. 2 ( a ) , FIG. 2 ( b ) , FIG. 3 ( a ) , and FIG. 3 ( b ) .
- a substrate 801 is provided or received.
- the substrate 801 has a first surface 801 a and a second surface 801 b opposite to the first surface 801 a .
- the substrate 801 is a bulk semiconductor substrate (e.g., a bulk silicon (Si) substrate), a silicon-on-insulator (SOI) substrate, or a wafer.
- the substrate 801 is a wafer.
- the substrate 801 includes a plurality of first light sensing units 803 a , 803 b and a plurality of second light sensing units 805 a , 805 b arranged in a sub-array adjacent to the first surface 801 a of the substrate 801 .
- the first light sensing units 803 a , 803 b and the second light sensing units 805 a , 805 b are so disposed that at least a portion of the first light sensing unit 803 a is adjacent to at least one first light sensing unit 803 b .
- the first light sensing units 803 a , 803 b are different from the second light sensing units 805 a , 805 b in that a surface of the second light sensing units 805 a , 805 b is roughened.
- a logic device 823 a , 823 b such as a transistor, may be further disposed to a third surface 801 c opposite to the first surface 801 a of the substrate 801 .
- the logic device 823 a , 823 b is operable to enable readout of the first light sensing unit 803 a , 803 b , the second light sensing unit 805 a , 805 b , or both.
- the logic device 823 a , 823 b is disposed adjacent to the first light sensing unit 803 a , 803 b , the second light sensing unit 805 a , 805 b , or both.
- the logic device 823 a , 823 b is disposed adjacent to a third surface 801 c opposite to the first surface 801 a of the substrate 801 and close to the back end of the first light sensing unit 803 a , 803 b and the second light sensing unit 805 a , 805 b.
- a circuit stack 829 may be further disposed adjacent to the logic device 823 a , 823 b .
- the circuit stack 829 may be disposed adjacent to the second surface 801 b of the substrate 801 .
- the circuit stack 829 is a back-end-of-line (BEOL) metallization stack.
- circuit stack 829 electrically connects to the logic device 823 a , 823 b through at least one conductive via, at least one conductive contact, or a combination thereof.
- the circuit stack 829 includes at least one metal layer 827 and at least one dielectric layer 825 .
- a trench 808 c , 808 b , 808 a may be disposed between the first light sensing unit 803 a and the second light sensing unit 805 a , the first light sensing unit 803 a and the first light sensing unit 803 b , and the first light sensing unit 803 b and the second light sensing unit 805 b .
- trenches 808 c , 808 b , 808 a have a substantially rectangular shape, a trapezoidal shape, an elongated elliptical shape, or any other suitable shape.
- trenches 808 c , 808 b , 808 a are formed by an etching technology, a drilling technology (e.g., a mechanical or laser drilling technology), or any suitable technologies applied from the first surface 801 a of the substrate 801 toward the second surface 801 b of the substrate 801 .
- a drilling technology e.g., a mechanical or laser drilling technology
- a liner 807 is disposed adjacent to the first surface 801 a of the substrate 801 .
- the liner 807 is disposed in conformity with the shape of the trench 808 c , 808 b , 808 a of the substrate 801 .
- the liner 807 is formed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies.
- an insulating structure 809 a , 809 b , 809 c is disposed adjacent to the liner 807 .
- the insulating structure 809 a , 809 b , 809 c fills the trench 808 c , 808 b , 808 a of the substrate 801 .
- the insulating structures 809 a , 809 b , 809 c are disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies.
- a first dielectric layer 813 is disposed adjacent to the liner 807 .
- the first dielectric layer 813 is disposed on the liner 807 and the insulating structure 809 a , 809 b , 809 c .
- the first dielectric layer 813 is disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies.
- ALD atomic layer deposition
- CVD chemical vapor deposition
- a metal layer 815 a , 815 b , 815 c is disposed adjacent to the first dielectric layer 813 .
- the metal layers 815 a , 815 b , 815 c are disposed corresponding to the portions of the first isolation structure 811 a , 811 b , 811 c .
- the metal layers 815 a , 815 b , 815 c are formed by a technology selected from a plating technology, a photolithography technology, a polishing technology, and an etching technology.
- a second dielectric layer 817 is disposed adjacent to the first dielectric layer 813 .
- the second dielectric layer 817 is disposed on the metal layer 815 a , 815 b , 815 c and the first dielectric layer 813 .
- the second dielectric layer 817 is disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies.
- ALD atomic layer deposition
- CVD chemical vapor deposition
- a reflective layer 819 is disposed adjacent to the second dielectric layer 817 .
- the reflective layer 819 is disposed at a position corresponding to the first light sensing units 803 a , 803 b , which defines the area of the first light sensing units 803 a , 803 b .
- the reflective layer 819 is disposed by a technology selected from a plating technology, a photolithography technology, a polishing technology, and an etching technology.
- a third dielectric layer 821 is disposed adjacent to the second dielectric layer 817 .
- the third dielectric layer 821 is disposed over the reflective layer 819 and the second dielectric layer 817 .
- the third dielectric layer 821 is disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies. Subsequently, a semiconductor device, such as the one illustrated in FIG. 2 ( b ) and FIG. 3 ( b ) are obtained.
- a singularizing process is further performed on the semiconductor device obtained from the process mentioned above to obtain an image sensor including at least one pixel sensor including a first light sensing unit 803 a and a second light sensing unit 805 a arranged in a sub-array with the first light sensing unit 803 a , where at least a portion of the first light sensing unit 803 a is adjacent to at least one first light sensing unit 803 b of another pixel sensor.
- An aspect of this description relates to a method of manufacturing a semiconductor device.
- the method includes disposing a plurality of a first type of light sensing units on a substrate.
- the method further includes disposing a plurality of a second type of light sensing units arranged on the substrate, wherein each of the plurality of the first type of light sensing units is operable to receive less radiation compared to each of the plurality of the second type of light sensing units, and disposing the plurality of the second type of light sensing units comprises disposing at least one of the plurality of the second type of light sensing units adjacent to a portion of at least one of the plurality of the first type of light sensing units.
- the method further includes disposing a first isolation structure between one of the plurality of the first type of light sensing units and one of the plurality of the second type of light sensing units.
- the method further includes disposing a second isolation structure between the adjacent first type of light sensing units of the plurality of the first type of light sensing units.
- the method further includes disposing a reflective layer above the plurality of the first type of light sensing units.
- disposing the first isolation structure includes disposing the first isolation structure having a larger projection area than the second isolation structure.
- disposing the reflective layer includes disposing the reflective layer extending from a projection area of the plurality of the first type of light sensing units to a projection area of the plurality of the second type of light sensing units.
- the method further includes roughening a surface of at least one of the plurality of the second type of light sensing units. In some embodiments, the method further includes disposing a third type of light sensing unit between at least one of the plurality of the first type of light sensing units and at least one of the plurality of the second type of light sensing units, wherein the third type of light sensing unit is operable to receive less radiation than each of the plurality of the first type of light sensing units or each of the plurality of the second type of light sensing units.
- An aspect of this description relates to a method of manufacturing a semiconductor device.
- the method includes forming a first plurality of light sensing elements on a substrate.
- the method further includes forming a second plurality of light sensing elements on the substrate, wherein the second plurality of light sensing elements surrounds the first plurality of light sensing elements, and each of the second plurality of light sensing elements is configured to receive a higher intensity of light than each of the first plurality of light sensing elements.
- the method further includes forming a first plurality of isolation structures, wherein each of the first plurality of isolation structures is between a light sensing element of the second plurality of light sensing elements and a corresponding light sensing element of the first plurality of light sensing elements.
- the method further includes forming a second plurality of isolation structures, wherein each of the second plurality of isolation structures is between adjacent light sensing elements of the first plurality of light sensing elements.
- the method further includes forming a plurality of metal structures over the first plurality of isolation structures and the second plurality of isolation structures, wherein each of the plurality of metal structures is aligned with a corresponding light sensing element of the first plurality of light sensing elements or a corresponding light sensing element of the second plurality of light sensing elements.
- the method further includes forming a reflective layer over at least a portion of a first metal structure of the plurality of metal structures, wherein the reflective layer overlaps a first light sensing element of the first plurality of light sensing elements.
- the method further includes forming a third plurality of light sensing elements on the substrate, wherein the third plurality of light sensing elements is between the first plurality of light sensing elements and the second plurality of light sensing elements.
- forming the first plurality of light sensing elements includes forming the first plurality of light sensing element having a curved surface.
- forming the reflective layer includes forming the reflective layer over an entirety of the first metal structure.
- forming the reflective layer includes forming the reflective layer over the first metal structure, and the first metal structure is over a first isolation structure of the first plurality of isolation structures.
- forming the reflective layer includes forming the reflective layer over the first metal structure, and the first metal structure is over a first isolation structure of the second plurality of isolation structures. In some embodiments, forming the reflective layer comprises forming the reflective layer overlapping the first light sensing element and a second light sensing element of the first plurality of light sensing elements. In some embodiments, the method further includes roughening a surface of at least one of the plurality of second light sensing elements. In some embodiments, forming the reflective layer includes forming the reflective layer partially overlapping a first light sensing element of the second plurality of light sensing elements. In some embodiments, forming the first plurality of isolation structures includes forming the first plurality of isolation structures simultaneously with forming the second plurality of isolation structures.
- An aspect of this description relates to a method of manufacturing a semiconductor device.
- the method includes forming a first light sensing on a substrate, wherein the first light sensing element is configured to receive a first amount of light.
- the method further includes forming a second light sensing element on the substrate, wherein the second light sensing element is configured to receive the first amount of light.
- the method further includes forming a third light sensing element on the substrate, wherein the third light sensing element is configured to receive a second amount of light different from the first amount of light.
- the method further includes forming a first isolation structure between the first light sensing element and the second light sensing element.
- the method further includes forming a second isolation structure between the second light sensing element and the third light sensing element.
- the method further includes roughening a surface of the third light sensing element.
- the method further includes forming a dielectric layer over the first light sensing element, the second light sensing element, and the third light sensing element, wherein the roughened surface of the third light sensing element is proximate the dielectric layer.
- the method further includes forming a first metal structure over the dielectric layer, wherein the first metal structure is aligned with the first isolation structure; and forming a second metal structure over the dielectric layer, wherein the second metal structure is aligned with the second isolation structure.
- the method further includes forming a reflective layer over the dielectric layer, wherein the reflective layer overlaps the second light sensing element.
- forming the reflective layer includes forming the reflective layer overlapping the first metal structure and the first light sensing element.
- forming the reflective layer includes forming the reflective layer partially overlapping the third light sensing element.
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Light Receiving Elements (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Abstract
A method of manufacturing a semiconductor device includes disposing a plurality of a first type of light sensing units on a substrate; and disposing a plurality of a second type of light sensing units arranged on the substrate. Each of the first type of light sensing units is operable to receive less radiation than each of the second type of light sensing units. At least one of the second type of light sensing units is adjacent to a portion of at least one of the first type of light sensing units. The method includes disposing a first isolation structure between one of the first type of light sensing units and one of the second type of light sensing units; and disposing a second isolation structure between the adjacent first type of light sensing units. The method includes disposing a reflective layer above the first type of light sensing units.
Description
- This application is a divisional of U.S. application Ser. No. 17/220,212, filed Apr. 1, 2021, which claims the priority of U.S. Provisional Application No. 63/053,094, filed Jul. 17, 2020, which are incorporated herein by reference in their entireties.
- Semiconductor image sensors are used for sensing light. The semiconductor image sensors utilize an array of pixels in a substrate, including photodiodes and transistors that can absorb radiation projected toward the substrate and convert the sensed radiation into electrical signals.
- A performance of a semiconductor image sensor depends on, among other things, its quantum efficiency and optical crosstalk. The quantum efficiency of an image sensor indicates a number of electrons generated per number of incident photons in the image sensor. The optical crosstalk occurs when some photons incident upon a pixel are absorbed by another pixel.
- Therefore, while existing semiconductor structures of image sensors and conventional methods of manufacturing image sensors have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.
- Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
-
FIG. 1(a) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.FIG. 1(b) illustrates a cross-sectional view taken along line A-A′ of the semiconductor device inFIG. 1(a) . -
FIG. 2(a) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.FIG. 2(b) illustrates a cross-sectional view taken along line B-B′ of the semiconductor device inFIG. 2(a) . -
FIG. 3(a) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.FIG. 3(b) illustrates a cross-sectional view taken along line C-C′ of the semiconductor device inFIG. 3(a) . -
FIG. 4(a) illustrates a top view of a semiconductor device according to some embodiments of the present disclosure.FIG. 4(b) illustrates a cross-sectional view taken along line D-D′ of the semiconductor device inFIG. 4(a) . -
FIG. 5 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure. -
FIG. 6 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure. -
FIG. 7 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure. -
FIG. 8A ,FIG. 8B ,FIG. 8C ,FIG. 8D ,FIG. 8E ,FIG. 8F ,FIG. 8G , andFIG. 8H illustrate a method of manufacturing a semiconductor device such as the semiconductor device ofFIG. 2(a) ,FIG. 2(b) ,FIG. 3(a) , andFIG. 3(b) . - The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of elements and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
- Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper,” “on” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
- As used herein, the terms such as “first,” “second,” and “third” describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another. The terms such as “first,” “second,” and “third” when used herein do not imply a sequence or order unless clearly indicated by the context.
- As used herein, the terms “approximately,” “substantially,” “substantial,” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. For example, when used in conjunction with a numerical value, the terms can refer to a range of variation of less than or equal to ±10% of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two numerical values can be deemed to be “substantially” the same or equal if a difference between the values is less than or equal to ±10% of an average of the values, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, “substantially” parallel can refer to a range of angular variation relative to 0° that is less than or equal to ±10°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, “substantially” perpendicular can refer to a range of angular variation relative to 90° that is less than or equal to ±10°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.
- Some embodiments of image sensors use at least two kinds of pixel sensors, classified by the incident radiation, forming a repeating unit arranged in an array. For example, some embodiments of an image sensor include a first pixel sensor for sensing long wavelengths (e.g., infrared (IR) and red light) and a second pixel sensor for sensing short wavelengths (e.g., green and blue light). In addition, in some embodiments, each of the pixel sensors further use at least two kinds of light sensing units, classified by the amount of the incident radiation (or light) to be received. For example, as used herein, a first light sensing unit refers to a light sensing unit that is operable to receive less radiation (or light) compared to a second light sensing unit given a certain period of time.
- As the size of an image sensor gets smaller, crosstalk becomes a major concern between neighboring pixel sensors and further the neighboring light sensing units contained in the neighboring pixel sensors. As the surface area for receiving light becomes smaller, the light sensing unit becomes more sensitive to crosstalk because the signal (light directly received by the sensor) is smaller in comparison to the noise (the crosstalk between neighboring pixel sensors). Crosstalk adversely affects the amount of the light that is received by the light sensing unit. Pixel sensor designs which reduce crosstalk provide increased light absorption efficiency, especially beneficial for low levels of incident light.
-
FIG. 1(a) illustrates a top view of asemiconductor device 101 according to some embodiments of the present disclosure.FIG. 1(b) illustrates a cross-sectional view taken along line A-A′ of thesemiconductor device 101 inFIG. 1(a) . - The
semiconductor device 101 ofFIG. 1(a) includes a plurality of firstlight sensing units light sensing units - The
semiconductor device 101 has afirst surface 101 a and asecond surface 101 b opposite to thefirst surface 101 a. According to some embodiments,semiconductor device 101 is a bulk semiconductor substrate (e.g., a bulk silicon (Si) substrate), a silicon-on-insulator (SOI) substrate, or a wafer. In some embodiments, thesemiconductor device 101 is a wafer. - The first
light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit - The second
light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit reflective layer 119 above the firstlight sensing unit light sensing unit light sensing unit light sensing unit - The first
light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing units light sensing unit light sensing units light sensing unit light sensing unit light sensing unit light sensing units light sensing units light sensing unit light sensing units light sensing unit light sensing units light sensing unit light sensing units - According to some embodiments, a pixel sensor composed of the first
light sensing unit 103 a and the secondlight sensing units - According to some embodiments, a
first isolation structure light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit first isolation structure first isolation structure liner structure - The
liner trench first surface 101 a of thesemiconductor device 101. - In some embodiments, the
liner light sensing unit 103 a, a high-k (high dielectric constant) material, or a combination thereof. In some embodiments, the low-n material includes, for example, SiO2, HfO2, or a combination thereof. In some embodiments, the high-k material includes, for example, HfO2, Al2O3, TiO2, HfZrO, Ta2O3, Ta2O5, HfSiO4, ZrO2, ZrSiO2, Ln2O3, or a combination thereof. - The insulating
structure liner structure liner structure light sensing unit 103 a. In some embodiments, the low-n material includes, for example, SiO2, HfO2, or a combination thereof. In some embodiments, the insulatingstructure insulation structure insulation structure light sensing unit light sensing unit - A
logic device semiconductor device 101 and operable to enable readout of the firstlight sensing unit light sensing unit logic device light sensing unit light sensing unit logic device third surface 101 c opposite to thefirst surface 101 a of thesemiconductor device 101 and close to the back end of the firstlight sensing unit light sensing unit - According to some embodiments, the
circuit stack 129 is further disposed adjacent to thelogic device circuit stack 129 is disposed adjacent to thesecond surface 101 b of thesemiconductor device 101. In some embodiments,circuit stack 129 is a back-end-of-line (BEOL) metallization stack. In some embodiments,circuit stack 129 electrically connects to thelogic device circuit stack 129 includes at least onemetal layer 127 and at least onedielectric layer 125. - The
metal layer 127 is disposed in thedielectric layer 125. In some embodiments, themetal layer 127 includes, for example, copper, tungsten, aluminum, other metals, or a metal alloy thereof. - According to some embodiments,
dielectric layer 125 includes a low-k material (e.g., a dielectric material having a dielectric constant less than 3.9). -
FIG. 2(a) illustrates a top view of asemiconductor device 201 according to some embodiments of the present disclosure. Thesemiconductor device 201 illustrated inFIG. 2(a) is similar to that illustrated inFIG. 1(a) with a difference including that at least a portion of a firstlight sensing units 203 a is adjacent to at least one firstlight sensing unit FIG. 2(b) illustrates a cross-sectional view taken along line B-B′ of thesemiconductor device 201 inFIG. 2(a) . - Unlike the
semiconductor device 101 illustrated inFIG. 1(a) andFIG. 1(b) , thesemiconductor device 201 illustrated inFIG. 2(a) andFIG. 2(b) includes at least one firstlight sensing unit 203 a disposed adjacent to at least one firstlight sensing unit light sensing unit 203 a is disposed adjacent to at least one firstlight sensing unit light sensing unit 203 a is disposed adjacent to at least one firstlight sensing unit light sensing unit 203 a may be adjoined at a first side by a second instance of the firstlight sensing unit 203 b, and at a second side adjacent to the first side by a third instance of the firstlight sensing unit 203 d. In some embodiments, at least a portion of the firstlight sensing unit 203 a is surrounded by at least one firstlight sensing unit light sensing unit 203 a is surrounded by at least two firstlight sensing units light sensing unit 203 a is surrounded by at least three firstlight sensing units - At least a portion of the first
light sensing unit 203 a is surrounded by at least a portion of another firstlight sensing unit light sensing unit 203 a is surrounded by at least a portion of a secondlight sensing unit 205 a. In some embodiments, at least a portion of the firstlight sensing unit 203 a is surrounded by at least a portion of another firstlight sensing unit light sensing unit 203 a is surrounded by at least a portion of a secondlight sensing unit 205 a. - In some embodiments, the first
light sensing unit 203 a and the secondlight sensing unit 205 a constitute a pixel sensor. According to some embodiments, a pixel sensor includes at least one firstlight sensing unit 203 a and at least one secondlight sensing unit 205 a. In some embodiments, the firstlight sensing unit 203 a is adjacent to at least one secondlight sensing unit 205 a. In some embodiments, the firstlight sensing unit 203 a is disposed adjacent to one, two, three, four, or five secondlight sensing units light sensing unit 203 a is surrounded by the secondlight sensing unit light sensing unit 203 a is surrounded by at least one secondlight sensing unit 205 a in a pixel sensor. In some embodiments, a repeating pixel sensor unit includes a firstlight sensing unit 203 a surrounded by a secondlight sensing unit 205 a. In some embodiments, the firstlight sensing unit 203 a is disposed adjacent to a corner of a pixel sensor. In some embodiments, the firstlight sensing unit 203 a is located at a corner of a pixel sensor. In some embodiments, a projection area of the firstlight sensing unit light sensing unit - In some embodiments, a first
light sensing unit 203 a is surrounded by one secondlight sensing units 205 a of the same pixel sensor and by another secondlight sensing unit light sensing unit 203 a surrounded by the secondlight sensing units 205 a of the same pixel sensor is not greater than the portion of the firstlight sensing unit 203 a surrounded by a firstlight sensing unit - By disposing at least a portion of a first
light sensing units 203 a adjacent to at least one firstlight sensing unit 203 b, the crosstalk occurred due to the reflection or refraction of the light from the neighboring secondlight sensing unit 205 a to the firstlight sensing units 203 a is reduced as the area of the secondlight sensing unit 205 b surrounding the firstlight sensing unit 203 a is reduced. As a result, since the light interference (e.g., crosstalk) from the neighboring secondlight sensing unit light sensing units - Referring to
FIG. 2(b) , in some embodiments where a firstlight sensing unit 203 a is disposed adjacent to another firstlight sensing unit 203 b, thereflective layer 219 extends from a projection area of the firstlight sensing unit 203 a to a projection area of the firstlight sensing unit 203 b. -
FIG. 3(a) illustrates a top view of asemiconductor device 301 according to some embodiments of the present disclosure. Thesemiconductor device 301 illustrated inFIG. 3(a) is similar to that illustrated inFIG. 2(a) with a difference including that aside surface 303 e of the firstlight sensing unit 303 a is curved by which the portion of the firstlight sensing unit 303 a surrounded by the secondlight sensing units 305 a of the same pixel sensor may be further reduced compared to that illustrated inFIG. 2(a) . In some embodiments, the portion of the firstlight sensing unit 303 a surrounded by the secondlight sensing units 305 a of the same pixel sensor is smaller than the portion of the firstlight sensing unit 303 a surrounded by a firstlight sensing unit light sensing unit 303 a surrounded by the secondlight sensing units 305 a of the same pixel sensor may be further reduced, the crosstalk interference mentioned above is further reduced compared to that illustrated inFIG. 2(a) . -
FIG. 3(b) illustrates a cross-sectional view taken along line C-C′ of thesemiconductor device 301 inFIG. 3(a) . The structure of thesemiconductor device 301 illustrated inFIG. 3(b) is similar to that illustrated inFIG. 2(b) , which are not further described for brevity. -
FIG. 4(a) illustrates a top view of asemiconductor device 401 according to some embodiments of the present disclosure. Thesemiconductor device 401 illustrated inFIG. 4(a) is similar to that illustrated inFIG. 2(a) with a difference including that an thirdlight sensing unit light sensing unit light sensing unit FIG. 4(b) illustrates a cross-sectional view taken along line D-D′ of thesemiconductor device 401 inFIG. 4(a) . - In some embodiments, the third
light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit - In addition, since disposing the third
light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit light sensing unit -
FIG. 5 illustrates a cross-sectional view of asemiconductor device 501 according to some embodiments of the present disclosure. Thesemiconductor device 501 illustrated inFIG. 5 is similar to that illustrated inFIG. 1(a) ,FIG. 2(a) ,FIG. 3(a) , andFIG. 4(a) with a difference including that thefirst isolation structure 511 b has a larger projection area compared to a regular design. - In some embodiments, such as those illustrated in
FIG. 5 where thefirst isolation structure 511 b is disposed separating the firstlight sensing unit 503 a from the secondlight sensing unit 505 b, a projection area of thefirst isolation structure 511 b is enlarged compared to a regular design so less crosstalk transmits through it and reaches the firstlight sensing unit light sensing unit 505 b is reduced. - In some embodiments, such as those illustrated in
FIG. 5 where afirst isolation structure 511 b is disposed separating the firstlight sensing unit 503 a from the secondlight sensing unit 505 b and asecond isolation structure 511 a is disposed separating the firstlight sensing unit 503 a from another firstlight sensing unit 503 b, the crosstalk interference from the neighboring secondlight sensing unit 505 b is reduced by disposing thefirst isolation structure 511 b having a larger projection area than thesecond isolation structure 511 a. - In some embodiments, the
first isolation structure 511 b includes aliner 507 b and an insulatingstructure 509 b. In some embodiments, thesecond isolation structure 511 a includes aliner 507 a and an insulatingstructure 509 a. Theliners insulation structures -
FIG. 6 illustrates a cross-sectional view of asemiconductor device 601 according to some embodiments of the present disclosure. Thesemiconductor device 601 illustrated inFIG. 6 is similar to that illustrated inFIG. 1(a) ,FIG. 2(a) ,FIG. 3(a) , andFIG. 4(a) with a difference including that thereflective layer 619 extends from a projection area of the firstlight sensing unit 603 a to a projection area of a neighboring secondlight sensing unit 605 b. - By disposing the
reflective layer 619 extending from a projection area of the firstlight sensing unit 603 a to a projection area of a neighboring secondlight sensing unit 605 b, thereflective layer 619 reduces the light projected toward the secondlight sensing unit 605 b and crosstalk generated from the firstlight sensing unit 603 a. Nevertheless, it should be noted that embodiments of the extension of thereflective layer 619 are designed that the reduction of the light toward the secondlight sensing unit 605 b by thereflective layer 619 does not affect the intended purpose of the secondlight sensing unit 605 b as receiving more radiation than a firstlight sensing unit 603 a. -
FIG. 7 illustrates a cross-sectional view of asemiconductor device 701 according to some embodiments of the present disclosure. Thesemiconductor device 701 illustrated inFIG. 7 is similar to that illustrated inFIG. 1(a) ,FIG. 2(a) ,FIG. 3(a) , andFIG. 4(a) with a difference including that afirst surface 733 of a secondlight sensing unit 705 b has roughness. - The second
light sensing unit 705 b has afirst surface 733 facing thereflective layer 719 and asecond surface 701 b opposite to thefirst surface 733. - By disposing the
first surface 733 of the secondlight sensing unit 705 b as having roughness compared to thefirst surface 101 a of thesemiconductor device 101, less light is transmitted through thesemiconductor device 701 to reach the secondlight sensing unit 705 b because some light is refracted or reflected by the roughedfirst surface 733 of the secondlight sensing unit 705 b. As a result, since less light reaches the secondlight sensing unit 705 b because of the roughedfirst surface 733, less crosstalk interference is generated toward the neighboring firstlight sensing unit 703 a. Therefore, the sensitivity of the neighboring firstlight sensing unit 703 a increases. It should be noted that the roughness of thefirst surface 733 of the secondlight sensing unit 705 b is so designed that the reduction of the light toward the secondlight sensing unit 705 b by the roughness of thefirst surface 733 does not affect the intended purpose of the secondlight sensing unit 705 b as receiving more radiation than a firstlight sensing unit 703 a. -
FIGS. 8A-8H illustrate a method of manufacturing a semiconductor device such as the semiconductor device ofFIG. 2(a) ,FIG. 2(b) ,FIG. 3(a) , andFIG. 3(b) . - Referring to
FIG. 8A , asubstrate 801 is provided or received. Thesubstrate 801 has afirst surface 801 a and asecond surface 801 b opposite to thefirst surface 801 a. In some embodiments, thesubstrate 801 is a bulk semiconductor substrate (e.g., a bulk silicon (Si) substrate), a silicon-on-insulator (SOI) substrate, or a wafer. In some embodiments, thesubstrate 801 is a wafer. - The
substrate 801 includes a plurality of firstlight sensing units light sensing units first surface 801 a of thesubstrate 801. The firstlight sensing units light sensing units light sensing unit 803 a is adjacent to at least one firstlight sensing unit 803 b. In some embodiments, the firstlight sensing units light sensing units light sensing units - A
logic device third surface 801 c opposite to thefirst surface 801 a of thesubstrate 801. Thelogic device light sensing unit light sensing unit logic device light sensing unit light sensing unit logic device third surface 801 c opposite to thefirst surface 801 a of thesubstrate 801 and close to the back end of the firstlight sensing unit light sensing unit - A
circuit stack 829 may be further disposed adjacent to thelogic device circuit stack 829 may be disposed adjacent to thesecond surface 801 b of thesubstrate 801. In some embodiments, thecircuit stack 829 is a back-end-of-line (BEOL) metallization stack. - According to some embodiments,
circuit stack 829 electrically connects to thelogic device circuit stack 829 includes at least onemetal layer 827 and at least onedielectric layer 825. - Still referring to
FIG. 8A , atrench light sensing unit 803 a and the secondlight sensing unit 805 a, the firstlight sensing unit 803 a and the firstlight sensing unit 803 b, and the firstlight sensing unit 803 b and the secondlight sensing unit 805 b. In some embodiments,trenches - In some embodiments,
trenches first surface 801 a of thesubstrate 801 toward thesecond surface 801 b of thesubstrate 801. - Referring to
FIG. 8B , aliner 807 is disposed adjacent to thefirst surface 801 a of thesubstrate 801. Theliner 807 is disposed in conformity with the shape of thetrench substrate 801. In some embodiments, theliner 807 is formed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies. - Referring to
FIG. 8C , an insulatingstructure liner 807. In some embodiments, the insulatingstructure trench substrate 801. In some embodiments, the insulatingstructures - Referring to
FIG. 8D , a firstdielectric layer 813 is disposed adjacent to theliner 807. In some embodiments, thefirst dielectric layer 813 is disposed on theliner 807 and the insulatingstructure first dielectric layer 813 is disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies. - Referring to
FIG. 8E , ametal layer first dielectric layer 813. In some embodiments, the metal layers 815 a, 815 b, 815 c are disposed corresponding to the portions of thefirst isolation structure - Referring to
FIG. 8F , asecond dielectric layer 817 is disposed adjacent to thefirst dielectric layer 813. In some embodiments, thesecond dielectric layer 817 is disposed on themetal layer first dielectric layer 813. In some embodiments, thesecond dielectric layer 817 is disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies. - Referring to
FIG. 8G , areflective layer 819 is disposed adjacent to thesecond dielectric layer 817. Thereflective layer 819 is disposed at a position corresponding to the firstlight sensing units light sensing units reflective layer 819 is disposed by a technology selected from a plating technology, a photolithography technology, a polishing technology, and an etching technology. - Referring to
FIG. 8H , a thirddielectric layer 821 is disposed adjacent to thesecond dielectric layer 817. In some embodiments, the thirddielectric layer 821 is disposed over thereflective layer 819 and thesecond dielectric layer 817. In some embodiments, the thirddielectric layer 821 is disposed by an atomic layer deposition (ALD) technology, a chemical vapor deposition (CVD) technology, or any suitable technologies. Subsequently, a semiconductor device, such as the one illustrated inFIG. 2(b) andFIG. 3(b) are obtained. - In some embodiments, a singularizing process is further performed on the semiconductor device obtained from the process mentioned above to obtain an image sensor including at least one pixel sensor including a first
light sensing unit 803 a and a secondlight sensing unit 805 a arranged in a sub-array with the firstlight sensing unit 803 a, where at least a portion of the firstlight sensing unit 803 a is adjacent to at least one firstlight sensing unit 803 b of another pixel sensor. - An aspect of this description relates to a method of manufacturing a semiconductor device. The method includes disposing a plurality of a first type of light sensing units on a substrate. The method further includes disposing a plurality of a second type of light sensing units arranged on the substrate, wherein each of the plurality of the first type of light sensing units is operable to receive less radiation compared to each of the plurality of the second type of light sensing units, and disposing the plurality of the second type of light sensing units comprises disposing at least one of the plurality of the second type of light sensing units adjacent to a portion of at least one of the plurality of the first type of light sensing units. The method further includes disposing a first isolation structure between one of the plurality of the first type of light sensing units and one of the plurality of the second type of light sensing units. The method further includes disposing a second isolation structure between the adjacent first type of light sensing units of the plurality of the first type of light sensing units. The method further includes disposing a reflective layer above the plurality of the first type of light sensing units. In some embodiments, disposing the first isolation structure includes disposing the first isolation structure having a larger projection area than the second isolation structure. In some embodiments, disposing the reflective layer includes disposing the reflective layer extending from a projection area of the plurality of the first type of light sensing units to a projection area of the plurality of the second type of light sensing units. In some embodiments, the method further includes roughening a surface of at least one of the plurality of the second type of light sensing units. In some embodiments, the method further includes disposing a third type of light sensing unit between at least one of the plurality of the first type of light sensing units and at least one of the plurality of the second type of light sensing units, wherein the third type of light sensing unit is operable to receive less radiation than each of the plurality of the first type of light sensing units or each of the plurality of the second type of light sensing units.
- An aspect of this description relates to a method of manufacturing a semiconductor device. The method includes forming a first plurality of light sensing elements on a substrate. The method further includes forming a second plurality of light sensing elements on the substrate, wherein the second plurality of light sensing elements surrounds the first plurality of light sensing elements, and each of the second plurality of light sensing elements is configured to receive a higher intensity of light than each of the first plurality of light sensing elements. The method further includes forming a first plurality of isolation structures, wherein each of the first plurality of isolation structures is between a light sensing element of the second plurality of light sensing elements and a corresponding light sensing element of the first plurality of light sensing elements. The method further includes forming a second plurality of isolation structures, wherein each of the second plurality of isolation structures is between adjacent light sensing elements of the first plurality of light sensing elements. The method further includes forming a plurality of metal structures over the first plurality of isolation structures and the second plurality of isolation structures, wherein each of the plurality of metal structures is aligned with a corresponding light sensing element of the first plurality of light sensing elements or a corresponding light sensing element of the second plurality of light sensing elements. The method further includes forming a reflective layer over at least a portion of a first metal structure of the plurality of metal structures, wherein the reflective layer overlaps a first light sensing element of the first plurality of light sensing elements. In some embodiments, the method further includes forming a third plurality of light sensing elements on the substrate, wherein the third plurality of light sensing elements is between the first plurality of light sensing elements and the second plurality of light sensing elements. In some embodiments, forming the first plurality of light sensing elements includes forming the first plurality of light sensing element having a curved surface. In some embodiments, forming the reflective layer includes forming the reflective layer over an entirety of the first metal structure. In some embodiments, forming the reflective layer includes forming the reflective layer over the first metal structure, and the first metal structure is over a first isolation structure of the first plurality of isolation structures. In some embodiments, forming the reflective layer includes forming the reflective layer over the first metal structure, and the first metal structure is over a first isolation structure of the second plurality of isolation structures. In some embodiments, forming the reflective layer comprises forming the reflective layer overlapping the first light sensing element and a second light sensing element of the first plurality of light sensing elements. In some embodiments, the method further includes roughening a surface of at least one of the plurality of second light sensing elements. In some embodiments, forming the reflective layer includes forming the reflective layer partially overlapping a first light sensing element of the second plurality of light sensing elements. In some embodiments, forming the first plurality of isolation structures includes forming the first plurality of isolation structures simultaneously with forming the second plurality of isolation structures.
- An aspect of this description relates to a method of manufacturing a semiconductor device. The method includes forming a first light sensing on a substrate, wherein the first light sensing element is configured to receive a first amount of light. The method further includes forming a second light sensing element on the substrate, wherein the second light sensing element is configured to receive the first amount of light. The method further includes forming a third light sensing element on the substrate, wherein the third light sensing element is configured to receive a second amount of light different from the first amount of light. The method further includes forming a first isolation structure between the first light sensing element and the second light sensing element. The method further includes forming a second isolation structure between the second light sensing element and the third light sensing element. The method further includes roughening a surface of the third light sensing element. The method further includes forming a dielectric layer over the first light sensing element, the second light sensing element, and the third light sensing element, wherein the roughened surface of the third light sensing element is proximate the dielectric layer. In some embodiments, the method further includes forming a first metal structure over the dielectric layer, wherein the first metal structure is aligned with the first isolation structure; and forming a second metal structure over the dielectric layer, wherein the second metal structure is aligned with the second isolation structure. In some embodiments, the method further includes forming a reflective layer over the dielectric layer, wherein the reflective layer overlaps the second light sensing element. In some embodiments, forming the reflective layer includes forming the reflective layer overlapping the first metal structure and the first light sensing element. In some embodiments, forming the reflective layer includes forming the reflective layer partially overlapping the third light sensing element.
- The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
Claims (20)
1. A method of manufacturing a semiconductor device, comprising:
disposing a plurality of a first type of light sensing units on a substrate;
disposing a plurality of a second type of light sensing units arranged on the substrate, wherein each of the plurality of the first type of light sensing units is operable to receive less radiation compared to each of the plurality of the second type of light sensing units, and disposing the plurality of the second type of light sensing units comprises disposing at least one of the plurality of the second type of light sensing units adjacent to a portion of at least one of the plurality of the first type of light sensing units;
disposing a first isolation structure between one of the plurality of the first type of light sensing units and one of the plurality of the second type of light sensing units;
disposing a second isolation structure between the adjacent first type of light sensing units of the plurality of the first type of light sensing units; and
disposing a reflective layer above the plurality of the first type of light sensing units.
2. The method of claim 1 , wherein disposing the first isolation structure comprises disposing the first isolation structure having a larger projection area than the second isolation structure.
3. The method of claim 1 , wherein disposing the reflective layer comprises disposing the reflective layer extending from a projection area of the plurality of the first type of light sensing units to a projection area of the plurality of the second type of light sensing units.
4. The method of claim 1 , further comprising roughening a surface of at least one of the plurality of the second type of light sensing units.
5. The method of claim 1 , further comprising disposing a third type of light sensing unit between at least one of the plurality of the first type of light sensing units and at least one of the plurality of the second type of light sensing units, wherein the third type of light sensing unit is operable to receive less radiation than each of the plurality of the first type of light sensing units or each of the plurality of the second type of light sensing units.
6. A method of manufacturing a semiconductor device comprising:
forming a first plurality of light sensing elements on a substrate;
forming a second plurality of light sensing elements on the substrate, wherein the second plurality of light sensing elements surrounds the first plurality of light sensing elements, and each of the second plurality of light sensing elements is configured to receive a higher intensity of light than each of the first plurality of light sensing elements;
forming a first plurality of isolation structures, wherein each of the first plurality of isolation structures is between a light sensing element of the second plurality of light sensing elements and a corresponding light sensing element of the first plurality of light sensing elements;
forming a second plurality of isolation structures, wherein each of the second plurality of isolation structures is between adjacent light sensing elements of the first plurality of light sensing elements;
forming a plurality of metal structures over the first plurality of isolation structures and the second plurality of isolation structures, wherein each of the plurality of metal structures is aligned with a corresponding light sensing element of the first plurality of light sensing elements or a corresponding light sensing element of the second plurality of light sensing elements; and
forming a reflective layer over at least a portion of a first metal structure of the plurality of metal structures, wherein the reflective layer overlaps a first light sensing element of the first plurality of light sensing elements.
7. The method of claim 6 , further comprising forming a third plurality of light sensing elements on the substrate, wherein the third plurality of light sensing elements is between the first plurality of light sensing elements and the second plurality of light sensing elements.
8. The method of claim 6 , wherein forming the first plurality of light sensing elements comprises forming the first plurality of light sensing element having a curved surface.
9. The method of claim 6 , wherein forming the reflective layer comprises forming the reflective layer over an entirety of the first metal structure.
10. The method of claim 6 , wherein forming the reflective layer comprises forming the reflective layer over the first metal structure, and the first metal structure is over a first isolation structure of the first plurality of isolation structures.
11. The method of claim 6 , wherein forming the reflective layer comprises forming the reflective layer over the first metal structure, and the first metal structure is over a first isolation structure of the second plurality of isolation structures.
12. The method of claim 6 , wherein forming the reflective layer comprises forming the reflective layer overlapping the first light sensing element and a second light sensing element of the first plurality of light sensing elements.
13. The method of claim 6 , further comprising roughening a surface of at least one of the plurality of second light sensing elements.
14. The method of claim 6 , wherein forming the reflective layer comprises forming the reflective layer partially overlapping a first light sensing element of the second plurality of light sensing elements.
15. The method of claim 6 , wherein forming the first plurality of isolation structures comprises forming the first plurality of isolation structures simultaneously with forming the second plurality of isolation structures.
16. A method of manufacturing a semiconductor device comprising:
forming a first light sensing on a substrate, wherein the first light sensing element is configured to receive a first amount of light;
forming a second light sensing element on the substrate, wherein the second light sensing element is configured to receive the first amount of light;
forming a third light sensing element on the substrate, wherein the third light sensing element is configured to receive a second amount of light different from the first amount of light;
forming a first isolation structure between the first light sensing element and the second light sensing element;
forming a second isolation structure between the second light sensing element and the third light sensing element;
roughening a surface of the third light sensing element;
forming a dielectric layer over the first light sensing element, the second light sensing element, and the third light sensing element, wherein the roughened surface of the third light sensing element is proximate the dielectric layer.
17. The method of claim 16 , further comprising:
forming a first metal structure over the dielectric layer, wherein the first metal structure is aligned with the first isolation structure; and
forming a second metal structure over the dielectric layer, wherein the second metal structure is aligned with the second isolation structure.
18. The method of claim 17 , further comprising forming a reflective layer over the dielectric layer, wherein the reflective layer overlaps the second light sensing element.
19. The method of claim 18 , wherein forming the reflective layer comprises forming the reflective layer overlapping the first metal structure and the first light sensing element.
20. The method of claim 18 , wherein forming the reflective layer comprises forming the reflective layer partially overlapping the third light sensing element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US18/448,093 US20230402480A1 (en) | 2020-07-17 | 2023-08-10 | Method of manufacturing semiconductor image sensor |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US202063053094P | 2020-07-17 | 2020-07-17 | |
US17/220,212 US20220020787A1 (en) | 2020-07-17 | 2021-04-01 | Semiconductor device, semiconductor image sensor, and method of manufacturing the same |
US18/448,093 US20230402480A1 (en) | 2020-07-17 | 2023-08-10 | Method of manufacturing semiconductor image sensor |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/220,212 Division US20220020787A1 (en) | 2020-07-17 | 2021-04-01 | Semiconductor device, semiconductor image sensor, and method of manufacturing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
US20230402480A1 true US20230402480A1 (en) | 2023-12-14 |
Family
ID=76958800
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/220,212 Pending US20220020787A1 (en) | 2020-07-17 | 2021-04-01 | Semiconductor device, semiconductor image sensor, and method of manufacturing the same |
US18/448,093 Pending US20230402480A1 (en) | 2020-07-17 | 2023-08-10 | Method of manufacturing semiconductor image sensor |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US17/220,212 Pending US20220020787A1 (en) | 2020-07-17 | 2021-04-01 | Semiconductor device, semiconductor image sensor, and method of manufacturing the same |
Country Status (7)
Country | Link |
---|---|
US (2) | US20220020787A1 (en) |
EP (1) | EP3940782A3 (en) |
JP (1) | JP2022019687A (en) |
KR (1) | KR102558318B1 (en) |
CN (1) | CN113594192A (en) |
DE (1) | DE102021108586A1 (en) |
TW (1) | TWI794816B (en) |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6285031B1 (en) * | 1998-12-18 | 2001-09-04 | Isp Investments Inc. | Radiation dosimetry method and associated apparatus |
US20070001100A1 (en) * | 2005-06-30 | 2007-01-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Light reflection for backside illuminated sensor |
TWI398707B (en) * | 2008-05-16 | 2013-06-11 | Au Optronics Corp | Photo sensitive unit and pixel structure and liquid crystal display panel having the same |
JP5653829B2 (en) * | 2011-04-25 | 2015-01-14 | 富士フイルム株式会社 | Radiographic apparatus, radiographic system, and radiographic method |
JP5788738B2 (en) * | 2011-08-26 | 2015-10-07 | 富士フイルム株式会社 | Manufacturing method of radiation detector |
JP5592962B2 (en) * | 2012-02-03 | 2014-09-17 | 富士フイルム株式会社 | Radiation imaging apparatus, control method therefor, and radiation imaging system |
EP2648404B1 (en) * | 2012-04-02 | 2016-12-07 | Harvest Imaging bvba | Floating diffusion pre-charge |
WO2014173644A1 (en) * | 2013-04-24 | 2014-10-30 | Koninklijke Philips N.V. | Detection of radiation quanta using an optical detector pixel array and pixel cell trigger state sensing circuits |
JP2014122903A (en) * | 2013-12-20 | 2014-07-03 | Fujifilm Corp | Radiation detector and radiation imaging device |
ITUB20169957A1 (en) * | 2016-01-13 | 2017-07-13 | Lfoundry Srl | METHOD FOR MANUFACTURING NIR CMOS PERFORMED SENSORS |
FR3056333B1 (en) * | 2016-09-22 | 2018-10-19 | Stmicroelectronics (Crolles 2) Sas | ENHANCED QUANTUM EFFICIENT IMAGE SENSOR FOR INFRARED RADIATION |
US10770505B2 (en) * | 2017-04-05 | 2020-09-08 | Intel Corporation | Per-pixel performance improvement for combined visible and ultraviolet image sensor arrays |
US12009379B2 (en) * | 2017-05-01 | 2024-06-11 | Visera Technologies Company Limited | Image sensor |
US10411063B2 (en) * | 2017-06-20 | 2019-09-10 | Omnivision Technologies, Inc. | Single-exposure high dynamic range sensor |
EP3709358B1 (en) * | 2017-11-09 | 2024-02-21 | Sony Semiconductor Solutions Corporation | Solid-state image pickup device and electronic apparatus |
US10790326B2 (en) * | 2018-09-26 | 2020-09-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pixel device on deep trench isolation (DTI) structure for image sensor |
-
2021
- 2021-04-01 US US17/220,212 patent/US20220020787A1/en active Pending
- 2021-04-07 DE DE102021108586.1A patent/DE102021108586A1/en active Pending
- 2021-05-18 TW TW110117922A patent/TWI794816B/en active
- 2021-05-31 KR KR1020210070176A patent/KR102558318B1/en active IP Right Grant
- 2021-07-16 JP JP2021117808A patent/JP2022019687A/en active Pending
- 2021-07-16 EP EP21186093.7A patent/EP3940782A3/en not_active Withdrawn
- 2021-07-19 CN CN202110811899.5A patent/CN113594192A/en active Pending
-
2023
- 2023-08-10 US US18/448,093 patent/US20230402480A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
TW202218140A (en) | 2022-05-01 |
JP2022019687A (en) | 2022-01-27 |
DE102021108586A1 (en) | 2022-01-20 |
TWI794816B (en) | 2023-03-01 |
EP3940782A2 (en) | 2022-01-19 |
KR102558318B1 (en) | 2023-07-20 |
KR20220010421A (en) | 2022-01-25 |
CN113594192A (en) | 2021-11-02 |
EP3940782A3 (en) | 2022-02-23 |
US20220020787A1 (en) | 2022-01-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11658196B2 (en) | Semiconductor image sensor | |
US11705470B2 (en) | Image sensor scheme for optical and electrical improvement | |
US11004887B2 (en) | Semiconductor image sensor | |
US11824073B2 (en) | Image sensor device | |
US11121166B2 (en) | Image sensor device | |
US8866251B2 (en) | Solid-state imaging element having optical waveguide with insulating layer | |
US20200235159A1 (en) | Band-pass filter for stacked sensor | |
US7524690B2 (en) | Image sensor with a waveguide tube and a related fabrication method | |
TWI399849B (en) | Solid-state imaging device, method for manufacturing solid-state imaging device, and electronic apparatus | |
KR100276616B1 (en) | Solid state imaging device and manufacturing method thereof | |
US11646340B2 (en) | Semiconductor image sensor | |
JPH0745805A (en) | Solid-stage image pickup device | |
US20230402480A1 (en) | Method of manufacturing semiconductor image sensor | |
US11764248B2 (en) | Band-pass filter for stacked sensor | |
US20180247967A1 (en) | Photoelectric conversion device and apparatus | |
US20240096917A1 (en) | Image sensor structure and method for forming the same | |
US20240021644A1 (en) | Trench isolation structure for image sensors | |
JP2009076790A (en) | Ultraviolet sensor, and setting method of ultraviolet sensor |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:HUANG, LI-WEN;FANG, CHUN-LIN;PAN, KUAN-LING;AND OTHERS;SIGNING DATES FROM 20210325 TO 20210328;REEL/FRAME:064557/0418 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION |