US20230187373A1 - Microchip charge patterning - Google Patents

Microchip charge patterning Download PDF

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US20230187373A1
US20230187373A1 US18/164,070 US202318164070A US2023187373A1 US 20230187373 A1 US20230187373 A1 US 20230187373A1 US 202318164070 A US202318164070 A US 202318164070A US 2023187373 A1 US2023187373 A1 US 2023187373A1
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charge
depositing
microchip
oxide
forming
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Eugene M. Chow
JenPing Lu
Armin R. Volkel
Bing R. Hsieh
Gregory L. Whiting
Sean E. Doris
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Xerox Corp
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Xerox Corp
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Publication of US20230187373A1 publication Critical patent/US20230187373A1/en
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Assigned to XEROX CORPORATION reassignment XEROX CORPORATION CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVAL OF US PATENTS 9356603, 10026651, 10626048 AND INCLUSION OF US PATENT 7167871 PREVIOUSLY RECORDED ON REEL 064038 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Assignors: PALO ALTO RESEARCH CENTER INCORPORATED
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54433—Marks applied to semiconductor devices or parts containing identification or tracking information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/95053—Bonding environment
    • H01L2224/95085—Bonding environment being a liquid, e.g. for fluidic self-assembly
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
    • H01L2224/95143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • H01L2224/95145—Electrostatic alignment, i.e. polarity alignment with Coulomb charges
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]

Definitions

  • the system uses the encoding to identify and position the microchips as part of the assembly process.
  • the fabrication process should be compatible with existing devices on the chips. In addition, the process should not increase the manufacturing costs, but still allow the patterning on a scalable level between larger areas and small features. To provide a flexible system, the system should allow for varying magnitudes of charge density, and ideally but not necessarily, both positive and negative polarity, for multiple levels of chip control and identification. The charge patterns should have good stability to allow long shelf life of the patterned devices.
  • chips being attracted to each other. They may gather together or conglomerate based upon their respective charges. The density of the chips needs to remain low enough the chips do not exchange charge by contact with each other.
  • a method of forming a charge pattern on a microchip including depositing a first material on an insulator surface of the microchip, depositing a material having the capability of forming a self-assembled monolayer on the other material, wherein the material comprises at least one material selected from the group consisting of: octadecyltrichlorosilane, phenethyltrichlorosilane, hexamethyldisilazane, allyltrimethoxysilane, or perfluorooctyltrichlorosilanem, and patterning the self-assembled monolayer to reveal a portion of the first material.
  • a method of forming a charge pattern in a microchip including depositing a first material as one of either a solution processed material or a vapor deposited material to generate a first polarity or first magnitude of charge, depositing a second material as a vapor deposited material to generate a second polarity or second magnitude of charge, and immersing the microchip in a non-polar fluid comprising one selected from the group consisting of: an isoparafinnic liquid, a hydrocarbon liquid and dodecane.
  • FIG. 1 shows an embodiment of an overall method of forming charge patterns on microchips.
  • FIG. 2 shows an embodiment of a method of forming charge patterns on a microchip.
  • FIG. 3 shows an embodiment of a method of printing charge patterns on a microchip.
  • FIGS. 4 - 7 show an embodiment of a method of photolithographically forming charge patterns on a microchip.
  • FIGS. 8 - 10 show an embodiment of a method of forming a charge pattern using a scorotron.
  • FIGS. 11 - 13 show an embodiment of a method of forming a bipolar charge template.
  • FIGS. 12 - 16 show an alternative embodiment of a method of forming a bipolar charge template.
  • FIG. 1 shows an overall embodiment of a method of forming charge patterns on a microchip.
  • the microchips are fabricated on a substrate, such as silicon, gallium arsenide, complementary metal oxide semiconductor (CMOS) etc.
  • CMOS complementary metal oxide semiconductor
  • the process then deposits materials on the microchips to enable charging at 13 .
  • the microchips are then submersed in a fluid that causes charge to develop on the materials deposited.
  • FIGS. 8 - 16 the materials on the microchips are charged using an external device. The end result is microchips with charge patterns on their surfaces in 19 .
  • FIG. 2 shows an embodiment of a method of forming charge patterns on a microchip.
  • the process will more than likely begin at the wafer level at 10 , after manufacture of the individual microchips on the wafer. This allows the process of charge patterning to occur in a more mass-produced manner, using techniques compatible with chip fabrication processes. However, no limitation is intended by this discussion, and none should be implied.
  • the individual chips can be patterned using the same techniques after singulation from the wafer.
  • the manufactured microchip 12 has a shield 14 to protect the circuitry on the chip.
  • the shield has an insulator 16 .
  • the insulator allows charge or material patterns deposited on the surface to avoid interaction with the circuitry on the microchip.
  • the pattern ABBAB may represent different charges, such as + --+ -, or a pattern of materials into which charge will be developed.
  • the charge pattern may consist of alternating regions of differing charge magnitude and/or polarity. The embodiment in this portion of the discussion has the patterns being charge.
  • the microchips can be placed into a fluid to create an ‘ink’ bottle 22 or other dispenser.
  • the fluid may contain other additives such as a charge control agent.
  • the charge control agent may either allow the charge to remain stable on the surface of the chips 12 , or may cause the charge to develop on the surface of the wafer.
  • the charge generation may take the form of depositing a material, and developing a charge in the material thorough the interaction of the charge patterning material with the fluid component of the ink.
  • One approach uses deposition of a thin-film of the charge patterning material using solution processing techniques such as spin-coating, printing, dip-coating or self-assembly, or vapor deposition techniques such as plasma enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD), followed by immersion in solution after deposition of the film.
  • solution processing techniques such as spin-coating, printing, dip-coating or self-assembly
  • vapor deposition techniques such as plasma enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD)
  • PECVD plasma enhanced chemical vapor deposition
  • ALD atomic layer deposition
  • materials that could be deposited by solution or vapor techniques include polymers such as polyethylene, polystyrene, polymethylmethacrylate, and parylene and polyvinylalcohol, as well as cationic and anionic polyelectrolytes such as polystyrenesulfonic acid, polyallylamine, polyacrylic acid, and poly(dial
  • organometallic salts such as zinc stearate or aluminum stearate as well as oxides, such as silica, alumina or titania.
  • oxides such as silica, alumina or titania.
  • materials which form self-assembled monolayers such as octadecyltrichlorosilane, phenethyltrichlorosilane, hexamethyldisilazane, allyltrimethoxysilane or perfluorooctyltrichlorosilane may also be used.
  • the charge patterning material may not be a pure material but rather a blend of one or more materials, possibly to enhance charge generating properties, improve processing performance, or impart new functionality to the film such as making it light sensitive.
  • materials deposited from solution they would likely be first dissolved in a solvent such as toluene, hexane, water, isopropanol, or tetrahydrofuran to enable solution processing.
  • An example process may involve spin coating the material onto the surface of the microchip, patterning the material either using light directly if a light-sensitive formulation of the charge-patterning material is used, or in a separate step through photolithographic/etching cycles, and immersing the chip into solution where free charges are formed through interaction between the fluid and the material.
  • a first polymer is spun onto the insulator 16 and photolithographically defined in FIG. 5 , exposing a portion of the insulator 16 .
  • a second polymer 42 is then spun on or otherwise deposited on the first polymer and the exposed insulator in FIG. 6 .
  • the second polymer is then patterned to define a region separate from the first region, typically with a region of the insulator.
  • the two different polymers then retain different charges, or magnitudes of charge to form a charge pattern.
  • Typical functional groups that develop a negative surface change include sulfonic acids, phosphonic acids, and carboxylic acids amongst others.
  • Typical functional groups that develop positive surface charges include amines and imidazoles, amongst others.
  • the range of Coulomb interaction of the charged microchips is controlled by the ionic strength of the solution, but is typically rather short, in the range of 1 to 10 micrometers due to the high ion content.
  • non-polar fluids In this embodiment the use of non-polar fluids is desired however, since such Coulomb interactions between charged entities are felt over much larger length scales, in the range of 10-100 micrometers.
  • non-polar fluids include isoparaffinic liquids such as the isopar series of fluids, and other hydrocarbon liquids such as dodecane.
  • charge control agents typically amphiphilic surfactant materials (both ionic and non-ionic), such as phosphatidylcholine (lecithin), sorbitan monooeleate (span-80), aluminium-di-tert-butyl salicylate (ALOHOS), polyisobutylene succinimide (OLOA), or sodium dioctylsulfosuccinate (AOT) amongst others may need to be added to the liquid to assist in developing charge.
  • amphiphilic surfactant materials such as phosphatidylcholine (lecithin), sorbitan monooeleate (span-80), aluminium-di-tert-butyl salicylate (ALOHOS), polyisobutylene succinimide (OLOA), or sodium dioctylsulfosuccinate (AOT) amongst others may need to be added to the liquid to assist in developing charge.
  • charging of the surface can be done through tribo-actions.
  • the toner particles are charged by contacting specifically designed developer particles.
  • the charge patterning material has to be selected such that it charges in specific ways when contacted with the developer material.
  • the density of the chips should stay low enough to control charge exchange between microchips accidentally hitting each other.
  • an ink-jet head 30 can deposit the charge-patterning material.
  • Candidate material may include waxes, polymers, such as polyelectrolytes, or blends of materials amongst others. After deposition of the charge patterning material, as in previous descriptions the chips would be singulated and immersed in a fluid where free charges would be generated.
  • a self-assembled monolayer can be used along with another material, such as an oxide, to create charged regions on the chip. This could be accomplished, for example, by first depositing the oxide, then depositing the self-assembled monolayer having the desired functionality over the oxide. Using photolithography and etching this self-assembled monolayer could then be patterned revealing the oxide underneath.
  • the oxide could be deposited followed by patterning of a sacrificial blocking material (such as photoresist), deposition of the self-assembled monolayer could then take place, followed by removal of the sacrificial material, again revealing the underlying oxide surface, creating an oxide, self-assembled monolayer pattern.
  • This second approach has the benefit in that the self-assembled monolayer deposition and blocking material removal steps can be carried out either at the wafer scale, or at the chiplet scale after wafer singulation.
  • FIGS. 4 - 7 show processes of an embodiment in which photolithographic patterned polymers, inorganic materials or a mixture of the two are used. These materials can either be tribo-charged or chemically charged using a charge control agent, in a dielectric fluid to carry different polarities of charge. Photolithographic defined charging of a dielectric with a corona device is another approach, using dry film resist. Commercially available dry film resists express substantial conductivity difference between exposed ultraviolet and unexposed regions. FIGS. 4 - 7 show a process for photolithographic materials.
  • a photoconductor coating In a photoconductor coating embodiment, one may use inorganic photoconductor materials such as amorphous silicon and selenium, or single layer or multilayer organic photoconductors. If such a photoconductor coating is used, it receives charge from a corotron or scorotron to give the desired charge signs and patterns.
  • a corotron is a corona charging device typically used in electrophotography/Xerography that has a wire connected to a high voltage power source. In a typical application, the wire generates an electric field that charges up a photoreceptor in preparation for receiving charged toner particles.
  • a scorotron is a screen corotron.
  • FIGS. 8 - 10 show one embodiment of such a process.
  • a dry film resist is laminated onto the insulator layer 16 over the microchip or microchip wafer 12 .
  • ultraviolet light exposes a portion 52 of the dry resist, creating high and low conductivity regions.
  • the wafer or microchip 12 is grounded by connection 54 and charged with a scorotron or corotron 56 , to form charge patterns based upon the previously exposed regions 50 and 52 of the dry film resist.
  • This forms a single charge template, where the surface has one polarity of charge.
  • One may verify the charge patterns by spreading beads of known charge and imaging with a camera or measuring the field directly in air with a non-contact electrostatic volt meter.
  • FIGS. 11 - 13 show an embodiment of a method of forming a dual charge template.
  • Ultraviolet light exposes a portion of the dry film resist 50 to form a low conductivity region 52 .
  • Using a stencil mask 62 on top of the dry film resist allows exposure of only a portion of the low conductivity region formed by the UV exposure.
  • the scorotron 64 applies charge of a first polarity to a portion of the low conductivity region not protected by the mask 62 .
  • the process shifts the mask 62 to cover the charged portion of the low conductivity region.
  • the scorotron then charges the uncharged portion of the low conductivity region with a lower dose of the opposite sign ions to create the other sign charge pattern.
  • the opposite sign charge pass of the scorotron is referred to as 66 .
  • a bipolar or a dual charge template can result from a dual exposure, shown in FIGS. 14 - 16 .
  • FIG. 14 shows a first exposure forming a first low conductivity region 52 on the dry film resist 50 . This first region then receives a first polarity charge from a scorotron 62 . The dry film resist then receives a second exposure of UV light to form a second low conductivity region 70 . This second region then receives a charge of the opposite polarity from the scorotron 64 .
  • charge patterns can be generated on the surface of microchips, either before or after singulation from a wafer.
  • the techniques used are compatible with semiconductor fabrication processes, either using scorotron or corotron charging, tribo-charging, or by application of charged materials. Free charges may then be generated directly or through the interaction of these materials with the surrounding fluid in the chip “ink.”
  • the charge patterns contain information usable in automated systems to sort, organize and arrange microchips into larger circuits.

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Abstract

A method of forming a charge pattern on a microchip includes depositing a first material on an insulator surface of the microchip, depositing a material having capability of forming a self-assembled monolayer on the other material, wherein the material comprises at least one material selected from the group consisting of: octadecyltrichlorosilane, phenethyltrichlorosilane, hexamethyldisilazane, allyltrimethoxysilane, or perfluorooctyltrichlorosilanem, and patterning the self-assembled monolayer to reveal a portion of the first material. A method of forming a charge pattern in a microchip includes depositing a first material as one of either a solution processed material or a vapor deposited material to generate a first polarity or first magnitude of charge, depositing a second material as a vapor deposited material to generate a second polarity or second magnitude of charge, and immersing the microchip in a non-polar fluid comprising one selected from the group consisting of: an isoparafinnic liquid, a hydrocarbon liquid and dodecane.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • This application is a divisional of U.S. Pat. Application No. 16/008,961, filed Jun. 14, 2018, which is a divisional application of U.S. Pat. Application No. 13/652,194, filed Oct. 15, 2012, now U.S. Pat. No. 10,014,261, issued Jul. 3, 2018, which are incorporated by reference herein in their entirety.
    • BACKGROUND
  • Systems exist that assemble microchips automatically based upon some sort of encoding such as electrostatic or magnetic coding. The system uses the encoding to identify and position the microchips as part of the assembly process.
  • Examples of these systems can be found in U.S. Pat. 7,861,405, and its related cases, U.S. Pat. Publications 20100192365, 20100186221, and 20100186222, owned by the assignee of this application. Another example is shown in US Patent 7,332,361, that teaches charge-encoded elements having basic or acidic surfaces capable of carrying charge in non-polar liquids with charge control agents. Examples include two-particle electrophoretic ink, liquid toner, inorganic oxides, and polymers. Standard photolithography or ink-jet technology can be used to pattern these materials to form charge-encoded elements. All these references are incorporated by reference here. The system uses a charge or magnetic polarity on the chip to sort and position the microchips.
  • These references make general mention of possible methods of how chips have the charge or polarity but give no details. For example, issues can arise with the deposition of the charge or polarity. Currently, no current technique exists to deposit a charge pattern on isolated microchips. One approach has charged one end of a nanowire, another has charged up one side of a symmetric microchip, but no work appears to be done on isolated microchips or charge patterning.
  • The fabrication process should be compatible with existing devices on the chips. In addition, the process should not increase the manufacturing costs, but still allow the patterning on a scalable level between larger areas and small features. To provide a flexible system, the system should allow for varying magnitudes of charge density, and ideally but not necessarily, both positive and negative polarity, for multiple levels of chip control and identification. The charge patterns should have good stability to allow long shelf life of the patterned devices.
  • Another issue with patterning may arise with the chips being attracted to each other. They may gather together or conglomerate based upon their respective charges. The density of the chips needs to remain low enough the chips do not exchange charge by contact with each other.
    • SUMMARY
  • According to aspects illustrated here, there is provided a method of forming a charge pattern on a microchip including depositing a first material on an insulator surface of the microchip, depositing a material having the capability of forming a self-assembled monolayer on the other material, wherein the material comprises at least one material selected from the group consisting of: octadecyltrichlorosilane, phenethyltrichlorosilane, hexamethyldisilazane, allyltrimethoxysilane, or perfluorooctyltrichlorosilanem, and patterning the self-assembled monolayer to reveal a portion of the first material.
  • According to aspects illustrated here, there is provided a method of forming a charge pattern in a microchip including depositing a first material as one of either a solution processed material or a vapor deposited material to generate a first polarity or first magnitude of charge, depositing a second material as a vapor deposited material to generate a second polarity or second magnitude of charge, and immersing the microchip in a non-polar fluid comprising one selected from the group consisting of: an isoparafinnic liquid, a hydrocarbon liquid and dodecane.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 shows an embodiment of an overall method of forming charge patterns on microchips.
  • FIG. 2 shows an embodiment of a method of forming charge patterns on a microchip.
  • FIG. 3 shows an embodiment of a method of printing charge patterns on a microchip.
  • FIGS. 4-7 show an embodiment of a method of photolithographically forming charge patterns on a microchip.
  • FIGS. 8-10 show an embodiment of a method of forming a charge pattern using a scorotron.
  • FIGS. 11-13 show an embodiment of a method of forming a bipolar charge template.
  • FIGS. 12-16 show an alternative embodiment of a method of forming a bipolar charge template.
    •  DETAILED DESCRIPTION OF THE EMBODIMENTS
  • FIG. 1 shows an overall embodiment of a method of forming charge patterns on a microchip. At 11, the microchips are fabricated on a substrate, such as silicon, gallium arsenide, complementary metal oxide semiconductor (CMOS) etc. The process then deposits materials on the microchips to enable charging at 13. In one approach, shown in more detail in FIGS. 2-7 , the microchips are then submersed in a fluid that causes charge to develop on the materials deposited. In another approach, shown in more detail in FIGS. 8-16 , the materials on the microchips are charged using an external device. The end result is microchips with charge patterns on their surfaces in 19.
  • FIG. 2 shows an embodiment of a method of forming charge patterns on a microchip. The process will more than likely begin at the wafer level at 10, after manufacture of the individual microchips on the wafer. This allows the process of charge patterning to occur in a more mass-produced manner, using techniques compatible with chip fabrication processes. However, no limitation is intended by this discussion, and none should be implied. The individual chips can be patterned using the same techniques after singulation from the wafer.
  • Using manufacturing techniques compatible with chip processing, the manufactured microchip 12 has a shield 14 to protect the circuitry on the chip. The shield has an insulator 16. The insulator allows charge or material patterns deposited on the surface to avoid interaction with the circuitry on the microchip. The pattern ABBAB may represent different charges, such as + --+ -, or a pattern of materials into which charge will be developed. Through the techniques discussed in more detail further, the charge pattern may consist of alternating regions of differing charge magnitude and/or polarity. The embodiment in this portion of the discussion has the patterns being charge.
  • Once singulated, the microchips can be placed into a fluid to create an ‘ink’ bottle 22 or other dispenser. The fluid may contain other additives such as a charge control agent. The charge control agent may either allow the charge to remain stable on the surface of the chips 12, or may cause the charge to develop on the surface of the wafer. The charge generation may take the form of depositing a material, and developing a charge in the material thorough the interaction of the charge patterning material with the fluid component of the ink.
  • One approach uses deposition of a thin-film of the charge patterning material using solution processing techniques such as spin-coating, printing, dip-coating or self-assembly, or vapor deposition techniques such as plasma enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD), followed by immersion in solution after deposition of the film. Examples of materials that could be deposited by solution or vapor techniques include polymers such as polyethylene, polystyrene, polymethylmethacrylate, and parylene and polyvinylalcohol, as well as cationic and anionic polyelectrolytes such as polystyrenesulfonic acid, polyallylamine, polyacrylic acid, and poly(diallyldimethylammonium chloride). Other examples include organometallic salts such as zinc stearate or aluminum stearate as well as oxides, such as silica, alumina or titania. In addition materials which form self-assembled monolayers such as octadecyltrichlorosilane, phenethyltrichlorosilane, hexamethyldisilazane, allyltrimethoxysilane or perfluorooctyltrichlorosilane may also be used.
  • The charge patterning material may not be a pure material but rather a blend of one or more materials, possibly to enhance charge generating properties, improve processing performance, or impart new functionality to the film such as making it light sensitive. For materials deposited from solution, they would likely be first dissolved in a solvent such as toluene, hexane, water, isopropanol, or tetrahydrofuran to enable solution processing. An example process may involve spin coating the material onto the surface of the microchip, patterning the material either using light directly if a light-sensitive formulation of the charge-patterning material is used, or in a separate step through photolithographic/etching cycles, and immersing the chip into solution where free charges are formed through interaction between the fluid and the material.
  • In FIG. 4 , a first polymer is spun onto the insulator 16 and photolithographically defined in FIG. 5 , exposing a portion of the insulator 16. A second polymer 42 is then spun on or otherwise deposited on the first polymer and the exposed insulator in FIG. 6 . The second polymer is then patterned to define a region separate from the first region, typically with a region of the insulator. The two different polymers then retain different charges, or magnitudes of charge to form a charge pattern. In addition to the use of two solution processed polymers, other embodiments may use a combination of a solution processed material to generate one polarity/magnitude of charge and a vapor deposited material to generate another polarity/magnitude of charge, other embodiments could use two different vapor deposited materials.
  • If immersed in a polar liquid, such as water, most surfaces become charged, as some of the surface molecules dissociate. Charge tends to be more negative or positive depending on the chemical composition of the surface. Typical functional groups that develop a negative surface change include sulfonic acids, phosphonic acids, and carboxylic acids amongst others. Typical functional groups that develop positive surface charges include amines and imidazoles, amongst others. The range of Coulomb interaction of the charged microchips is controlled by the ionic strength of the solution, but is typically rather short, in the range of 1 to 10 micrometers due to the high ion content.
  • In this embodiment the use of non-polar fluids is desired however, since such Coulomb interactions between charged entities are felt over much larger length scales, in the range of 10-100 micrometers. Examples of non-polar fluids include isoparaffinic liquids such as the isopar series of fluids, and other hydrocarbon liquids such as dodecane. In non-polar liquids charge control agents, typically amphiphilic surfactant materials (both ionic and non-ionic), such as phosphatidylcholine (lecithin), sorbitan monooeleate (span-80), aluminium-di-tert-butyl salicylate (ALOHOS), polyisobutylene succinimide (OLOA), or sodium dioctylsulfosuccinate (AOT) amongst others may need to be added to the liquid to assist in developing charge.
  • If the surrounding liquid is air, charging of the surface can be done through tribo-actions. For example, in Xerography, the toner particles are charged by contacting specifically designed developer particles. The charge patterning material has to be selected such that it charges in specific ways when contacted with the developer material. The density of the chips should stay low enough to control charge exchange between microchips accidentally hitting each other.
  • In another approach, shown in FIG. 3 , an ink-jet head 30 can deposit the charge-patterning material. Candidate material may include waxes, polymers, such as polyelectrolytes, or blends of materials amongst others. After deposition of the charge patterning material, as in previous descriptions the chips would be singulated and immersed in a fluid where free charges would be generated.
  • In another approach, a self-assembled monolayer can be used along with another material, such as an oxide, to create charged regions on the chip. This could be accomplished, for example, by first depositing the oxide, then depositing the self-assembled monolayer having the desired functionality over the oxide. Using photolithography and etching this self-assembled monolayer could then be patterned revealing the oxide underneath. In another approach, the oxide could be deposited followed by patterning of a sacrificial blocking material (such as photoresist), deposition of the self-assembled monolayer could then take place, followed by removal of the sacrificial material, again revealing the underlying oxide surface, creating an oxide, self-assembled monolayer pattern. This second approach has the benefit in that the self-assembled monolayer deposition and blocking material removal steps can be carried out either at the wafer scale, or at the chiplet scale after wafer singulation.
  • FIGS. 4-7 show processes of an embodiment in which photolithographic patterned polymers, inorganic materials or a mixture of the two are used. These materials can either be tribo-charged or chemically charged using a charge control agent, in a dielectric fluid to carry different polarities of charge. Photolithographic defined charging of a dielectric with a corona device is another approach, using dry film resist. Commercially available dry film resists express substantial conductivity difference between exposed ultraviolet and unexposed regions. FIGS. 4-7 show a process for photolithographic materials.
  • In a photoconductor coating embodiment, one may use inorganic photoconductor materials such as amorphous silicon and selenium, or single layer or multilayer organic photoconductors. If such a photoconductor coating is used, it receives charge from a corotron or scorotron to give the desired charge signs and patterns. As the terms are used here, a corotron is a corona charging device typically used in electrophotography/Xerography that has a wire connected to a high voltage power source. In a typical application, the wire generates an electric field that charges up a photoreceptor in preparation for receiving charged toner particles. A scorotron is a screen corotron.
  • Another embodiment uses photolithographic define charging of a dielectric with a corona device. Commercially available dry film resist expresses substantially conductivity difference between ultraviolet exposed and unexposed regions. FIGS. 8-10 show one embodiment of such a process. In FIG. 8 , a dry film resist is laminated onto the insulator layer 16 over the microchip or microchip wafer 12. In FIG. 9 , ultraviolet light exposes a portion 52 of the dry resist, creating high and low conductivity regions. In FIG. 10 , the wafer or microchip 12 is grounded by connection 54 and charged with a scorotron or corotron 56, to form charge patterns based upon the previously exposed regions 50 and 52 of the dry film resist. This forms a single charge template, where the surface has one polarity of charge. One may verify the charge patterns by spreading beads of known charge and imaging with a camera or measuring the field directly in air with a non-contact electrostatic volt meter.
  • FIGS. 11-13 show an embodiment of a method of forming a dual charge template. Ultraviolet light exposes a portion of the dry film resist 50 to form a low conductivity region 52. Using a stencil mask 62 on top of the dry film resist allows exposure of only a portion of the low conductivity region formed by the UV exposure. The scorotron 64 applies charge of a first polarity to a portion of the low conductivity region not protected by the mask 62. The process shifts the mask 62 to cover the charged portion of the low conductivity region. The scorotron then charges the uncharged portion of the low conductivity region with a lower dose of the opposite sign ions to create the other sign charge pattern. To differentiate between the two scorotron processes, the opposite sign charge pass of the scorotron is referred to as 66.
  • In an alternative embodiment, a bipolar or a dual charge template can result from a dual exposure, shown in FIGS. 14-16 . FIG. 14 shows a first exposure forming a first low conductivity region 52 on the dry film resist 50. This first region then receives a first polarity charge from a scorotron 62. The dry film resist then receives a second exposure of UV light to form a second low conductivity region 70. This second region then receives a charge of the opposite polarity from the scorotron 64.
  • In this manner, charge patterns can be generated on the surface of microchips, either before or after singulation from a wafer. The techniques used are compatible with semiconductor fabrication processes, either using scorotron or corotron charging, tribo-charging, or by application of charged materials. Free charges may then be generated directly or through the interaction of these materials with the surrounding fluid in the chip “ink.” The charge patterns contain information usable in automated systems to sort, organize and arrange microchips into larger circuits.
  • It will be appreciated that several of the above-disclosed and other features and functions, or alternatives thereof, may be desirably combined into many other different systems or applications. Also that various presently unforeseen or unanticipated alternatives, modifications, variations, or improvements therein may be subsequently made by those skilled in the art which are also intended to be encompassed by the following claims.

Claims (9)

What is claimed is:
1. A method of forming a charge pattern on a microchip, comprising:
depositing a first material on an insulator surface of the microchip;
depositing a material having the capability of forming a self-assembled monolayer on the other material, wherein the material comprises at least one material selected from the group consisting of: octadecyltrichlorosilane, phenethyltrichlorosilane, hexamethyldisilazane, allyltrimethoxysilane, or perfluorooctyltrichlorosilane; and
patterning the self-assembled monolayer to reveal a portion of the first material.
2. The method as claimed in claim 1, wherein the first material comprises an oxide.
3. The method as claimed in claim 1 wherein depositing the first material comprises:
first depositing an oxide on an insulator surface of the microchip; and
patterning a sacrificial blocking material onto a portion of the oxide as the first material; and
removing the sacrificial blocking material after depositing the self-assembled monolayer to reveal the oxide.
4. The method as claimed in claim 3, wherein the blocking material comprises photoresist.
5. The method as claimed in claim 3, wherein the method is performed at one of with the chiplet scale or the wafer scale.
6. A method of forming a charge pattern in a microchip, comprising:
depositing a first material as one of either a solution processed material, or a vapor deposited material to generate a first polarity or first magnitude of charge;
depositing a second material as a vapor deposited material to generate a second polarity or second magnitude of charge; and
immersing the microchip in a non-polar fluid comprising one selected from the group consisting of: an isoparafinnic liquid, a hydrocarbon liquid and dodecane.
7. The method as claimed in claim 6, wherein depositing the first material comprises depositing a solution process material.
8. The method as claimed in claim 6, wherein depositing the first material comprises depositing a vapor deposited material.
9. The method as claimed in claim 6, wherein the first material comprises at least one selected from the group consisting of: polyethylene, polystyrene, polymethylmethacrylate, parylene, polyvinylalcohol, cationic and anionic polyelectrolytes, polystyrene-sulfonic acid, polyallylamine, polyacrylic acid, poly(diallyldimethylammonium chloride), organometallic salts, zinc stearate, aluminum stearate, silica oxide, alumina oxide, or titania oxide.
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