US20210047175A1 - Particle filter for mems device - Google Patents
Particle filter for mems device Download PDFInfo
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- US20210047175A1 US20210047175A1 US16/542,479 US201916542479A US2021047175A1 US 20210047175 A1 US20210047175 A1 US 20210047175A1 US 201916542479 A US201916542479 A US 201916542479A US 2021047175 A1 US2021047175 A1 US 2021047175A1
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- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
- B81C1/00158—Diaphragms, membranes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R1/00—Details of transducers, loudspeakers or microphones
- H04R1/08—Mouthpieces; Microphones; Attachments therefor
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0009—Structural features, others than packages, for protecting a device against environmental influences
- B81B7/0029—Protection against environmental influences not provided for in groups B81B7/0012 - B81B7/0025
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0035—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0061—Packages or encapsulation suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/0023—Packaging together an electronic processing unit die and a micromechanical structure die
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00277—Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00325—Processes for packaging MEMS devices for reducing stress inside of the package structure
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R31/00—Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor
- H04R31/003—Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor for diaphragms or their outer suspension
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0228—Inertial sensors
- B81B2201/0235—Accelerometers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0257—Microphones or microspeakers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0264—Pressure sensors
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/01—Suspended structures, i.e. structures allowing a movement
- B81B2203/0127—Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2207/00—Microstructural systems or auxiliary parts thereof
- B81B2207/01—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS
- B81B2207/012—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS the micromechanical device and the control or processing electronics being separate parts in the same package
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R2231/00—Details of apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor covered by H04R31/00, not provided for in its subgroups
- H04R2231/001—Moulding aspects of diaphragm or surround
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Abstract
Various embodiments of the present disclosure are directed towards a microphone including a particle filter disposed between a microelectromechanical systems (MEMS) substrate and a carrier substrate. A MEMS device structure overlies the MEMS substrate. The MEMS device structure includes a diaphragm having opposing sidewalls that define a diaphragm opening. The carrier substrate underlies the MEMS substrate. The carrier substrate has opposing sidewalls that define a carrier substrate opening underlying the diaphragm opening. A filter stack is sandwiched between the carrier substrate and the MEMS substrate. The filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers. The particle filter layer includes the particle filter spaced laterally between the opposing sidewalls of the carrier substrate.
Description
- Microelectromechanical systems (MEMS) devices, such as accelerometers, pressure sensors, and microphones, have found widespread use in many modern day electronic devices. MEMS devices may have a movable part, which is used to detect a motion, and convert the motion to electrical signal. For example, MEMS accelerometers and microphones are commonly found in automobiles (e.g., in airbag deployment systems), tablet computers, or in smart phones. A MEMS accelerometer includes a movable part that transfer the accelerating movement to an electrical signal. A microphone includes a movable membrane that transfer the sound to an electrical signal.
- Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
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FIG. 1 illustrates a cross-sectional view of some embodiments of a microelectromechanical systems (MEMS) microphone with a particle filter. -
FIGS. 2A and 2B illustrate top views of alternative embodiments of the MEMS microphone ofFIG. 1 . -
FIG. 3 illustrates a cross-sectional view of some embodiments of a microelectromechanical systems (MEMS) microphone with a particle filter. -
FIG. 4 illustrates a cross-sectional view of some embodiments of an integrated chip including some embodiments of the MEMS microphone ofFIG. 1 wire bonded to a complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) die. -
FIGS. 5-11 illustrate cross-sectional views of some embodiments of a first method of forming a MEMS microphone with a particle filter. -
FIG. 12 illustrates a methodology in flowchart format that illustrates some embodiments of the first method of forming a MEMS microphone with a particle filter. -
FIGS. 13-20 illustrate cross-sectional views of some embodiments of a second method of forming a MEMS microphone with a particle filter. -
FIG. 21 illustrates a methodology in flowchart format that illustrates some embodiments of the second method of forming a MEMS microphone with a particle filter. -
FIGS. 22-29 illustrate cross-sectional views of some embodiments of a third method of forming a MEMS microphone with a particle filter. -
FIG. 30 illustrates a methodology in flowchart format that illustrates some embodiments of the third method of forming a MEMS microphone with a particle filter. - The present disclosure provides many different embodiments, or examples, for implementing different features of this disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
- Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
- Moreover, “first”, “second”, “third”, etc. may be used herein for ease of description to distinguish between different elements of a figure or a series of figures. “first”, “second”, “third”, etc. are not intended to be descriptive of the corresponding element. Therefore, “a first dielectric layer” described in connection with a first figure may not necessarily corresponding to a “first dielectric layer” described in connection with another figure.
- Microelectromechanical system (MEMS) devices used for acoustical applications (e.g., MEMs microphones) are often housed within a package structure that has an opening (i.e., an inlet). The package structure is configured to provide protection of a MEMS device while the opening allows for sound waves to reach a cavity of the package structure holding the MEMS device. Within such a package, a MEMS device may be electrically coupled to an application-specific integrated circuit (ASIC) disposed within the cavity of the package structure. The MEMS device has movable parts directly overlying the opening of the package structure, and a particle filter is disposed between the movable parts and the opening of the package structure. The particle filter is configured to prevent particles from entering the opening of the package structure, thereby mitigating particles that reach the movable parts. Particles interacting with the movable parts may decreases performance of the MEMS device, by causing short circuits and/or decreasing an acoustic overload point (AOP) of the MEMS device.
- One approach to fabricate a particle filter for a MEMS device is to form the particle filter separate from fabricating the MEMS device and the ASIC. For example, the MEMS device may be fabricated with moveable elements, and the ASIC may be fabricated with semiconductor devices (e.g., transistors). A package substrate may be provided to integrate the MEMS device and ASIC. A package structure opening may be formed in the package substrate, and subsequently, a particle filter may be formed over the package structure opening. After forming the particle filter, the MEMS device is directly attached to the particle filter. Thus, the moveable elements of the MEMS device directly overlie the package structure opening. In some embodiments, the particle filter may be directly attached to the MEMS device before attaching the MEMS device to the substrate. The direct attachment process may include utilizing alignment marks formed on the MEMS device and/or the particle filter, and/or performing a bonding process.
- A problem with the aforementioned approaches is the extra processing steps utilized to form the particle filter and directly attach the particle filter to the MEMS device. This, in part, increases time and costs associated with integrating the MEMS device and the ASIC on the package substrate. Further, during the direct attachment process, a small thickness (e.g., less than 0.5 micrometers) of the particle filter may result in damage and/or destruction of the particle filter, thereby reducing an ability of the particle filter to protect the moveable elements from particles. Furthermore, by virtue of the extra processing steps utilized to from and attach the particle filter, the particle filter and MEMS device are exposed to more particles, thus decreasing performance of the moveable elements. In addition, the particle filter comprises a plurality of particle filter openings and, due to processing limitations, a diameter of the particle filter openings may each be substantially large (e.g., about 10 micrometers or greater). This in turn may mitigate an ability to block and/or prevent particles from passing through the particle filter openings.
- The present disclosure, in some embodiments, relates to a method that simplifies the fabrication of a MEMS device with a particle filter. The method forms the particle filter and MEMS device as an integrated structure prior to attaching the particle filter and MEMS device to a package structure. By forming the particle filter and MEMS device as an integrated structure, the fabrication process is simplified and damage to the particle filter is reduced. Furthermore, time and costs associated with forming the particle filter are reduced.
- As an example application, the MEMS device can be a microphone. In some embodiments, the microphone is fabricated by providing a carrier substrate and forming a filter stack over the carrier substrate. The filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers. The filter stack is patterned, thereby defining a particle filter in the particle filter layer. A MEMS substrate is bonded to the upper dielectric layer. A MEMS device structure is formed over the MEMS substrate. After forming the MEMS device structure, the carrier substrate and the MEMS substrate are patterned to form openings in the carrier and MEMs substrates. The MEMS device structure and the filter stack are patterned to form one or more moveable elements in the MEMS device structure and to remove the upper and lower dielectric layers from the particle filter. By forming the particle filter on the carrier substrate, the carrier substrate, the upper dielectric layer, and the lower dielectric layer provide structural support for the particle filter during fabrication of the microphone thereby reducing damage to the particle filter. Furthermore, by removing the upper and lower dielectric layers from the particle filter during the last patterning process, an exposure to particles is reduced, thereby increasing performance of the particle filter and the moveable elements.
- Referring to
FIG. 1 , a cross-sectional view of some embodiments of a microelectromechanical systems (MEMS)microphone 100 with aparticle filter 106 is provided. - The
MEMS microphone 100 includes aMEMS device structure 102, aMEMS substrate 111, afilter stack 104, and acarrier substrate 103. Thefilter stack 104 is disposed between thecarrier substrate 103 and theMEMS substrate 111. TheMEMS device structure 102 includesconductive wires 124 andconductive vias 122 disposed within an inter-level dielectric (ILD)structure 120 overlying theMEMS substrate 111. TheMEMS device structure 102 further includes afirst back plate 108, asecond back plate 112, and adiaphragm 110 disposed between the first andsecond back plates diaphragm 110 is spaced apart from thefirst back plate 108 and thesecond back plate 112 by one or more non-zero distances. Further, thediaphragm 110 and the first andsecond back plates electrical contact 114 is electrically coupled to thediaphragm 110 and forms a first terminal for the capacitive element, anelectrical contact 118 is electrically coupled to thefirst back plate 108 and forms a second terminal for the capacitive element, and anelectrical contact 116 is electrically coupled to thesecond back plate 112 and forms a third terminal for the capacitive element. In some embodiments, the second terminal and the third terminal are electrically coupled together. In some embodiments, the electrical coupling is achieved through theconductive wires 124 and theconductive vias 122. - The
diaphragm 110 includes one ormore diaphragm openings 109 and may be anchored by theILD structure 120 at multiple points. Anchoring thediaphragm 110 at the multiple points allows a boundary of thediaphragm 110 to be fixed relative to the first andsecond back plates diaphragm 110 is deformable by energy of sound waves to make thediaphragm 110 bend towards or away from thefirst back plate 108 and/or thesecond back plate 112, as the sound waves exert pressure on thediaphragm 110 through a carrier substrate opening 101 in thecarrier substrate 103. Thecarrier substrate 103 has sidewalls defining thecarrier substrate opening 101 and theMEMS substrate 111 has sidewalls defining a MEMS opening 111 o. In some embodiments, a first width w1 extending between sidewalls defining outermost openings of theparticle filter 106 is less than a second width w2 of the sidewalls of thecarrier substrate 103 defining thecarrier substrate opening 101. The first andsecond back plates air volume space 113 between the first andsecond back plates air volume space 113 is above and below thediaphragm 110. Air can get out of or get into theair volume space 113 through air passage ways formed by the plurality of openings in each of the first andsecond back plates more diaphragm openings 109 of thediaphragm 110. The air travels out of or into theair volume space 113 as thediaphragm 110 bends towards or away from thefirst back plate 108 and/or thesecond back plate 112. The bending movement of thediaphragm 110 relative to thefirst back plate 108 and/or thesecond back plate 112 by the sound waves changes the capacitance of the capacitive element between thediaphragm 110 and the first and/orsecond back plates electrical contacts - As the air travels through the carrier substrate opening 101 in the
carrier substrate 103 to theair volume space 113, it passes through theparticle filter 106. In some embodiments, theparticle filter 106 is a part of thefilter stack 104. Thefilter stack 104 comprises a lowerdielectric layer 104 a, aparticle filter layer 104 b, and anupper dielectric layer 104 c. In some embodiments, the lowerdielectric layer 104 a may comprise an oxide (e.g., silicon dioxide), theparticle filter layer 104 b may comprise a nitride (e.g., silicon nitride), and theupper dielectric layer 104 c may comprise an oxide (e.g., silicon dioxide). Theparticle filter 106 is a segment of theparticle filter layer 104 b between thecarrier substrate opening 101 and MEMS opening 111 o. Theparticle filter 106 comprises a plurality offilter openings 107 configured to pass air from the carrier substrate opening 101 to theair volume space 113. As the air passes from the carrier substrate opening 101 to theair volume space 113, theparticle filter 106 is configured to block and/or remove particles from the air that may adversely affect the movement of thediaphragm 110. In some embodiments, the particles may, for example, be by-products from and/or chemicals used in a laser dicing process implemented to form theMEMS microphone 100. The particles interacting with thediaphragm 110 may decrease a performance of theMEMS microphone 100 by, for example, causing short circuits (e.g., between the first andsecond back plates MEMS microphone 100. - By disposing the
particle filter 106 over thecarrier substrate 103, a time and costs associated with fabricating theMEMS microphone 100 is reduced. Additionally, thecarrier substrate 103, theupper dielectric layer 104 c, and the lowerdielectric layer 104 a may provide structural support for theparticle filter 106 during fabrication of theMEMS microphone 100. For example, during a fabrication of theMEMS microphone 100, thefilter stack 104 may be formed over thecarrier substrate 103, and subsequently theupper dielectric layer 104 c may be bonded to theMEMS substrate 111. Thecarrier substrate 103, theupper dielectric layer 104 c, and the lowerdielectric layer 104 a prevent damage or destruction to theparticle filter layer 104 b during the aforementioned bonding process. Further, by disposing theparticle filter layer 104 b between the upper and lowerdielectric layers particle filter 106 during fabrication of theMEMS microphone 100 may be reduced, thereby increasing an endurance and reliability of theMEMS microphone 100. - Referring to
FIG. 2A , atop view 200 a of some alternative embodiments of theparticle filter 106 ofFIG. 1 along the line A-A′ is provided. - As seen in
FIG. 2A , the plurality offilter openings 107 disposed in theparticle filter layer 104 b each have a circular and/or elliptical shape. The plurality offilter openings 107 may be arranged as an array comprising columns and rows across the carrier substrate opening 101 ofFIG. 1 . Theparticle filter 106 is configured to block and/or remove particles (e.g., by a shape/size of thefilter openings 107 and/or a material of theparticle filter layer 104 b) from air that passes from a first surface of theparticle filter 106 to an opposite second surface of theparticle filter 106. - In some embodiments, the
filter openings 107 each have a diameter d that may, for example, be within a range of about 3 to 10 micrometers. In some embodiments, if the diameter d is less than about 3 micrometers, then an ability to pass air from the first surface of theparticle filter 106 to the opposite second surface of thatparticle filter 106 may be mitigated, thereby decreasing a performance of theMEMS device structure 102. In further embodiments, if the diameter d is greater than about 10 micrometers, then an ability of theparticle filter 106 to block and/or remove particles from the air that passes through theparticle filter 106 may be reduced. For example, theparticle filter openings 107 may be larger than the particles, such that the particles may pass through the particle filter openings and adversely affect the movement of the diaphragm (110 ofFIG. 1 ). - Referring to
FIG. 2B , atop view 200 b of some alternative embodiments of theparticle filter 106 ofFIG. 1 along the line A-A′ is provided. - As seen in
FIG. 2B , the plurality offilter openings 107 disposed in theparticle filter layer 104 b each have a polygon shape. The polygon shape may be any polygon, for example, a triangle, a rectangle, a pentagon, a hexagon, etc. The plurality offilter openings 107 may be arranged as an array comprising columns and rows across the carrier substrate opening 101 ofFIG. 1 . Theparticle filter 106 is configured to block and/or remove particles (e.g., by a shape/size of thefilter openings 107 and/or a material of theparticle filter layer 104 b) from air that passes from a first surface of theparticle filter 106 to an opposite second surface of theparticle filter 106. - In some embodiments, one or more sides of each filter opening 107 have a length len that may, for example, be within a range of about 3 to 10 micrometers. In some embodiments, if the length len is less than about 3 micrometers, then an ability to pass air from the first surface of the
particle filter 106 to the opposite second surface of thatparticle filter 106 may be mitigated, thereby decreasing a performance of theMEMS device structure 102. In further embodiments, if the length len is greater than about 10 micrometers, then an ability of theparticle filter 106 to block and/or remove particles from the air that passes through theparticle filter 106 may be reduced. For example, theparticle filter openings 107 may be larger than the particles, such that the particles may pass through the particle filter openings and adversely affect the movement of the diaphragm (110 ofFIG. 1 ). - Referring to
FIG. 3 , a cross-sectional view of aMEMS microphone 300 corresponding to some alternative embodiments of theMEMS microphone 100 ofFIG. 1 is provided. - In some embodiments, the
particle filter layer 104 b comprises a lowerparticle filter layer 302, a middleparticle filter layer 304, and an upperparticle filter layer 306. The lowerparticle filter layer 302 may, for example, be or comprise silicon, a nitride, silicon nitride, or the like and/or have a thickness within a range of about 0.2 to 1 micrometer. The middleparticle filter layer 304 may, for example, be or comprise polysilicon, un-doped polysilicon, or the like and/or have a thickness within a range of about 0.2 to 1 micrometer. The upperparticle filter layer 306 may, for example, be or comprise silicon, a nitride, silicon nitride, or the like and/or have a thickness within a range of about 0.2 to 1 micrometer. In some embodiments, the layers within theparticle filter layer 104 b may each have a substantially same thickness. In further embodiments, the lowerparticle filter layer 302 and the upperparticle filter layer 306 may comprise a same material (e.g., silicon nitride). In some embodiments, theparticle filter layer 104 b including a polysilicon layer (e.g., the middle particle filter layer 304) disposed between two silicon nitride layers (e.g., the lower and upper particle filter layers 302, 306) will decrease a stress induced upon theparticle filter 106, thereby increasing a structural integrity and reliability of theparticle filter 106. - Referring to
FIG. 4 , a cross-sectional view of some embodiments of anintegrated chip 400 including some alternative embodiments of theMEMS microphone 100 ofFIG. 1 wire bonded to a complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) die 402 is provided. - The
integrated chip 400 includes theMEMS microphone 100 laterally adjacent to the CMOS IC die 402 and disposed within acavity 403. In some embodiments, theMEMS substrate 111 of theMEMS microphone 100 includespillar structures 420 configured to increase a structural integrity of theMEMS microphone 100. In some embodiments, the CMOS IC die 402 may be an application-specific integrated circuit (ASIC). In some embodiments, thecavity 403 is defined by inner sidewalls of apackage 401. Thepackage 401 includes a front-side structure 401 a and anenclosure structure 401 b. The CMOS IC die 402 and theMEMS microphone 100 are disposed on the front-side structure 401 a. In some embodiments, an opening (i.e., inlet) to thepackage 401 may be the carrier substrate opening 101 of theMEMS microphone 100, such that any air entering or leaving thecavity 403 passes through theparticle filter 106. - The CMOS IC die 402 includes a back-end-of-line (BEOL)
metallization stack 412 overlying aCMOS substrate 410. An inter-level dielectric (ILD)structure 413 overlies theCMOS substrate 410. TheCMOS substrate 410 and theILD structure 413 include electronic components such astransistors 408, and/or other electric components (not shown), such as one or more capacitors, resistors, inductors, or diodes. TheCMOS substrate 410 may, for example, be or comprise a bulk semiconductor substrate or a silicon-on-insulator (SOI) substrate. TheBEOL metallization stack 412 includes theILD structure 413,interconnect wires 416, andinterconnect vias 414. TheILD structure 413 may comprise one or more stacked ILD layers, which respectively comprise a low-k dielectric (i.e., a dielectric material with a dielectric constant less than about 3.9), and oxide, or the like. The interconnect vias andwires - A
solder ball 404 is disposed over eachelectrical contact solder balls 404 provide contact points for a plurality ofbond wires 406. Abond pad 418 overlies a top layer ofinterconnect wires 416 and provides a wire bonding location for thebond wires 406. Thetransistors 408 are electrically coupled to theelectrical contacts BEOL metallization stack 412, thebond wires 406, and thebond pads 418. Thetransistors 408 may be configured to receive signals from thefirst back plate 108, thesecond back plate 112, and/or thediaphragm 110. -
FIGS. 5-11 illustrate cross-sectional views 500-1100 of some embodiments of a first method of forming a MEMS microphone with a particle filter according to the present disclosure. Although the cross-sectional views 500-1100 shown inFIGS. 5-11 are described with reference to a method, it will be appreciated that the structures shown inFIGS. 5-11 are not limited to the method but rather may stand alone separate of the method. Furthermore, althoughFIGS. 5-11 are described as a series of acts, it will be appreciated that these acts are not limiting in that the order of the acts can be altered in other embodiments, and the methods disclosed are also applicable to other structures. In other embodiments, some acts that are illustrated and/or described may be omitted in whole or in part. - A shown in
cross-sectional view 500 ofFIG. 5 , acarrier substrate 103 is provided. In some embodiments, thecarrier substrate 103 may be, for example, a bulk substrate (e.g., a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or some other suitable substrate and/or may have an initial thickness Ti within a range of approximately 250 to 725 micrometers. Afilter stack 104 is formed over thecarrier substrate 103. Thefilter stack 104 includes a lowerdielectric layer 104 a, aparticle filter layer 104 b, and anupper dielectric layer 104 c. In some embodiments, a process for forming thefilter stack 104 includes: depositing the lowerdielectric layer 104 a over thecarrier substrate 103 and subsequently performing a first annealing process; depositing theparticle filter layer 104 b over the lowerdielectric layer 104 a and subsequently performing a second annealing process; and depositing anupper dielectric layer 104 c over theparticle filter layer 104 b and subsequently performing a third annealing process. In some embodiments, the aforementioned layers of thefilter stack 104 may respectively, for example, be deposited and/or grown by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), thermal oxidation, or another suitable deposition process. - In some embodiments, the lower
dielectric layer 104 a may, for example, be or comprise an oxide, such as silicon dioxide, or another dielectric material formed to a thickness within a range of about 0.5 to 10 micrometers. In some embodiments, theparticle filter layer 104 b may, for example, be or comprise a nitride, such as silicon nitride, or the like formed to a thickness within a range of about 0.1 to 3 micrometers. In some embodiments, theupper dielectric layer 104 c may, for example, be or comprise an oxide, such as silicon dioxide, or another dielectric material formed to a thickness within a range of about 0.5 to 10 micrometers. In further embodiments, the lowerdielectric layer 104 a and theupper dielectric layer 104 c may be or comprise the same material with approximately the same thickness. - Also shown in
FIG. 5 , thefilter stack 104 is etched, thereby defining a plurality offilter openings 107 and aparticle filter 106. In some embodiments, the etching process includes: forming a masking layer (not shown) over theupper dielectric layer 104 c, exposing unmasked regions of theupper dielectric layer 104 c to one or more etchants, and performing a removal process to remove the masking layer. - The
carrier substrate 103, theupper dielectric layer 104 c, and the lowerdielectric layer 104 a each provide structural support for theparticle filter 106 and/or theparticle filter layer 104 b during subsequent processing steps. This, in part, reduces and/or eliminates damage to theparticle filter layer 104 b and/orparticle filter 106 during fabrication. - As shown in
cross-sectional view 600 ofFIG. 6 , aMEMS substrate 111 is provided and subsequently bonded to theupper dielectric layer 104 c. In some embodiments, the bonding process may, for example, be a fusion bonding process, or another suitable bonding process. In some embodiments, theMEMS substrate 111 may be, for example, a bulk substrate (e.g., a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or some other suitable substrate with an initial thickness Tr. After performing the bonding process, a thinning process is performed on theMEMS substrate 111 to reduce the initial thickness Tr of theMEMS substrate 111 to a thickness Tms. In some embodiments, the thickness Tms is within a range of about 10 to 200 micrometers. In some embodiments, the thinning process is performed by a mechanical grinding process, a chemical mechanical polish (CMP), some other thinning process, or any combination of the foregoing. For example, the thinning process may be performed wholly by a mechanical grinding process. - As shown in
cross-sectional view 700 ofFIG. 7 , aMEMS device structure 102 is formed over theMEMS substrate 111. TheMEMS device structure 102 includesconductive wires 124,conductive vias 122, an inter-level dielectric (ILD)structure 120, afirst back plate 108, asecond back plate 112, and adiaphragm 110 disposed between the first andsecond back plates ILD structure 120 may be one or more dielectric layers. The one or more dielectric layers may, for example, be or comprise an oxide, such as silicon dioxide, or another suitable oxide. In some embodiments, a process for forming theMEMS device structure 102 includes forming a bottommost layer of theconductive vias 122 by a single damascene process, and subsequently forming a bottommost layer of theconductive wires 124 by the single damascene process. Further, in some embodiments, the process comprises forming remaining layers of the conductive vias andwires first back plate 108, thesecond back plate 112, and thediaphragm 110 may be formed during the dual damascene process or the single damascene process of a corresponding layer of theconductive wires 124. For example, thefirst back plate 108 may be formed concurrently with the single damascene process used to form the bottommost layer of theconductive wires 124. In another example, thefirst back plate 108, thesecond back plate 112, and thediaphragm 110 may each be formed by depositing a layer of polysilicon (e.g., by CVD, PVD, or another suitable deposition process), patterning the layer of polysilicon according to a masking layer (not shown), and performing a removal process to remove the masking layer. - In some embodiments, the single damascene process comprises depositing a dielectric layer, patterning the dielectric layer with openings for a single layer of conductive features (e.g., a layer of vias, wires, a back plate, and/or a diaphragm), and filling the openings with conductive material (e.g., polysilicon) to form the single layer of conductive features. The dielectric layer may, for example, correspond to the one or more dielectric layers in the
ILD structure 120. In some embodiments, the dual damascene process comprises depositing a dielectric layer, patterning the dielectric layer with openings for two layers of conductive features (e.g., a layer of vias and a layer of wires, back plate, and/or a diaphragm), and filling the openings with conductive material (e.g., polysilicon) to form the two layers of conductive features. In some embodiments, theconductive wires 124, theconductive vias 122, thefirst back plate 108, thesecond back plate 112, and thediaphragm 110 may, for example, respectively comprise polysilicon, or another suitable conductive material. - Also as shown in
FIG. 7 , the process for forming theMEMS device structure 102 further includes formingelectrical contacts ILD structure 120; patterning theILD structure 120 according to the masking layer; and depositing theelectrical contacts ILD structure 120. The aforementioned electrical contacts may, for example, be deposited and/or grown by electroless plating, sputtering, electroplating, or another suitable deposition process. In some embodiments, theelectrical contacts - As shown in
cross-sectional view 800 ofFIG. 8 , a thinning process is performed on thecarrier substrate 103 to reduce an initial thickness Ti of thecarrier substrate 103 to a thickness Tcs. In some embodiments, the thickness Tcs is within a range of about 200 to 400 micrometers. In some embodiments, the thinning process is performed by a mechanical grinding process, a chemical mechanical polish (CMP), some other thinning process, or any combination of the foregoing. For example, the thinning process may be performed wholly by a mechanical grinding process. After performing the thinning process, alower masking layer 802 is formed on a bottom surface of thecarrier substrate 103 and anupper masking layer 804 is formed over theILD structure 120. In some embodiments, thelower masking layer 802 and/or theupper masking layer 804 may, for example, respectively be or comprise a photoresist, a hard mask layer, or the like. Thelower masking layer 802 and theupper masking layer 804 respectively have a plurality of sidewalls defining a plurality of openings. - As shown in
cross-sectional view 900 ofFIG. 9 , a first patterning process is performed on thecarrier substrate 103 and theMEMS substrate 111 according to thelower masking layer 802. In some embodiments, the first patterning process includes performing a dry etching process, such as a plasma etching process and/or a deep reactive-ion etching (DRIE) process. The first patterning process defines the carrier substrate opening 101 directly underlying theparticle filter 106. Additionally, the first patterning process defines a plurality ofpillars 902 from theMEMS substrate 111. In some embodiments, after the first patterning process, theMEMS substrate 111 comprises a plurality of openings that correspond to a shape of the plurality of thefilter openings 107 of theparticle filter 106. - As shown in
cross-sectional view 1000 ofFIG. 10 , a second patterning process is performed on thecarrier substrate 103 and theMEMS substrate 111 according to thelower masking layer 802. In some embodiments, the second patterning process includes performing a wet etching process, such as an isotropic etching process and/or a dry etching process. The second patterning process may include exposing thecarrier substrate 103 and/or theMEMS substrate 111 to one or more etchants, such as, for example, xenon difluoride (XeF2). The second patterning process removes the plurality of pillars (902 ofFIG. 9 ) and expands thecarrier substrate opening 101. - As shown in
cross-sectional view 1100 ofFIG. 11 , a third patterning process is performed on the structure ofFIG. 10 according to the lower masking layer (802 ofFIG. 10 ) and the upper masking layer (804 ofFIG. 10 ). In some embodiments, the third patterning process includes performing a wet etching process. In some embodiments, the third patterning process includes exposing the structure ofFIG. 10 to one or more etchants. The third patterning process removes a portion of theILD structure 120 thereby defining theair volume space 113. Further, the third patterning process removes the lowerdielectric layer 104 a from a bottom surface of theparticle filter 106 and removes theupper dielectric layer 104 c from a top surface of theparticle filter 106. After performing the third patterning process, a removal process is performed to remove the lower and upper masking layers (802, 804 ofFIG. 10 ). -
FIG. 12 illustrates afirst method 1200 of forming a MEMS microphone with a particle filter in accordance with some embodiments. Although thefirst method 1200 is illustrated and/or described as a series of acts or events, it will be appreciated that the method is not limited to the illustrated ordering or acts. Thus, in some embodiments, the acts may be carried out in different orders than illustrated, and/or may be carried out concurrently. Further, in some embodiments, the illustrated acts or events may be subdivided into multiple acts or events, which may be carried out at separate times or concurrently with other acts or sub-acts. In some embodiments, some illustrated acts or events may be omitted, and other un-illustrated acts or events may be included. - At
act 1202, a carrier substrate is provided.FIG. 5 illustrates across-sectional view 500 corresponding to some embodiments ofact 1202. - At act 1204 a filter stack is formed over the carrier substrate. The filter stack includes an upper dielectric layer, a particle filter layer, and a lower dielectric layer, the particle filter layer is disposed between the upper and lower dielectric layers.
FIG. 5 illustrates across-sectional view 500 corresponding to some embodiments ofact 1204. - At
act 1206, an etching process is performed on the filter stack, thereby defining a particle filter in the particle filter layer.FIG. 5 illustrates across-sectional view 500 corresponding to some embodiments ofact 1206. - At
act 1208, a MEMS substrate is bonded to the upper dielectric layer.FIG. 6 illustrates across-sectional view 600 corresponding to some embodiments ofact 1208. - At
act 1210, a MEMS structure is formed over the MEMS substrate. The MEMS structure includes a first back plate, a second back plate, and a diaphragm disposed between the first and second back plates.FIG. 7 illustrates across-sectional view 700 corresponding to some embodiments ofact 1210. - At
act 1212, a dry etching process is performed on the carrier and MEMS substrates, thereby defining an opening in the carrier substrate and defining pillars in the MEMS substrate.FIG. 9 illustrates across-sectional view 900 corresponding to some embodiments ofact 1212. - At act 1214, a wet etching process is performed on the carrier and MEMS substrates, thereby expanding the opening in the carrier substrate and removing the pillars.
FIG. 10 illustrates across-sectional view 1000 corresponding to some embodiments of act 1214. - At
act 1216, an etching process is performed on the MEMS structure and the filter stack, thereby defining an air volume space around the first back plate, second back plate, and the diaphragm. The etching process removes the upper and lower dielectric layers from the particle filter.FIG. 11 illustrates across-sectional view 1100 corresponding to some embodiments ofact 1216. -
FIGS. 13-20 illustrate cross-sectional views 1300-2000 of some embodiments of a second method of forming a MEMS microphone with a particle filter according to the present disclosure. Although the cross-sectional views 1300-2000 shown inFIGS. 13-20 are described with reference to a method, it will be appreciated that the structures shown inFIGS. 13-20 are not limited to the method but rather may stand alone separate of the method. Furthermore, althoughFIGS. 13-20 are described as a series of acts, it will be appreciated that these acts are not limiting in that the order of the acts can be altered in other embodiments, and the methods disclosed are also applicable to other structures. In other embodiments, some acts that are illustrated and/or described may be omitted in whole or in part. - A shown in
cross-sectional view 1300 ofFIG. 13 , acarrier substrate 103 is provided. In some embodiments, thecarrier substrate 103 may be, for example, a bulk substrate (e.g., a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or some other suitable substrate and/or may have an initial thickness Ti within a range of approximately 250 to 725 micrometers. Afilter stack 104 is formed over thecarrier substrate 103. Thefilter stack 104 includes a lowerdielectric layer 104 a, aparticle filter layer 104 b, and anupper dielectric layer 104 c. In some embodiments, a process for forming thefilter stack 104 includes: depositing the lowerdielectric layer 104 a over thecarrier substrate 103 and subsequently performing a first annealing process; depositing theparticle filter layer 104 b over the lowerdielectric layer 104 a and subsequently performing a second annealing process; and depositing anupper dielectric layer 104 c over theparticle filter layer 104 b and subsequently performing a third annealing process. In some embodiments, the aforementioned layers of thefilter stack 104 may respectively, for example, be deposited and/or grown by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), thermal oxidation, or another suitable deposition process. In some embodiments, the lowerdielectric layer 104 a may, for example, be or comprise an oxide, such as silicon dioxide, or another dielectric material formed to a thickness within a range of about 0.5 to 10 micrometers. In some embodiments, theparticle filter layer 104 b may, for example, be or comprise a nitride, such as silicon nitride, or the like formed to a thickness within a range of about 0.1 to 3 micrometers. In some embodiments, theupper dielectric layer 104 c may, for example, be or comprise an oxide, such as silicon dioxide, or another dielectric material formed to a thickness within a range of about 0.5 to 10 micrometers. In further embodiments, the lowerdielectric layer 104 a and theupper dielectric layer 104 c may be or comprise the same material with the approximately same thickness. - As shown in
cross-sectional view 1400 ofFIG. 14 , aMEMS substrate 111 is provided and subsequently bonded to theupper dielectric layer 104 c. In some embodiments, the bonding process may, for example, be a fusion bonding process, or another suitable bonding process. In some embodiments, theMEMS substrate 111 may be, for example, a bulk substrate (e.g., a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or some other suitable substrate with an initial thickness Tr. After performing the bonding process, a thinning process is performed on theMEMS substrate 111 to reduce the initial thickness Tr of theMEMS substrate 111 to a thickness Tms. In some embodiments, the thickness Tms is within a range of about 10 to 200 micrometers. In some embodiments, the thinning process is performed by a mechanical grinding process, a chemical mechanical polish (CMP), some other thinning process, or any combination of the foregoing. For example, the thinning process may be performed wholly by a mechanical grinding process. - As shown in
cross-sectional view 1500 ofFIG. 15 , aMEMS device structure 102 is formed over theMEMS substrate 111. TheMEMS device structure 102 includesconductive wires 124,conductive vias 122, an inter-level dielectric (ILD)structure 120, afirst back plate 108, asecond back plate 112, and adiaphragm 110 disposed between the first andsecond back plates ILD structure 120 may be one or more dielectric layers. In some embodiments, theMEMS device structure 102 is formed as illustrated and/or described inFIG. 7 . - As shown in
cross-sectional view 1600 ofFIG. 16 , a thinning process is performed on thecarrier substrate 103 to reduce an initial thickness Ti of thecarrier substrate 103 to a thickness Tcs. In some embodiments, the thickness Tcs is within a range of about 200 to 400 micrometers. In some embodiments, the thinning process is performed by a mechanical grinding process, a chemical mechanical polish (CMP), some other thinning process, or any combination of the foregoing. For example, the thinning process may be performed wholly by a mechanical grinding process. After performing the thinning process, alower masking layer 802 is formed on a bottom surface of thecarrier substrate 103 and anupper masking layer 804 is formed over theILD structure 120. In some embodiments, thelower masking layer 802 and/or theupper masking layer 804 may, for example, respectively be or comprise a photoresist, a hard mask layer, or the like. Thelower masking layer 802 and theupper masking layer 804 respectively have a plurality of sidewalls defining a plurality of openings. - As shown in
cross-sectional view 1700 ofFIG. 17 , a first patterning process is performed on thecarrier substrate 103 according to thelower masking layer 802. In some embodiments, the first patterning process includes performing a dry etching process, such as a plasma etching process and/or a deep reactive-ion etching (DRIE) process. The first patterning process defines the carrier substrate opening 101 directly underlying thefilter stack 104 and exposes a bottom surface of the lowerdielectric layer 104 a. In further embodiments, after performing the first patterning process, a removal process is performed to remove the lower masking layer 802 (not shown). - As shown in
cross-sectional view 1800 ofFIG. 18 , anotherlower masking layer 1802 is formed over thecarrier substrate 103 and the bottom surface of the lowerdielectric layer 104 a. In some embodiments, the anotherlower masking layer 1802 protects thecarrier substrate 103 from subsequent etching processes. After forming the anotherlower masking layer 1802, a second patterning process is performed on thefilter stack 104 and theMEMS substrate 111. This, in part, defines a plurality ofpillars 902 in theMEMS substrate 111 and defines aparticle filter 106 in theparticle filter layer 104 b. In some embodiments, the second patterning process includes performing a first dry etching process on thefilter stack 104, thereby exposing unmasked portions of thefilter stack 104 to one or more first etchants. The second patterning process further includes performing a second dry etching process on theMEMS substrate 111, thereby exposing unmasked portions of the MEMS substrate to one or more second etchants. In some embodiments, the one or more first etchants are different than the one or more second etchants. Further, the first dry etching process defines the plurality offilter openings 107 of theparticle filter 106. - As shown in
cross-sectional view 1900 ofFIG. 19 , a third patterning process is performed on theMEMS substrate 111. In some embodiments, the third patterning process includes performing a wet etching process, such as an isotropic etching process and/or a dry etching process. The third patterning process may include exposing theMEMS substrate 111 to one or more etchants, such as, for example, xenon difluoride (XeF2). The third patterning process removes the plurality of pillars (902 ofFIG. 18 ). - As shown in
cross-sectional view 2000 ofFIG. 20 , a fourth patterning process is performed on the structure ofFIG. 19 . In some embodiments, the fourth patterning process includes performing a wet etching process and exposing the structure ofFIG. 19 to one or more etchants. The fourth patterning removes a portion of theILD structure 120 thereby defining theair volume space 113. Further, the fourth patterning process removes the lowerdielectric layer 104 a from a bottom surface of theparticle filter 106 and removes theupper dielectric layer 104 c from a top surface of theparticle filter 106. After performing the fourth patterning process, a removal process is performed to remove the upper masking layer (804 ofFIG. 19 ) and the another lower masking layer (1802 ofFIG. 19 ). -
FIG. 21 illustrates asecond method 2100 of forming a MEMS microphone with a particle filter in accordance with some embodiments. Although thesecond method 2100 is illustrated and/or described as a series of acts or events, it will be appreciated that the method is not limited to the illustrated ordering or acts. Thus, in some embodiments, the acts may be carried out in different orders than illustrated, and/or may be carried out concurrently. Further, in some embodiments, the illustrated acts or events may be subdivided into multiple acts or events, which may be carried out at separate times or concurrently with other acts or sub-acts. In some embodiments, some illustrated acts or events may be omitted, and other un-illustrated acts or events may be included. - At
act 2102, a carrier substrate is provided.FIG. 13 illustrates across-sectional view 1300 corresponding to some embodiments ofact 2102. - At act 2104 a filter stack is formed over the carrier substrate. The filter stack includes an upper dielectric layer, a particle filter layer, and a lower dielectric layer, the particle filter layer is disposed between the upper and lower dielectric layers.
FIG. 13 illustrates across-sectional view 1300 corresponding to some embodiments ofact 2104. - At
act 2106, a MEMS substrate is bonded to the upper dielectric layer.FIG. 14 illustrates across-sectional view 1400 corresponding to some embodiments ofact 2106. - At
act 2108, a MEMS structure is formed over the MEMS substrate. The MEMS structure includes a first back plate, a second back plate, and a diaphragm disposed between the first and second back plates.FIG. 15 illustrates across-sectional view 1500 corresponding to some embodiments ofact 2108. - At
act 2110, a dry etching process is performed on the carrier substrate, thereby defining an opening in the carrier substrate and exposing a bottom surface of the lower dielectric layer.FIG. 17 illustrates across-sectional view 1700 corresponding to some embodiments ofact 2110. - At
act 2112, a dry etching process is performed on the MEMS substrate and the filter stack, thereby defining a particle filter in the particle filter layer and defining a plurality of pillars in the MEMS substrate.FIG. 18 illustrates across-sectional view 1800 corresponding to some embodiments ofact 2112. - At
act 2114, a wet etching process is performed on the MEMS substrate, thereby removing the plurality of pillars.FIG. 19 illustrates across-sectional view 1900 corresponding to some embodiments ofact 2114. - At
act 2116, an etching process is performed on the MEMS structure and the filter stack, thereby defining an air volume space around the first back plate, second back plate, and the diaphragm. The etching process removes the upper and lower dielectric layers from the particle filter.FIG. 20 illustrates across-sectional view 2000 corresponding to some embodiments ofact 2116. -
FIGS. 22-29 illustrate cross-sectional views 2200-2900 of some embodiments of a third method of forming a MEMS microphone with a particle filter according to the present disclosure. Although the cross-sectional views 2200-2900 shown inFIGS. 22-29 are described with reference to a method, it will be appreciated that the structures shown inFIGS. 22-29 are not limited to the method but rather may stand alone separate of the method. Furthermore, althoughFIGS. 22-29 are described as a series of acts, it will be appreciated that these acts are not limiting in that the order of the acts can be altered in other embodiments, and the methods disclosed are also applicable to other structures. In other embodiments, some acts that are illustrated and/or described may be omitted in whole or in part. - As shown in
cross-sectional view 2200 ofFIG. 22 , aMEMS substrate 111 is provided and aMEMS device structure 102 is formed over theMEMS substrate 111. TheMEMS device structure 102 includesconductive wires 124,conductive vias 122,electrical contacts structure 120, afirst back plate 108, asecond back plate 112, and adiaphragm 110 disposed between the first andsecond back plates MEMS device structure 102 is formed as illustrated and/or described inFIG. 7 . TheMEMS substrate 111 may be, for example, a bulk substrate (e.g., a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or some other suitable substrate with an initial thickness Tr. - As shown in
cross-sectional view 2300 ofFIG. 23 , anadhesive bonding layer 2302 and asacrificial substrate 2304 are bonded to theILD structure 120 of theMEMS device structure 102. In some embodiments, the bonding process is a fusion bonding process, or another suitable bonding process and/or may include reaching a maximum temperature within a range of 200 to 300 degrees Celsius. Thesacrificial substrate 2304 is configured to increase a structural integrity of theMEMS device structure 102 and/or theMEMS substrate 111 during subsequent processing steps (e.g., the thinning process ofFIG. 24 and/or the bonding process ofFIG. 26 ). - As shown in
cross-sectional view 2400 ofFIG. 24 , a thinning process is performed on theMEMS substrate 111 to reduce the initial thickness Tr of theMEMS substrate 111 to a thickness Tms. In some embodiments, the thickness Tms is within a range of about 10 to 200 micrometers. In some embodiments, the thinning process is performed by a mechanical grinding process, a chemical mechanical polish (CMP), some other thinning process, or any combination of the foregoing. For example, the thinning process may be performed wholly by a mechanical grinding process. After performing the thinning process, theMEMS substrate 111 is patterned to define a plurality ofpillars 2402 in theMEMS substrate 111. In some embodiments, the patterning process includes: forming a masking layer over a back surface of the MEMS substrate 111 (not shown); exposing unmasked regions of theMEMS substrate 111 to one or more etchants, thereby defining thepillars 2402; and performing a removal process to remove the masking layer. The plurality ofpillars 2402 are configured to further increase a structural integrity of theMEMS substrate 111 during subsequent processing steps (e.g., the bonding process ofFIG. 26 ). - As shown in
cross-sectional view 2500 ofFIG. 25 , acarrier substrate 103 is provided. In some embodiments, thecarrier substrate 103 may be, for example, a bulk substrate (e.g., a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or some other suitable substrate and/or may have an initial thickness Ti within a range of approximately 250 to 725 micrometers. Afilter stack 104 is formed over thecarrier substrate 103. Thefilter stack 104 includes a lowerdielectric layer 104 a, aparticle filter layer 104 b, and anupper dielectric layer 104 c. In some embodiments, thefilter stack 104 is formed as illustrated and/or described inFIG. 5 . - Also shown in
FIG. 25 , thefilter stack 104 is etched, thereby defining a plurality offilter openings 107 and aparticle filter 106. In some embodiments, the etching process includes: forming a masking layer (not shown) over theupper dielectric layer 104 c, exposing unmasked regions of theupper dielectric layer 104 c to one or more etchants, and performing a removal process to remove the masking layer. - As shown in
cross-sectional view 2600 ofFIG. 26 , TheMEMS substrate 111 is bonded to theupper dielectric layer 104 c. In some embodiments, the bonding process may, for example, be a fusion bonding process, or another suitable bonding process. After performing the bonding process, a thinning process is performed on thecarrier substrate 103 to reduce an initial thickness Ti of thecarrier substrate 103 to a thickness Tcs. In some embodiments, the thickness Tcs is within a range of about 200 to 400 micrometers. In some embodiments, the thinning process is performed by a mechanical grinding process, a chemical mechanical polish (CMP), some other thinning process, or any combination of the foregoing. For example, the thinning process may be performed wholly by a mechanical grinding process. - As shown in
cross-sectional view 2700 ofFIG. 27 , the adhesive bonding layer (2302 ofFIG. 26 ) and the sacrificial substrate (2304 ofFIG. 26 ) are separated from the MEMS device structure 102 (de-bond from ILD structure 120). After the separation process, alower masking layer 802 is formed on a bottom surface of thecarrier substrate 103 and anupper masking layer 804 is formed over theILD structure 120. In some embodiments, thelower masking layer 802 and/or theupper masking layer 804 may, for example, respectively be or comprise a photoresist, a hard mask layer, or the like. Thelower masking layer 802 and theupper masking layer 804 respectively have a plurality of sidewalls defining a plurality of openings. - As shown in
cross-sectional view 2800 ofFIG. 28 , a first patterning process is performed on thecarrier substrate 103 according to thelower masking layer 802. In some embodiments, the first patterning process includes performing a dry etching process, such as a plasma etching process and/or a deep reactive-ion etching (DRIE) process. The first patterning process defines the carrier substrate opening 101 directly underlying theparticle filter 106. - Also as shown in
FIG. 28 , after the first patterning process, a second patterning process is performed on thecarrier substrate 103 and theMEMS substrate 111 according to thelower masking layer 802. In some embodiments, the second patterning process includes performing a wet etching process, such as an isotropic etching process and/or a dry etching process. The second patterning process may include exposing thecarrier substrate 103 and/or theMEMS substrate 111 to one or more etchants, such as, for example, xenon difluoride (XeF2). The second patterning process removes the plurality of pillars (2402 ofFIG. 27 ) and may expand a width of thecarrier substrate opening 101. - As shown in
cross-sectional view 2900 ofFIG. 29 , a third patterning process is performed on the structure ofFIG. 28 . In some embodiments, the third patterning process includes performing a wet etching process and exposing the structure ofFIG. 28 to one or more etchants. The third patterning removes a portion of theILD structure 120, thereby defining theair volume space 113. Further, the fourth patterning process removes the lowerdielectric layer 104 a from a bottom surface of theparticle filter 106 and removes theupper dielectric layer 104 c from a top surface of theparticle filter 106. After performing the third patterning process, a removal process is performed to remove the lower and upper masking layers (802, 804 ofFIG. 28 ). -
FIG. 30 illustrates athird method 3000 of forming a MEMS microphone with a particle filter in accordance with some embodiments. Although thethird method 3000 is illustrated and/or described as a series of acts or events, it will be appreciated that the method is not limited to the illustrated ordering or acts. Thus, in some embodiments, the acts may be carried out in different orders than illustrated, and/or may be carried out concurrently. Further, in some embodiments, the illustrated acts or events may be subdivided into multiple acts or events, which may be carried out at separate times or concurrently with other acts or sub-acts. In some embodiments, some illustrated acts or events may be omitted, and other un-illustrated acts or events may be included. - At
act 3002, a MEMS substrate is provided.FIG. 22 illustrates across-sectional view 2200 corresponding to some embodiments ofact 3002. - At
act 3004, a MEMS structure is formed over the MEMS substrate. The MEMS structure includes a first back plate, a second back plate, and a diaphragm disposed between the first and second back plates.FIG. 22 illustrates across-sectional view 2200 corresponding to some embodiments ofact 3004. - At
act 3006, a sacrificial substrate is bonded to the MEMS structure.FIG. 23 illustrates across-sectional view 2300 corresponding to some embodiments ofact 3006. - At
act 3008, an etching process is performed on the MEMS substrate, thereby defining a plurality of pillars in the MEMS substrate.FIG. 24 illustrates across-sectional view 2400 corresponding to some embodiments ofact 3008. - At
act 3010, a carrier substrate is provided and a filter stack is formed over the carrier substrate. The filter stack includes an upper dielectric layer, a particle filter layer, and a lower dielectric layer, the particle filter layer is disposed between the upper and lower dielectric layers.FIG. 25 illustrates across-sectional view 2500 corresponding to some embodiments ofact 3010. - At
act 3012, an etching process is performed on the filter stack, thereby defining a particle filter in the particle filter layer.FIG. 25 illustrates across-sectional view 2500 corresponding to some embodiments ofact 3012. - At
act 3014, the MEMS substrate is bonded to the filter stack.FIG. 26 illustrates across-sectional view 2600 corresponding to some embodiments ofact 3014. - At
act 3016, a thinning process is performed on the carrier substrate. After the thinning process, the sacrificial substrate is de-bonded from the MEMS structure.FIG. 27 illustrates across-sectional view 2700 corresponding to some embodiments ofact 3016. - At
act 3018, a dry etching process is performed on the carrier substrate, thereby defining an opening in the carrier substrate directly below the particle filter.FIG. 28 illustrates across-sectional view 2800 corresponding to some embodiments ofact 3018. - At
act 3020, a wet etching process is performed on the MEMS substrate, thereby removing the plurality of pillars.FIG. 28 illustrates across-sectional view 2800 corresponding to some embodiments ofact 3020. - At act 3022, an etching process is performed on the MEMS substrate and the filter stack, thereby defining an air volume space around the first back plate, second back plate, and the diaphragm. The etching process removes the upper and lower dielectric layers from the particle filter.
FIG. 29 illustrates across-sectional view 2900 corresponding to some embodiments of act 3022. - Accordingly, in some embodiments, the present disclosure relates to multiple methods that simplify the fabrication of a MEMS device with a particle filter, such that the particle filter is disposed between a MEMS substrate and a carrier substrate.
- In some embodiments, the present application provides a microphone including a microelectromechanical systems (MEMS) device structure overlying a MEMS substrate, wherein the MEMS device structure includes a diaphragm having opposing sidewalls that define a diaphragm opening; a carrier substrate underlying the MEMS substrate, wherein the carrier substrate has opposing sidewalls that define a carrier substrate opening underlying the diaphragm opening; and a filter stack sandwiched between the carrier substrate and the MEMS substrate, the filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers, wherein the particle filter layer includes a particle filter spaced laterally between the opposing sidewalls of the carrier substrate.
- In some embodiments, the present application provides a microelectromechanical systems (MEMS) device, including a MEMS substrate having opposing sidewalls that define a MEMS opening; a MEMS structure vertically over the MEMS substrate, wherein the MEMS structure includes a first back plate and a diaphragm vertically separated from the first back plate; a carrier substrate underlying the MEMS substrate, wherein the carrier substrate has opposing sidewalls defining a carrier substrate opening, wherein the carrier substrate opening underlies the diaphragm and the MEMS opening; and a filter stack disposed between the carrier substrate and the MEMS substrate, wherein the filter stack includes a particle filter layer having a particle filter, wherein the particle filter includes a plurality of filter openings that extends through the particle filter layer and is laterally between the opposing sidewalls of the MEMS substrate.
- In some embodiments, the present application provides a method for manufacturing a microelectromechanical systems (MEMS) device, the method includes forming a filter stack over a carrier substrate, wherein the filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers; patterning the filter stack to define a particle filter in the particle filter layer, the particle filter having one or more surfaces continuously extending around a plurality of filter openings; bonding a MEMS substrate to the upper dielectric layer; forming a MEMS structure over the MEMS substrate, the MEMS structure includes a mobile diaphragm; patterning the carrier substrate to define a carrier substrate opening in the carrier substrate; patterning the MEMS substrate to define a MEMS opening in the MEMS substrate; and performing an etch process on the MEMS structure and the filter stack, wherein the etch process removes the upper and lower dielectric layers from directly above and directly below the particle filter.
- The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
Claims (23)
1. A microphone comprising:
a microelectromechanical systems (MEMS) device structure overlying a MEMS substrate, wherein the MEMS device structure includes a diaphragm having opposing sidewalls that define a diaphragm opening;
a carrier substrate underlying the MEMS substrate, wherein the carrier substrate has opposing sidewalls that define a carrier substrate opening underlying the diaphragm opening; and
a filter stack sandwiched between the carrier substrate and the MEMS substrate, the filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers, wherein the particle filter layer comprises a particle filter spaced laterally between the opposing sidewalls of the carrier substrate, and wherein the particle filter layer includes an upper filter layer, a lower filter layer, and a middle filter layer disposed between the upper and lower filter layers, wherein the upper and lower filter layers comprise a first material, and wherein the middle filter layer comprises a second material different from the first material.
2. The microphone of claim 1 , wherein the particle filter has a plurality of opposing sidewalls that define a plurality of filter openings, wherein the plurality of filter openings are laterally between the opposing sidewalls of the carrier substrate, and wherein the particle filter layer includes a polysilicon layer sandwiched between an upper silicon nitride layer and a lower silicon nitride layer.
3. The microphone of claim 2 , wherein the particle filter layer comprises silicon nitride, and wherein the upper and lower dielectric layers each comprise an oxide.
4. The microphone of claim 2 , wherein the first material comprises silicon nitride and the second material comprises polysilicon.
5. The microphone of claim 2 , wherein a thickness of the particle filter layer is less than a thickness of the upper dielectric layer and less than a thickness of the lower dielectric layer.
6. (canceled)
7. (canceled)
8. The microphone of claim 1 , wherein a thickness of the MEMS substrate is less than a thickness of the carrier substrate.
9. A microelectromechanical systems (MEMS) device, comprising:
a MEMS substrate having opposing sidewalls that define a MEMS opening;
a MEMS structure vertically over the MEMS substrate, wherein the MEMS structure includes a first back plate and a diaphragm vertically separated from the first back plate;
a carrier substrate underlying the MEMS substrate, wherein the carrier substrate has opposing sidewalls defining a carrier substrate opening, wherein the carrier substrate opening underlies the diaphragm and the MEMS opening; and
a filter stack disposed between the carrier substrate and the MEMS substrate, wherein the filter stack includes a particle filter layer having a particle filter, wherein the particle filter comprises a plurality of filter openings that extends through the particle filter layer and is laterally between the opposing sidewalls of the MEMS substrate, wherein the particle filter layer includes a polysilicon layer, a first nitride layer, and a second nitride layer, wherein the plurality of filter openings of the particle filter are defined by sidewalls of the first nitride layer, sidewalls of the second nitride layer, and sidewalls of the polysilicon layer disposed between the first and second nitride layers.
10. The MEMS device of claim 9 , wherein the filter stack further includes:
an upper dielectric layer disposed between the MEMS substrate and the particle filter layer;
a lower dielectric layer disposed between the carrier substrate and the particle filter layer; and
wherein outer sidewalls of the particle filter layer extend past outer sidewalls of the upper dielectric layer and outer sidewalls of the lower dielectric layer.
11. The MEMS device of claim 10 , wherein the outer sidewalls of the upper dielectric layer and the outer sidewalls of the lower dielectric layer are respectively laterally offset from the outer sidewalls of the particle filter layer by a non-zero distance in a direction towards the plurality of filter openings.
12. The MEMS device of claim 10 , wherein the upper and lower dielectric layers each comprise an oxide.
13. (canceled)
14. The MEMS device of claim 9 , wherein a thickness of the particle filter layer is less than a thickness of the MEMS substrate, wherein a thickness of the MEMS substrate is less than a thickness of the carrier substrate.
15. The MEMS device of claim 9 , wherein the carrier substrate comprises sidewalls defining a carrier substrate opening beneath the particle filter.
16. The MEMS device of claim 9 , wherein the plurality of filter openings are circular or elliptical when viewed from above.
17. A method for manufacturing a microelectromechanical systems (MEMS) device, the method comprising:
forming a filter stack over a carrier substrate, wherein the filter stack includes an upper dielectric layer, a lower dielectric layer, and a particle filter layer disposed between the upper and lower dielectric layers;
patterning the filter stack while the filter stack is disposed on the carrier substrate to define a particle filter in the particle filter layer, wherein the particle filter has one or more surfaces continuously extending around a plurality of filter openings;
bonding a MEMS substrate to the upper dielectric layer;
forming a MEMS structure over the MEMS substrate, the MEMS structure includes a mobile diaphragm;
patterning the carrier substrate to define a carrier substrate opening in the carrier substrate;
patterning the MEMS substrate to define a MEMS opening in the MEMS substrate; and
performing an etch process on the MEMS structure and the filter stack, wherein the etch process removes the upper and lower dielectric layers from directly above and directly below the particle filter.
18. The method according to claim 17 , wherein the filter stack is patterned before bonding the MEMS substrate to the upper dielectric layer.
19. The method according to claim 17 , wherein the filter stack is patterned after defining the carrier substrate opening and before defining the MEMS opening in the MEMS substrate.
20. The method according to claim 17 , wherein the MEMS structure is formed over the MEMS substrate before bonding the MEMS substrate to the upper dielectric layer.
21. The method according to claim 17 , wherein the MEMS structure further comprises a first back plate and a second back plate, and wherein the particle filter layer includes an upper filter layer, a lower filter layer, and a middle filter layer disposed between the upper and lower filter layers, wherein the upper and lower filter layers comprise silicon nitride, and wherein the middle filter layer comprises polysilicon.
22. The method according to claim 17 , wherein patterning the filter stack includes removing segments of the upper dielectric layer, segments of the lower dielectric layer, and segments of the particle filter layer.
23. The method according to claim 17 , further comprising:
performing a dry etching process on the MEMS substrate to define pillars in the MEMS substrate before patterning the MEMS substrate.
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US16/542,479 US10941034B1 (en) | 2019-08-16 | 2019-08-16 | Particle filter for MEMS device |
TW108138998A TWI718729B (en) | 2019-08-16 | 2019-10-29 | Microphone, microelectromechanical systems device and method for manufacturing thereof |
CN201911087537.5A CN112399291B (en) | 2019-08-16 | 2019-11-08 | Microphone, micro-electro-mechanical system device and manufacturing method thereof |
US17/192,989 US11649162B2 (en) | 2019-08-16 | 2021-03-05 | Particle filter for MEMS device |
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US16/542,479 US10941034B1 (en) | 2019-08-16 | 2019-08-16 | Particle filter for MEMS device |
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US11649162B2 (en) | 2023-05-16 |
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TW202108495A (en) | 2021-03-01 |
CN112399291A (en) | 2021-02-23 |
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